ra4e2_pac/
faci.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash/CPU Interface"]
28unsafe impl ::core::marker::Send for super::Faci {}
29unsafe impl ::core::marker::Sync for super::Faci {}
30impl super::Faci {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "Flash Access Status Register"]
37    #[inline(always)]
38    pub const fn fastat(
39        &self,
40    ) -> &'static crate::common::Reg<self::Fastat_SPEC, crate::common::RW> {
41        unsafe {
42            crate::common::Reg::<self::Fastat_SPEC, crate::common::RW>::from_ptr(
43                self._svd2pac_as_ptr().add(16usize),
44            )
45        }
46    }
47
48    #[doc = "Flash Access Error Interrupt Enable Register"]
49    #[inline(always)]
50    pub const fn faeint(
51        &self,
52    ) -> &'static crate::common::Reg<self::Faeint_SPEC, crate::common::RW> {
53        unsafe {
54            crate::common::Reg::<self::Faeint_SPEC, crate::common::RW>::from_ptr(
55                self._svd2pac_as_ptr().add(20usize),
56            )
57        }
58    }
59
60    #[doc = "Flash Ready Interrupt Enable Register"]
61    #[inline(always)]
62    pub const fn frdyie(
63        &self,
64    ) -> &'static crate::common::Reg<self::Frdyie_SPEC, crate::common::RW> {
65        unsafe {
66            crate::common::Reg::<self::Frdyie_SPEC, crate::common::RW>::from_ptr(
67                self._svd2pac_as_ptr().add(24usize),
68            )
69        }
70    }
71
72    #[doc = "FACI Command Start Address Register"]
73    #[inline(always)]
74    pub const fn fsaddr(
75        &self,
76    ) -> &'static crate::common::Reg<self::Fsaddr_SPEC, crate::common::RW> {
77        unsafe {
78            crate::common::Reg::<self::Fsaddr_SPEC, crate::common::RW>::from_ptr(
79                self._svd2pac_as_ptr().add(48usize),
80            )
81        }
82    }
83
84    #[doc = "FACI Command End Address Register"]
85    #[inline(always)]
86    pub const fn feaddr(
87        &self,
88    ) -> &'static crate::common::Reg<self::Feaddr_SPEC, crate::common::RW> {
89        unsafe {
90            crate::common::Reg::<self::Feaddr_SPEC, crate::common::RW>::from_ptr(
91                self._svd2pac_as_ptr().add(52usize),
92            )
93        }
94    }
95
96    #[doc = "Flash P/E Mode Entry Protection Register"]
97    #[inline(always)]
98    pub const fn fmeprot(
99        &self,
100    ) -> &'static crate::common::Reg<self::Fmeprot_SPEC, crate::common::RW> {
101        unsafe {
102            crate::common::Reg::<self::Fmeprot_SPEC, crate::common::RW>::from_ptr(
103                self._svd2pac_as_ptr().add(68usize),
104            )
105        }
106    }
107
108    #[doc = "Flash Block Protection for Secure Register"]
109    #[inline(always)]
110    pub const fn fbprot1(
111        &self,
112    ) -> &'static crate::common::Reg<self::Fbprot1_SPEC, crate::common::RW> {
113        unsafe {
114            crate::common::Reg::<self::Fbprot1_SPEC, crate::common::RW>::from_ptr(
115                self._svd2pac_as_ptr().add(124usize),
116            )
117        }
118    }
119
120    #[doc = "Flash Status Register"]
121    #[inline(always)]
122    pub const fn fstatr(
123        &self,
124    ) -> &'static crate::common::Reg<self::Fstatr_SPEC, crate::common::RW> {
125        unsafe {
126            crate::common::Reg::<self::Fstatr_SPEC, crate::common::RW>::from_ptr(
127                self._svd2pac_as_ptr().add(128usize),
128            )
129        }
130    }
131
132    #[doc = "Flash P/E Mode Entry Register"]
133    #[inline(always)]
134    pub const fn fentryr(
135        &self,
136    ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
137        unsafe {
138            crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
139                self._svd2pac_as_ptr().add(132usize),
140            )
141        }
142    }
143
144    #[doc = "Flash Sequencer Setup Initialization Register"]
145    #[inline(always)]
146    pub const fn fsuinitr(
147        &self,
148    ) -> &'static crate::common::Reg<self::Fsuinitr_SPEC, crate::common::RW> {
149        unsafe {
150            crate::common::Reg::<self::Fsuinitr_SPEC, crate::common::RW>::from_ptr(
151                self._svd2pac_as_ptr().add(140usize),
152            )
153        }
154    }
155
156    #[doc = "FACI Command Register"]
157    #[inline(always)]
158    pub const fn fcmdr(&self) -> &'static crate::common::Reg<self::Fcmdr_SPEC, crate::common::R> {
159        unsafe {
160            crate::common::Reg::<self::Fcmdr_SPEC, crate::common::R>::from_ptr(
161                self._svd2pac_as_ptr().add(160usize),
162            )
163        }
164    }
165
166    #[doc = "Blank Check Control Register"]
167    #[inline(always)]
168    pub const fn fbccnt(
169        &self,
170    ) -> &'static crate::common::Reg<self::Fbccnt_SPEC, crate::common::RW> {
171        unsafe {
172            crate::common::Reg::<self::Fbccnt_SPEC, crate::common::RW>::from_ptr(
173                self._svd2pac_as_ptr().add(208usize),
174            )
175        }
176    }
177
178    #[doc = "Blank Check Status Register"]
179    #[inline(always)]
180    pub const fn fbcstat(
181        &self,
182    ) -> &'static crate::common::Reg<self::Fbcstat_SPEC, crate::common::RW> {
183        unsafe {
184            crate::common::Reg::<self::Fbcstat_SPEC, crate::common::RW>::from_ptr(
185                self._svd2pac_as_ptr().add(212usize),
186            )
187        }
188    }
189
190    #[doc = "Data Flash Programming Start Address Register"]
191    #[inline(always)]
192    pub const fn fpsaddr(
193        &self,
194    ) -> &'static crate::common::Reg<self::Fpsaddr_SPEC, crate::common::RW> {
195        unsafe {
196            crate::common::Reg::<self::Fpsaddr_SPEC, crate::common::RW>::from_ptr(
197                self._svd2pac_as_ptr().add(216usize),
198            )
199        }
200    }
201
202    #[doc = "Flash Startup Area Select Monitor Register"]
203    #[inline(always)]
204    pub const fn fsuasmon(
205        &self,
206    ) -> &'static crate::common::Reg<self::Fsuasmon_SPEC, crate::common::R> {
207        unsafe {
208            crate::common::Reg::<self::Fsuasmon_SPEC, crate::common::R>::from_ptr(
209                self._svd2pac_as_ptr().add(220usize),
210            )
211        }
212    }
213
214    #[doc = "Flash Sequencer Processing Switching Register"]
215    #[inline(always)]
216    pub const fn fcpsr(&self) -> &'static crate::common::Reg<self::Fcpsr_SPEC, crate::common::RW> {
217        unsafe {
218            crate::common::Reg::<self::Fcpsr_SPEC, crate::common::RW>::from_ptr(
219                self._svd2pac_as_ptr().add(224usize),
220            )
221        }
222    }
223
224    #[doc = "Flash Sequencer Processing Clock Notification Register"]
225    #[inline(always)]
226    pub const fn fpckar(
227        &self,
228    ) -> &'static crate::common::Reg<self::Fpckar_SPEC, crate::common::RW> {
229        unsafe {
230            crate::common::Reg::<self::Fpckar_SPEC, crate::common::RW>::from_ptr(
231                self._svd2pac_as_ptr().add(228usize),
232            )
233        }
234    }
235
236    #[doc = "Flash Startup Area Control Register"]
237    #[inline(always)]
238    pub const fn fsuacr(
239        &self,
240    ) -> &'static crate::common::Reg<self::Fsuacr_SPEC, crate::common::RW> {
241        unsafe {
242            crate::common::Reg::<self::Fsuacr_SPEC, crate::common::RW>::from_ptr(
243                self._svd2pac_as_ptr().add(232usize),
244            )
245        }
246    }
247}
248#[doc(hidden)]
249#[derive(Copy, Clone, Eq, PartialEq)]
250pub struct Fastat_SPEC;
251impl crate::sealed::RegSpec for Fastat_SPEC {
252    type DataType = u8;
253}
254#[doc = "Flash Access Status Register"]
255pub type Fastat = crate::RegValueT<Fastat_SPEC>;
256
257impl Fastat {
258    #[doc = "Data Flash Memory Access Violation Flag"]
259    #[inline(always)]
260    pub fn dfae(
261        self,
262    ) -> crate::common::RegisterField<3, 0x1, 1, 0, fastat::Dfae, Fastat_SPEC, crate::common::RW>
263    {
264        crate::common::RegisterField::<3,0x1,1,0,fastat::Dfae, Fastat_SPEC,crate::common::RW>::from_register(self,0)
265    }
266    #[doc = "Command Lock Flag"]
267    #[inline(always)]
268    pub fn cmdlk(
269        self,
270    ) -> crate::common::RegisterField<4, 0x1, 1, 0, fastat::Cmdlk, Fastat_SPEC, crate::common::R>
271    {
272        crate::common::RegisterField::<4,0x1,1,0,fastat::Cmdlk, Fastat_SPEC,crate::common::R>::from_register(self,0)
273    }
274    #[doc = "Code Flash Memory Access Violation Flag"]
275    #[inline(always)]
276    pub fn cfae(
277        self,
278    ) -> crate::common::RegisterField<7, 0x1, 1, 0, fastat::Cfae, Fastat_SPEC, crate::common::RW>
279    {
280        crate::common::RegisterField::<7,0x1,1,0,fastat::Cfae, Fastat_SPEC,crate::common::RW>::from_register(self,0)
281    }
282}
283impl ::core::default::Default for Fastat {
284    #[inline(always)]
285    fn default() -> Fastat {
286        <crate::RegValueT<Fastat_SPEC> as RegisterValue<_>>::new(0)
287    }
288}
289pub mod fastat {
290
291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
292    pub struct Dfae_SPEC;
293    pub type Dfae = crate::EnumBitfieldStruct<u8, Dfae_SPEC>;
294    impl Dfae {
295        #[doc = "No data flash memory access violation has occurred"]
296        pub const _0: Self = Self::new(0);
297        #[doc = "A data flash memory access violation has occurred."]
298        pub const _1: Self = Self::new(1);
299    }
300    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
301    pub struct Cmdlk_SPEC;
302    pub type Cmdlk = crate::EnumBitfieldStruct<u8, Cmdlk_SPEC>;
303    impl Cmdlk {
304        #[doc = "The flash sequencer is not in the command-locked state"]
305        pub const _0: Self = Self::new(0);
306        #[doc = "The flash sequencer is in the command-locked state."]
307        pub const _1: Self = Self::new(1);
308    }
309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
310    pub struct Cfae_SPEC;
311    pub type Cfae = crate::EnumBitfieldStruct<u8, Cfae_SPEC>;
312    impl Cfae {
313        #[doc = "No code flash memory access violation has occurred"]
314        pub const _0: Self = Self::new(0);
315        #[doc = "A code flash memory access violation has occurred."]
316        pub const _1: Self = Self::new(1);
317    }
318}
319#[doc(hidden)]
320#[derive(Copy, Clone, Eq, PartialEq)]
321pub struct Faeint_SPEC;
322impl crate::sealed::RegSpec for Faeint_SPEC {
323    type DataType = u8;
324}
325#[doc = "Flash Access Error Interrupt Enable Register"]
326pub type Faeint = crate::RegValueT<Faeint_SPEC>;
327
328impl Faeint {
329    #[doc = "Data Flash Memory Access Violation Interrupt Enable"]
330    #[inline(always)]
331    pub fn dfaeie(
332        self,
333    ) -> crate::common::RegisterField<3, 0x1, 1, 0, faeint::Dfaeie, Faeint_SPEC, crate::common::RW>
334    {
335        crate::common::RegisterField::<3,0x1,1,0,faeint::Dfaeie, Faeint_SPEC,crate::common::RW>::from_register(self,0)
336    }
337    #[doc = "Command Lock Interrupt Enable"]
338    #[inline(always)]
339    pub fn cmdlkie(
340        self,
341    ) -> crate::common::RegisterField<4, 0x1, 1, 0, faeint::Cmdlkie, Faeint_SPEC, crate::common::RW>
342    {
343        crate::common::RegisterField::<4,0x1,1,0,faeint::Cmdlkie, Faeint_SPEC,crate::common::RW>::from_register(self,0)
344    }
345    #[doc = "Code Flash Memory Access Violation Interrupt Enable"]
346    #[inline(always)]
347    pub fn cfaeie(
348        self,
349    ) -> crate::common::RegisterField<7, 0x1, 1, 0, faeint::Cfaeie, Faeint_SPEC, crate::common::RW>
350    {
351        crate::common::RegisterField::<7,0x1,1,0,faeint::Cfaeie, Faeint_SPEC,crate::common::RW>::from_register(self,0)
352    }
353}
354impl ::core::default::Default for Faeint {
355    #[inline(always)]
356    fn default() -> Faeint {
357        <crate::RegValueT<Faeint_SPEC> as RegisterValue<_>>::new(152)
358    }
359}
360pub mod faeint {
361
362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
363    pub struct Dfaeie_SPEC;
364    pub type Dfaeie = crate::EnumBitfieldStruct<u8, Dfaeie_SPEC>;
365    impl Dfaeie {
366        #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.DFAE is set to 1"]
367        pub const _0: Self = Self::new(0);
368        #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.DFAE is set to 1."]
369        pub const _1: Self = Self::new(1);
370    }
371    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
372    pub struct Cmdlkie_SPEC;
373    pub type Cmdlkie = crate::EnumBitfieldStruct<u8, Cmdlkie_SPEC>;
374    impl Cmdlkie {
375        #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CMDLK is set to 1"]
376        pub const _0: Self = Self::new(0);
377        #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CMDLK is set to 1."]
378        pub const _1: Self = Self::new(1);
379    }
380    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
381    pub struct Cfaeie_SPEC;
382    pub type Cfaeie = crate::EnumBitfieldStruct<u8, Cfaeie_SPEC>;
383    impl Cfaeie {
384        #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CFAE is set to 1"]
385        pub const _0: Self = Self::new(0);
386        #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CFAE is set to 1."]
387        pub const _1: Self = Self::new(1);
388    }
389}
390#[doc(hidden)]
391#[derive(Copy, Clone, Eq, PartialEq)]
392pub struct Frdyie_SPEC;
393impl crate::sealed::RegSpec for Frdyie_SPEC {
394    type DataType = u8;
395}
396#[doc = "Flash Ready Interrupt Enable Register"]
397pub type Frdyie = crate::RegValueT<Frdyie_SPEC>;
398
399impl Frdyie {
400    #[doc = "Flash Ready Interrupt Enable"]
401    #[inline(always)]
402    pub fn frdyie(
403        self,
404    ) -> crate::common::RegisterField<0, 0x1, 1, 0, frdyie::Frdyie, Frdyie_SPEC, crate::common::RW>
405    {
406        crate::common::RegisterField::<0,0x1,1,0,frdyie::Frdyie, Frdyie_SPEC,crate::common::RW>::from_register(self,0)
407    }
408}
409impl ::core::default::Default for Frdyie {
410    #[inline(always)]
411    fn default() -> Frdyie {
412        <crate::RegValueT<Frdyie_SPEC> as RegisterValue<_>>::new(0)
413    }
414}
415pub mod frdyie {
416
417    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
418    pub struct Frdyie_SPEC;
419    pub type Frdyie = crate::EnumBitfieldStruct<u8, Frdyie_SPEC>;
420    impl Frdyie {
421        #[doc = "Generation of an FRDY interrupt request is disabled"]
422        pub const _0: Self = Self::new(0);
423        #[doc = "Generation of an FRDY interrupt request is enabled."]
424        pub const _1: Self = Self::new(1);
425    }
426}
427#[doc(hidden)]
428#[derive(Copy, Clone, Eq, PartialEq)]
429pub struct Fsaddr_SPEC;
430impl crate::sealed::RegSpec for Fsaddr_SPEC {
431    type DataType = u32;
432}
433#[doc = "FACI Command Start Address Register"]
434pub type Fsaddr = crate::RegValueT<Fsaddr_SPEC>;
435
436impl NoBitfieldReg<Fsaddr_SPEC> for Fsaddr {}
437impl ::core::default::Default for Fsaddr {
438    #[inline(always)]
439    fn default() -> Fsaddr {
440        <crate::RegValueT<Fsaddr_SPEC> as RegisterValue<_>>::new(0)
441    }
442}
443
444#[doc(hidden)]
445#[derive(Copy, Clone, Eq, PartialEq)]
446pub struct Feaddr_SPEC;
447impl crate::sealed::RegSpec for Feaddr_SPEC {
448    type DataType = u32;
449}
450#[doc = "FACI Command End Address Register"]
451pub type Feaddr = crate::RegValueT<Feaddr_SPEC>;
452
453impl Feaddr {
454    #[doc = "End Address for FACI Command Processing"]
455    #[inline(always)]
456    pub fn feaddr(
457        self,
458    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, Feaddr_SPEC, crate::common::RW>
459    {
460        crate::common::RegisterField::<0,0xffffffff,1,0,u32, Feaddr_SPEC,crate::common::RW>::from_register(self,0)
461    }
462}
463impl ::core::default::Default for Feaddr {
464    #[inline(always)]
465    fn default() -> Feaddr {
466        <crate::RegValueT<Feaddr_SPEC> as RegisterValue<_>>::new(0)
467    }
468}
469
470#[doc(hidden)]
471#[derive(Copy, Clone, Eq, PartialEq)]
472pub struct Fmeprot_SPEC;
473impl crate::sealed::RegSpec for Fmeprot_SPEC {
474    type DataType = u16;
475}
476#[doc = "Flash P/E Mode Entry Protection Register"]
477pub type Fmeprot = crate::RegValueT<Fmeprot_SPEC>;
478
479impl Fmeprot {
480    #[doc = "Code Flash P/E Mode Entry Protection"]
481    #[inline(always)]
482    pub fn ceprot(
483        self,
484    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fmeprot::Ceprot, Fmeprot_SPEC, crate::common::RW>
485    {
486        crate::common::RegisterField::<0,0x1,1,0,fmeprot::Ceprot, Fmeprot_SPEC,crate::common::RW>::from_register(self,0)
487    }
488    #[doc = "Key Code"]
489    #[inline(always)]
490    pub fn key(
491        self,
492    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fmeprot_SPEC, crate::common::W> {
493        crate::common::RegisterField::<8,0xff,1,0,u8, Fmeprot_SPEC,crate::common::W>::from_register(self,0)
494    }
495}
496impl ::core::default::Default for Fmeprot {
497    #[inline(always)]
498    fn default() -> Fmeprot {
499        <crate::RegValueT<Fmeprot_SPEC> as RegisterValue<_>>::new(1)
500    }
501}
502pub mod fmeprot {
503
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Ceprot_SPEC;
506    pub type Ceprot = crate::EnumBitfieldStruct<u8, Ceprot_SPEC>;
507    impl Ceprot {
508        #[doc = "FENTRYC bit is not protected"]
509        pub const _0: Self = Self::new(0);
510        #[doc = "FENTRYC bit is protected."]
511        pub const _1: Self = Self::new(1);
512    }
513}
514#[doc(hidden)]
515#[derive(Copy, Clone, Eq, PartialEq)]
516pub struct Fbprot1_SPEC;
517impl crate::sealed::RegSpec for Fbprot1_SPEC {
518    type DataType = u16;
519}
520#[doc = "Flash Block Protection for Secure Register"]
521pub type Fbprot1 = crate::RegValueT<Fbprot1_SPEC>;
522
523impl Fbprot1 {
524    #[doc = "Block Protection for Secure Cancel"]
525    #[inline(always)]
526    pub fn bpcn1(
527        self,
528    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fbprot1::Bpcn1, Fbprot1_SPEC, crate::common::RW>
529    {
530        crate::common::RegisterField::<0,0x1,1,0,fbprot1::Bpcn1, Fbprot1_SPEC,crate::common::RW>::from_register(self,0)
531    }
532    #[doc = "Key Code"]
533    #[inline(always)]
534    pub fn key(
535        self,
536    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fbprot1_SPEC, crate::common::W> {
537        crate::common::RegisterField::<8,0xff,1,0,u8, Fbprot1_SPEC,crate::common::W>::from_register(self,0)
538    }
539}
540impl ::core::default::Default for Fbprot1 {
541    #[inline(always)]
542    fn default() -> Fbprot1 {
543        <crate::RegValueT<Fbprot1_SPEC> as RegisterValue<_>>::new(0)
544    }
545}
546pub mod fbprot1 {
547
548    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
549    pub struct Bpcn1_SPEC;
550    pub type Bpcn1 = crate::EnumBitfieldStruct<u8, Bpcn1_SPEC>;
551    impl Bpcn1 {
552        #[doc = "Block protection is enabled"]
553        pub const _0: Self = Self::new(0);
554        #[doc = "Block protection is disabled."]
555        pub const _1: Self = Self::new(1);
556    }
557}
558#[doc(hidden)]
559#[derive(Copy, Clone, Eq, PartialEq)]
560pub struct Fstatr_SPEC;
561impl crate::sealed::RegSpec for Fstatr_SPEC {
562    type DataType = u32;
563}
564#[doc = "Flash Status Register"]
565pub type Fstatr = crate::RegValueT<Fstatr_SPEC>;
566
567impl Fstatr {
568    #[doc = "Flash Write/Erase Protect Error Flag"]
569    #[inline(always)]
570    pub fn flweerr(
571        self,
572    ) -> crate::common::RegisterField<6, 0x1, 1, 0, fstatr::Flweerr, Fstatr_SPEC, crate::common::R>
573    {
574        crate::common::RegisterField::<6,0x1,1,0,fstatr::Flweerr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
575    }
576    #[doc = "Programming Suspend Status Flag"]
577    #[inline(always)]
578    pub fn prgspd(
579        self,
580    ) -> crate::common::RegisterField<8, 0x1, 1, 0, fstatr::Prgspd, Fstatr_SPEC, crate::common::R>
581    {
582        crate::common::RegisterField::<8,0x1,1,0,fstatr::Prgspd, Fstatr_SPEC,crate::common::R>::from_register(self,0)
583    }
584    #[doc = "Erasure Suspend Status Flag"]
585    #[inline(always)]
586    pub fn ersspd(
587        self,
588    ) -> crate::common::RegisterField<9, 0x1, 1, 0, fstatr::Ersspd, Fstatr_SPEC, crate::common::R>
589    {
590        crate::common::RegisterField::<9,0x1,1,0,fstatr::Ersspd, Fstatr_SPEC,crate::common::R>::from_register(self,0)
591    }
592    #[doc = "Data Buffer Full Flag"]
593    #[inline(always)]
594    pub fn dbfull(
595        self,
596    ) -> crate::common::RegisterField<10, 0x1, 1, 0, fstatr::Dbfull, Fstatr_SPEC, crate::common::R>
597    {
598        crate::common::RegisterField::<10,0x1,1,0,fstatr::Dbfull, Fstatr_SPEC,crate::common::R>::from_register(self,0)
599    }
600    #[doc = "Suspend Ready Flag"]
601    #[inline(always)]
602    pub fn susrdy(
603        self,
604    ) -> crate::common::RegisterField<11, 0x1, 1, 0, fstatr::Susrdy, Fstatr_SPEC, crate::common::R>
605    {
606        crate::common::RegisterField::<11,0x1,1,0,fstatr::Susrdy, Fstatr_SPEC,crate::common::R>::from_register(self,0)
607    }
608    #[doc = "Programming Error Flag"]
609    #[inline(always)]
610    pub fn prgerr(
611        self,
612    ) -> crate::common::RegisterField<12, 0x1, 1, 0, fstatr::Prgerr, Fstatr_SPEC, crate::common::R>
613    {
614        crate::common::RegisterField::<12,0x1,1,0,fstatr::Prgerr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
615    }
616    #[doc = "Erasure Error Flag"]
617    #[inline(always)]
618    pub fn erserr(
619        self,
620    ) -> crate::common::RegisterField<13, 0x1, 1, 0, fstatr::Erserr, Fstatr_SPEC, crate::common::R>
621    {
622        crate::common::RegisterField::<13,0x1,1,0,fstatr::Erserr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
623    }
624    #[doc = "Illegal Command Error Flag"]
625    #[inline(always)]
626    pub fn ilglerr(
627        self,
628    ) -> crate::common::RegisterField<14, 0x1, 1, 0, fstatr::Ilglerr, Fstatr_SPEC, crate::common::R>
629    {
630        crate::common::RegisterField::<14,0x1,1,0,fstatr::Ilglerr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
631    }
632    #[doc = "Flash Ready Flag"]
633    #[inline(always)]
634    pub fn frdy(
635        self,
636    ) -> crate::common::RegisterField<15, 0x1, 1, 0, fstatr::Frdy, Fstatr_SPEC, crate::common::R>
637    {
638        crate::common::RegisterField::<15,0x1,1,0,fstatr::Frdy, Fstatr_SPEC,crate::common::R>::from_register(self,0)
639    }
640    #[doc = "Other Error"]
641    #[inline(always)]
642    pub fn oterr(
643        self,
644    ) -> crate::common::RegisterField<20, 0x1, 1, 0, fstatr::Oterr, Fstatr_SPEC, crate::common::R>
645    {
646        crate::common::RegisterField::<20,0x1,1,0,fstatr::Oterr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
647    }
648    #[doc = "Security Error"]
649    #[inline(always)]
650    pub fn secerr(
651        self,
652    ) -> crate::common::RegisterField<21, 0x1, 1, 0, fstatr::Secerr, Fstatr_SPEC, crate::common::R>
653    {
654        crate::common::RegisterField::<21,0x1,1,0,fstatr::Secerr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
655    }
656    #[doc = "FENTRY Setting Error"]
657    #[inline(always)]
658    pub fn feseterr(
659        self,
660    ) -> crate::common::RegisterField<22, 0x1, 1, 0, fstatr::Feseterr, Fstatr_SPEC, crate::common::R>
661    {
662        crate::common::RegisterField::<22,0x1,1,0,fstatr::Feseterr, Fstatr_SPEC,crate::common::R>::from_register(self,0)
663    }
664    #[doc = "Illegal Command Error"]
665    #[inline(always)]
666    pub fn ilgcomerr(
667        self,
668    ) -> crate::common::RegisterField<23, 0x1, 1, 0, fstatr::Ilgcomerr, Fstatr_SPEC, crate::common::R>
669    {
670        crate::common::RegisterField::<
671            23,
672            0x1,
673            1,
674            0,
675            fstatr::Ilgcomerr,
676            Fstatr_SPEC,
677            crate::common::R,
678        >::from_register(self, 0)
679    }
680}
681impl ::core::default::Default for Fstatr {
682    #[inline(always)]
683    fn default() -> Fstatr {
684        <crate::RegValueT<Fstatr_SPEC> as RegisterValue<_>>::new(32768)
685    }
686}
687pub mod fstatr {
688
689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
690    pub struct Flweerr_SPEC;
691    pub type Flweerr = crate::EnumBitfieldStruct<u8, Flweerr_SPEC>;
692    impl Flweerr {
693        #[doc = "An error has not occurred"]
694        pub const _0: Self = Self::new(0);
695        #[doc = "An error has occurred."]
696        pub const _1: Self = Self::new(1);
697    }
698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
699    pub struct Prgspd_SPEC;
700    pub type Prgspd = crate::EnumBitfieldStruct<u8, Prgspd_SPEC>;
701    impl Prgspd {
702        #[doc = "The flash sequencer is not in the programming suspension processing state or programming suspended state"]
703        pub const _0: Self = Self::new(0);
704        #[doc = "The flash sequencer is in the programming suspension processing state or programming suspended state."]
705        pub const _1: Self = Self::new(1);
706    }
707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
708    pub struct Ersspd_SPEC;
709    pub type Ersspd = crate::EnumBitfieldStruct<u8, Ersspd_SPEC>;
710    impl Ersspd {
711        #[doc = "The flash sequencer is not in the erasure suspension processing state or the erasure suspended state"]
712        pub const _0: Self = Self::new(0);
713        #[doc = "The flash sequencer is in the erasure suspension processing state or the erasure suspended state."]
714        pub const _1: Self = Self::new(1);
715    }
716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
717    pub struct Dbfull_SPEC;
718    pub type Dbfull = crate::EnumBitfieldStruct<u8, Dbfull_SPEC>;
719    impl Dbfull {
720        #[doc = "The data buffer is empty"]
721        pub const _0: Self = Self::new(0);
722        #[doc = "The data buffer is full."]
723        pub const _1: Self = Self::new(1);
724    }
725    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
726    pub struct Susrdy_SPEC;
727    pub type Susrdy = crate::EnumBitfieldStruct<u8, Susrdy_SPEC>;
728    impl Susrdy {
729        #[doc = "The flash sequencer cannot receive P/E suspend commands"]
730        pub const _0: Self = Self::new(0);
731        #[doc = "The flash sequencer can receive P/E suspend commands."]
732        pub const _1: Self = Self::new(1);
733    }
734    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
735    pub struct Prgerr_SPEC;
736    pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
737    impl Prgerr {
738        #[doc = "Programming has completed successfully"]
739        pub const _0: Self = Self::new(0);
740        #[doc = "An error has occurred during programming."]
741        pub const _1: Self = Self::new(1);
742    }
743    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
744    pub struct Erserr_SPEC;
745    pub type Erserr = crate::EnumBitfieldStruct<u8, Erserr_SPEC>;
746    impl Erserr {
747        #[doc = "Erasure has completed successfully"]
748        pub const _0: Self = Self::new(0);
749        #[doc = "An error has occurred during erasure."]
750        pub const _1: Self = Self::new(1);
751    }
752    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
753    pub struct Ilglerr_SPEC;
754    pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
755    impl Ilglerr {
756        #[doc = "The flash sequencer has not detected an illegal FACI command or illegal flash memory access"]
757        pub const _0: Self = Self::new(0);
758        #[doc = "The flash sequencer has detected an illegal FACI command or illegal flash memory access."]
759        pub const _1: Self = Self::new(1);
760    }
761    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
762    pub struct Frdy_SPEC;
763    pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
764    impl Frdy {
765        #[doc = "Program, Block Erase, Multi Block Erase, P/E suspend, P/E resume, Forced Stop, Blank Check, or Configuration set command processing is in progress"]
766        pub const _0: Self = Self::new(0);
767        #[doc = "None of the above is in progress."]
768        pub const _1: Self = Self::new(1);
769    }
770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
771    pub struct Oterr_SPEC;
772    pub type Oterr = crate::EnumBitfieldStruct<u8, Oterr_SPEC>;
773    impl Oterr {
774        #[doc = "A status clear or forced stop command processing is complete"]
775        pub const _0: Self = Self::new(0);
776        #[doc = "An error has occurred."]
777        pub const _1: Self = Self::new(1);
778    }
779    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
780    pub struct Secerr_SPEC;
781    pub type Secerr = crate::EnumBitfieldStruct<u8, Secerr_SPEC>;
782    impl Secerr {
783        #[doc = "A status clear or forced stop command processing is complete"]
784        pub const _0: Self = Self::new(0);
785        #[doc = "An error has occurred."]
786        pub const _1: Self = Self::new(1);
787    }
788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
789    pub struct Feseterr_SPEC;
790    pub type Feseterr = crate::EnumBitfieldStruct<u8, Feseterr_SPEC>;
791    impl Feseterr {
792        #[doc = "A status clear or forced stop command processing is complete"]
793        pub const _0: Self = Self::new(0);
794        #[doc = "An error has occurred."]
795        pub const _1: Self = Self::new(1);
796    }
797    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
798    pub struct Ilgcomerr_SPEC;
799    pub type Ilgcomerr = crate::EnumBitfieldStruct<u8, Ilgcomerr_SPEC>;
800    impl Ilgcomerr {
801        #[doc = "A status clear or forced stop command processing is complete"]
802        pub const _0: Self = Self::new(0);
803        #[doc = "An error has occurred."]
804        pub const _1: Self = Self::new(1);
805    }
806}
807#[doc(hidden)]
808#[derive(Copy, Clone, Eq, PartialEq)]
809pub struct Fentryr_SPEC;
810impl crate::sealed::RegSpec for Fentryr_SPEC {
811    type DataType = u16;
812}
813#[doc = "Flash P/E Mode Entry Register"]
814pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
815
816impl Fentryr {
817    #[doc = "Code Flash P/E Mode Entry"]
818    #[inline(always)]
819    pub fn fentryc(
820        self,
821    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fentryr::Fentryc, Fentryr_SPEC, crate::common::RW>
822    {
823        crate::common::RegisterField::<
824            0,
825            0x1,
826            1,
827            0,
828            fentryr::Fentryc,
829            Fentryr_SPEC,
830            crate::common::RW,
831        >::from_register(self, 0)
832    }
833    #[doc = "Data Flash P/E Mode Entry"]
834    #[inline(always)]
835    pub fn fentryd(
836        self,
837    ) -> crate::common::RegisterField<7, 0x1, 1, 0, fentryr::Fentryd, Fentryr_SPEC, crate::common::RW>
838    {
839        crate::common::RegisterField::<
840            7,
841            0x1,
842            1,
843            0,
844            fentryr::Fentryd,
845            Fentryr_SPEC,
846            crate::common::RW,
847        >::from_register(self, 0)
848    }
849    #[doc = "Key Code"]
850    #[inline(always)]
851    pub fn key(
852        self,
853    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fentryr_SPEC, crate::common::W> {
854        crate::common::RegisterField::<8,0xff,1,0,u8, Fentryr_SPEC,crate::common::W>::from_register(self,0)
855    }
856}
857impl ::core::default::Default for Fentryr {
858    #[inline(always)]
859    fn default() -> Fentryr {
860        <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
861    }
862}
863pub mod fentryr {
864
865    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
866    pub struct Fentryc_SPEC;
867    pub type Fentryc = crate::EnumBitfieldStruct<u8, Fentryc_SPEC>;
868    impl Fentryc {
869        #[doc = "Code flash is in read mode"]
870        pub const _0: Self = Self::new(0);
871        #[doc = "Code flash is in P/E mode."]
872        pub const _1: Self = Self::new(1);
873    }
874    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
875    pub struct Fentryd_SPEC;
876    pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
877    impl Fentryd {
878        #[doc = "Data flash is in read mode"]
879        pub const _0: Self = Self::new(0);
880        #[doc = "Data flash is in P/E mode."]
881        pub const _1: Self = Self::new(1);
882    }
883}
884#[doc(hidden)]
885#[derive(Copy, Clone, Eq, PartialEq)]
886pub struct Fsuinitr_SPEC;
887impl crate::sealed::RegSpec for Fsuinitr_SPEC {
888    type DataType = u16;
889}
890#[doc = "Flash Sequencer Setup Initialization Register"]
891pub type Fsuinitr = crate::RegValueT<Fsuinitr_SPEC>;
892
893impl Fsuinitr {
894    #[doc = "Set-Up Initialization"]
895    #[inline(always)]
896    pub fn suinit(
897        self,
898    ) -> crate::common::RegisterField<
899        0,
900        0x1,
901        1,
902        0,
903        fsuinitr::Suinit,
904        Fsuinitr_SPEC,
905        crate::common::RW,
906    > {
907        crate::common::RegisterField::<
908            0,
909            0x1,
910            1,
911            0,
912            fsuinitr::Suinit,
913            Fsuinitr_SPEC,
914            crate::common::RW,
915        >::from_register(self, 0)
916    }
917    #[doc = "Key Code"]
918    #[inline(always)]
919    pub fn key(
920        self,
921    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fsuinitr_SPEC, crate::common::W> {
922        crate::common::RegisterField::<8,0xff,1,0,u8, Fsuinitr_SPEC,crate::common::W>::from_register(self,0)
923    }
924}
925impl ::core::default::Default for Fsuinitr {
926    #[inline(always)]
927    fn default() -> Fsuinitr {
928        <crate::RegValueT<Fsuinitr_SPEC> as RegisterValue<_>>::new(0)
929    }
930}
931pub mod fsuinitr {
932
933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
934    pub struct Suinit_SPEC;
935    pub type Suinit = crate::EnumBitfieldStruct<u8, Suinit_SPEC>;
936    impl Suinit {
937        #[doc = "The FSADDR, FEADDR, FBPROT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers keep their current values"]
938        pub const _0: Self = Self::new(0);
939        #[doc = "The FSADDR, FEADDR, FBRPOT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers are initialized."]
940        pub const _1: Self = Self::new(1);
941    }
942}
943#[doc(hidden)]
944#[derive(Copy, Clone, Eq, PartialEq)]
945pub struct Fcmdr_SPEC;
946impl crate::sealed::RegSpec for Fcmdr_SPEC {
947    type DataType = u16;
948}
949#[doc = "FACI Command Register"]
950pub type Fcmdr = crate::RegValueT<Fcmdr_SPEC>;
951
952impl Fcmdr {
953    #[doc = "Pre-command Flag"]
954    #[inline(always)]
955    pub fn pcmdr(
956        self,
957    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Fcmdr_SPEC, crate::common::R> {
958        crate::common::RegisterField::<0,0xff,1,0,u8, Fcmdr_SPEC,crate::common::R>::from_register(self,0)
959    }
960    #[doc = "Command Flag"]
961    #[inline(always)]
962    pub fn cmdr(
963        self,
964    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fcmdr_SPEC, crate::common::R> {
965        crate::common::RegisterField::<8,0xff,1,0,u8, Fcmdr_SPEC,crate::common::R>::from_register(self,0)
966    }
967}
968impl ::core::default::Default for Fcmdr {
969    #[inline(always)]
970    fn default() -> Fcmdr {
971        <crate::RegValueT<Fcmdr_SPEC> as RegisterValue<_>>::new(0)
972    }
973}
974
975#[doc(hidden)]
976#[derive(Copy, Clone, Eq, PartialEq)]
977pub struct Fbccnt_SPEC;
978impl crate::sealed::RegSpec for Fbccnt_SPEC {
979    type DataType = u8;
980}
981#[doc = "Blank Check Control Register"]
982pub type Fbccnt = crate::RegValueT<Fbccnt_SPEC>;
983
984impl Fbccnt {
985    #[doc = "Blank Check Direction"]
986    #[inline(always)]
987    pub fn bcdir(
988        self,
989    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fbccnt::Bcdir, Fbccnt_SPEC, crate::common::RW>
990    {
991        crate::common::RegisterField::<0,0x1,1,0,fbccnt::Bcdir, Fbccnt_SPEC,crate::common::RW>::from_register(self,0)
992    }
993}
994impl ::core::default::Default for Fbccnt {
995    #[inline(always)]
996    fn default() -> Fbccnt {
997        <crate::RegValueT<Fbccnt_SPEC> as RegisterValue<_>>::new(0)
998    }
999}
1000pub mod fbccnt {
1001
1002    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1003    pub struct Bcdir_SPEC;
1004    pub type Bcdir = crate::EnumBitfieldStruct<u8, Bcdir_SPEC>;
1005    impl Bcdir {
1006        #[doc = "Blank checking is executed from the lower addresses to the higher addresses (incremental mode)"]
1007        pub const _0: Self = Self::new(0);
1008        #[doc = "Blank checking is executed from the higher addresses to the lower addresses (decremental mode)."]
1009        pub const _1: Self = Self::new(1);
1010    }
1011}
1012#[doc(hidden)]
1013#[derive(Copy, Clone, Eq, PartialEq)]
1014pub struct Fbcstat_SPEC;
1015impl crate::sealed::RegSpec for Fbcstat_SPEC {
1016    type DataType = u8;
1017}
1018#[doc = "Blank Check Status Register"]
1019pub type Fbcstat = crate::RegValueT<Fbcstat_SPEC>;
1020
1021impl Fbcstat {
1022    #[doc = "Blank Check Status Flag"]
1023    #[inline(always)]
1024    pub fn bcst(
1025        self,
1026    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fbcstat::Bcst, Fbcstat_SPEC, crate::common::R>
1027    {
1028        crate::common::RegisterField::<0,0x1,1,0,fbcstat::Bcst, Fbcstat_SPEC,crate::common::R>::from_register(self,0)
1029    }
1030}
1031impl ::core::default::Default for Fbcstat {
1032    #[inline(always)]
1033    fn default() -> Fbcstat {
1034        <crate::RegValueT<Fbcstat_SPEC> as RegisterValue<_>>::new(0)
1035    }
1036}
1037pub mod fbcstat {
1038
1039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1040    pub struct Bcst_SPEC;
1041    pub type Bcst = crate::EnumBitfieldStruct<u8, Bcst_SPEC>;
1042    impl Bcst {
1043        #[doc = "The target area is in the non-programmed state, that is, the area has been erased but has not yet been reprogrammed"]
1044        pub const _0: Self = Self::new(0);
1045        #[doc = "The target area has been programmed with 0s or 1s."]
1046        pub const _1: Self = Self::new(1);
1047    }
1048}
1049#[doc(hidden)]
1050#[derive(Copy, Clone, Eq, PartialEq)]
1051pub struct Fpsaddr_SPEC;
1052impl crate::sealed::RegSpec for Fpsaddr_SPEC {
1053    type DataType = u32;
1054}
1055#[doc = "Data Flash Programming Start Address Register"]
1056pub type Fpsaddr = crate::RegValueT<Fpsaddr_SPEC>;
1057
1058impl Fpsaddr {
1059    #[doc = "Programmed Area Start Address"]
1060    #[inline(always)]
1061    pub fn psadr(
1062        self,
1063    ) -> crate::common::RegisterField<0, 0x1ffff, 1, 0, u32, Fpsaddr_SPEC, crate::common::R> {
1064        crate::common::RegisterField::<0,0x1ffff,1,0,u32, Fpsaddr_SPEC,crate::common::R>::from_register(self,0)
1065    }
1066}
1067impl ::core::default::Default for Fpsaddr {
1068    #[inline(always)]
1069    fn default() -> Fpsaddr {
1070        <crate::RegValueT<Fpsaddr_SPEC> as RegisterValue<_>>::new(0)
1071    }
1072}
1073
1074#[doc(hidden)]
1075#[derive(Copy, Clone, Eq, PartialEq)]
1076pub struct Fsuasmon_SPEC;
1077impl crate::sealed::RegSpec for Fsuasmon_SPEC {
1078    type DataType = u32;
1079}
1080#[doc = "Flash Startup Area Select Monitor Register"]
1081pub type Fsuasmon = crate::RegValueT<Fsuasmon_SPEC>;
1082
1083impl Fsuasmon {
1084    #[doc = "Protection Programming Flag to set Boot Flag and Startup Area Control"]
1085    #[inline(always)]
1086    pub fn fspr(
1087        self,
1088    ) -> crate::common::RegisterField<15, 0x1, 1, 0, fsuasmon::Fspr, Fsuasmon_SPEC, crate::common::R>
1089    {
1090        crate::common::RegisterField::<15,0x1,1,0,fsuasmon::Fspr, Fsuasmon_SPEC,crate::common::R>::from_register(self,0)
1091    }
1092    #[doc = "Flag of Startup Area Select for Boot Swap"]
1093    #[inline(always)]
1094    pub fn btflg(
1095        self,
1096    ) -> crate::common::RegisterField<31, 0x1, 1, 0, fsuasmon::Btflg, Fsuasmon_SPEC, crate::common::R>
1097    {
1098        crate::common::RegisterField::<
1099            31,
1100            0x1,
1101            1,
1102            0,
1103            fsuasmon::Btflg,
1104            Fsuasmon_SPEC,
1105            crate::common::R,
1106        >::from_register(self, 0)
1107    }
1108}
1109impl ::core::default::Default for Fsuasmon {
1110    #[inline(always)]
1111    fn default() -> Fsuasmon {
1112        <crate::RegValueT<Fsuasmon_SPEC> as RegisterValue<_>>::new(0)
1113    }
1114}
1115pub mod fsuasmon {
1116
1117    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1118    pub struct Fspr_SPEC;
1119    pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1120    impl Fspr {
1121        #[doc = "Protected state"]
1122        pub const _0: Self = Self::new(0);
1123        #[doc = "Non-protected state."]
1124        pub const _1: Self = Self::new(1);
1125    }
1126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1127    pub struct Btflg_SPEC;
1128    pub type Btflg = crate::EnumBitfieldStruct<u8, Btflg_SPEC>;
1129    impl Btflg {
1130        #[doc = "The startup area is the alternate block (block 1)"]
1131        pub const _0: Self = Self::new(0);
1132        #[doc = "The startup area is the default block (block 0)."]
1133        pub const _1: Self = Self::new(1);
1134    }
1135}
1136#[doc(hidden)]
1137#[derive(Copy, Clone, Eq, PartialEq)]
1138pub struct Fcpsr_SPEC;
1139impl crate::sealed::RegSpec for Fcpsr_SPEC {
1140    type DataType = u16;
1141}
1142#[doc = "Flash Sequencer Processing Switching Register"]
1143pub type Fcpsr = crate::RegValueT<Fcpsr_SPEC>;
1144
1145impl Fcpsr {
1146    #[doc = "Erasure Suspend Mode"]
1147    #[inline(always)]
1148    pub fn esuspmd(
1149        self,
1150    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fcpsr::Esuspmd, Fcpsr_SPEC, crate::common::RW>
1151    {
1152        crate::common::RegisterField::<0,0x1,1,0,fcpsr::Esuspmd, Fcpsr_SPEC,crate::common::RW>::from_register(self,0)
1153    }
1154}
1155impl ::core::default::Default for Fcpsr {
1156    #[inline(always)]
1157    fn default() -> Fcpsr {
1158        <crate::RegValueT<Fcpsr_SPEC> as RegisterValue<_>>::new(0)
1159    }
1160}
1161pub mod fcpsr {
1162
1163    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1164    pub struct Esuspmd_SPEC;
1165    pub type Esuspmd = crate::EnumBitfieldStruct<u8, Esuspmd_SPEC>;
1166    impl Esuspmd {
1167        #[doc = "Suspension priority mode"]
1168        pub const _0: Self = Self::new(0);
1169        #[doc = "Erasure priority mode."]
1170        pub const _1: Self = Self::new(1);
1171    }
1172}
1173#[doc(hidden)]
1174#[derive(Copy, Clone, Eq, PartialEq)]
1175pub struct Fpckar_SPEC;
1176impl crate::sealed::RegSpec for Fpckar_SPEC {
1177    type DataType = u16;
1178}
1179#[doc = "Flash Sequencer Processing Clock Notification Register"]
1180pub type Fpckar = crate::RegValueT<Fpckar_SPEC>;
1181
1182impl Fpckar {
1183    #[doc = "Flash Sequencer Operating Clock Notification"]
1184    #[inline(always)]
1185    pub fn pcka(
1186        self,
1187    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Fpckar_SPEC, crate::common::RW> {
1188        crate::common::RegisterField::<0,0xff,1,0,u8, Fpckar_SPEC,crate::common::RW>::from_register(self,0)
1189    }
1190    #[doc = "Key Code"]
1191    #[inline(always)]
1192    pub fn key(
1193        self,
1194    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fpckar_SPEC, crate::common::W> {
1195        crate::common::RegisterField::<8,0xff,1,0,u8, Fpckar_SPEC,crate::common::W>::from_register(self,0)
1196    }
1197}
1198impl ::core::default::Default for Fpckar {
1199    #[inline(always)]
1200    fn default() -> Fpckar {
1201        <crate::RegValueT<Fpckar_SPEC> as RegisterValue<_>>::new(50)
1202    }
1203}
1204
1205#[doc(hidden)]
1206#[derive(Copy, Clone, Eq, PartialEq)]
1207pub struct Fsuacr_SPEC;
1208impl crate::sealed::RegSpec for Fsuacr_SPEC {
1209    type DataType = u16;
1210}
1211#[doc = "Flash Startup Area Control Register"]
1212pub type Fsuacr = crate::RegValueT<Fsuacr_SPEC>;
1213
1214impl Fsuacr {
1215    #[doc = "Startup Area Select"]
1216    #[inline(always)]
1217    pub fn sas(
1218        self,
1219    ) -> crate::common::RegisterField<0, 0x3, 1, 0, fsuacr::Sas, Fsuacr_SPEC, crate::common::RW>
1220    {
1221        crate::common::RegisterField::<0,0x3,1,0,fsuacr::Sas, Fsuacr_SPEC,crate::common::RW>::from_register(self,0)
1222    }
1223    #[doc = "Key Code"]
1224    #[inline(always)]
1225    pub fn key(
1226        self,
1227    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Fsuacr_SPEC, crate::common::W> {
1228        crate::common::RegisterField::<8,0xff,1,0,u8, Fsuacr_SPEC,crate::common::W>::from_register(self,0)
1229    }
1230}
1231impl ::core::default::Default for Fsuacr {
1232    #[inline(always)]
1233    fn default() -> Fsuacr {
1234        <crate::RegValueT<Fsuacr_SPEC> as RegisterValue<_>>::new(0)
1235    }
1236}
1237pub mod fsuacr {
1238
1239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1240    pub struct Sas_SPEC;
1241    pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1242    impl Sas {
1243        #[doc = "Startup area is selected by BTFLG bit"]
1244        pub const _00: Self = Self::new(0);
1245        #[doc = "Startup area is selected by BTFLG bit"]
1246        pub const _01: Self = Self::new(1);
1247        #[doc = "Startup area is temporarily switched to the default area (block 0)"]
1248        pub const _10: Self = Self::new(2);
1249        #[doc = "Startup area is temporarily switched to the alternate area (block 1)."]
1250        pub const _11: Self = Self::new(3);
1251    }
1252}
ra4e2_pac/faci.rs

ra4e2_pac/
faci.rs
