ra4e2_pac/
sram.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SRAM Control"]
28unsafe impl ::core::marker::Send for super::Sram {}
29unsafe impl ::core::marker::Sync for super::Sram {}
30impl super::Sram {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "SRAM Parity Error Operation After Detection Register"]
37    #[inline(always)]
38    pub const fn parioad(
39        &self,
40    ) -> &'static crate::common::Reg<self::Parioad_SPEC, crate::common::RW> {
41        unsafe {
42            crate::common::Reg::<self::Parioad_SPEC, crate::common::RW>::from_ptr(
43                self._svd2pac_as_ptr().add(0usize),
44            )
45        }
46    }
47
48    #[doc = "SRAM Protection Register"]
49    #[inline(always)]
50    pub const fn sramprcr(
51        &self,
52    ) -> &'static crate::common::Reg<self::Sramprcr_SPEC, crate::common::RW> {
53        unsafe {
54            crate::common::Reg::<self::Sramprcr_SPEC, crate::common::RW>::from_ptr(
55                self._svd2pac_as_ptr().add(4usize),
56            )
57        }
58    }
59
60    #[doc = "SRAM Wait State Control Register"]
61    #[inline(always)]
62    pub const fn sramwtsc(
63        &self,
64    ) -> &'static crate::common::Reg<self::Sramwtsc_SPEC, crate::common::RW> {
65        unsafe {
66            crate::common::Reg::<self::Sramwtsc_SPEC, crate::common::RW>::from_ptr(
67                self._svd2pac_as_ptr().add(8usize),
68            )
69        }
70    }
71
72    #[doc = "SRAM Protection Register 2"]
73    #[inline(always)]
74    pub const fn sramprcr2(
75        &self,
76    ) -> &'static crate::common::Reg<self::Sramprcr2_SPEC, crate::common::RW> {
77        unsafe {
78            crate::common::Reg::<self::Sramprcr2_SPEC, crate::common::RW>::from_ptr(
79                self._svd2pac_as_ptr().add(12usize),
80            )
81        }
82    }
83
84    #[doc = "ECC Operating Mode Control Register"]
85    #[inline(always)]
86    pub const fn eccmode(
87        &self,
88    ) -> &'static crate::common::Reg<self::Eccmode_SPEC, crate::common::RW> {
89        unsafe {
90            crate::common::Reg::<self::Eccmode_SPEC, crate::common::RW>::from_ptr(
91                self._svd2pac_as_ptr().add(192usize),
92            )
93        }
94    }
95
96    #[doc = "ECC 2-Bit Error Status Register"]
97    #[inline(always)]
98    pub const fn ecc2sts(
99        &self,
100    ) -> &'static crate::common::Reg<self::Ecc2Sts_SPEC, crate::common::RW> {
101        unsafe {
102            crate::common::Reg::<self::Ecc2Sts_SPEC, crate::common::RW>::from_ptr(
103                self._svd2pac_as_ptr().add(193usize),
104            )
105        }
106    }
107
108    #[doc = "ECC 1-Bit Error Information Update Enable Register"]
109    #[inline(always)]
110    pub const fn ecc1stsen(
111        &self,
112    ) -> &'static crate::common::Reg<self::Ecc1Stsen_SPEC, crate::common::RW> {
113        unsafe {
114            crate::common::Reg::<self::Ecc1Stsen_SPEC, crate::common::RW>::from_ptr(
115                self._svd2pac_as_ptr().add(194usize),
116            )
117        }
118    }
119
120    #[doc = "ECC 1-Bit Error Status Register"]
121    #[inline(always)]
122    pub const fn ecc1sts(
123        &self,
124    ) -> &'static crate::common::Reg<self::Ecc1Sts_SPEC, crate::common::RW> {
125        unsafe {
126            crate::common::Reg::<self::Ecc1Sts_SPEC, crate::common::RW>::from_ptr(
127                self._svd2pac_as_ptr().add(195usize),
128            )
129        }
130    }
131
132    #[doc = "ECC Protection Register"]
133    #[inline(always)]
134    pub const fn eccprcr(
135        &self,
136    ) -> &'static crate::common::Reg<self::Eccprcr_SPEC, crate::common::RW> {
137        unsafe {
138            crate::common::Reg::<self::Eccprcr_SPEC, crate::common::RW>::from_ptr(
139                self._svd2pac_as_ptr().add(196usize),
140            )
141        }
142    }
143
144    #[doc = "ECC Protection Register 2"]
145    #[inline(always)]
146    pub const fn eccprcr2(
147        &self,
148    ) -> &'static crate::common::Reg<self::Eccprcr2_SPEC, crate::common::RW> {
149        unsafe {
150            crate::common::Reg::<self::Eccprcr2_SPEC, crate::common::RW>::from_ptr(
151                self._svd2pac_as_ptr().add(208usize),
152            )
153        }
154    }
155
156    #[doc = "ECC Test Control Register"]
157    #[inline(always)]
158    pub const fn eccetst(
159        &self,
160    ) -> &'static crate::common::Reg<self::Eccetst_SPEC, crate::common::RW> {
161        unsafe {
162            crate::common::Reg::<self::Eccetst_SPEC, crate::common::RW>::from_ptr(
163                self._svd2pac_as_ptr().add(212usize),
164            )
165        }
166    }
167
168    #[doc = "SRAM ECC Error Operation After Detection Register"]
169    #[inline(always)]
170    pub const fn eccoad(
171        &self,
172    ) -> &'static crate::common::Reg<self::Eccoad_SPEC, crate::common::RW> {
173        unsafe {
174            crate::common::Reg::<self::Eccoad_SPEC, crate::common::RW>::from_ptr(
175                self._svd2pac_as_ptr().add(216usize),
176            )
177        }
178    }
179}
180#[doc(hidden)]
181#[derive(Copy, Clone, Eq, PartialEq)]
182pub struct Parioad_SPEC;
183impl crate::sealed::RegSpec for Parioad_SPEC {
184    type DataType = u8;
185}
186#[doc = "SRAM Parity Error Operation After Detection Register"]
187pub type Parioad = crate::RegValueT<Parioad_SPEC>;
188
189impl Parioad {
190    #[doc = "Operation After Detection"]
191    #[inline(always)]
192    pub fn oad(
193        self,
194    ) -> crate::common::RegisterField<0, 0x1, 1, 0, parioad::Oad, Parioad_SPEC, crate::common::RW>
195    {
196        crate::common::RegisterField::<0,0x1,1,0,parioad::Oad, Parioad_SPEC,crate::common::RW>::from_register(self,0)
197    }
198}
199impl ::core::default::Default for Parioad {
200    #[inline(always)]
201    fn default() -> Parioad {
202        <crate::RegValueT<Parioad_SPEC> as RegisterValue<_>>::new(0)
203    }
204}
205pub mod parioad {
206
207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
208    pub struct Oad_SPEC;
209    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
210    impl Oad {
211        #[doc = "Non-maskable interrupt"]
212        pub const _0: Self = Self::new(0);
213        #[doc = "Reset"]
214        pub const _1: Self = Self::new(1);
215    }
216}
217#[doc(hidden)]
218#[derive(Copy, Clone, Eq, PartialEq)]
219pub struct Sramprcr_SPEC;
220impl crate::sealed::RegSpec for Sramprcr_SPEC {
221    type DataType = u8;
222}
223#[doc = "SRAM Protection Register"]
224pub type Sramprcr = crate::RegValueT<Sramprcr_SPEC>;
225
226impl Sramprcr {
227    #[doc = "Register Write Control"]
228    #[inline(always)]
229    pub fn sramprcr(
230        self,
231    ) -> crate::common::RegisterField<
232        0,
233        0x1,
234        1,
235        0,
236        sramprcr::Sramprcr,
237        Sramprcr_SPEC,
238        crate::common::RW,
239    > {
240        crate::common::RegisterField::<
241            0,
242            0x1,
243            1,
244            0,
245            sramprcr::Sramprcr,
246            Sramprcr_SPEC,
247            crate::common::RW,
248        >::from_register(self, 0)
249    }
250    #[doc = "Write Key Code"]
251    #[inline(always)]
252    pub fn kw(
253        self,
254    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, Sramprcr_SPEC, crate::common::W> {
255        crate::common::RegisterField::<1,0x7f,1,0,u8, Sramprcr_SPEC,crate::common::W>::from_register(self,0)
256    }
257}
258impl ::core::default::Default for Sramprcr {
259    #[inline(always)]
260    fn default() -> Sramprcr {
261        <crate::RegValueT<Sramprcr_SPEC> as RegisterValue<_>>::new(0)
262    }
263}
264pub mod sramprcr {
265
266    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
267    pub struct Sramprcr_SPEC;
268    pub type Sramprcr = crate::EnumBitfieldStruct<u8, Sramprcr_SPEC>;
269    impl Sramprcr {
270        #[doc = "Disable writes to protected registers"]
271        pub const _0: Self = Self::new(0);
272        #[doc = "Enable writes to protected registers"]
273        pub const _1: Self = Self::new(1);
274    }
275}
276#[doc(hidden)]
277#[derive(Copy, Clone, Eq, PartialEq)]
278pub struct Sramwtsc_SPEC;
279impl crate::sealed::RegSpec for Sramwtsc_SPEC {
280    type DataType = u8;
281}
282#[doc = "SRAM Wait State Control Register"]
283pub type Sramwtsc = crate::RegValueT<Sramwtsc_SPEC>;
284
285impl Sramwtsc {
286    #[doc = "SRAM0 wait enable"]
287    #[inline(always)]
288    pub fn sram0wten(
289        self,
290    ) -> crate::common::RegisterField<
291        0,
292        0x1,
293        1,
294        0,
295        sramwtsc::Sram0Wten,
296        Sramwtsc_SPEC,
297        crate::common::RW,
298    > {
299        crate::common::RegisterField::<
300            0,
301            0x1,
302            1,
303            0,
304            sramwtsc::Sram0Wten,
305            Sramwtsc_SPEC,
306            crate::common::RW,
307        >::from_register(self, 0)
308    }
309}
310impl ::core::default::Default for Sramwtsc {
311    #[inline(always)]
312    fn default() -> Sramwtsc {
313        <crate::RegValueT<Sramwtsc_SPEC> as RegisterValue<_>>::new(1)
314    }
315}
316pub mod sramwtsc {
317
318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
319    pub struct Sram0Wten_SPEC;
320    pub type Sram0Wten = crate::EnumBitfieldStruct<u8, Sram0Wten_SPEC>;
321    impl Sram0Wten {
322        #[doc = "No wait"]
323        pub const _0: Self = Self::new(0);
324        #[doc = "Add wait state in read access cycle to SRAM0"]
325        pub const _1: Self = Self::new(1);
326    }
327}
328#[doc(hidden)]
329#[derive(Copy, Clone, Eq, PartialEq)]
330pub struct Sramprcr2_SPEC;
331impl crate::sealed::RegSpec for Sramprcr2_SPEC {
332    type DataType = u8;
333}
334#[doc = "SRAM Protection Register 2"]
335pub type Sramprcr2 = crate::RegValueT<Sramprcr2_SPEC>;
336
337impl Sramprcr2 {
338    #[doc = "Register Write Control"]
339    #[inline(always)]
340    pub fn sramprcr2(
341        self,
342    ) -> crate::common::RegisterField<
343        0,
344        0x1,
345        1,
346        0,
347        sramprcr2::Sramprcr2,
348        Sramprcr2_SPEC,
349        crate::common::RW,
350    > {
351        crate::common::RegisterField::<
352            0,
353            0x1,
354            1,
355            0,
356            sramprcr2::Sramprcr2,
357            Sramprcr2_SPEC,
358            crate::common::RW,
359        >::from_register(self, 0)
360    }
361    #[doc = "Write Key Code"]
362    #[inline(always)]
363    pub fn kw(
364        self,
365    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, Sramprcr2_SPEC, crate::common::W> {
366        crate::common::RegisterField::<1,0x7f,1,0,u8, Sramprcr2_SPEC,crate::common::W>::from_register(self,0)
367    }
368}
369impl ::core::default::Default for Sramprcr2 {
370    #[inline(always)]
371    fn default() -> Sramprcr2 {
372        <crate::RegValueT<Sramprcr2_SPEC> as RegisterValue<_>>::new(0)
373    }
374}
375pub mod sramprcr2 {
376
377    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
378    pub struct Sramprcr2_SPEC;
379    pub type Sramprcr2 = crate::EnumBitfieldStruct<u8, Sramprcr2_SPEC>;
380    impl Sramprcr2 {
381        #[doc = "Disable writes to the protectedregisters"]
382        pub const _0: Self = Self::new(0);
383        #[doc = "Enable writes to the protected registers"]
384        pub const _1: Self = Self::new(1);
385    }
386}
387#[doc(hidden)]
388#[derive(Copy, Clone, Eq, PartialEq)]
389pub struct Eccmode_SPEC;
390impl crate::sealed::RegSpec for Eccmode_SPEC {
391    type DataType = u8;
392}
393#[doc = "ECC Operating Mode Control Register"]
394pub type Eccmode = crate::RegValueT<Eccmode_SPEC>;
395
396impl Eccmode {
397    #[doc = "ECC Operating Mode Select"]
398    #[inline(always)]
399    pub fn eccmod(
400        self,
401    ) -> crate::common::RegisterField<0, 0x3, 1, 0, eccmode::Eccmod, Eccmode_SPEC, crate::common::RW>
402    {
403        crate::common::RegisterField::<0,0x3,1,0,eccmode::Eccmod, Eccmode_SPEC,crate::common::RW>::from_register(self,0)
404    }
405}
406impl ::core::default::Default for Eccmode {
407    #[inline(always)]
408    fn default() -> Eccmode {
409        <crate::RegValueT<Eccmode_SPEC> as RegisterValue<_>>::new(0)
410    }
411}
412pub mod eccmode {
413
414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
415    pub struct Eccmod_SPEC;
416    pub type Eccmod = crate::EnumBitfieldStruct<u8, Eccmod_SPEC>;
417    impl Eccmod {
418        #[doc = "Disable ECC function"]
419        pub const _00: Self = Self::new(0);
420        #[doc = "Setting prohibited"]
421        pub const _01: Self = Self::new(1);
422        #[doc = "Enable ECC function without error checking"]
423        pub const _10: Self = Self::new(2);
424        #[doc = "Enable ECC function with error checking"]
425        pub const _11: Self = Self::new(3);
426    }
427}
428#[doc(hidden)]
429#[derive(Copy, Clone, Eq, PartialEq)]
430pub struct Ecc2Sts_SPEC;
431impl crate::sealed::RegSpec for Ecc2Sts_SPEC {
432    type DataType = u8;
433}
434#[doc = "ECC 2-Bit Error Status Register"]
435pub type Ecc2Sts = crate::RegValueT<Ecc2Sts_SPEC>;
436
437impl Ecc2Sts {
438    #[doc = "ECC 2-Bit Error Status"]
439    #[inline(always)]
440    pub fn ecc2err(
441        self,
442    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ecc2sts::Ecc2Err, Ecc2Sts_SPEC, crate::common::RW>
443    {
444        crate::common::RegisterField::<
445            0,
446            0x1,
447            1,
448            0,
449            ecc2sts::Ecc2Err,
450            Ecc2Sts_SPEC,
451            crate::common::RW,
452        >::from_register(self, 0)
453    }
454}
455impl ::core::default::Default for Ecc2Sts {
456    #[inline(always)]
457    fn default() -> Ecc2Sts {
458        <crate::RegValueT<Ecc2Sts_SPEC> as RegisterValue<_>>::new(0)
459    }
460}
461pub mod ecc2sts {
462
463    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
464    pub struct Ecc2Err_SPEC;
465    pub type Ecc2Err = crate::EnumBitfieldStruct<u8, Ecc2Err_SPEC>;
466    impl Ecc2Err {
467        #[doc = "No 2-bit ECC error occurred"]
468        pub const _0: Self = Self::new(0);
469        #[doc = "2-bit ECC error occurred"]
470        pub const _1: Self = Self::new(1);
471    }
472}
473#[doc(hidden)]
474#[derive(Copy, Clone, Eq, PartialEq)]
475pub struct Ecc1Stsen_SPEC;
476impl crate::sealed::RegSpec for Ecc1Stsen_SPEC {
477    type DataType = u8;
478}
479#[doc = "ECC 1-Bit Error Information Update Enable Register"]
480pub type Ecc1Stsen = crate::RegValueT<Ecc1Stsen_SPEC>;
481
482impl Ecc1Stsen {
483    #[doc = "ECC 1-Bit Error Information Update Enable"]
484    #[inline(always)]
485    pub fn e1stsen(
486        self,
487    ) -> crate::common::RegisterField<
488        0,
489        0x1,
490        1,
491        0,
492        ecc1stsen::E1Stsen,
493        Ecc1Stsen_SPEC,
494        crate::common::RW,
495    > {
496        crate::common::RegisterField::<
497            0,
498            0x1,
499            1,
500            0,
501            ecc1stsen::E1Stsen,
502            Ecc1Stsen_SPEC,
503            crate::common::RW,
504        >::from_register(self, 0)
505    }
506}
507impl ::core::default::Default for Ecc1Stsen {
508    #[inline(always)]
509    fn default() -> Ecc1Stsen {
510        <crate::RegValueT<Ecc1Stsen_SPEC> as RegisterValue<_>>::new(0)
511    }
512}
513pub mod ecc1stsen {
514
515    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
516    pub struct E1Stsen_SPEC;
517    pub type E1Stsen = crate::EnumBitfieldStruct<u8, E1Stsen_SPEC>;
518    impl E1Stsen {
519        #[doc = "Disable updating of 1-bit ECC error information"]
520        pub const _0: Self = Self::new(0);
521        #[doc = "Enable updating of 1-bit ECC error information"]
522        pub const _1: Self = Self::new(1);
523    }
524}
525#[doc(hidden)]
526#[derive(Copy, Clone, Eq, PartialEq)]
527pub struct Ecc1Sts_SPEC;
528impl crate::sealed::RegSpec for Ecc1Sts_SPEC {
529    type DataType = u8;
530}
531#[doc = "ECC 1-Bit Error Status Register"]
532pub type Ecc1Sts = crate::RegValueT<Ecc1Sts_SPEC>;
533
534impl Ecc1Sts {
535    #[doc = "ECC 1-Bit Error Status"]
536    #[inline(always)]
537    pub fn ecc1err(
538        self,
539    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ecc1sts::Ecc1Err, Ecc1Sts_SPEC, crate::common::RW>
540    {
541        crate::common::RegisterField::<
542            0,
543            0x1,
544            1,
545            0,
546            ecc1sts::Ecc1Err,
547            Ecc1Sts_SPEC,
548            crate::common::RW,
549        >::from_register(self, 0)
550    }
551}
552impl ::core::default::Default for Ecc1Sts {
553    #[inline(always)]
554    fn default() -> Ecc1Sts {
555        <crate::RegValueT<Ecc1Sts_SPEC> as RegisterValue<_>>::new(0)
556    }
557}
558pub mod ecc1sts {
559
560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
561    pub struct Ecc1Err_SPEC;
562    pub type Ecc1Err = crate::EnumBitfieldStruct<u8, Ecc1Err_SPEC>;
563    impl Ecc1Err {
564        #[doc = "No 1-bit ECC error occurred"]
565        pub const _0: Self = Self::new(0);
566        #[doc = "1-bit ECC error occurred"]
567        pub const _1: Self = Self::new(1);
568    }
569}
570#[doc(hidden)]
571#[derive(Copy, Clone, Eq, PartialEq)]
572pub struct Eccprcr_SPEC;
573impl crate::sealed::RegSpec for Eccprcr_SPEC {
574    type DataType = u8;
575}
576#[doc = "ECC Protection Register"]
577pub type Eccprcr = crate::RegValueT<Eccprcr_SPEC>;
578
579impl Eccprcr {
580    #[doc = "Register Write Control"]
581    #[inline(always)]
582    pub fn eccprcr(
583        self,
584    ) -> crate::common::RegisterField<0, 0x1, 1, 0, eccprcr::Eccprcr, Eccprcr_SPEC, crate::common::RW>
585    {
586        crate::common::RegisterField::<
587            0,
588            0x1,
589            1,
590            0,
591            eccprcr::Eccprcr,
592            Eccprcr_SPEC,
593            crate::common::RW,
594        >::from_register(self, 0)
595    }
596    #[doc = "Write Key Code"]
597    #[inline(always)]
598    pub fn kw(
599        self,
600    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, eccprcr::Kw, Eccprcr_SPEC, crate::common::W>
601    {
602        crate::common::RegisterField::<1,0x7f,1,0,eccprcr::Kw, Eccprcr_SPEC,crate::common::W>::from_register(self,0)
603    }
604}
605impl ::core::default::Default for Eccprcr {
606    #[inline(always)]
607    fn default() -> Eccprcr {
608        <crate::RegValueT<Eccprcr_SPEC> as RegisterValue<_>>::new(0)
609    }
610}
611pub mod eccprcr {
612
613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
614    pub struct Eccprcr_SPEC;
615    pub type Eccprcr = crate::EnumBitfieldStruct<u8, Eccprcr_SPEC>;
616    impl Eccprcr {
617        #[doc = "Disable writes to the protected registers"]
618        pub const _0: Self = Self::new(0);
619        #[doc = "Enable writes to the protected registers"]
620        pub const _1: Self = Self::new(1);
621    }
622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
623    pub struct Kw_SPEC;
624    pub type Kw = crate::EnumBitfieldStruct<u8, Kw_SPEC>;
625    impl Kw {
626        #[doc = "Enable write to the ECCPRCR bit"]
627        pub const _0_X_78: Self = Self::new(120);
628        #[doc = "Disable write to the ECCPRCR bit"]
629        pub const OTHERS: Self = Self::new(0);
630    }
631}
632#[doc(hidden)]
633#[derive(Copy, Clone, Eq, PartialEq)]
634pub struct Eccprcr2_SPEC;
635impl crate::sealed::RegSpec for Eccprcr2_SPEC {
636    type DataType = u8;
637}
638#[doc = "ECC Protection Register 2"]
639pub type Eccprcr2 = crate::RegValueT<Eccprcr2_SPEC>;
640
641impl Eccprcr2 {
642    #[doc = "Register Write Control"]
643    #[inline(always)]
644    pub fn eccprcr2(
645        self,
646    ) -> crate::common::RegisterField<
647        0,
648        0x1,
649        1,
650        0,
651        eccprcr2::Eccprcr2,
652        Eccprcr2_SPEC,
653        crate::common::RW,
654    > {
655        crate::common::RegisterField::<
656            0,
657            0x1,
658            1,
659            0,
660            eccprcr2::Eccprcr2,
661            Eccprcr2_SPEC,
662            crate::common::RW,
663        >::from_register(self, 0)
664    }
665    #[doc = "Write Key Code"]
666    #[inline(always)]
667    pub fn kw2(
668        self,
669    ) -> crate::common::RegisterField<1, 0x7f, 1, 0, eccprcr2::Kw2, Eccprcr2_SPEC, crate::common::W>
670    {
671        crate::common::RegisterField::<1,0x7f,1,0,eccprcr2::Kw2, Eccprcr2_SPEC,crate::common::W>::from_register(self,0)
672    }
673}
674impl ::core::default::Default for Eccprcr2 {
675    #[inline(always)]
676    fn default() -> Eccprcr2 {
677        <crate::RegValueT<Eccprcr2_SPEC> as RegisterValue<_>>::new(0)
678    }
679}
680pub mod eccprcr2 {
681
682    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
683    pub struct Eccprcr2_SPEC;
684    pub type Eccprcr2 = crate::EnumBitfieldStruct<u8, Eccprcr2_SPEC>;
685    impl Eccprcr2 {
686        #[doc = "Disable writes to the protected registers"]
687        pub const _0: Self = Self::new(0);
688        #[doc = "Enable writes to the protected registers"]
689        pub const _1: Self = Self::new(1);
690    }
691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
692    pub struct Kw2_SPEC;
693    pub type Kw2 = crate::EnumBitfieldStruct<u8, Kw2_SPEC>;
694    impl Kw2 {
695        #[doc = "Enable write to the ECCPRCR2 bit"]
696        pub const _0_X_78: Self = Self::new(120);
697        #[doc = "Disable write to the ECCPRCR2 bit"]
698        pub const OTHERS: Self = Self::new(0);
699    }
700}
701#[doc(hidden)]
702#[derive(Copy, Clone, Eq, PartialEq)]
703pub struct Eccetst_SPEC;
704impl crate::sealed::RegSpec for Eccetst_SPEC {
705    type DataType = u8;
706}
707#[doc = "ECC Test Control Register"]
708pub type Eccetst = crate::RegValueT<Eccetst_SPEC>;
709
710impl Eccetst {
711    #[doc = "ECC Bypass Select"]
712    #[inline(always)]
713    pub fn tstbyp(
714        self,
715    ) -> crate::common::RegisterField<0, 0x1, 1, 0, eccetst::Tstbyp, Eccetst_SPEC, crate::common::RW>
716    {
717        crate::common::RegisterField::<0,0x1,1,0,eccetst::Tstbyp, Eccetst_SPEC,crate::common::RW>::from_register(self,0)
718    }
719}
720impl ::core::default::Default for Eccetst {
721    #[inline(always)]
722    fn default() -> Eccetst {
723        <crate::RegValueT<Eccetst_SPEC> as RegisterValue<_>>::new(0)
724    }
725}
726pub mod eccetst {
727
728    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
729    pub struct Tstbyp_SPEC;
730    pub type Tstbyp = crate::EnumBitfieldStruct<u8, Tstbyp_SPEC>;
731    impl Tstbyp {
732        #[doc = "Disable ECC bypass"]
733        pub const _0: Self = Self::new(0);
734        #[doc = "Enable ECC bypass"]
735        pub const _1: Self = Self::new(1);
736    }
737}
738#[doc(hidden)]
739#[derive(Copy, Clone, Eq, PartialEq)]
740pub struct Eccoad_SPEC;
741impl crate::sealed::RegSpec for Eccoad_SPEC {
742    type DataType = u8;
743}
744#[doc = "SRAM ECC Error Operation After Detection Register"]
745pub type Eccoad = crate::RegValueT<Eccoad_SPEC>;
746
747impl Eccoad {
748    #[doc = "Operation After Detection"]
749    #[inline(always)]
750    pub fn oad(
751        self,
752    ) -> crate::common::RegisterField<0, 0x1, 1, 0, eccoad::Oad, Eccoad_SPEC, crate::common::RW>
753    {
754        crate::common::RegisterField::<0,0x1,1,0,eccoad::Oad, Eccoad_SPEC,crate::common::RW>::from_register(self,0)
755    }
756}
757impl ::core::default::Default for Eccoad {
758    #[inline(always)]
759    fn default() -> Eccoad {
760        <crate::RegValueT<Eccoad_SPEC> as RegisterValue<_>>::new(0)
761    }
762}
763pub mod eccoad {
764
765    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
766    pub struct Oad_SPEC;
767    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
768    impl Oad {
769        #[doc = "Non-maskable interrupt"]
770        pub const _0: Self = Self::new(0);
771        #[doc = "Reset"]
772        pub const _1: Self = Self::new(1);
773    }
774}
ra4e2_pac/sram.rs

ra4e2_pac/
sram.rs
