ra4e2_pac/
i3c.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"I3C Bus Interface"]
28unsafe impl ::core::marker::Send for super::I3C {}
29unsafe impl ::core::marker::Sync for super::I3C {}
30impl super::I3C {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "Protocol Selection Register"]
37    #[inline(always)]
38    pub const fn prts(&self) -> &'static crate::common::Reg<self::Prts_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Prts_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(0usize),
42            )
43        }
44    }
45
46    #[doc = "Clock Enable Control Resisters"]
47    #[inline(always)]
48    pub const fn cectl(&self) -> &'static crate::common::Reg<self::Cectl_SPEC, crate::common::RW> {
49        unsafe {
50            crate::common::Reg::<self::Cectl_SPEC, crate::common::RW>::from_ptr(
51                self._svd2pac_as_ptr().add(16usize),
52            )
53        }
54    }
55
56    #[doc = "Bus Control Register"]
57    #[inline(always)]
58    pub const fn bctl(&self) -> &'static crate::common::Reg<self::Bctl_SPEC, crate::common::RW> {
59        unsafe {
60            crate::common::Reg::<self::Bctl_SPEC, crate::common::RW>::from_ptr(
61                self._svd2pac_as_ptr().add(20usize),
62            )
63        }
64    }
65
66    #[doc = "Master Device Address Register"]
67    #[inline(always)]
68    pub const fn msdvad(
69        &self,
70    ) -> &'static crate::common::Reg<self::Msdvad_SPEC, crate::common::RW> {
71        unsafe {
72            crate::common::Reg::<self::Msdvad_SPEC, crate::common::RW>::from_ptr(
73                self._svd2pac_as_ptr().add(24usize),
74            )
75        }
76    }
77
78    #[doc = "Reset Control Register"]
79    #[inline(always)]
80    pub const fn rstctl(
81        &self,
82    ) -> &'static crate::common::Reg<self::Rstctl_SPEC, crate::common::RW> {
83        unsafe {
84            crate::common::Reg::<self::Rstctl_SPEC, crate::common::RW>::from_ptr(
85                self._svd2pac_as_ptr().add(32usize),
86            )
87        }
88    }
89
90    #[doc = "Present State Register"]
91    #[inline(always)]
92    pub const fn prsst(&self) -> &'static crate::common::Reg<self::Prsst_SPEC, crate::common::RW> {
93        unsafe {
94            crate::common::Reg::<self::Prsst_SPEC, crate::common::RW>::from_ptr(
95                self._svd2pac_as_ptr().add(36usize),
96            )
97        }
98    }
99
100    #[doc = "Internal Status Register"]
101    #[inline(always)]
102    pub const fn inst(&self) -> &'static crate::common::Reg<self::Inst_SPEC, crate::common::RW> {
103        unsafe {
104            crate::common::Reg::<self::Inst_SPEC, crate::common::RW>::from_ptr(
105                self._svd2pac_as_ptr().add(48usize),
106            )
107        }
108    }
109
110    #[doc = "Internal Status Enable Register"]
111    #[inline(always)]
112    pub const fn inste(&self) -> &'static crate::common::Reg<self::Inste_SPEC, crate::common::RW> {
113        unsafe {
114            crate::common::Reg::<self::Inste_SPEC, crate::common::RW>::from_ptr(
115                self._svd2pac_as_ptr().add(52usize),
116            )
117        }
118    }
119
120    #[doc = "Internal Interrupt Enable Register"]
121    #[inline(always)]
122    pub const fn inie(&self) -> &'static crate::common::Reg<self::Inie_SPEC, crate::common::RW> {
123        unsafe {
124            crate::common::Reg::<self::Inie_SPEC, crate::common::RW>::from_ptr(
125                self._svd2pac_as_ptr().add(56usize),
126            )
127        }
128    }
129
130    #[doc = "Internal Status Force Register"]
131    #[inline(always)]
132    pub const fn instfc(&self) -> &'static crate::common::Reg<self::Instfc_SPEC, crate::common::W> {
133        unsafe {
134            crate::common::Reg::<self::Instfc_SPEC, crate::common::W>::from_ptr(
135                self._svd2pac_as_ptr().add(60usize),
136            )
137        }
138    }
139
140    #[doc = "Device Characteristic Table Register"]
141    #[inline(always)]
142    pub const fn dvct(&self) -> &'static crate::common::Reg<self::Dvct_SPEC, crate::common::R> {
143        unsafe {
144            crate::common::Reg::<self::Dvct_SPEC, crate::common::R>::from_ptr(
145                self._svd2pac_as_ptr().add(68usize),
146            )
147        }
148    }
149
150    #[doc = "IBI Notify Control Register"]
151    #[inline(always)]
152    pub const fn ibinctl(
153        &self,
154    ) -> &'static crate::common::Reg<self::Ibinctl_SPEC, crate::common::RW> {
155        unsafe {
156            crate::common::Reg::<self::Ibinctl_SPEC, crate::common::RW>::from_ptr(
157                self._svd2pac_as_ptr().add(88usize),
158            )
159        }
160    }
161
162    #[doc = "Bus Function Control Register"]
163    #[inline(always)]
164    pub const fn bfctl(&self) -> &'static crate::common::Reg<self::Bfctl_SPEC, crate::common::RW> {
165        unsafe {
166            crate::common::Reg::<self::Bfctl_SPEC, crate::common::RW>::from_ptr(
167                self._svd2pac_as_ptr().add(96usize),
168            )
169        }
170    }
171
172    #[doc = "Slave Control Register"]
173    #[inline(always)]
174    pub const fn svctl(&self) -> &'static crate::common::Reg<self::Svctl_SPEC, crate::common::RW> {
175        unsafe {
176            crate::common::Reg::<self::Svctl_SPEC, crate::common::RW>::from_ptr(
177                self._svd2pac_as_ptr().add(100usize),
178            )
179        }
180    }
181
182    #[doc = "Reference Clock Control Register"]
183    #[inline(always)]
184    pub const fn refckctl(
185        &self,
186    ) -> &'static crate::common::Reg<self::Refckctl_SPEC, crate::common::RW> {
187        unsafe {
188            crate::common::Reg::<self::Refckctl_SPEC, crate::common::RW>::from_ptr(
189                self._svd2pac_as_ptr().add(112usize),
190            )
191        }
192    }
193
194    #[doc = "Standard Bit Rate Register"]
195    #[inline(always)]
196    pub const fn stdbr(&self) -> &'static crate::common::Reg<self::Stdbr_SPEC, crate::common::RW> {
197        unsafe {
198            crate::common::Reg::<self::Stdbr_SPEC, crate::common::RW>::from_ptr(
199                self._svd2pac_as_ptr().add(116usize),
200            )
201        }
202    }
203
204    #[doc = "Extended Bit Rate Register"]
205    #[inline(always)]
206    pub const fn extbr(&self) -> &'static crate::common::Reg<self::Extbr_SPEC, crate::common::RW> {
207        unsafe {
208            crate::common::Reg::<self::Extbr_SPEC, crate::common::RW>::from_ptr(
209                self._svd2pac_as_ptr().add(120usize),
210            )
211        }
212    }
213
214    #[doc = "Bus Free Condition Detection Time Register"]
215    #[inline(always)]
216    pub const fn bfrecdt(
217        &self,
218    ) -> &'static crate::common::Reg<self::Bfrecdt_SPEC, crate::common::RW> {
219        unsafe {
220            crate::common::Reg::<self::Bfrecdt_SPEC, crate::common::RW>::from_ptr(
221                self._svd2pac_as_ptr().add(124usize),
222            )
223        }
224    }
225
226    #[doc = "Bus Available Condition Detection Time Register"]
227    #[inline(always)]
228    pub const fn bavlcdt(
229        &self,
230    ) -> &'static crate::common::Reg<self::Bavlcdt_SPEC, crate::common::RW> {
231        unsafe {
232            crate::common::Reg::<self::Bavlcdt_SPEC, crate::common::RW>::from_ptr(
233                self._svd2pac_as_ptr().add(128usize),
234            )
235        }
236    }
237
238    #[doc = "Bus Idle Condition Detection Time Register"]
239    #[inline(always)]
240    pub const fn bidlcdt(
241        &self,
242    ) -> &'static crate::common::Reg<self::Bidlcdt_SPEC, crate::common::RW> {
243        unsafe {
244            crate::common::Reg::<self::Bidlcdt_SPEC, crate::common::RW>::from_ptr(
245                self._svd2pac_as_ptr().add(132usize),
246            )
247        }
248    }
249
250    #[doc = "Output Control Register"]
251    #[inline(always)]
252    pub const fn outctl(
253        &self,
254    ) -> &'static crate::common::Reg<self::Outctl_SPEC, crate::common::RW> {
255        unsafe {
256            crate::common::Reg::<self::Outctl_SPEC, crate::common::RW>::from_ptr(
257                self._svd2pac_as_ptr().add(136usize),
258            )
259        }
260    }
261
262    #[doc = "Input Control Register"]
263    #[inline(always)]
264    pub const fn inctl(&self) -> &'static crate::common::Reg<self::Inctl_SPEC, crate::common::RW> {
265        unsafe {
266            crate::common::Reg::<self::Inctl_SPEC, crate::common::RW>::from_ptr(
267                self._svd2pac_as_ptr().add(140usize),
268            )
269        }
270    }
271
272    #[doc = "Timeout Control Register"]
273    #[inline(always)]
274    pub const fn tmoctl(
275        &self,
276    ) -> &'static crate::common::Reg<self::Tmoctl_SPEC, crate::common::RW> {
277        unsafe {
278            crate::common::Reg::<self::Tmoctl_SPEC, crate::common::RW>::from_ptr(
279                self._svd2pac_as_ptr().add(144usize),
280            )
281        }
282    }
283
284    #[doc = "Wake Up Unit Control Register"]
285    #[inline(always)]
286    pub const fn wuctl(&self) -> &'static crate::common::Reg<self::Wuctl_SPEC, crate::common::RW> {
287        unsafe {
288            crate::common::Reg::<self::Wuctl_SPEC, crate::common::RW>::from_ptr(
289                self._svd2pac_as_ptr().add(152usize),
290            )
291        }
292    }
293
294    #[doc = "Acknowledge Control Register"]
295    #[inline(always)]
296    pub const fn ackctl(
297        &self,
298    ) -> &'static crate::common::Reg<self::Ackctl_SPEC, crate::common::RW> {
299        unsafe {
300            crate::common::Reg::<self::Ackctl_SPEC, crate::common::RW>::from_ptr(
301                self._svd2pac_as_ptr().add(160usize),
302            )
303        }
304    }
305
306    #[doc = "SCL Stretch Control Register"]
307    #[inline(always)]
308    pub const fn scstrctl(
309        &self,
310    ) -> &'static crate::common::Reg<self::Scstrctl_SPEC, crate::common::RW> {
311        unsafe {
312            crate::common::Reg::<self::Scstrctl_SPEC, crate::common::RW>::from_ptr(
313                self._svd2pac_as_ptr().add(164usize),
314            )
315        }
316    }
317
318    #[doc = "SCL Stalling Control Register"]
319    #[inline(always)]
320    pub const fn scstlctl(
321        &self,
322    ) -> &'static crate::common::Reg<self::Scstlctl_SPEC, crate::common::RW> {
323        unsafe {
324            crate::common::Reg::<self::Scstlctl_SPEC, crate::common::RW>::from_ptr(
325                self._svd2pac_as_ptr().add(176usize),
326            )
327        }
328    }
329
330    #[doc = "Slave Transfer Data Length Register 0"]
331    #[inline(always)]
332    pub const fn svtdlg0(
333        &self,
334    ) -> &'static crate::common::Reg<self::Svtdlg0_SPEC, crate::common::RW> {
335        unsafe {
336            crate::common::Reg::<self::Svtdlg0_SPEC, crate::common::RW>::from_ptr(
337                self._svd2pac_as_ptr().add(192usize),
338            )
339        }
340    }
341
342    #[doc = "Synchronous Timing Control Register"]
343    #[inline(always)]
344    pub const fn stctl(&self) -> &'static crate::common::Reg<self::Stctl_SPEC, crate::common::RW> {
345        unsafe {
346            crate::common::Reg::<self::Stctl_SPEC, crate::common::RW>::from_ptr(
347                self._svd2pac_as_ptr().add(288usize),
348            )
349        }
350    }
351
352    #[doc = "Asynchronous Timing Control Register"]
353    #[inline(always)]
354    pub const fn atctl(&self) -> &'static crate::common::Reg<self::Atctl_SPEC, crate::common::RW> {
355        unsafe {
356            crate::common::Reg::<self::Atctl_SPEC, crate::common::RW>::from_ptr(
357                self._svd2pac_as_ptr().add(292usize),
358            )
359        }
360    }
361
362    #[doc = "Asynchronous Timing Trigger Register"]
363    #[inline(always)]
364    pub const fn attrg(&self) -> &'static crate::common::Reg<self::Attrg_SPEC, crate::common::RW> {
365        unsafe {
366            crate::common::Reg::<self::Attrg_SPEC, crate::common::RW>::from_ptr(
367                self._svd2pac_as_ptr().add(296usize),
368            )
369        }
370    }
371
372    #[doc = "Asynchronous Timing Contorol Counter enable Register"]
373    #[inline(always)]
374    pub const fn atccnte(
375        &self,
376    ) -> &'static crate::common::Reg<self::Atccnte_SPEC, crate::common::RW> {
377        unsafe {
378            crate::common::Reg::<self::Atccnte_SPEC, crate::common::RW>::from_ptr(
379                self._svd2pac_as_ptr().add(300usize),
380            )
381        }
382    }
383
384    #[doc = "Condition Control Register"]
385    #[inline(always)]
386    pub const fn cndctl(
387        &self,
388    ) -> &'static crate::common::Reg<self::Cndctl_SPEC, crate::common::RW> {
389        unsafe {
390            crate::common::Reg::<self::Cndctl_SPEC, crate::common::RW>::from_ptr(
391                self._svd2pac_as_ptr().add(320usize),
392            )
393        }
394    }
395
396    #[doc = "Normal Command Queue Port Register"]
397    #[inline(always)]
398    pub const fn ncmdqp(&self) -> &'static crate::common::Reg<self::Ncmdqp_SPEC, crate::common::W> {
399        unsafe {
400            crate::common::Reg::<self::Ncmdqp_SPEC, crate::common::W>::from_ptr(
401                self._svd2pac_as_ptr().add(336usize),
402            )
403        }
404    }
405
406    #[doc = "Normal Response Queue Port Register"]
407    #[inline(always)]
408    pub const fn nrspqp(&self) -> &'static crate::common::Reg<self::Nrspqp_SPEC, crate::common::R> {
409        unsafe {
410            crate::common::Reg::<self::Nrspqp_SPEC, crate::common::R>::from_ptr(
411                self._svd2pac_as_ptr().add(340usize),
412            )
413        }
414    }
415
416    #[doc = "Normal Transfer Data Buffer Port Register 0"]
417    #[inline(always)]
418    pub const fn ntdtbp0(
419        &self,
420    ) -> &'static crate::common::Reg<self::Ntdtbp0_SPEC, crate::common::RW> {
421        unsafe {
422            crate::common::Reg::<self::Ntdtbp0_SPEC, crate::common::RW>::from_ptr(
423                self._svd2pac_as_ptr().add(344usize),
424            )
425        }
426    }
427
428    #[doc = "Normal Transfer Data Buffer Port Register 0"]
429    #[inline(always)]
430    pub const fn ntdtbp0_by(
431        &self,
432    ) -> &'static crate::common::Reg<self::Ntdtbp0By_SPEC, crate::common::RW> {
433        unsafe {
434            crate::common::Reg::<self::Ntdtbp0By_SPEC, crate::common::RW>::from_ptr(
435                self._svd2pac_as_ptr().add(344usize),
436            )
437        }
438    }
439
440    #[doc = "Normal IBI Queue Port Register"]
441    #[inline(always)]
442    pub const fn nibiqp(
443        &self,
444    ) -> &'static crate::common::Reg<self::Nibiqp_SPEC, crate::common::RW> {
445        unsafe {
446            crate::common::Reg::<self::Nibiqp_SPEC, crate::common::RW>::from_ptr(
447                self._svd2pac_as_ptr().add(380usize),
448            )
449        }
450    }
451
452    #[doc = "Normal Receive Status Queue Port Register"]
453    #[inline(always)]
454    pub const fn nrsqp(&self) -> &'static crate::common::Reg<self::Nrsqp_SPEC, crate::common::R> {
455        unsafe {
456            crate::common::Reg::<self::Nrsqp_SPEC, crate::common::R>::from_ptr(
457                self._svd2pac_as_ptr().add(384usize),
458            )
459        }
460    }
461
462    #[doc = "High Priority Command Queue Port Register"]
463    #[inline(always)]
464    pub const fn hcmdqp(&self) -> &'static crate::common::Reg<self::Hcmdqp_SPEC, crate::common::W> {
465        unsafe {
466            crate::common::Reg::<self::Hcmdqp_SPEC, crate::common::W>::from_ptr(
467                self._svd2pac_as_ptr().add(388usize),
468            )
469        }
470    }
471
472    #[doc = "High Priority Response Queue Port Register"]
473    #[inline(always)]
474    pub const fn hrspqp(&self) -> &'static crate::common::Reg<self::Hrspqp_SPEC, crate::common::R> {
475        unsafe {
476            crate::common::Reg::<self::Hrspqp_SPEC, crate::common::R>::from_ptr(
477                self._svd2pac_as_ptr().add(392usize),
478            )
479        }
480    }
481
482    #[doc = "High Priority Transfer Data Buffer Port Register"]
483    #[inline(always)]
484    pub const fn htdtbp(
485        &self,
486    ) -> &'static crate::common::Reg<self::Htdtbp_SPEC, crate::common::RW> {
487        unsafe {
488            crate::common::Reg::<self::Htdtbp_SPEC, crate::common::RW>::from_ptr(
489                self._svd2pac_as_ptr().add(396usize),
490            )
491        }
492    }
493
494    #[doc = "Normal Queue Threshold Control Register"]
495    #[inline(always)]
496    pub const fn nqthctl(
497        &self,
498    ) -> &'static crate::common::Reg<self::Nqthctl_SPEC, crate::common::RW> {
499        unsafe {
500            crate::common::Reg::<self::Nqthctl_SPEC, crate::common::RW>::from_ptr(
501                self._svd2pac_as_ptr().add(400usize),
502            )
503        }
504    }
505
506    #[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
507    #[inline(always)]
508    pub const fn ntbthctl0(
509        &self,
510    ) -> &'static crate::common::Reg<self::Ntbthctl0_SPEC, crate::common::RW> {
511        unsafe {
512            crate::common::Reg::<self::Ntbthctl0_SPEC, crate::common::RW>::from_ptr(
513                self._svd2pac_as_ptr().add(404usize),
514            )
515        }
516    }
517
518    #[doc = "Normal Receive Status Queue Threshold Control Register"]
519    #[inline(always)]
520    pub const fn nrqthctl(
521        &self,
522    ) -> &'static crate::common::Reg<self::Nrqthctl_SPEC, crate::common::RW> {
523        unsafe {
524            crate::common::Reg::<self::Nrqthctl_SPEC, crate::common::RW>::from_ptr(
525                self._svd2pac_as_ptr().add(448usize),
526            )
527        }
528    }
529
530    #[doc = "High Priority Queue Threshold Control Register"]
531    #[inline(always)]
532    pub const fn hqthctl(
533        &self,
534    ) -> &'static crate::common::Reg<self::Hqthctl_SPEC, crate::common::RW> {
535        unsafe {
536            crate::common::Reg::<self::Hqthctl_SPEC, crate::common::RW>::from_ptr(
537                self._svd2pac_as_ptr().add(452usize),
538            )
539        }
540    }
541
542    #[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
543    #[inline(always)]
544    pub const fn htbthctl(
545        &self,
546    ) -> &'static crate::common::Reg<self::Htbthctl_SPEC, crate::common::RW> {
547        unsafe {
548            crate::common::Reg::<self::Htbthctl_SPEC, crate::common::RW>::from_ptr(
549                self._svd2pac_as_ptr().add(456usize),
550            )
551        }
552    }
553
554    #[doc = "Bus Status Register"]
555    #[inline(always)]
556    pub const fn bst(&self) -> &'static crate::common::Reg<self::Bst_SPEC, crate::common::RW> {
557        unsafe {
558            crate::common::Reg::<self::Bst_SPEC, crate::common::RW>::from_ptr(
559                self._svd2pac_as_ptr().add(464usize),
560            )
561        }
562    }
563
564    #[doc = "Bus Status Enable Register"]
565    #[inline(always)]
566    pub const fn bste(&self) -> &'static crate::common::Reg<self::Bste_SPEC, crate::common::RW> {
567        unsafe {
568            crate::common::Reg::<self::Bste_SPEC, crate::common::RW>::from_ptr(
569                self._svd2pac_as_ptr().add(468usize),
570            )
571        }
572    }
573
574    #[doc = "Bus Interrupt Enable Register"]
575    #[inline(always)]
576    pub const fn bie(&self) -> &'static crate::common::Reg<self::Bie_SPEC, crate::common::RW> {
577        unsafe {
578            crate::common::Reg::<self::Bie_SPEC, crate::common::RW>::from_ptr(
579                self._svd2pac_as_ptr().add(472usize),
580            )
581        }
582    }
583
584    #[doc = "Bus Status Force Register"]
585    #[inline(always)]
586    pub const fn bstfc(&self) -> &'static crate::common::Reg<self::Bstfc_SPEC, crate::common::RW> {
587        unsafe {
588            crate::common::Reg::<self::Bstfc_SPEC, crate::common::RW>::from_ptr(
589                self._svd2pac_as_ptr().add(476usize),
590            )
591        }
592    }
593
594    #[doc = "Normal Transfer Status Register"]
595    #[inline(always)]
596    pub const fn ntst(&self) -> &'static crate::common::Reg<self::Ntst_SPEC, crate::common::RW> {
597        unsafe {
598            crate::common::Reg::<self::Ntst_SPEC, crate::common::RW>::from_ptr(
599                self._svd2pac_as_ptr().add(480usize),
600            )
601        }
602    }
603
604    #[doc = "Normal Transfer Status Enable Register"]
605    #[inline(always)]
606    pub const fn ntste(&self) -> &'static crate::common::Reg<self::Ntste_SPEC, crate::common::RW> {
607        unsafe {
608            crate::common::Reg::<self::Ntste_SPEC, crate::common::RW>::from_ptr(
609                self._svd2pac_as_ptr().add(484usize),
610            )
611        }
612    }
613
614    #[doc = "Normal Transfer Interrupt Enable Register"]
615    #[inline(always)]
616    pub const fn ntie(&self) -> &'static crate::common::Reg<self::Ntie_SPEC, crate::common::RW> {
617        unsafe {
618            crate::common::Reg::<self::Ntie_SPEC, crate::common::RW>::from_ptr(
619                self._svd2pac_as_ptr().add(488usize),
620            )
621        }
622    }
623
624    #[doc = "Normal Transfer Status Force Register"]
625    #[inline(always)]
626    pub const fn ntstfc(
627        &self,
628    ) -> &'static crate::common::Reg<self::Ntstfc_SPEC, crate::common::RW> {
629        unsafe {
630            crate::common::Reg::<self::Ntstfc_SPEC, crate::common::RW>::from_ptr(
631                self._svd2pac_as_ptr().add(492usize),
632            )
633        }
634    }
635
636    #[doc = "High Priority Transfer Status Register"]
637    #[inline(always)]
638    pub const fn htst(&self) -> &'static crate::common::Reg<self::Htst_SPEC, crate::common::RW> {
639        unsafe {
640            crate::common::Reg::<self::Htst_SPEC, crate::common::RW>::from_ptr(
641                self._svd2pac_as_ptr().add(512usize),
642            )
643        }
644    }
645
646    #[doc = "High Priority Transfer Status Enable Register"]
647    #[inline(always)]
648    pub const fn htste(&self) -> &'static crate::common::Reg<self::Htste_SPEC, crate::common::RW> {
649        unsafe {
650            crate::common::Reg::<self::Htste_SPEC, crate::common::RW>::from_ptr(
651                self._svd2pac_as_ptr().add(516usize),
652            )
653        }
654    }
655
656    #[doc = "High Priority Transfer Interrupt Enable Register"]
657    #[inline(always)]
658    pub const fn htie(&self) -> &'static crate::common::Reg<self::Htie_SPEC, crate::common::RW> {
659        unsafe {
660            crate::common::Reg::<self::Htie_SPEC, crate::common::RW>::from_ptr(
661                self._svd2pac_as_ptr().add(520usize),
662            )
663        }
664    }
665
666    #[doc = "High Priority Transfer Status Force Register"]
667    #[inline(always)]
668    pub const fn htstfc(
669        &self,
670    ) -> &'static crate::common::Reg<self::Htstfc_SPEC, crate::common::RW> {
671        unsafe {
672            crate::common::Reg::<self::Htstfc_SPEC, crate::common::RW>::from_ptr(
673                self._svd2pac_as_ptr().add(524usize),
674            )
675        }
676    }
677
678    #[doc = "Bus Condition Status Register"]
679    #[inline(always)]
680    pub const fn bcst(&self) -> &'static crate::common::Reg<self::Bcst_SPEC, crate::common::R> {
681        unsafe {
682            crate::common::Reg::<self::Bcst_SPEC, crate::common::R>::from_ptr(
683                self._svd2pac_as_ptr().add(528usize),
684            )
685        }
686    }
687
688    #[doc = "Slave Status Register"]
689    #[inline(always)]
690    pub const fn svst(&self) -> &'static crate::common::Reg<self::Svst_SPEC, crate::common::RW> {
691        unsafe {
692            crate::common::Reg::<self::Svst_SPEC, crate::common::RW>::from_ptr(
693                self._svd2pac_as_ptr().add(532usize),
694            )
695        }
696    }
697
698    #[doc = "Wake Up Unit Operating Status Register"]
699    #[inline(always)]
700    pub const fn wust(&self) -> &'static crate::common::Reg<self::Wust_SPEC, crate::common::R> {
701        unsafe {
702            crate::common::Reg::<self::Wust_SPEC, crate::common::R>::from_ptr(
703                self._svd2pac_as_ptr().add(536usize),
704            )
705        }
706    }
707
708    #[doc = "MsyncCNT Counter Capture Register"]
709    #[inline(always)]
710    pub const fn mrccpt(&self) -> &'static crate::common::Reg<self::Mrccpt_SPEC, crate::common::R> {
711        unsafe {
712            crate::common::Reg::<self::Mrccpt_SPEC, crate::common::R>::from_ptr(
713                self._svd2pac_as_ptr().add(540usize),
714            )
715        }
716    }
717
718    #[doc = "Device Address Table Basic Register %s"]
719    #[inline(always)]
720    pub const fn datbas(
721        &self,
722    ) -> &'static crate::common::ClusterRegisterArray<
723        crate::common::Reg<self::Datbas_SPEC, crate::common::RW>,
724        8,
725        0x8,
726    > {
727        unsafe {
728            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x224usize))
729        }
730    }
731
732    #[doc = "Extended Device Address Table Basic Register"]
733    #[inline(always)]
734    pub const fn exdatbas(
735        &self,
736    ) -> &'static crate::common::Reg<self::Exdatbas_SPEC, crate::common::RW> {
737        unsafe {
738            crate::common::Reg::<self::Exdatbas_SPEC, crate::common::RW>::from_ptr(
739                self._svd2pac_as_ptr().add(672usize),
740            )
741        }
742    }
743
744    #[doc = "Slave Device Address Table Basic Register 0"]
745    #[inline(always)]
746    pub const fn sdatbas0(
747        &self,
748    ) -> &'static crate::common::Reg<self::Sdatbas0_SPEC, crate::common::RW> {
749        unsafe {
750            crate::common::Reg::<self::Sdatbas0_SPEC, crate::common::RW>::from_ptr(
751                self._svd2pac_as_ptr().add(688usize),
752            )
753        }
754    }
755
756    #[doc = "Slave Device Address Table Basic Register 1"]
757    #[inline(always)]
758    pub const fn sdatbas1(
759        &self,
760    ) -> &'static crate::common::Reg<self::Sdatbas1_SPEC, crate::common::RW> {
761        unsafe {
762            crate::common::Reg::<self::Sdatbas1_SPEC, crate::common::RW>::from_ptr(
763                self._svd2pac_as_ptr().add(688usize),
764            )
765        }
766    }
767
768    #[doc = "Slave Device Address Table Basic Register 2"]
769    #[inline(always)]
770    pub const fn sdatbas2(
771        &self,
772    ) -> &'static crate::common::Reg<self::Sdatbas2_SPEC, crate::common::RW> {
773        unsafe {
774            crate::common::Reg::<self::Sdatbas2_SPEC, crate::common::RW>::from_ptr(
775                self._svd2pac_as_ptr().add(688usize),
776            )
777        }
778    }
779
780    #[doc = "Master Device Characteristic Table Register %s"]
781    #[inline(always)]
782    pub const fn msdct(
783        &self,
784    ) -> &'static crate::common::ClusterRegisterArray<
785        crate::common::Reg<self::Msdct_SPEC, crate::common::RW>,
786        8,
787        0x4,
788    > {
789        unsafe {
790            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2d0usize))
791        }
792    }
793
794    #[doc = "Slave Device Characteristic Table Register"]
795    #[inline(always)]
796    pub const fn svdct(&self) -> &'static crate::common::Reg<self::Svdct_SPEC, crate::common::RW> {
797        unsafe {
798            crate::common::Reg::<self::Svdct_SPEC, crate::common::RW>::from_ptr(
799                self._svd2pac_as_ptr().add(800usize),
800            )
801        }
802    }
803
804    #[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
805    #[inline(always)]
806    pub const fn sdctpidl(
807        &self,
808    ) -> &'static crate::common::Reg<self::Sdctpidl_SPEC, crate::common::RW> {
809        unsafe {
810            crate::common::Reg::<self::Sdctpidl_SPEC, crate::common::RW>::from_ptr(
811                self._svd2pac_as_ptr().add(804usize),
812            )
813        }
814    }
815
816    #[doc = "Slave Device Characteristic Table Provisional ID High Register"]
817    #[inline(always)]
818    pub const fn sdctpidh(
819        &self,
820    ) -> &'static crate::common::Reg<self::Sdctpidh_SPEC, crate::common::RW> {
821        unsafe {
822            crate::common::Reg::<self::Sdctpidh_SPEC, crate::common::RW>::from_ptr(
823                self._svd2pac_as_ptr().add(808usize),
824            )
825        }
826    }
827
828    #[doc = "Slave Device Address Register %s"]
829    #[inline(always)]
830    pub const fn svdvad(
831        &self,
832    ) -> &'static crate::common::ClusterRegisterArray<
833        crate::common::Reg<self::Svdvad_SPEC, crate::common::R>,
834        3,
835        0x4,
836    > {
837        unsafe {
838            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x330usize))
839        }
840    }
841
842    #[doc = "CCC Slave Events Command Register"]
843    #[inline(always)]
844    pub const fn csecmd(
845        &self,
846    ) -> &'static crate::common::Reg<self::Csecmd_SPEC, crate::common::RW> {
847        unsafe {
848            crate::common::Reg::<self::Csecmd_SPEC, crate::common::RW>::from_ptr(
849                self._svd2pac_as_ptr().add(848usize),
850            )
851        }
852    }
853
854    #[doc = "CCC Enter Activity State Register"]
855    #[inline(always)]
856    pub const fn ceactst(
857        &self,
858    ) -> &'static crate::common::Reg<self::Ceactst_SPEC, crate::common::RW> {
859        unsafe {
860            crate::common::Reg::<self::Ceactst_SPEC, crate::common::RW>::from_ptr(
861                self._svd2pac_as_ptr().add(852usize),
862            )
863        }
864    }
865
866    #[doc = "CCC Max Write Length Register"]
867    #[inline(always)]
868    pub const fn cmwlg(&self) -> &'static crate::common::Reg<self::Cmwlg_SPEC, crate::common::RW> {
869        unsafe {
870            crate::common::Reg::<self::Cmwlg_SPEC, crate::common::RW>::from_ptr(
871                self._svd2pac_as_ptr().add(856usize),
872            )
873        }
874    }
875
876    #[doc = "CCC Max Read Length Register"]
877    #[inline(always)]
878    pub const fn cmrlg(&self) -> &'static crate::common::Reg<self::Cmrlg_SPEC, crate::common::RW> {
879        unsafe {
880            crate::common::Reg::<self::Cmrlg_SPEC, crate::common::RW>::from_ptr(
881                self._svd2pac_as_ptr().add(860usize),
882            )
883        }
884    }
885
886    #[doc = "CCC Enter Test Mode Register"]
887    #[inline(always)]
888    pub const fn cetstmd(
889        &self,
890    ) -> &'static crate::common::Reg<self::Cetstmd_SPEC, crate::common::R> {
891        unsafe {
892            crate::common::Reg::<self::Cetstmd_SPEC, crate::common::R>::from_ptr(
893                self._svd2pac_as_ptr().add(864usize),
894            )
895        }
896    }
897
898    #[doc = "CCC Get Device Status Register"]
899    #[inline(always)]
900    pub const fn cgdvst(
901        &self,
902    ) -> &'static crate::common::Reg<self::Cgdvst_SPEC, crate::common::RW> {
903        unsafe {
904            crate::common::Reg::<self::Cgdvst_SPEC, crate::common::RW>::from_ptr(
905                self._svd2pac_as_ptr().add(868usize),
906            )
907        }
908    }
909
910    #[doc = "CCC Max Data Speed W (Write) Register"]
911    #[inline(always)]
912    pub const fn cmdspw(
913        &self,
914    ) -> &'static crate::common::Reg<self::Cmdspw_SPEC, crate::common::RW> {
915        unsafe {
916            crate::common::Reg::<self::Cmdspw_SPEC, crate::common::RW>::from_ptr(
917                self._svd2pac_as_ptr().add(872usize),
918            )
919        }
920    }
921
922    #[doc = "CCC Max Data Speed R (Read) Register"]
923    #[inline(always)]
924    pub const fn cmdspr(
925        &self,
926    ) -> &'static crate::common::Reg<self::Cmdspr_SPEC, crate::common::RW> {
927        unsafe {
928            crate::common::Reg::<self::Cmdspr_SPEC, crate::common::RW>::from_ptr(
929                self._svd2pac_as_ptr().add(876usize),
930            )
931        }
932    }
933
934    #[doc = "CCC Max Data Speed T (Turnaround) Register"]
935    #[inline(always)]
936    pub const fn cmdspt(
937        &self,
938    ) -> &'static crate::common::Reg<self::Cmdspt_SPEC, crate::common::RW> {
939        unsafe {
940            crate::common::Reg::<self::Cmdspt_SPEC, crate::common::RW>::from_ptr(
941                self._svd2pac_as_ptr().add(880usize),
942            )
943        }
944    }
945
946    #[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
947    #[inline(always)]
948    pub const fn cetsm(&self) -> &'static crate::common::Reg<self::Cetsm_SPEC, crate::common::RW> {
949        unsafe {
950            crate::common::Reg::<self::Cetsm_SPEC, crate::common::RW>::from_ptr(
951                self._svd2pac_as_ptr().add(884usize),
952            )
953        }
954    }
955
956    #[doc = "CCC Exchange Timing Support Information S (State) Register"]
957    #[inline(always)]
958    pub const fn cetss(&self) -> &'static crate::common::Reg<self::Cetss_SPEC, crate::common::RW> {
959        unsafe {
960            crate::common::Reg::<self::Cetss_SPEC, crate::common::RW>::from_ptr(
961                self._svd2pac_as_ptr().add(888usize),
962            )
963        }
964    }
965
966    #[doc = "Bit Count Register"]
967    #[inline(always)]
968    pub const fn bitcnt(&self) -> &'static crate::common::Reg<self::Bitcnt_SPEC, crate::common::R> {
969        unsafe {
970            crate::common::Reg::<self::Bitcnt_SPEC, crate::common::R>::from_ptr(
971                self._svd2pac_as_ptr().add(896usize),
972            )
973        }
974    }
975
976    #[doc = "Normal Queue Status Level Register"]
977    #[inline(always)]
978    pub const fn nqstlv(&self) -> &'static crate::common::Reg<self::Nqstlv_SPEC, crate::common::R> {
979        unsafe {
980            crate::common::Reg::<self::Nqstlv_SPEC, crate::common::R>::from_ptr(
981                self._svd2pac_as_ptr().add(916usize),
982            )
983        }
984    }
985
986    #[doc = "Normal Data Buffer Status Level Register 0"]
987    #[inline(always)]
988    pub const fn ndbstlv0(
989        &self,
990    ) -> &'static crate::common::Reg<self::Ndbstlv0_SPEC, crate::common::R> {
991        unsafe {
992            crate::common::Reg::<self::Ndbstlv0_SPEC, crate::common::R>::from_ptr(
993                self._svd2pac_as_ptr().add(920usize),
994            )
995        }
996    }
997
998    #[doc = "Normal Receive Status Queue Status Level Register"]
999    #[inline(always)]
1000    pub const fn nrsqstlv(
1001        &self,
1002    ) -> &'static crate::common::Reg<self::Nrsqstlv_SPEC, crate::common::R> {
1003        unsafe {
1004            crate::common::Reg::<self::Nrsqstlv_SPEC, crate::common::R>::from_ptr(
1005                self._svd2pac_as_ptr().add(960usize),
1006            )
1007        }
1008    }
1009
1010    #[doc = "High Priority Queue Status Level Register"]
1011    #[inline(always)]
1012    pub const fn hqstlv(&self) -> &'static crate::common::Reg<self::Hqstlv_SPEC, crate::common::R> {
1013        unsafe {
1014            crate::common::Reg::<self::Hqstlv_SPEC, crate::common::R>::from_ptr(
1015                self._svd2pac_as_ptr().add(964usize),
1016            )
1017        }
1018    }
1019
1020    #[doc = "High Priority Data Buffer Status Level Register"]
1021    #[inline(always)]
1022    pub const fn hdbstlv(
1023        &self,
1024    ) -> &'static crate::common::Reg<self::Hdbstlv_SPEC, crate::common::R> {
1025        unsafe {
1026            crate::common::Reg::<self::Hdbstlv_SPEC, crate::common::R>::from_ptr(
1027                self._svd2pac_as_ptr().add(968usize),
1028            )
1029        }
1030    }
1031
1032    #[doc = "Present State Debug Register"]
1033    #[inline(always)]
1034    pub const fn prstdbg(
1035        &self,
1036    ) -> &'static crate::common::Reg<self::Prstdbg_SPEC, crate::common::R> {
1037        unsafe {
1038            crate::common::Reg::<self::Prstdbg_SPEC, crate::common::R>::from_ptr(
1039                self._svd2pac_as_ptr().add(972usize),
1040            )
1041        }
1042    }
1043
1044    #[doc = "Master Error Counters Register"]
1045    #[inline(always)]
1046    pub const fn mserrcnt(
1047        &self,
1048    ) -> &'static crate::common::Reg<self::Mserrcnt_SPEC, crate::common::R> {
1049        unsafe {
1050            crate::common::Reg::<self::Mserrcnt_SPEC, crate::common::R>::from_ptr(
1051                self._svd2pac_as_ptr().add(976usize),
1052            )
1053        }
1054    }
1055
1056    #[doc = "SC1 Capture monitor Register"]
1057    #[inline(always)]
1058    pub const fn sc1cpt(&self) -> &'static crate::common::Reg<self::Sc1Cpt_SPEC, crate::common::R> {
1059        unsafe {
1060            crate::common::Reg::<self::Sc1Cpt_SPEC, crate::common::R>::from_ptr(
1061                self._svd2pac_as_ptr().add(992usize),
1062            )
1063        }
1064    }
1065
1066    #[doc = "SC2 Capture monitor Register"]
1067    #[inline(always)]
1068    pub const fn sc2cpt(&self) -> &'static crate::common::Reg<self::Sc2Cpt_SPEC, crate::common::R> {
1069        unsafe {
1070            crate::common::Reg::<self::Sc2Cpt_SPEC, crate::common::R>::from_ptr(
1071                self._svd2pac_as_ptr().add(996usize),
1072            )
1073        }
1074    }
1075}
1076#[doc(hidden)]
1077#[derive(Copy, Clone, Eq, PartialEq)]
1078pub struct Prts_SPEC;
1079impl crate::sealed::RegSpec for Prts_SPEC {
1080    type DataType = u32;
1081}
1082#[doc = "Protocol Selection Register"]
1083pub type Prts = crate::RegValueT<Prts_SPEC>;
1084
1085impl Prts {
1086    #[doc = "Protocol Mode"]
1087    #[inline(always)]
1088    pub fn prtmd(
1089        self,
1090    ) -> crate::common::RegisterField<0, 0x1, 1, 0, prts::Prtmd, Prts_SPEC, crate::common::RW> {
1091        crate::common::RegisterField::<0,0x1,1,0,prts::Prtmd, Prts_SPEC,crate::common::RW>::from_register(self,0)
1092    }
1093}
1094impl ::core::default::Default for Prts {
1095    #[inline(always)]
1096    fn default() -> Prts {
1097        <crate::RegValueT<Prts_SPEC> as RegisterValue<_>>::new(1)
1098    }
1099}
1100pub mod prts {
1101
1102    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1103    pub struct Prtmd_SPEC;
1104    pub type Prtmd = crate::EnumBitfieldStruct<u8, Prtmd_SPEC>;
1105    impl Prtmd {
1106        #[doc = "I3C protocol mode"]
1107        pub const _0: Self = Self::new(0);
1108        #[doc = "I2C protocol mode"]
1109        pub const _1: Self = Self::new(1);
1110    }
1111}
1112#[doc(hidden)]
1113#[derive(Copy, Clone, Eq, PartialEq)]
1114pub struct Cectl_SPEC;
1115impl crate::sealed::RegSpec for Cectl_SPEC {
1116    type DataType = u32;
1117}
1118#[doc = "Clock Enable Control Resisters"]
1119pub type Cectl = crate::RegValueT<Cectl_SPEC>;
1120
1121impl Cectl {
1122    #[doc = "Clock Enable"]
1123    #[inline(always)]
1124    pub fn clke(
1125        self,
1126    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cectl::Clke, Cectl_SPEC, crate::common::RW>
1127    {
1128        crate::common::RegisterField::<0,0x1,1,0,cectl::Clke, Cectl_SPEC,crate::common::RW>::from_register(self,0)
1129    }
1130}
1131impl ::core::default::Default for Cectl {
1132    #[inline(always)]
1133    fn default() -> Cectl {
1134        <crate::RegValueT<Cectl_SPEC> as RegisterValue<_>>::new(0)
1135    }
1136}
1137pub mod cectl {
1138
1139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1140    pub struct Clke_SPEC;
1141    pub type Clke = crate::EnumBitfieldStruct<u8, Clke_SPEC>;
1142    impl Clke {
1143        #[doc = "Clock disable"]
1144        pub const _0: Self = Self::new(0);
1145        #[doc = "Clock enable"]
1146        pub const _1: Self = Self::new(1);
1147    }
1148}
1149#[doc(hidden)]
1150#[derive(Copy, Clone, Eq, PartialEq)]
1151pub struct Bctl_SPEC;
1152impl crate::sealed::RegSpec for Bctl_SPEC {
1153    type DataType = u32;
1154}
1155#[doc = "Bus Control Register"]
1156pub type Bctl = crate::RegValueT<Bctl_SPEC>;
1157
1158impl Bctl {
1159    #[doc = "Include I3C Broadcast Address"]
1160    #[inline(always)]
1161    pub fn incba(
1162        self,
1163    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bctl::Incba, Bctl_SPEC, crate::common::RW> {
1164        crate::common::RegisterField::<0,0x1,1,0,bctl::Incba, Bctl_SPEC,crate::common::RW>::from_register(self,0)
1165    }
1166    #[doc = "Abort"]
1167    #[inline(always)]
1168    pub fn abt(
1169        self,
1170    ) -> crate::common::RegisterField<29, 0x1, 1, 0, bctl::Abt, Bctl_SPEC, crate::common::RW> {
1171        crate::common::RegisterField::<29,0x1,1,0,bctl::Abt, Bctl_SPEC,crate::common::RW>::from_register(self,0)
1172    }
1173    #[doc = "Resume"]
1174    #[inline(always)]
1175    pub fn rsm(
1176        self,
1177    ) -> crate::common::RegisterField<30, 0x1, 1, 0, bctl::Rsm, Bctl_SPEC, crate::common::RW> {
1178        crate::common::RegisterField::<30,0x1,1,0,bctl::Rsm, Bctl_SPEC,crate::common::RW>::from_register(self,0)
1179    }
1180    #[doc = "Bus Enable"]
1181    #[inline(always)]
1182    pub fn buse(
1183        self,
1184    ) -> crate::common::RegisterField<31, 0x1, 1, 0, bctl::Buse, Bctl_SPEC, crate::common::RW> {
1185        crate::common::RegisterField::<31,0x1,1,0,bctl::Buse, Bctl_SPEC,crate::common::RW>::from_register(self,0)
1186    }
1187}
1188impl ::core::default::Default for Bctl {
1189    #[inline(always)]
1190    fn default() -> Bctl {
1191        <crate::RegValueT<Bctl_SPEC> as RegisterValue<_>>::new(0)
1192    }
1193}
1194pub mod bctl {
1195
1196    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1197    pub struct Incba_SPEC;
1198    pub type Incba = crate::EnumBitfieldStruct<u8, Incba_SPEC>;
1199    impl Incba {
1200        #[doc = "Do not include I3C broadcast address for private transfers"]
1201        pub const _0: Self = Self::new(0);
1202        #[doc = "Include I3C broadcast address for private transfers"]
1203        pub const _1: Self = Self::new(1);
1204    }
1205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1206    pub struct Abt_SPEC;
1207    pub type Abt = crate::EnumBitfieldStruct<u8, Abt_SPEC>;
1208    impl Abt {
1209        #[doc = "I3C is running."]
1210        pub const _0: Self = Self::new(0);
1211        #[doc = "I3C has aborted a transfer."]
1212        pub const _1: Self = Self::new(1);
1213    }
1214    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1215    pub struct Rsm_SPEC;
1216    pub type Rsm = crate::EnumBitfieldStruct<u8, Rsm_SPEC>;
1217    impl Rsm {
1218        #[doc = "I3C is running."]
1219        pub const _0: Self = Self::new(0);
1220        #[doc = "I3C is suspended."]
1221        pub const _1: Self = Self::new(1);
1222    }
1223    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1224    pub struct Buse_SPEC;
1225    pub type Buse = crate::EnumBitfieldStruct<u8, Buse_SPEC>;
1226    impl Buse {
1227        #[doc = "I3C bus operation is disabled."]
1228        pub const _0: Self = Self::new(0);
1229        #[doc = "I3C bus operation is enabled."]
1230        pub const _1: Self = Self::new(1);
1231    }
1232}
1233#[doc(hidden)]
1234#[derive(Copy, Clone, Eq, PartialEq)]
1235pub struct Msdvad_SPEC;
1236impl crate::sealed::RegSpec for Msdvad_SPEC {
1237    type DataType = u32;
1238}
1239#[doc = "Master Device Address Register"]
1240pub type Msdvad = crate::RegValueT<Msdvad_SPEC>;
1241
1242impl Msdvad {
1243    #[doc = "Master Dynamic Address"]
1244    #[inline(always)]
1245    pub fn mdyad(
1246        self,
1247    ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, Msdvad_SPEC, crate::common::RW> {
1248        crate::common::RegisterField::<16,0x7f,1,0,u8, Msdvad_SPEC,crate::common::RW>::from_register(self,0)
1249    }
1250    #[doc = "Master Dynamic Address Valid"]
1251    #[inline(always)]
1252    pub fn mdyadv(
1253        self,
1254    ) -> crate::common::RegisterField<31, 0x1, 1, 0, msdvad::Mdyadv, Msdvad_SPEC, crate::common::RW>
1255    {
1256        crate::common::RegisterField::<31,0x1,1,0,msdvad::Mdyadv, Msdvad_SPEC,crate::common::RW>::from_register(self,0)
1257    }
1258}
1259impl ::core::default::Default for Msdvad {
1260    #[inline(always)]
1261    fn default() -> Msdvad {
1262        <crate::RegValueT<Msdvad_SPEC> as RegisterValue<_>>::new(0)
1263    }
1264}
1265pub mod msdvad {
1266
1267    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1268    pub struct Mdyadv_SPEC;
1269    pub type Mdyadv = crate::EnumBitfieldStruct<u8, Mdyadv_SPEC>;
1270    impl Mdyadv {
1271        #[doc = "The master dynamic address field is not valid."]
1272        pub const _0: Self = Self::new(0);
1273        #[doc = "The master dynamic address field is valid."]
1274        pub const _1: Self = Self::new(1);
1275    }
1276}
1277#[doc(hidden)]
1278#[derive(Copy, Clone, Eq, PartialEq)]
1279pub struct Rstctl_SPEC;
1280impl crate::sealed::RegSpec for Rstctl_SPEC {
1281    type DataType = u32;
1282}
1283#[doc = "Reset Control Register"]
1284pub type Rstctl = crate::RegValueT<Rstctl_SPEC>;
1285
1286impl Rstctl {
1287    #[doc = "I3C Software Reset"]
1288    #[inline(always)]
1289    pub fn ri3crst(
1290        self,
1291    ) -> crate::common::RegisterField<0, 0x1, 1, 0, rstctl::Ri3Crst, Rstctl_SPEC, crate::common::RW>
1292    {
1293        crate::common::RegisterField::<0,0x1,1,0,rstctl::Ri3Crst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1294    }
1295    #[doc = "Command Queue Software Reset"]
1296    #[inline(always)]
1297    pub fn cmdqrst(
1298        self,
1299    ) -> crate::common::RegisterField<1, 0x1, 1, 0, rstctl::Cmdqrst, Rstctl_SPEC, crate::common::RW>
1300    {
1301        crate::common::RegisterField::<1,0x1,1,0,rstctl::Cmdqrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1302    }
1303    #[doc = "Response Queue Software Reset"]
1304    #[inline(always)]
1305    pub fn rspqrst(
1306        self,
1307    ) -> crate::common::RegisterField<2, 0x1, 1, 0, rstctl::Rspqrst, Rstctl_SPEC, crate::common::RW>
1308    {
1309        crate::common::RegisterField::<2,0x1,1,0,rstctl::Rspqrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1310    }
1311    #[doc = "Transmit Data Buffer Software Reset"]
1312    #[inline(always)]
1313    pub fn tdbrst(
1314        self,
1315    ) -> crate::common::RegisterField<3, 0x1, 1, 0, rstctl::Tdbrst, Rstctl_SPEC, crate::common::RW>
1316    {
1317        crate::common::RegisterField::<3,0x1,1,0,rstctl::Tdbrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1318    }
1319    #[doc = "Receive Data Buffer Software Reset"]
1320    #[inline(always)]
1321    pub fn rdbrst(
1322        self,
1323    ) -> crate::common::RegisterField<4, 0x1, 1, 0, rstctl::Rdbrst, Rstctl_SPEC, crate::common::RW>
1324    {
1325        crate::common::RegisterField::<4,0x1,1,0,rstctl::Rdbrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1326    }
1327    #[doc = "IBI Queue Software Reset"]
1328    #[inline(always)]
1329    pub fn ibiqrst(
1330        self,
1331    ) -> crate::common::RegisterField<5, 0x1, 1, 0, rstctl::Ibiqrst, Rstctl_SPEC, crate::common::RW>
1332    {
1333        crate::common::RegisterField::<5,0x1,1,0,rstctl::Ibiqrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1334    }
1335    #[doc = "Receive Status Queue Software Reset"]
1336    #[inline(always)]
1337    pub fn rsqrst(
1338        self,
1339    ) -> crate::common::RegisterField<6, 0x1, 1, 0, rstctl::Rsqrst, Rstctl_SPEC, crate::common::RW>
1340    {
1341        crate::common::RegisterField::<6,0x1,1,0,rstctl::Rsqrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1342    }
1343    #[doc = "High Priority Command Queue Software Reset"]
1344    #[inline(always)]
1345    pub fn hcmdqrst(
1346        self,
1347    ) -> crate::common::RegisterField<9, 0x1, 1, 0, rstctl::Hcmdqrst, Rstctl_SPEC, crate::common::RW>
1348    {
1349        crate::common::RegisterField::<9,0x1,1,0,rstctl::Hcmdqrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1350    }
1351    #[doc = "High Priority Response Queue Software Reset"]
1352    #[inline(always)]
1353    pub fn hrspqrst(
1354        self,
1355    ) -> crate::common::RegisterField<10, 0x1, 1, 0, rstctl::Hrspqrst, Rstctl_SPEC, crate::common::RW>
1356    {
1357        crate::common::RegisterField::<
1358            10,
1359            0x1,
1360            1,
1361            0,
1362            rstctl::Hrspqrst,
1363            Rstctl_SPEC,
1364            crate::common::RW,
1365        >::from_register(self, 0)
1366    }
1367    #[doc = "High Priority Transmit Data Buffer Software Reset"]
1368    #[inline(always)]
1369    pub fn htdbrst(
1370        self,
1371    ) -> crate::common::RegisterField<11, 0x1, 1, 0, rstctl::Htdbrst, Rstctl_SPEC, crate::common::RW>
1372    {
1373        crate::common::RegisterField::<11,0x1,1,0,rstctl::Htdbrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1374    }
1375    #[doc = "High Priority Receive Data Buffer Software Reset"]
1376    #[inline(always)]
1377    pub fn hrdbrst(
1378        self,
1379    ) -> crate::common::RegisterField<12, 0x1, 1, 0, rstctl::Hrdbrst, Rstctl_SPEC, crate::common::RW>
1380    {
1381        crate::common::RegisterField::<12,0x1,1,0,rstctl::Hrdbrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1382    }
1383    #[doc = "Internal Software Reset"]
1384    #[inline(always)]
1385    pub fn intlrst(
1386        self,
1387    ) -> crate::common::RegisterField<16, 0x1, 1, 0, rstctl::Intlrst, Rstctl_SPEC, crate::common::RW>
1388    {
1389        crate::common::RegisterField::<16,0x1,1,0,rstctl::Intlrst, Rstctl_SPEC,crate::common::RW>::from_register(self,0)
1390    }
1391}
1392impl ::core::default::Default for Rstctl {
1393    #[inline(always)]
1394    fn default() -> Rstctl {
1395        <crate::RegValueT<Rstctl_SPEC> as RegisterValue<_>>::new(0)
1396    }
1397}
1398pub mod rstctl {
1399
1400    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1401    pub struct Ri3Crst_SPEC;
1402    pub type Ri3Crst = crate::EnumBitfieldStruct<u8, Ri3Crst_SPEC>;
1403    impl Ri3Crst {
1404        #[doc = "Release I3C reset."]
1405        pub const _0: Self = Self::new(0);
1406        #[doc = "Initiate I3C reset."]
1407        pub const _1: Self = Self::new(1);
1408    }
1409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1410    pub struct Cmdqrst_SPEC;
1411    pub type Cmdqrst = crate::EnumBitfieldStruct<u8, Cmdqrst_SPEC>;
1412    impl Cmdqrst {
1413        #[doc = "The Command Queues in I3C is not flushed."]
1414        pub const _0: Self = Self::new(0);
1415        #[doc = "The Command Queues in I3C is flushed."]
1416        pub const _1: Self = Self::new(1);
1417    }
1418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1419    pub struct Rspqrst_SPEC;
1420    pub type Rspqrst = crate::EnumBitfieldStruct<u8, Rspqrst_SPEC>;
1421    impl Rspqrst {
1422        #[doc = "The Response Queues in I3C is not flushed."]
1423        pub const _0: Self = Self::new(0);
1424        #[doc = "The Response Queues in I3C is flushed."]
1425        pub const _1: Self = Self::new(1);
1426    }
1427    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1428    pub struct Tdbrst_SPEC;
1429    pub type Tdbrst = crate::EnumBitfieldStruct<u8, Tdbrst_SPEC>;
1430    impl Tdbrst {
1431        #[doc = "The Transmit Queues in I3C is not flushed."]
1432        pub const _0: Self = Self::new(0);
1433        #[doc = "The Transmit Queues in I3C is flushed."]
1434        pub const _1: Self = Self::new(1);
1435    }
1436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437    pub struct Rdbrst_SPEC;
1438    pub type Rdbrst = crate::EnumBitfieldStruct<u8, Rdbrst_SPEC>;
1439    impl Rdbrst {
1440        #[doc = "The Receive Queues in I3C is not flushed."]
1441        pub const _0: Self = Self::new(0);
1442        #[doc = "The Receive Queues in I3C is flushed."]
1443        pub const _1: Self = Self::new(1);
1444    }
1445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1446    pub struct Ibiqrst_SPEC;
1447    pub type Ibiqrst = crate::EnumBitfieldStruct<u8, Ibiqrst_SPEC>;
1448    impl Ibiqrst {
1449        #[doc = "The IBI Queues in I3C is not flushed."]
1450        pub const _0: Self = Self::new(0);
1451        #[doc = "The IBI Queues in I3C is flushed."]
1452        pub const _1: Self = Self::new(1);
1453    }
1454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1455    pub struct Rsqrst_SPEC;
1456    pub type Rsqrst = crate::EnumBitfieldStruct<u8, Rsqrst_SPEC>;
1457    impl Rsqrst {
1458        #[doc = "The Receive Status Queue in I3C is not flushed."]
1459        pub const _0: Self = Self::new(0);
1460        #[doc = "The Receive Status Queue in I3C is flushed."]
1461        pub const _1: Self = Self::new(1);
1462    }
1463    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1464    pub struct Hcmdqrst_SPEC;
1465    pub type Hcmdqrst = crate::EnumBitfieldStruct<u8, Hcmdqrst_SPEC>;
1466    impl Hcmdqrst {
1467        #[doc = "The High Priority Command Queues in I3C is not flushed."]
1468        pub const _0: Self = Self::new(0);
1469        #[doc = "The High Priority Command Queues in I3C is flushed."]
1470        pub const _1: Self = Self::new(1);
1471    }
1472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1473    pub struct Hrspqrst_SPEC;
1474    pub type Hrspqrst = crate::EnumBitfieldStruct<u8, Hrspqrst_SPEC>;
1475    impl Hrspqrst {
1476        #[doc = "The High Priority Response Queues in I3C is not flushed."]
1477        pub const _0: Self = Self::new(0);
1478        #[doc = "The High Priority Response Queues in I3C is flushed."]
1479        pub const _1: Self = Self::new(1);
1480    }
1481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1482    pub struct Htdbrst_SPEC;
1483    pub type Htdbrst = crate::EnumBitfieldStruct<u8, Htdbrst_SPEC>;
1484    impl Htdbrst {
1485        #[doc = "The High Priority Transmit Queues in I3C is not flushed."]
1486        pub const _0: Self = Self::new(0);
1487        #[doc = "The High Priority Transmit Queues in I3C is flushed."]
1488        pub const _1: Self = Self::new(1);
1489    }
1490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1491    pub struct Hrdbrst_SPEC;
1492    pub type Hrdbrst = crate::EnumBitfieldStruct<u8, Hrdbrst_SPEC>;
1493    impl Hrdbrst {
1494        #[doc = "The High Priority Receive Queues in I3C is not flushed."]
1495        pub const _0: Self = Self::new(0);
1496        #[doc = "The High Priority Receive Queues in I3C is flushed."]
1497        pub const _1: Self = Self::new(1);
1498    }
1499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1500    pub struct Intlrst_SPEC;
1501    pub type Intlrst = crate::EnumBitfieldStruct<u8, Intlrst_SPEC>;
1502    impl Intlrst {
1503        #[doc = "Releases of some registers and internal state."]
1504        pub const _0: Self = Self::new(0);
1505        #[doc = "Resets of some registers and internal state."]
1506        pub const _1: Self = Self::new(1);
1507    }
1508}
1509#[doc(hidden)]
1510#[derive(Copy, Clone, Eq, PartialEq)]
1511pub struct Prsst_SPEC;
1512impl crate::sealed::RegSpec for Prsst_SPEC {
1513    type DataType = u32;
1514}
1515#[doc = "Present State Register"]
1516pub type Prsst = crate::RegValueT<Prsst_SPEC>;
1517
1518impl Prsst {
1519    #[doc = "Current Master"]
1520    #[inline(always)]
1521    pub fn crms(
1522        self,
1523    ) -> crate::common::RegisterField<2, 0x1, 1, 0, prsst::Crms, Prsst_SPEC, crate::common::RW>
1524    {
1525        crate::common::RegisterField::<2,0x1,1,0,prsst::Crms, Prsst_SPEC,crate::common::RW>::from_register(self,0)
1526    }
1527    #[doc = "Transmit/Receive Mode"]
1528    #[inline(always)]
1529    pub fn trmd(
1530        self,
1531    ) -> crate::common::RegisterField<4, 0x1, 1, 0, prsst::Trmd, Prsst_SPEC, crate::common::R> {
1532        crate::common::RegisterField::<4,0x1,1,0,prsst::Trmd, Prsst_SPEC,crate::common::R>::from_register(self,0)
1533    }
1534    #[doc = "Present State Write Protect"]
1535    #[inline(always)]
1536    pub fn prsstwp(
1537        self,
1538    ) -> crate::common::RegisterField<7, 0x1, 1, 0, prsst::Prsstwp, Prsst_SPEC, crate::common::W>
1539    {
1540        crate::common::RegisterField::<7,0x1,1,0,prsst::Prsstwp, Prsst_SPEC,crate::common::W>::from_register(self,0)
1541    }
1542}
1543impl ::core::default::Default for Prsst {
1544    #[inline(always)]
1545    fn default() -> Prsst {
1546        <crate::RegValueT<Prsst_SPEC> as RegisterValue<_>>::new(0)
1547    }
1548}
1549pub mod prsst {
1550
1551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1552    pub struct Crms_SPEC;
1553    pub type Crms = crate::EnumBitfieldStruct<u8, Crms_SPEC>;
1554    impl Crms {
1555        #[doc = "The Master is not the Current Master, and must request and acquire bus ownership before initiating any transfer."]
1556        pub const _0: Self = Self::new(0);
1557        #[doc = "The Master is the Current Master, and as a result can initiate transfers."]
1558        pub const _1: Self = Self::new(1);
1559    }
1560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1561    pub struct Trmd_SPEC;
1562    pub type Trmd = crate::EnumBitfieldStruct<u8, Trmd_SPEC>;
1563    impl Trmd {
1564        #[doc = "Receive mode"]
1565        pub const _0: Self = Self::new(0);
1566        #[doc = "Transmit mode"]
1567        pub const _1: Self = Self::new(1);
1568    }
1569    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1570    pub struct Prsstwp_SPEC;
1571    pub type Prsstwp = crate::EnumBitfieldStruct<u8, Prsstwp_SPEC>;
1572    impl Prsstwp {
1573        #[doc = "CRMS bit is protected."]
1574        pub const _0: Self = Self::new(0);
1575        #[doc = "CRMS bit can be written when writing simultaneously with the value of the target bit."]
1576        pub const _1: Self = Self::new(1);
1577    }
1578}
1579#[doc(hidden)]
1580#[derive(Copy, Clone, Eq, PartialEq)]
1581pub struct Inst_SPEC;
1582impl crate::sealed::RegSpec for Inst_SPEC {
1583    type DataType = u32;
1584}
1585#[doc = "Internal Status Register"]
1586pub type Inst = crate::RegValueT<Inst_SPEC>;
1587
1588impl Inst {
1589    #[doc = "Internal Error Flag"]
1590    #[inline(always)]
1591    pub fn inef(
1592        self,
1593    ) -> crate::common::RegisterField<10, 0x1, 1, 0, inst::Inef, Inst_SPEC, crate::common::RW> {
1594        crate::common::RegisterField::<10,0x1,1,0,inst::Inef, Inst_SPEC,crate::common::RW>::from_register(self,0)
1595    }
1596}
1597impl ::core::default::Default for Inst {
1598    #[inline(always)]
1599    fn default() -> Inst {
1600        <crate::RegValueT<Inst_SPEC> as RegisterValue<_>>::new(0)
1601    }
1602}
1603pub mod inst {
1604
1605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1606    pub struct Inef_SPEC;
1607    pub type Inef = crate::EnumBitfieldStruct<u8, Inef_SPEC>;
1608    impl Inef {
1609        #[doc = "I3C Internal Error has not detected."]
1610        pub const _0: Self = Self::new(0);
1611        #[doc = "I3C Internal Error has detected."]
1612        pub const _1: Self = Self::new(1);
1613    }
1614}
1615#[doc(hidden)]
1616#[derive(Copy, Clone, Eq, PartialEq)]
1617pub struct Inste_SPEC;
1618impl crate::sealed::RegSpec for Inste_SPEC {
1619    type DataType = u32;
1620}
1621#[doc = "Internal Status Enable Register"]
1622pub type Inste = crate::RegValueT<Inste_SPEC>;
1623
1624impl Inste {
1625    #[doc = "Internal Error Enable"]
1626    #[inline(always)]
1627    pub fn inee(
1628        self,
1629    ) -> crate::common::RegisterField<10, 0x1, 1, 0, inste::Inee, Inste_SPEC, crate::common::RW>
1630    {
1631        crate::common::RegisterField::<10,0x1,1,0,inste::Inee, Inste_SPEC,crate::common::RW>::from_register(self,0)
1632    }
1633}
1634impl ::core::default::Default for Inste {
1635    #[inline(always)]
1636    fn default() -> Inste {
1637        <crate::RegValueT<Inste_SPEC> as RegisterValue<_>>::new(0)
1638    }
1639}
1640pub mod inste {
1641
1642    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1643    pub struct Inee_SPEC;
1644    pub type Inee = crate::EnumBitfieldStruct<u8, Inee_SPEC>;
1645    impl Inee {
1646        #[doc = "Disable INST.INEF"]
1647        pub const _0: Self = Self::new(0);
1648        #[doc = "Enable INST.INEF"]
1649        pub const _1: Self = Self::new(1);
1650    }
1651}
1652#[doc(hidden)]
1653#[derive(Copy, Clone, Eq, PartialEq)]
1654pub struct Inie_SPEC;
1655impl crate::sealed::RegSpec for Inie_SPEC {
1656    type DataType = u32;
1657}
1658#[doc = "Internal Interrupt Enable Register"]
1659pub type Inie = crate::RegValueT<Inie_SPEC>;
1660
1661impl Inie {
1662    #[doc = "Internal Error Interrupt Enable"]
1663    #[inline(always)]
1664    pub fn ineie(
1665        self,
1666    ) -> crate::common::RegisterField<10, 0x1, 1, 0, inie::Ineie, Inie_SPEC, crate::common::RW>
1667    {
1668        crate::common::RegisterField::<10,0x1,1,0,inie::Ineie, Inie_SPEC,crate::common::RW>::from_register(self,0)
1669    }
1670}
1671impl ::core::default::Default for Inie {
1672    #[inline(always)]
1673    fn default() -> Inie {
1674        <crate::RegValueT<Inie_SPEC> as RegisterValue<_>>::new(0)
1675    }
1676}
1677pub mod inie {
1678
1679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1680    pub struct Ineie_SPEC;
1681    pub type Ineie = crate::EnumBitfieldStruct<u8, Ineie_SPEC>;
1682    impl Ineie {
1683        #[doc = "Disables Non-recoverable Internal Error Interrupt Signal."]
1684        pub const _0: Self = Self::new(0);
1685        #[doc = "Enables Non-recoverable Internal Error Interrupt Signal."]
1686        pub const _1: Self = Self::new(1);
1687    }
1688}
1689#[doc(hidden)]
1690#[derive(Copy, Clone, Eq, PartialEq)]
1691pub struct Instfc_SPEC;
1692impl crate::sealed::RegSpec for Instfc_SPEC {
1693    type DataType = u32;
1694}
1695#[doc = "Internal Status Force Register"]
1696pub type Instfc = crate::RegValueT<Instfc_SPEC>;
1697
1698impl Instfc {
1699    #[doc = "Internal Error Force"]
1700    #[inline(always)]
1701    pub fn inefc(
1702        self,
1703    ) -> crate::common::RegisterField<10, 0x1, 1, 0, instfc::Inefc, Instfc_SPEC, crate::common::W>
1704    {
1705        crate::common::RegisterField::<10,0x1,1,0,instfc::Inefc, Instfc_SPEC,crate::common::W>::from_register(self,0)
1706    }
1707}
1708impl ::core::default::Default for Instfc {
1709    #[inline(always)]
1710    fn default() -> Instfc {
1711        <crate::RegValueT<Instfc_SPEC> as RegisterValue<_>>::new(0)
1712    }
1713}
1714pub mod instfc {
1715
1716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1717    pub struct Inefc_SPEC;
1718    pub type Inefc = crate::EnumBitfieldStruct<u8, Inefc_SPEC>;
1719    impl Inefc {
1720        #[doc = "Not force a specific interrupt"]
1721        pub const _0: Self = Self::new(0);
1722        #[doc = "Force a specific interrupt"]
1723        pub const _1: Self = Self::new(1);
1724    }
1725}
1726#[doc(hidden)]
1727#[derive(Copy, Clone, Eq, PartialEq)]
1728pub struct Dvct_SPEC;
1729impl crate::sealed::RegSpec for Dvct_SPEC {
1730    type DataType = u32;
1731}
1732#[doc = "Device Characteristic Table Register"]
1733pub type Dvct = crate::RegValueT<Dvct_SPEC>;
1734
1735impl Dvct {
1736    #[doc = "DCT Table Index"]
1737    #[inline(always)]
1738    pub fn idx(
1739        self,
1740    ) -> crate::common::RegisterField<19, 0x1f, 1, 0, u8, Dvct_SPEC, crate::common::R> {
1741        crate::common::RegisterField::<19,0x1f,1,0,u8, Dvct_SPEC,crate::common::R>::from_register(self,0)
1742    }
1743}
1744impl ::core::default::Default for Dvct {
1745    #[inline(always)]
1746    fn default() -> Dvct {
1747        <crate::RegValueT<Dvct_SPEC> as RegisterValue<_>>::new(0)
1748    }
1749}
1750
1751#[doc(hidden)]
1752#[derive(Copy, Clone, Eq, PartialEq)]
1753pub struct Ibinctl_SPEC;
1754impl crate::sealed::RegSpec for Ibinctl_SPEC {
1755    type DataType = u32;
1756}
1757#[doc = "IBI Notify Control Register"]
1758pub type Ibinctl = crate::RegValueT<Ibinctl_SPEC>;
1759
1760impl Ibinctl {
1761    #[doc = "Notify Rejected Master Request Control"]
1762    #[inline(always)]
1763    pub fn nrmrctl(
1764        self,
1765    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ibinctl::Nrmrctl, Ibinctl_SPEC, crate::common::RW>
1766    {
1767        crate::common::RegisterField::<
1768            1,
1769            0x1,
1770            1,
1771            0,
1772            ibinctl::Nrmrctl,
1773            Ibinctl_SPEC,
1774            crate::common::RW,
1775        >::from_register(self, 0)
1776    }
1777    #[doc = "Notify Rejected Slave Interrupt Request Control"]
1778    #[inline(always)]
1779    pub fn nrsirctl(
1780        self,
1781    ) -> crate::common::RegisterField<
1782        3,
1783        0x1,
1784        1,
1785        0,
1786        ibinctl::Nrsirctl,
1787        Ibinctl_SPEC,
1788        crate::common::RW,
1789    > {
1790        crate::common::RegisterField::<
1791            3,
1792            0x1,
1793            1,
1794            0,
1795            ibinctl::Nrsirctl,
1796            Ibinctl_SPEC,
1797            crate::common::RW,
1798        >::from_register(self, 0)
1799    }
1800}
1801impl ::core::default::Default for Ibinctl {
1802    #[inline(always)]
1803    fn default() -> Ibinctl {
1804        <crate::RegValueT<Ibinctl_SPEC> as RegisterValue<_>>::new(0)
1805    }
1806}
1807pub mod ibinctl {
1808
1809    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1810    pub struct Nrmrctl_SPEC;
1811    pub type Nrmrctl = crate::EnumBitfieldStruct<u8, Nrmrctl_SPEC>;
1812    impl Nrmrctl {
1813        #[doc = "Do not pass rejected IBI Status to IBI Queue/Ring, if the incoming Master Request is NACKed and is auto-disabled based on DVMRRJ field in relevant DAT entry."]
1814        pub const _0: Self = Self::new(0);
1815        #[doc = "Pass rejected IBI Status to the IBI Queue, if the incoming Master Request is NACKed and is autodisabled based on DVMRRJ field in relevant DAT entry."]
1816        pub const _1: Self = Self::new(1);
1817    }
1818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1819    pub struct Nrsirctl_SPEC;
1820    pub type Nrsirctl = crate::EnumBitfieldStruct<u8, Nrsirctl_SPEC>;
1821    impl Nrsirctl {
1822        #[doc = "Do not pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
1823        pub const _0: Self = Self::new(0);
1824        #[doc = "Pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
1825        pub const _1: Self = Self::new(1);
1826    }
1827}
1828#[doc(hidden)]
1829#[derive(Copy, Clone, Eq, PartialEq)]
1830pub struct Bfctl_SPEC;
1831impl crate::sealed::RegSpec for Bfctl_SPEC {
1832    type DataType = u32;
1833}
1834#[doc = "Bus Function Control Register"]
1835pub type Bfctl = crate::RegValueT<Bfctl_SPEC>;
1836
1837impl Bfctl {
1838    #[doc = "Master Arbitration-Lost Detection Enable"]
1839    #[inline(always)]
1840    pub fn male(
1841        self,
1842    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bfctl::Male, Bfctl_SPEC, crate::common::RW>
1843    {
1844        crate::common::RegisterField::<0,0x1,1,0,bfctl::Male, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1845    }
1846    #[doc = "NACK Transmission Arbitration-Lost Detection Enable"]
1847    #[inline(always)]
1848    pub fn nale(
1849        self,
1850    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bfctl::Nale, Bfctl_SPEC, crate::common::RW>
1851    {
1852        crate::common::RegisterField::<1,0x1,1,0,bfctl::Nale, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1853    }
1854    #[doc = "Slave Arbitration-Lost Detection Enable"]
1855    #[inline(always)]
1856    pub fn sale(
1857        self,
1858    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bfctl::Sale, Bfctl_SPEC, crate::common::RW>
1859    {
1860        crate::common::RegisterField::<2,0x1,1,0,bfctl::Sale, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1861    }
1862    #[doc = "SCL Synchronous Circuit Enable"]
1863    #[inline(always)]
1864    pub fn scsyne(
1865        self,
1866    ) -> crate::common::RegisterField<8, 0x1, 1, 0, bfctl::Scsyne, Bfctl_SPEC, crate::common::RW>
1867    {
1868        crate::common::RegisterField::<8,0x1,1,0,bfctl::Scsyne, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1869    }
1870    #[doc = "SMBus/I2C Bus Selection"]
1871    #[inline(always)]
1872    pub fn smbs(
1873        self,
1874    ) -> crate::common::RegisterField<12, 0x1, 1, 0, bfctl::Smbs, Bfctl_SPEC, crate::common::RW>
1875    {
1876        crate::common::RegisterField::<12,0x1,1,0,bfctl::Smbs, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1877    }
1878    #[doc = "Fast-mode Plus Enable"]
1879    #[inline(always)]
1880    pub fn fmpe(
1881        self,
1882    ) -> crate::common::RegisterField<14, 0x1, 1, 0, bfctl::Fmpe, Bfctl_SPEC, crate::common::RW>
1883    {
1884        crate::common::RegisterField::<14,0x1,1,0,bfctl::Fmpe, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1885    }
1886    #[doc = "High Speed Mode Enable"]
1887    #[inline(always)]
1888    pub fn hsme(
1889        self,
1890    ) -> crate::common::RegisterField<15, 0x1, 1, 0, bfctl::Hsme, Bfctl_SPEC, crate::common::RW>
1891    {
1892        crate::common::RegisterField::<15,0x1,1,0,bfctl::Hsme, Bfctl_SPEC,crate::common::RW>::from_register(self,0)
1893    }
1894}
1895impl ::core::default::Default for Bfctl {
1896    #[inline(always)]
1897    fn default() -> Bfctl {
1898        <crate::RegValueT<Bfctl_SPEC> as RegisterValue<_>>::new(257)
1899    }
1900}
1901pub mod bfctl {
1902
1903    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1904    pub struct Male_SPEC;
1905    pub type Male = crate::EnumBitfieldStruct<u8, Male_SPEC>;
1906    impl Male {
1907        #[doc = "Master arbitration-lost detection disables. Disables the arbitration-lost detection function and does not clear the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
1908        pub const _0: Self = Self::new(0);
1909        #[doc = "Master arbitration-lost detection enables. Enables the arbitration-lost detection function and clears the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
1910        pub const _1: Self = Self::new(1);
1911    }
1912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1913    pub struct Nale_SPEC;
1914    pub type Nale = crate::EnumBitfieldStruct<u8, Nale_SPEC>;
1915    impl Nale {
1916        #[doc = "NACK transmission arbitration-lost detection disables."]
1917        pub const _0: Self = Self::new(0);
1918        #[doc = "NACK transmission arbitration-lost detection enables."]
1919        pub const _1: Self = Self::new(1);
1920    }
1921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1922    pub struct Sale_SPEC;
1923    pub type Sale = crate::EnumBitfieldStruct<u8, Sale_SPEC>;
1924    impl Sale {
1925        #[doc = "Slave arbitration-lost detection disables."]
1926        pub const _0: Self = Self::new(0);
1927        #[doc = "Slave arbitration-lost detection enables."]
1928        pub const _1: Self = Self::new(1);
1929    }
1930    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1931    pub struct Scsyne_SPEC;
1932    pub type Scsyne = crate::EnumBitfieldStruct<u8, Scsyne_SPEC>;
1933    impl Scsyne {
1934        #[doc = "No SCL synchronous circuit uses."]
1935        pub const _0: Self = Self::new(0);
1936        #[doc = "An SCL synchronous circuit uses."]
1937        pub const _1: Self = Self::new(1);
1938    }
1939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1940    pub struct Smbs_SPEC;
1941    pub type Smbs = crate::EnumBitfieldStruct<u8, Smbs_SPEC>;
1942    impl Smbs {
1943        #[doc = "The I2C bus select."]
1944        pub const _0: Self = Self::new(0);
1945        #[doc = "The SMBus select."]
1946        pub const _1: Self = Self::new(1);
1947    }
1948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1949    pub struct Fmpe_SPEC;
1950    pub type Fmpe = crate::EnumBitfieldStruct<u8, Fmpe_SPEC>;
1951    impl Fmpe {
1952        #[doc = "No Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
1953        pub const _0: Self = Self::new(0);
1954        #[doc = "An Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
1955        pub const _1: Self = Self::new(1);
1956    }
1957    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1958    pub struct Hsme_SPEC;
1959    pub type Hsme = crate::EnumBitfieldStruct<u8, Hsme_SPEC>;
1960    impl Hsme {
1961        #[doc = "Disable High Speed Mode."]
1962        pub const _0: Self = Self::new(0);
1963        #[doc = "Enable High Speed Mode."]
1964        pub const _1: Self = Self::new(1);
1965    }
1966}
1967#[doc(hidden)]
1968#[derive(Copy, Clone, Eq, PartialEq)]
1969pub struct Svctl_SPEC;
1970impl crate::sealed::RegSpec for Svctl_SPEC {
1971    type DataType = u32;
1972}
1973#[doc = "Slave Control Register"]
1974pub type Svctl = crate::RegValueT<Svctl_SPEC>;
1975
1976impl Svctl {
1977    #[doc = "General Call Address Enable"]
1978    #[inline(always)]
1979    pub fn gcae(
1980        self,
1981    ) -> crate::common::RegisterField<0, 0x1, 1, 0, svctl::Gcae, Svctl_SPEC, crate::common::RW>
1982    {
1983        crate::common::RegisterField::<0,0x1,1,0,svctl::Gcae, Svctl_SPEC,crate::common::RW>::from_register(self,0)
1984    }
1985    #[doc = "Hs-mode Master Code Enable"]
1986    #[inline(always)]
1987    pub fn hsmce(
1988        self,
1989    ) -> crate::common::RegisterField<5, 0x1, 1, 0, svctl::Hsmce, Svctl_SPEC, crate::common::RW>
1990    {
1991        crate::common::RegisterField::<5,0x1,1,0,svctl::Hsmce, Svctl_SPEC,crate::common::RW>::from_register(self,0)
1992    }
1993    #[doc = "Device-ID Address Enable"]
1994    #[inline(always)]
1995    pub fn dvide(
1996        self,
1997    ) -> crate::common::RegisterField<6, 0x1, 1, 0, svctl::Dvide, Svctl_SPEC, crate::common::RW>
1998    {
1999        crate::common::RegisterField::<6,0x1,1,0,svctl::Dvide, Svctl_SPEC,crate::common::RW>::from_register(self,0)
2000    }
2001    #[doc = "Host Address Enable"]
2002    #[inline(always)]
2003    pub fn hoae(
2004        self,
2005    ) -> crate::common::RegisterField<15, 0x1, 1, 0, svctl::Hoae, Svctl_SPEC, crate::common::RW>
2006    {
2007        crate::common::RegisterField::<15,0x1,1,0,svctl::Hoae, Svctl_SPEC,crate::common::RW>::from_register(self,0)
2008    }
2009    #[doc = "Slave Address Enable n ( n = 0 to 2 )"]
2010    #[inline(always)]
2011    pub fn svae(
2012        self,
2013    ) -> crate::common::RegisterField<16, 0x7, 1, 0, svctl::Svae, Svctl_SPEC, crate::common::RW>
2014    {
2015        crate::common::RegisterField::<16,0x7,1,0,svctl::Svae, Svctl_SPEC,crate::common::RW>::from_register(self,0)
2016    }
2017}
2018impl ::core::default::Default for Svctl {
2019    #[inline(always)]
2020    fn default() -> Svctl {
2021        <crate::RegValueT<Svctl_SPEC> as RegisterValue<_>>::new(0)
2022    }
2023}
2024pub mod svctl {
2025
2026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2027    pub struct Gcae_SPEC;
2028    pub type Gcae = crate::EnumBitfieldStruct<u8, Gcae_SPEC>;
2029    impl Gcae {
2030        #[doc = "General call address detection disables."]
2031        pub const _0: Self = Self::new(0);
2032        #[doc = "General call address detection enables."]
2033        pub const _1: Self = Self::new(1);
2034    }
2035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2036    pub struct Hsmce_SPEC;
2037    pub type Hsmce = crate::EnumBitfieldStruct<u8, Hsmce_SPEC>;
2038    impl Hsmce {
2039        #[doc = "Hs-mode Master Code Detection disables."]
2040        pub const _0: Self = Self::new(0);
2041        #[doc = "Hs-mode Master Code Detection enables."]
2042        pub const _1: Self = Self::new(1);
2043    }
2044    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2045    pub struct Dvide_SPEC;
2046    pub type Dvide = crate::EnumBitfieldStruct<u8, Dvide_SPEC>;
2047    impl Dvide {
2048        #[doc = "Device-ID address detection disables."]
2049        pub const _0: Self = Self::new(0);
2050        #[doc = "Device-ID address detection enables."]
2051        pub const _1: Self = Self::new(1);
2052    }
2053    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2054    pub struct Hoae_SPEC;
2055    pub type Hoae = crate::EnumBitfieldStruct<u8, Hoae_SPEC>;
2056    impl Hoae {
2057        #[doc = "Host address detection disables."]
2058        pub const _0: Self = Self::new(0);
2059        #[doc = "Host address detection enables."]
2060        pub const _1: Self = Self::new(1);
2061    }
2062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2063    pub struct Svae_SPEC;
2064    pub type Svae = crate::EnumBitfieldStruct<u8, Svae_SPEC>;
2065    impl Svae {
2066        #[doc = "Slave n disables"]
2067        pub const _0: Self = Self::new(0);
2068        #[doc = "Slave n enables"]
2069        pub const _1: Self = Self::new(1);
2070    }
2071}
2072#[doc(hidden)]
2073#[derive(Copy, Clone, Eq, PartialEq)]
2074pub struct Refckctl_SPEC;
2075impl crate::sealed::RegSpec for Refckctl_SPEC {
2076    type DataType = u32;
2077}
2078#[doc = "Reference Clock Control Register"]
2079pub type Refckctl = crate::RegValueT<Refckctl_SPEC>;
2080
2081impl Refckctl {
2082    #[doc = "Internal Reference Clock Selection"]
2083    #[inline(always)]
2084    pub fn irefcks(
2085        self,
2086    ) -> crate::common::RegisterField<
2087        0,
2088        0x7,
2089        1,
2090        0,
2091        refckctl::Irefcks,
2092        Refckctl_SPEC,
2093        crate::common::RW,
2094    > {
2095        crate::common::RegisterField::<
2096            0,
2097            0x7,
2098            1,
2099            0,
2100            refckctl::Irefcks,
2101            Refckctl_SPEC,
2102            crate::common::RW,
2103        >::from_register(self, 0)
2104    }
2105}
2106impl ::core::default::Default for Refckctl {
2107    #[inline(always)]
2108    fn default() -> Refckctl {
2109        <crate::RegValueT<Refckctl_SPEC> as RegisterValue<_>>::new(0)
2110    }
2111}
2112pub mod refckctl {
2113
2114    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2115    pub struct Irefcks_SPEC;
2116    pub type Irefcks = crate::EnumBitfieldStruct<u8, Irefcks_SPEC>;
2117    impl Irefcks {
2118        #[doc = "TCLK/1 clock"]
2119        pub const _000: Self = Self::new(0);
2120        #[doc = "TCLK/2 clock"]
2121        pub const _001: Self = Self::new(1);
2122        #[doc = "TCLK/4 clock"]
2123        pub const _010: Self = Self::new(2);
2124        #[doc = "TCLK/8 clock"]
2125        pub const _011: Self = Self::new(3);
2126        #[doc = "TCLK/16 clock"]
2127        pub const _100: Self = Self::new(4);
2128        #[doc = "TCLK/32 clock"]
2129        pub const _101: Self = Self::new(5);
2130        #[doc = "TCLK/64 clock"]
2131        pub const _110: Self = Self::new(6);
2132        #[doc = "TCLK/128 clock"]
2133        pub const _111: Self = Self::new(7);
2134    }
2135}
2136#[doc(hidden)]
2137#[derive(Copy, Clone, Eq, PartialEq)]
2138pub struct Stdbr_SPEC;
2139impl crate::sealed::RegSpec for Stdbr_SPEC {
2140    type DataType = u32;
2141}
2142#[doc = "Standard Bit Rate Register"]
2143pub type Stdbr = crate::RegValueT<Stdbr_SPEC>;
2144
2145impl Stdbr {
2146    #[doc = "Standard Bit Rate Low-level Period Open-Drain"]
2147    #[inline(always)]
2148    pub fn sbrlo(
2149        self,
2150    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Stdbr_SPEC, crate::common::RW> {
2151        crate::common::RegisterField::<0,0xff,1,0,u8, Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2152    }
2153    #[doc = "Standard Bit Rate High-level Period Open-Drain"]
2154    #[inline(always)]
2155    pub fn sbrho(
2156        self,
2157    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Stdbr_SPEC, crate::common::RW> {
2158        crate::common::RegisterField::<8,0xff,1,0,u8, Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2159    }
2160    #[doc = "Standard Bit Rate Low-level Period Push-Pull"]
2161    #[inline(always)]
2162    pub fn sbrlp(
2163        self,
2164    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, Stdbr_SPEC, crate::common::RW> {
2165        crate::common::RegisterField::<16,0x3f,1,0,u8, Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2166    }
2167    #[doc = "Standard Bit Rate High-level Period Push-Pull"]
2168    #[inline(always)]
2169    pub fn sbrhp(
2170        self,
2171    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, Stdbr_SPEC, crate::common::RW> {
2172        crate::common::RegisterField::<24,0x3f,1,0,u8, Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2173    }
2174    #[doc = "Double the Standard Bit Rate Period for Open-Drain"]
2175    #[inline(always)]
2176    pub fn dsbrpo(
2177        self,
2178    ) -> crate::common::RegisterField<31, 0x1, 1, 0, stdbr::Dsbrpo, Stdbr_SPEC, crate::common::RW>
2179    {
2180        crate::common::RegisterField::<31,0x1,1,0,stdbr::Dsbrpo, Stdbr_SPEC,crate::common::RW>::from_register(self,0)
2181    }
2182}
2183impl ::core::default::Default for Stdbr {
2184    #[inline(always)]
2185    fn default() -> Stdbr {
2186        <crate::RegValueT<Stdbr_SPEC> as RegisterValue<_>>::new(1061158911)
2187    }
2188}
2189pub mod stdbr {
2190
2191    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2192    pub struct Dsbrpo_SPEC;
2193    pub type Dsbrpo = crate::EnumBitfieldStruct<u8, Dsbrpo_SPEC>;
2194    impl Dsbrpo {
2195        #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is not doubled."]
2196        pub const _0: Self = Self::new(0);
2197        #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is doubled."]
2198        pub const _1: Self = Self::new(1);
2199    }
2200}
2201#[doc(hidden)]
2202#[derive(Copy, Clone, Eq, PartialEq)]
2203pub struct Extbr_SPEC;
2204impl crate::sealed::RegSpec for Extbr_SPEC {
2205    type DataType = u32;
2206}
2207#[doc = "Extended Bit Rate Register"]
2208pub type Extbr = crate::RegValueT<Extbr_SPEC>;
2209
2210impl Extbr {
2211    #[doc = "Extended Bit Rate Low-level Period Open-Drain"]
2212    #[inline(always)]
2213    pub fn ebrlo(
2214        self,
2215    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Extbr_SPEC, crate::common::RW> {
2216        crate::common::RegisterField::<0,0xff,1,0,u8, Extbr_SPEC,crate::common::RW>::from_register(self,0)
2217    }
2218    #[doc = "Extended Bit Rate High-level Period Open-Drain"]
2219    #[inline(always)]
2220    pub fn ebrho(
2221        self,
2222    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Extbr_SPEC, crate::common::RW> {
2223        crate::common::RegisterField::<8,0xff,1,0,u8, Extbr_SPEC,crate::common::RW>::from_register(self,0)
2224    }
2225    #[doc = "Extended Bit Rate Low-level Period Push-Pull"]
2226    #[inline(always)]
2227    pub fn ebrlp(
2228        self,
2229    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, Extbr_SPEC, crate::common::RW> {
2230        crate::common::RegisterField::<16,0x3f,1,0,u8, Extbr_SPEC,crate::common::RW>::from_register(self,0)
2231    }
2232    #[doc = "Extended Bit Rate High-level Period Push-Pull"]
2233    #[inline(always)]
2234    pub fn ebrhp(
2235        self,
2236    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, Extbr_SPEC, crate::common::RW> {
2237        crate::common::RegisterField::<24,0x3f,1,0,u8, Extbr_SPEC,crate::common::RW>::from_register(self,0)
2238    }
2239}
2240impl ::core::default::Default for Extbr {
2241    #[inline(always)]
2242    fn default() -> Extbr {
2243        <crate::RegValueT<Extbr_SPEC> as RegisterValue<_>>::new(1061158911)
2244    }
2245}
2246
2247#[doc(hidden)]
2248#[derive(Copy, Clone, Eq, PartialEq)]
2249pub struct Bfrecdt_SPEC;
2250impl crate::sealed::RegSpec for Bfrecdt_SPEC {
2251    type DataType = u32;
2252}
2253#[doc = "Bus Free Condition Detection Time Register"]
2254pub type Bfrecdt = crate::RegValueT<Bfrecdt_SPEC>;
2255
2256impl Bfrecdt {
2257    #[doc = "Bus Free Condition Detection Cycle"]
2258    #[inline(always)]
2259    pub fn frecyc(
2260        self,
2261    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Bfrecdt_SPEC, crate::common::RW> {
2262        crate::common::RegisterField::<0,0x1ff,1,0,u16, Bfrecdt_SPEC,crate::common::RW>::from_register(self,0)
2263    }
2264}
2265impl ::core::default::Default for Bfrecdt {
2266    #[inline(always)]
2267    fn default() -> Bfrecdt {
2268        <crate::RegValueT<Bfrecdt_SPEC> as RegisterValue<_>>::new(0)
2269    }
2270}
2271
2272#[doc(hidden)]
2273#[derive(Copy, Clone, Eq, PartialEq)]
2274pub struct Bavlcdt_SPEC;
2275impl crate::sealed::RegSpec for Bavlcdt_SPEC {
2276    type DataType = u32;
2277}
2278#[doc = "Bus Available Condition Detection Time Register"]
2279pub type Bavlcdt = crate::RegValueT<Bavlcdt_SPEC>;
2280
2281impl Bavlcdt {
2282    #[doc = "Bus Available Condition Detection Cycle"]
2283    #[inline(always)]
2284    pub fn avlcyc(
2285        self,
2286    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Bavlcdt_SPEC, crate::common::RW> {
2287        crate::common::RegisterField::<0,0x1ff,1,0,u16, Bavlcdt_SPEC,crate::common::RW>::from_register(self,0)
2288    }
2289}
2290impl ::core::default::Default for Bavlcdt {
2291    #[inline(always)]
2292    fn default() -> Bavlcdt {
2293        <crate::RegValueT<Bavlcdt_SPEC> as RegisterValue<_>>::new(0)
2294    }
2295}
2296
2297#[doc(hidden)]
2298#[derive(Copy, Clone, Eq, PartialEq)]
2299pub struct Bidlcdt_SPEC;
2300impl crate::sealed::RegSpec for Bidlcdt_SPEC {
2301    type DataType = u32;
2302}
2303#[doc = "Bus Idle Condition Detection Time Register"]
2304pub type Bidlcdt = crate::RegValueT<Bidlcdt_SPEC>;
2305
2306impl Bidlcdt {
2307    #[doc = "Bus Idle Condition Detection Cycle"]
2308    #[inline(always)]
2309    pub fn idlcyc(
2310        self,
2311    ) -> crate::common::RegisterField<0, 0x3ffff, 1, 0, u32, Bidlcdt_SPEC, crate::common::RW> {
2312        crate::common::RegisterField::<0,0x3ffff,1,0,u32, Bidlcdt_SPEC,crate::common::RW>::from_register(self,0)
2313    }
2314}
2315impl ::core::default::Default for Bidlcdt {
2316    #[inline(always)]
2317    fn default() -> Bidlcdt {
2318        <crate::RegValueT<Bidlcdt_SPEC> as RegisterValue<_>>::new(0)
2319    }
2320}
2321
2322#[doc(hidden)]
2323#[derive(Copy, Clone, Eq, PartialEq)]
2324pub struct Outctl_SPEC;
2325impl crate::sealed::RegSpec for Outctl_SPEC {
2326    type DataType = u32;
2327}
2328#[doc = "Output Control Register"]
2329pub type Outctl = crate::RegValueT<Outctl_SPEC>;
2330
2331impl Outctl {
2332    #[doc = "SDA Output Control"]
2333    #[inline(always)]
2334    pub fn sdoc(
2335        self,
2336    ) -> crate::common::RegisterField<0, 0x1, 1, 0, outctl::Sdoc, Outctl_SPEC, crate::common::RW>
2337    {
2338        crate::common::RegisterField::<0,0x1,1,0,outctl::Sdoc, Outctl_SPEC,crate::common::RW>::from_register(self,0)
2339    }
2340    #[doc = "SCL Output Control"]
2341    #[inline(always)]
2342    pub fn scoc(
2343        self,
2344    ) -> crate::common::RegisterField<1, 0x1, 1, 0, outctl::Scoc, Outctl_SPEC, crate::common::RW>
2345    {
2346        crate::common::RegisterField::<1,0x1,1,0,outctl::Scoc, Outctl_SPEC,crate::common::RW>::from_register(self,0)
2347    }
2348    #[doc = "SCL/SDA Output Control Write Protect"]
2349    #[inline(always)]
2350    pub fn socwp(
2351        self,
2352    ) -> crate::common::RegisterField<2, 0x1, 1, 0, outctl::Socwp, Outctl_SPEC, crate::common::W>
2353    {
2354        crate::common::RegisterField::<2,0x1,1,0,outctl::Socwp, Outctl_SPEC,crate::common::W>::from_register(self,0)
2355    }
2356    #[doc = "Extra SCL Clock Cycle Output"]
2357    #[inline(always)]
2358    pub fn excyc(
2359        self,
2360    ) -> crate::common::RegisterField<4, 0x1, 1, 0, outctl::Excyc, Outctl_SPEC, crate::common::RW>
2361    {
2362        crate::common::RegisterField::<4,0x1,1,0,outctl::Excyc, Outctl_SPEC,crate::common::RW>::from_register(self,0)
2363    }
2364    #[doc = "SDA Output Delay"]
2365    #[inline(always)]
2366    pub fn sdod(
2367        self,
2368    ) -> crate::common::RegisterField<8, 0x7, 1, 0, outctl::Sdod, Outctl_SPEC, crate::common::RW>
2369    {
2370        crate::common::RegisterField::<8,0x7,1,0,outctl::Sdod, Outctl_SPEC,crate::common::RW>::from_register(self,0)
2371    }
2372    #[doc = "SDA Output Delay Clock Source Selection"]
2373    #[inline(always)]
2374    pub fn sdodcs(
2375        self,
2376    ) -> crate::common::RegisterField<15, 0x1, 1, 0, outctl::Sdodcs, Outctl_SPEC, crate::common::RW>
2377    {
2378        crate::common::RegisterField::<15,0x1,1,0,outctl::Sdodcs, Outctl_SPEC,crate::common::RW>::from_register(self,0)
2379    }
2380}
2381impl ::core::default::Default for Outctl {
2382    #[inline(always)]
2383    fn default() -> Outctl {
2384        <crate::RegValueT<Outctl_SPEC> as RegisterValue<_>>::new(3)
2385    }
2386}
2387pub mod outctl {
2388
2389    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2390    pub struct Sdoc_SPEC;
2391    pub type Sdoc = crate::EnumBitfieldStruct<u8, Sdoc_SPEC>;
2392    impl Sdoc {
2393        #[doc = "I3C drives the I3C_SDA pin low."]
2394        pub const _0: Self = Self::new(0);
2395        #[doc = "I3C releases the I3C_SDA pin."]
2396        pub const _1: Self = Self::new(1);
2397    }
2398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2399    pub struct Scoc_SPEC;
2400    pub type Scoc = crate::EnumBitfieldStruct<u8, Scoc_SPEC>;
2401    impl Scoc {
2402        #[doc = "I3C drives the I3C_SCL pin low."]
2403        pub const _0: Self = Self::new(0);
2404        #[doc = "I3C releases the I3C_SCL pin."]
2405        pub const _1: Self = Self::new(1);
2406    }
2407    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2408    pub struct Socwp_SPEC;
2409    pub type Socwp = crate::EnumBitfieldStruct<u8, Socwp_SPEC>;
2410    impl Socwp {
2411        #[doc = "Bits SCOC and SDOC are protected."]
2412        pub const _0: Self = Self::new(0);
2413        #[doc = "Bits SCOC and SDOC can be written (When writing simultaneously with the value of the target bit). This bit is read as 0."]
2414        pub const _1: Self = Self::new(1);
2415    }
2416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2417    pub struct Excyc_SPEC;
2418    pub type Excyc = crate::EnumBitfieldStruct<u8, Excyc_SPEC>;
2419    impl Excyc {
2420        #[doc = "Does not output an extra SCL clock cycle (default)."]
2421        pub const _0: Self = Self::new(0);
2422        #[doc = "Outputs an extra SCL clock cycle."]
2423        pub const _1: Self = Self::new(1);
2424    }
2425    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2426    pub struct Sdod_SPEC;
2427    pub type Sdod = crate::EnumBitfieldStruct<u8, Sdod_SPEC>;
2428    impl Sdod {
2429        #[doc = "No output delay"]
2430        pub const _000: Self = Self::new(0);
2431        #[doc = "1 I3Cφ cycle (When OUTCTL.SDODCS = 0 (I3Cφ)) 1 or 2 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2432        pub const _001: Self = Self::new(1);
2433        #[doc = "2 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 3 or 4 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2434        pub const _010: Self = Self::new(2);
2435        #[doc = "3 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 5 or 6 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2436        pub const _011: Self = Self::new(3);
2437        #[doc = "4 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 7 or 8 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2438        pub const _100: Self = Self::new(4);
2439        #[doc = "5 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 9 or 10 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2440        pub const _101: Self = Self::new(5);
2441        #[doc = "6 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 11 or 12 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2442        pub const _110: Self = Self::new(6);
2443        #[doc = "7 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 13 or 14 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
2444        pub const _111: Self = Self::new(7);
2445    }
2446    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2447    pub struct Sdodcs_SPEC;
2448    pub type Sdodcs = crate::EnumBitfieldStruct<u8, Sdodcs_SPEC>;
2449    impl Sdodcs {
2450        #[doc = "The internal reference clock (I3Cφ) is selected as the clock source of the SDA output delay counter."]
2451        pub const _0: Self = Self::new(0);
2452        #[doc = "The internal reference clock divided by 2 (I3Cφ/2) is selected as the clock source of the SDA output delay counter."]
2453        pub const _1: Self = Self::new(1);
2454    }
2455}
2456#[doc(hidden)]
2457#[derive(Copy, Clone, Eq, PartialEq)]
2458pub struct Inctl_SPEC;
2459impl crate::sealed::RegSpec for Inctl_SPEC {
2460    type DataType = u32;
2461}
2462#[doc = "Input Control Register"]
2463pub type Inctl = crate::RegValueT<Inctl_SPEC>;
2464
2465impl Inctl {
2466    #[doc = "Digital Noise Filter Stage Selection"]
2467    #[inline(always)]
2468    pub fn dnfs(
2469        self,
2470    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, Inctl_SPEC, crate::common::RW> {
2471        crate::common::RegisterField::<0,0xf,1,0,u8, Inctl_SPEC,crate::common::RW>::from_register(self,0)
2472    }
2473    #[doc = "Digital Noise Filter Circuit Enable"]
2474    #[inline(always)]
2475    pub fn dnfe(
2476        self,
2477    ) -> crate::common::RegisterField<4, 0x1, 1, 0, inctl::Dnfe, Inctl_SPEC, crate::common::RW>
2478    {
2479        crate::common::RegisterField::<4,0x1,1,0,inctl::Dnfe, Inctl_SPEC,crate::common::RW>::from_register(self,0)
2480    }
2481}
2482impl ::core::default::Default for Inctl {
2483    #[inline(always)]
2484    fn default() -> Inctl {
2485        <crate::RegValueT<Inctl_SPEC> as RegisterValue<_>>::new(208)
2486    }
2487}
2488pub mod inctl {
2489
2490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2491    pub struct Dnfe_SPEC;
2492    pub type Dnfe = crate::EnumBitfieldStruct<u8, Dnfe_SPEC>;
2493    impl Dnfe {
2494        #[doc = "No digital noise filter circuit is used."]
2495        pub const _0: Self = Self::new(0);
2496        #[doc = "A digital noise filter circuit is used."]
2497        pub const _1: Self = Self::new(1);
2498    }
2499}
2500#[doc(hidden)]
2501#[derive(Copy, Clone, Eq, PartialEq)]
2502pub struct Tmoctl_SPEC;
2503impl crate::sealed::RegSpec for Tmoctl_SPEC {
2504    type DataType = u32;
2505}
2506#[doc = "Timeout Control Register"]
2507pub type Tmoctl = crate::RegValueT<Tmoctl_SPEC>;
2508
2509impl Tmoctl {
2510    #[doc = "Timeout Detection Time Selection"]
2511    #[inline(always)]
2512    pub fn todts(
2513        self,
2514    ) -> crate::common::RegisterField<0, 0x3, 1, 0, tmoctl::Todts, Tmoctl_SPEC, crate::common::RW>
2515    {
2516        crate::common::RegisterField::<0,0x3,1,0,tmoctl::Todts, Tmoctl_SPEC,crate::common::RW>::from_register(self,0)
2517    }
2518    #[doc = "Timeout L Count Control"]
2519    #[inline(always)]
2520    pub fn tolctl(
2521        self,
2522    ) -> crate::common::RegisterField<4, 0x1, 1, 0, tmoctl::Tolctl, Tmoctl_SPEC, crate::common::RW>
2523    {
2524        crate::common::RegisterField::<4,0x1,1,0,tmoctl::Tolctl, Tmoctl_SPEC,crate::common::RW>::from_register(self,0)
2525    }
2526    #[doc = "Timeout H Count Control"]
2527    #[inline(always)]
2528    pub fn tohctl(
2529        self,
2530    ) -> crate::common::RegisterField<5, 0x1, 1, 0, tmoctl::Tohctl, Tmoctl_SPEC, crate::common::RW>
2531    {
2532        crate::common::RegisterField::<5,0x1,1,0,tmoctl::Tohctl, Tmoctl_SPEC,crate::common::RW>::from_register(self,0)
2533    }
2534    #[doc = "Timeout Operation Mode Selection"]
2535    #[inline(always)]
2536    pub fn tomds(
2537        self,
2538    ) -> crate::common::RegisterField<6, 0x3, 1, 0, tmoctl::Tomds, Tmoctl_SPEC, crate::common::RW>
2539    {
2540        crate::common::RegisterField::<6,0x3,1,0,tmoctl::Tomds, Tmoctl_SPEC,crate::common::RW>::from_register(self,0)
2541    }
2542}
2543impl ::core::default::Default for Tmoctl {
2544    #[inline(always)]
2545    fn default() -> Tmoctl {
2546        <crate::RegValueT<Tmoctl_SPEC> as RegisterValue<_>>::new(48)
2547    }
2548}
2549pub mod tmoctl {
2550
2551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2552    pub struct Todts_SPEC;
2553    pub type Todts = crate::EnumBitfieldStruct<u8, Todts_SPEC>;
2554    impl Todts {
2555        #[doc = "16bit-timeout"]
2556        pub const _00: Self = Self::new(0);
2557        #[doc = "14bit-timeout"]
2558        pub const _01: Self = Self::new(1);
2559        #[doc = "8bit-timeout"]
2560        pub const _10: Self = Self::new(2);
2561        #[doc = "6bit-timeout"]
2562        pub const _11: Self = Self::new(3);
2563    }
2564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2565    pub struct Tolctl_SPEC;
2566    pub type Tolctl = crate::EnumBitfieldStruct<u8, Tolctl_SPEC>;
2567    impl Tolctl {
2568        #[doc = "Count is disabled while the I3C_SCL line is at a low level."]
2569        pub const _0: Self = Self::new(0);
2570        #[doc = "Count is enabled while the I3C_SCL line is at a low level."]
2571        pub const _1: Self = Self::new(1);
2572    }
2573    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2574    pub struct Tohctl_SPEC;
2575    pub type Tohctl = crate::EnumBitfieldStruct<u8, Tohctl_SPEC>;
2576    impl Tohctl {
2577        #[doc = "Count is disabled while the I3C_SCL line is at a high level."]
2578        pub const _0: Self = Self::new(0);
2579        #[doc = "Count is enabled while the I3C_SCL line is at a high level."]
2580        pub const _1: Self = Self::new(1);
2581    }
2582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2583    pub struct Tomds_SPEC;
2584    pub type Tomds = crate::EnumBitfieldStruct<u8, Tomds_SPEC>;
2585    impl Tomds {
2586        #[doc = "Timeout is detected during the following conditions: The bus is busy (BCST.BFREF = 0) in master mode.I3C’s own slave address is detected and the bus is busy in slave mode.The bus is free (BCST.BFREF = 1) while generation of a START condition is requested (CNDCTL.STCND = 1)."]
2587        pub const _00: Self = Self::new(0);
2588        #[doc = "Timeout is detected while the bus is busy."]
2589        pub const _01: Self = Self::new(1);
2590        #[doc = "Timeout is detected while the bus is free."]
2591        pub const _10: Self = Self::new(2);
2592        #[doc = "Setting prohibited"]
2593        pub const _11: Self = Self::new(3);
2594    }
2595}
2596#[doc(hidden)]
2597#[derive(Copy, Clone, Eq, PartialEq)]
2598pub struct Wuctl_SPEC;
2599impl crate::sealed::RegSpec for Wuctl_SPEC {
2600    type DataType = u32;
2601}
2602#[doc = "Wake Up Unit Control Register"]
2603pub type Wuctl = crate::RegValueT<Wuctl_SPEC>;
2604
2605impl Wuctl {
2606    #[doc = "Wake-Up Acknowledge Selection"]
2607    #[inline(always)]
2608    pub fn wuacks(
2609        self,
2610    ) -> crate::common::RegisterFieldBool<0, 1, 0, Wuctl_SPEC, crate::common::RW> {
2611        crate::common::RegisterFieldBool::<0, 1, 0, Wuctl_SPEC, crate::common::RW>::from_register(
2612            self, 0,
2613        )
2614    }
2615    #[doc = "Wake-Up Analog Noise Filter Selection"]
2616    #[inline(always)]
2617    pub fn wuanfs(
2618        self,
2619    ) -> crate::common::RegisterField<4, 0x1, 1, 0, wuctl::Wuanfs, Wuctl_SPEC, crate::common::RW>
2620    {
2621        crate::common::RegisterField::<4,0x1,1,0,wuctl::Wuanfs, Wuctl_SPEC,crate::common::RW>::from_register(self,0)
2622    }
2623    #[doc = "Wake-Up function PCLK Synchronous Enable"]
2624    #[inline(always)]
2625    pub fn wufsyne(
2626        self,
2627    ) -> crate::common::RegisterField<6, 0x1, 1, 0, wuctl::Wufsyne, Wuctl_SPEC, crate::common::RW>
2628    {
2629        crate::common::RegisterField::<6,0x1,1,0,wuctl::Wufsyne, Wuctl_SPEC,crate::common::RW>::from_register(self,0)
2630    }
2631    #[doc = "Wake-Up function Enable"]
2632    #[inline(always)]
2633    pub fn wufe(
2634        self,
2635    ) -> crate::common::RegisterField<7, 0x1, 1, 0, wuctl::Wufe, Wuctl_SPEC, crate::common::RW>
2636    {
2637        crate::common::RegisterField::<7,0x1,1,0,wuctl::Wufe, Wuctl_SPEC,crate::common::RW>::from_register(self,0)
2638    }
2639}
2640impl ::core::default::Default for Wuctl {
2641    #[inline(always)]
2642    fn default() -> Wuctl {
2643        <crate::RegValueT<Wuctl_SPEC> as RegisterValue<_>>::new(65)
2644    }
2645}
2646pub mod wuctl {
2647
2648    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2649    pub struct Wuanfs_SPEC;
2650    pub type Wuanfs = crate::EnumBitfieldStruct<u8, Wuanfs_SPEC>;
2651    impl Wuanfs {
2652        #[doc = "Do not add the Wake Up analog filter."]
2653        pub const _0: Self = Self::new(0);
2654        #[doc = "Add the Wake Up analog filter."]
2655        pub const _1: Self = Self::new(1);
2656    }
2657    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2658    pub struct Wufsyne_SPEC;
2659    pub type Wufsyne = crate::EnumBitfieldStruct<u8, Wufsyne_SPEC>;
2660    impl Wufsyne {
2661        #[doc = "I3C asynchronous circuit enable"]
2662        pub const _0: Self = Self::new(0);
2663        #[doc = "I3C synchronous circuit enable"]
2664        pub const _1: Self = Self::new(1);
2665    }
2666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2667    pub struct Wufe_SPEC;
2668    pub type Wufe = crate::EnumBitfieldStruct<u8, Wufe_SPEC>;
2669    impl Wufe {
2670        #[doc = "Wake-up function disables"]
2671        pub const _0: Self = Self::new(0);
2672        #[doc = "Wake-up function enables"]
2673        pub const _1: Self = Self::new(1);
2674    }
2675}
2676#[doc(hidden)]
2677#[derive(Copy, Clone, Eq, PartialEq)]
2678pub struct Ackctl_SPEC;
2679impl crate::sealed::RegSpec for Ackctl_SPEC {
2680    type DataType = u32;
2681}
2682#[doc = "Acknowledge Control Register"]
2683pub type Ackctl = crate::RegValueT<Ackctl_SPEC>;
2684
2685impl Ackctl {
2686    #[doc = "Acknowledge Reception"]
2687    #[inline(always)]
2688    pub fn ackr(
2689        self,
2690    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ackctl::Ackr, Ackctl_SPEC, crate::common::R>
2691    {
2692        crate::common::RegisterField::<0,0x1,1,0,ackctl::Ackr, Ackctl_SPEC,crate::common::R>::from_register(self,0)
2693    }
2694    #[doc = "Acknowledge Transmission"]
2695    #[inline(always)]
2696    pub fn ackt(
2697        self,
2698    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ackctl::Ackt, Ackctl_SPEC, crate::common::RW>
2699    {
2700        crate::common::RegisterField::<1,0x1,1,0,ackctl::Ackt, Ackctl_SPEC,crate::common::RW>::from_register(self,0)
2701    }
2702    #[doc = "ACKT Write Protect"]
2703    #[inline(always)]
2704    pub fn acktwp(
2705        self,
2706    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ackctl::Acktwp, Ackctl_SPEC, crate::common::W>
2707    {
2708        crate::common::RegisterField::<2,0x1,1,0,ackctl::Acktwp, Ackctl_SPEC,crate::common::W>::from_register(self,0)
2709    }
2710}
2711impl ::core::default::Default for Ackctl {
2712    #[inline(always)]
2713    fn default() -> Ackctl {
2714        <crate::RegValueT<Ackctl_SPEC> as RegisterValue<_>>::new(0)
2715    }
2716}
2717pub mod ackctl {
2718
2719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2720    pub struct Ackr_SPEC;
2721    pub type Ackr = crate::EnumBitfieldStruct<u8, Ackr_SPEC>;
2722    impl Ackr {
2723        #[doc = "A 0 is received as the acknowledge bit (ACK reception)."]
2724        pub const _0: Self = Self::new(0);
2725        #[doc = "A 1 is received as the acknowledge bit (NACK reception)."]
2726        pub const _1: Self = Self::new(1);
2727    }
2728    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2729    pub struct Ackt_SPEC;
2730    pub type Ackt = crate::EnumBitfieldStruct<u8, Ackt_SPEC>;
2731    impl Ackt {
2732        #[doc = "A 0 is sent as the acknowledge bit (ACK transmission)."]
2733        pub const _0: Self = Self::new(0);
2734        #[doc = "A 1 is sent as the acknowledge bit (NACK transmission)."]
2735        pub const _1: Self = Self::new(1);
2736    }
2737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2738    pub struct Acktwp_SPEC;
2739    pub type Acktwp = crate::EnumBitfieldStruct<u8, Acktwp_SPEC>;
2740    impl Acktwp {
2741        #[doc = "The ACKT bit are protected."]
2742        pub const _0: Self = Self::new(0);
2743        #[doc = "The ACKT bit can be written (when writing simultaneously with the value of the target bit). This bit is read as 0."]
2744        pub const _1: Self = Self::new(1);
2745    }
2746}
2747#[doc(hidden)]
2748#[derive(Copy, Clone, Eq, PartialEq)]
2749pub struct Scstrctl_SPEC;
2750impl crate::sealed::RegSpec for Scstrctl_SPEC {
2751    type DataType = u32;
2752}
2753#[doc = "SCL Stretch Control Register"]
2754pub type Scstrctl = crate::RegValueT<Scstrctl_SPEC>;
2755
2756impl Scstrctl {
2757    #[doc = "Acknowledge Transmission Wait Enable"]
2758    #[inline(always)]
2759    pub fn acktwe(
2760        self,
2761    ) -> crate::common::RegisterField<
2762        0,
2763        0x1,
2764        1,
2765        0,
2766        scstrctl::Acktwe,
2767        Scstrctl_SPEC,
2768        crate::common::RW,
2769    > {
2770        crate::common::RegisterField::<
2771            0,
2772            0x1,
2773            1,
2774            0,
2775            scstrctl::Acktwe,
2776            Scstrctl_SPEC,
2777            crate::common::RW,
2778        >::from_register(self, 0)
2779    }
2780    #[doc = "Receive Wait Enable"]
2781    #[inline(always)]
2782    pub fn rwe(
2783        self,
2784    ) -> crate::common::RegisterField<1, 0x1, 1, 0, scstrctl::Rwe, Scstrctl_SPEC, crate::common::RW>
2785    {
2786        crate::common::RegisterField::<1,0x1,1,0,scstrctl::Rwe, Scstrctl_SPEC,crate::common::RW>::from_register(self,0)
2787    }
2788}
2789impl ::core::default::Default for Scstrctl {
2790    #[inline(always)]
2791    fn default() -> Scstrctl {
2792        <crate::RegValueT<Scstrctl_SPEC> as RegisterValue<_>>::new(0)
2793    }
2794}
2795pub mod scstrctl {
2796
2797    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2798    pub struct Acktwe_SPEC;
2799    pub type Acktwe = crate::EnumBitfieldStruct<u8, Acktwe_SPEC>;
2800    impl Acktwe {
2801        #[doc = "NTST.RDBFF0 is set at the rising edge of the ninth SCL clock cycle. (The I3C_SCL line is not held low at the falling edge of the eighth clock cycle.)"]
2802        pub const _0: Self = Self::new(0);
2803        #[doc = "NTST.RDBFF0 is set at the rising edge of the eighth SCL clock cycle. (The I3C_SCL line is held low at the falling edge of the eighth clock cycle.) Low-hold is released by writing a value to the ACKCTL.ACKT bit."]
2804        pub const _1: Self = Self::new(1);
2805    }
2806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2807    pub struct Rwe_SPEC;
2808    pub type Rwe = crate::EnumBitfieldStruct<u8, Rwe_SPEC>;
2809    impl Rwe {
2810        #[doc = "No WAIT (The period between ninth clock cycle and first clock cycle is not held low.)"]
2811        pub const _0: Self = Self::new(0);
2812        #[doc = "WAIT (The period between ninth clock cycle and first clock cycle is held low.) Low-hold is released by reading NTDTBP0."]
2813        pub const _1: Self = Self::new(1);
2814    }
2815}
2816#[doc(hidden)]
2817#[derive(Copy, Clone, Eq, PartialEq)]
2818pub struct Scstlctl_SPEC;
2819impl crate::sealed::RegSpec for Scstlctl_SPEC {
2820    type DataType = u32;
2821}
2822#[doc = "SCL Stalling Control Register"]
2823pub type Scstlctl = crate::RegValueT<Scstlctl_SPEC>;
2824
2825impl Scstlctl {
2826    #[doc = "Stalling Cycle"]
2827    #[inline(always)]
2828    pub fn stlcyc(
2829        self,
2830    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Scstlctl_SPEC, crate::common::RW> {
2831        crate::common::RegisterField::<0,0xffff,1,0,u16, Scstlctl_SPEC,crate::common::RW>::from_register(self,0)
2832    }
2833    #[doc = "Assigned Address Phase Enable"]
2834    #[inline(always)]
2835    pub fn aape(
2836        self,
2837    ) -> crate::common::RegisterField<28, 0x1, 1, 0, scstlctl::Aape, Scstlctl_SPEC, crate::common::RW>
2838    {
2839        crate::common::RegisterField::<
2840            28,
2841            0x1,
2842            1,
2843            0,
2844            scstlctl::Aape,
2845            Scstlctl_SPEC,
2846            crate::common::RW,
2847        >::from_register(self, 0)
2848    }
2849    #[doc = "Parity Phase Enable"]
2850    #[inline(always)]
2851    pub fn parpe(
2852        self,
2853    ) -> crate::common::RegisterField<
2854        30,
2855        0x1,
2856        1,
2857        0,
2858        scstlctl::Parpe,
2859        Scstlctl_SPEC,
2860        crate::common::RW,
2861    > {
2862        crate::common::RegisterField::<
2863            30,
2864            0x1,
2865            1,
2866            0,
2867            scstlctl::Parpe,
2868            Scstlctl_SPEC,
2869            crate::common::RW,
2870        >::from_register(self, 0)
2871    }
2872    #[doc = "ACK phase Enable"]
2873    #[inline(always)]
2874    pub fn ackpe(
2875        self,
2876    ) -> crate::common::RegisterField<
2877        31,
2878        0x1,
2879        1,
2880        0,
2881        scstlctl::Ackpe,
2882        Scstlctl_SPEC,
2883        crate::common::RW,
2884    > {
2885        crate::common::RegisterField::<
2886            31,
2887            0x1,
2888            1,
2889            0,
2890            scstlctl::Ackpe,
2891            Scstlctl_SPEC,
2892            crate::common::RW,
2893        >::from_register(self, 0)
2894    }
2895}
2896impl ::core::default::Default for Scstlctl {
2897    #[inline(always)]
2898    fn default() -> Scstlctl {
2899        <crate::RegValueT<Scstlctl_SPEC> as RegisterValue<_>>::new(0)
2900    }
2901}
2902pub mod scstlctl {
2903
2904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2905    pub struct Aape_SPEC;
2906    pub type Aape = crate::EnumBitfieldStruct<u8, Aape_SPEC>;
2907    impl Aape {
2908        #[doc = "Does not stall the SCL clock during the address assignment phase."]
2909        pub const _0: Self = Self::new(0);
2910        #[doc = "Stall the SCL clock during address assignment phase."]
2911        pub const _1: Self = Self::new(1);
2912    }
2913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2914    pub struct Parpe_SPEC;
2915    pub type Parpe = crate::EnumBitfieldStruct<u8, Parpe_SPEC>;
2916    impl Parpe {
2917        #[doc = "Does not stall the SCL clock during the parity bit period."]
2918        pub const _0: Self = Self::new(0);
2919        #[doc = "Stall the SCL clock during the parity bit period."]
2920        pub const _1: Self = Self::new(1);
2921    }
2922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2923    pub struct Ackpe_SPEC;
2924    pub type Ackpe = crate::EnumBitfieldStruct<u8, Ackpe_SPEC>;
2925    impl Ackpe {
2926        #[doc = "Does not stall the SCL clock during the ACK/NACK phase."]
2927        pub const _0: Self = Self::new(0);
2928        #[doc = "Stall the SCL clock during the ACK/NACK phase."]
2929        pub const _1: Self = Self::new(1);
2930    }
2931}
2932#[doc(hidden)]
2933#[derive(Copy, Clone, Eq, PartialEq)]
2934pub struct Svtdlg0_SPEC;
2935impl crate::sealed::RegSpec for Svtdlg0_SPEC {
2936    type DataType = u32;
2937}
2938#[doc = "Slave Transfer Data Length Register 0"]
2939pub type Svtdlg0 = crate::RegValueT<Svtdlg0_SPEC>;
2940
2941impl Svtdlg0 {
2942    #[doc = "Slave Transfer Data Length"]
2943    #[inline(always)]
2944    pub fn stdlg(
2945        self,
2946    ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, Svtdlg0_SPEC, crate::common::RW> {
2947        crate::common::RegisterField::<16,0xffff,1,0,u16, Svtdlg0_SPEC,crate::common::RW>::from_register(self,0)
2948    }
2949}
2950impl ::core::default::Default for Svtdlg0 {
2951    #[inline(always)]
2952    fn default() -> Svtdlg0 {
2953        <crate::RegValueT<Svtdlg0_SPEC> as RegisterValue<_>>::new(0)
2954    }
2955}
2956
2957#[doc(hidden)]
2958#[derive(Copy, Clone, Eq, PartialEq)]
2959pub struct Stctl_SPEC;
2960impl crate::sealed::RegSpec for Stctl_SPEC {
2961    type DataType = u32;
2962}
2963#[doc = "Synchronous Timing Control Register"]
2964pub type Stctl = crate::RegValueT<Stctl_SPEC>;
2965
2966impl Stctl {
2967    #[doc = "Synchronous Timing output Enable"]
2968    #[inline(always)]
2969    pub fn stoe(
2970        self,
2971    ) -> crate::common::RegisterField<0, 0x1, 1, 0, stctl::Stoe, Stctl_SPEC, crate::common::RW>
2972    {
2973        crate::common::RegisterField::<0,0x1,1,0,stctl::Stoe, Stctl_SPEC,crate::common::RW>::from_register(self,0)
2974    }
2975}
2976impl ::core::default::Default for Stctl {
2977    #[inline(always)]
2978    fn default() -> Stctl {
2979        <crate::RegValueT<Stctl_SPEC> as RegisterValue<_>>::new(0)
2980    }
2981}
2982pub mod stctl {
2983
2984    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2985    pub struct Stoe_SPEC;
2986    pub type Stoe = crate::EnumBitfieldStruct<u8, Stoe_SPEC>;
2987    impl Stoe {
2988        #[doc = "Disable"]
2989        pub const _0: Self = Self::new(0);
2990        #[doc = "Enable"]
2991        pub const _1: Self = Self::new(1);
2992    }
2993}
2994#[doc(hidden)]
2995#[derive(Copy, Clone, Eq, PartialEq)]
2996pub struct Atctl_SPEC;
2997impl crate::sealed::RegSpec for Atctl_SPEC {
2998    type DataType = u32;
2999}
3000#[doc = "Asynchronous Timing Control Register"]
3001pub type Atctl = crate::RegValueT<Atctl_SPEC>;
3002
3003impl Atctl {
3004    #[doc = "Asynchronous Timing Trigger Select"]
3005    #[inline(always)]
3006    pub fn attrgs(
3007        self,
3008    ) -> crate::common::RegisterField<0, 0x1, 1, 0, atctl::Attrgs, Atctl_SPEC, crate::common::RW>
3009    {
3010        crate::common::RegisterField::<0,0x1,1,0,atctl::Attrgs, Atctl_SPEC,crate::common::RW>::from_register(self,0)
3011    }
3012    #[doc = "MREF Output Enable (Capture Event / Counter Overflow)"]
3013    #[inline(always)]
3014    pub fn mrefoe(
3015        self,
3016    ) -> crate::common::RegisterField<1, 0x1, 1, 0, atctl::Mrefoe, Atctl_SPEC, crate::common::RW>
3017    {
3018        crate::common::RegisterField::<1,0x1,1,0,atctl::Mrefoe, Atctl_SPEC,crate::common::RW>::from_register(self,0)
3019    }
3020    #[doc = "Additional Master-initiated bus Event Output Enable"]
3021    #[inline(always)]
3022    pub fn ameoe(
3023        self,
3024    ) -> crate::common::RegisterField<2, 0x1, 1, 0, atctl::Ameoe, Atctl_SPEC, crate::common::RW>
3025    {
3026        crate::common::RegisterField::<2,0x1,1,0,atctl::Ameoe, Atctl_SPEC,crate::common::RW>::from_register(self,0)
3027    }
3028    #[doc = "TCLK Counter Divide Setting"]
3029    #[inline(always)]
3030    pub fn cdiv(
3031        self,
3032    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Atctl_SPEC, crate::common::RW> {
3033        crate::common::RegisterField::<8,0xff,1,0,u8, Atctl_SPEC,crate::common::RW>::from_register(self,0)
3034    }
3035}
3036impl ::core::default::Default for Atctl {
3037    #[inline(always)]
3038    fn default() -> Atctl {
3039        <crate::RegValueT<Atctl_SPEC> as RegisterValue<_>>::new(0)
3040    }
3041}
3042pub mod atctl {
3043
3044    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3045    pub struct Attrgs_SPEC;
3046    pub type Attrgs = crate::EnumBitfieldStruct<u8, Attrgs_SPEC>;
3047    impl Attrgs {
3048        #[doc = "Software trigger"]
3049        pub const _0: Self = Self::new(0);
3050        #[doc = "Hardware trigger"]
3051        pub const _1: Self = Self::new(1);
3052    }
3053    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3054    pub struct Mrefoe_SPEC;
3055    pub type Mrefoe = crate::EnumBitfieldStruct<u8, Mrefoe_SPEC>;
3056    impl Mrefoe {
3057        #[doc = "Disable"]
3058        pub const _0: Self = Self::new(0);
3059        #[doc = "Enable"]
3060        pub const _1: Self = Self::new(1);
3061    }
3062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3063    pub struct Ameoe_SPEC;
3064    pub type Ameoe = crate::EnumBitfieldStruct<u8, Ameoe_SPEC>;
3065    impl Ameoe {
3066        #[doc = "Disable"]
3067        pub const _0: Self = Self::new(0);
3068        #[doc = "Enable"]
3069        pub const _1: Self = Self::new(1);
3070    }
3071}
3072#[doc(hidden)]
3073#[derive(Copy, Clone, Eq, PartialEq)]
3074pub struct Attrg_SPEC;
3075impl crate::sealed::RegSpec for Attrg_SPEC {
3076    type DataType = u32;
3077}
3078#[doc = "Asynchronous Timing Trigger Register"]
3079pub type Attrg = crate::RegValueT<Attrg_SPEC>;
3080
3081impl Attrg {
3082    #[doc = "Asynchronous Timing Software Trigger"]
3083    #[inline(always)]
3084    pub fn atstrg(
3085        self,
3086    ) -> crate::common::RegisterField<0, 0x1, 1, 0, attrg::Atstrg, Attrg_SPEC, crate::common::W>
3087    {
3088        crate::common::RegisterField::<0,0x1,1,0,attrg::Atstrg, Attrg_SPEC,crate::common::W>::from_register(self,0)
3089    }
3090}
3091impl ::core::default::Default for Attrg {
3092    #[inline(always)]
3093    fn default() -> Attrg {
3094        <crate::RegValueT<Attrg_SPEC> as RegisterValue<_>>::new(0)
3095    }
3096}
3097pub mod attrg {
3098
3099    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3100    pub struct Atstrg_SPEC;
3101    pub type Atstrg = crate::EnumBitfieldStruct<u8, Atstrg_SPEC>;
3102    impl Atstrg {
3103        #[doc = "Do nothing"]
3104        pub const _0: Self = Self::new(0);
3105        #[doc = "Software trigger (one-shot pulse) output This bit is always read as 0."]
3106        pub const _1: Self = Self::new(1);
3107    }
3108}
3109#[doc(hidden)]
3110#[derive(Copy, Clone, Eq, PartialEq)]
3111pub struct Atccnte_SPEC;
3112impl crate::sealed::RegSpec for Atccnte_SPEC {
3113    type DataType = u32;
3114}
3115#[doc = "Asynchronous Timing Contorol Counter enable Register"]
3116pub type Atccnte = crate::RegValueT<Atccnte_SPEC>;
3117
3118impl Atccnte {
3119    #[doc = "Asynchronous Timing Counter Enable for MREF, MC2, SC1, SC2."]
3120    #[inline(always)]
3121    pub fn atce(
3122        self,
3123    ) -> crate::common::RegisterField<0, 0x1, 1, 0, atccnte::Atce, Atccnte_SPEC, crate::common::RW>
3124    {
3125        crate::common::RegisterField::<0,0x1,1,0,atccnte::Atce, Atccnte_SPEC,crate::common::RW>::from_register(self,0)
3126    }
3127}
3128impl ::core::default::Default for Atccnte {
3129    #[inline(always)]
3130    fn default() -> Atccnte {
3131        <crate::RegValueT<Atccnte_SPEC> as RegisterValue<_>>::new(0)
3132    }
3133}
3134pub mod atccnte {
3135
3136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3137    pub struct Atce_SPEC;
3138    pub type Atce = crate::EnumBitfieldStruct<u8, Atce_SPEC>;
3139    impl Atce {
3140        #[doc = "Disable"]
3141        pub const _0: Self = Self::new(0);
3142        #[doc = "Enable"]
3143        pub const _1: Self = Self::new(1);
3144    }
3145}
3146#[doc(hidden)]
3147#[derive(Copy, Clone, Eq, PartialEq)]
3148pub struct Cndctl_SPEC;
3149impl crate::sealed::RegSpec for Cndctl_SPEC {
3150    type DataType = u32;
3151}
3152#[doc = "Condition Control Register"]
3153pub type Cndctl = crate::RegValueT<Cndctl_SPEC>;
3154
3155impl Cndctl {
3156    #[doc = "START (S) Condition Issuance"]
3157    #[inline(always)]
3158    pub fn stcnd(
3159        self,
3160    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cndctl::Stcnd, Cndctl_SPEC, crate::common::RW>
3161    {
3162        crate::common::RegisterField::<0,0x1,1,0,cndctl::Stcnd, Cndctl_SPEC,crate::common::RW>::from_register(self,0)
3163    }
3164    #[doc = "Repeated START (Sr) Condition Issuance"]
3165    #[inline(always)]
3166    pub fn srcnd(
3167        self,
3168    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cndctl::Srcnd, Cndctl_SPEC, crate::common::RW>
3169    {
3170        crate::common::RegisterField::<1,0x1,1,0,cndctl::Srcnd, Cndctl_SPEC,crate::common::RW>::from_register(self,0)
3171    }
3172    #[doc = "STOP (P) Condition Issuance"]
3173    #[inline(always)]
3174    pub fn spcnd(
3175        self,
3176    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cndctl::Spcnd, Cndctl_SPEC, crate::common::RW>
3177    {
3178        crate::common::RegisterField::<2,0x1,1,0,cndctl::Spcnd, Cndctl_SPEC,crate::common::RW>::from_register(self,0)
3179    }
3180}
3181impl ::core::default::Default for Cndctl {
3182    #[inline(always)]
3183    fn default() -> Cndctl {
3184        <crate::RegValueT<Cndctl_SPEC> as RegisterValue<_>>::new(0)
3185    }
3186}
3187pub mod cndctl {
3188
3189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3190    pub struct Stcnd_SPEC;
3191    pub type Stcnd = crate::EnumBitfieldStruct<u8, Stcnd_SPEC>;
3192    impl Stcnd {
3193        #[doc = "Does not request to issue a START condition."]
3194        pub const _0: Self = Self::new(0);
3195        #[doc = "Requests to issue a START condition."]
3196        pub const _1: Self = Self::new(1);
3197    }
3198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3199    pub struct Srcnd_SPEC;
3200    pub type Srcnd = crate::EnumBitfieldStruct<u8, Srcnd_SPEC>;
3201    impl Srcnd {
3202        #[doc = "Does not request to issue a Repeated START condition."]
3203        pub const _0: Self = Self::new(0);
3204        #[doc = "Requests to issue a Repeated START condition."]
3205        pub const _1: Self = Self::new(1);
3206    }
3207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3208    pub struct Spcnd_SPEC;
3209    pub type Spcnd = crate::EnumBitfieldStruct<u8, Spcnd_SPEC>;
3210    impl Spcnd {
3211        #[doc = "Does not request to issue a STOP condition."]
3212        pub const _0: Self = Self::new(0);
3213        #[doc = "Requests to issue a STOP condition."]
3214        pub const _1: Self = Self::new(1);
3215    }
3216}
3217#[doc(hidden)]
3218#[derive(Copy, Clone, Eq, PartialEq)]
3219pub struct Ncmdqp_SPEC;
3220impl crate::sealed::RegSpec for Ncmdqp_SPEC {
3221    type DataType = u32;
3222}
3223#[doc = "Normal Command Queue Port Register"]
3224pub type Ncmdqp = crate::RegValueT<Ncmdqp_SPEC>;
3225
3226impl NoBitfieldReg<Ncmdqp_SPEC> for Ncmdqp {}
3227impl ::core::default::Default for Ncmdqp {
3228    #[inline(always)]
3229    fn default() -> Ncmdqp {
3230        <crate::RegValueT<Ncmdqp_SPEC> as RegisterValue<_>>::new(0)
3231    }
3232}
3233
3234#[doc(hidden)]
3235#[derive(Copy, Clone, Eq, PartialEq)]
3236pub struct Nrspqp_SPEC;
3237impl crate::sealed::RegSpec for Nrspqp_SPEC {
3238    type DataType = u32;
3239}
3240#[doc = "Normal Response Queue Port Register"]
3241pub type Nrspqp = crate::RegValueT<Nrspqp_SPEC>;
3242
3243impl NoBitfieldReg<Nrspqp_SPEC> for Nrspqp {}
3244impl ::core::default::Default for Nrspqp {
3245    #[inline(always)]
3246    fn default() -> Nrspqp {
3247        <crate::RegValueT<Nrspqp_SPEC> as RegisterValue<_>>::new(0)
3248    }
3249}
3250
3251#[doc(hidden)]
3252#[derive(Copy, Clone, Eq, PartialEq)]
3253pub struct Ntdtbp0_SPEC;
3254impl crate::sealed::RegSpec for Ntdtbp0_SPEC {
3255    type DataType = u32;
3256}
3257#[doc = "Normal Transfer Data Buffer Port Register 0"]
3258pub type Ntdtbp0 = crate::RegValueT<Ntdtbp0_SPEC>;
3259
3260impl NoBitfieldReg<Ntdtbp0_SPEC> for Ntdtbp0 {}
3261impl ::core::default::Default for Ntdtbp0 {
3262    #[inline(always)]
3263    fn default() -> Ntdtbp0 {
3264        <crate::RegValueT<Ntdtbp0_SPEC> as RegisterValue<_>>::new(0)
3265    }
3266}
3267
3268#[doc(hidden)]
3269#[derive(Copy, Clone, Eq, PartialEq)]
3270pub struct Ntdtbp0By_SPEC;
3271impl crate::sealed::RegSpec for Ntdtbp0By_SPEC {
3272    type DataType = u8;
3273}
3274#[doc = "Normal Transfer Data Buffer Port Register 0"]
3275pub type Ntdtbp0By = crate::RegValueT<Ntdtbp0By_SPEC>;
3276
3277impl NoBitfieldReg<Ntdtbp0By_SPEC> for Ntdtbp0By {}
3278impl ::core::default::Default for Ntdtbp0By {
3279    #[inline(always)]
3280    fn default() -> Ntdtbp0By {
3281        <crate::RegValueT<Ntdtbp0By_SPEC> as RegisterValue<_>>::new(0)
3282    }
3283}
3284
3285#[doc(hidden)]
3286#[derive(Copy, Clone, Eq, PartialEq)]
3287pub struct Nibiqp_SPEC;
3288impl crate::sealed::RegSpec for Nibiqp_SPEC {
3289    type DataType = u32;
3290}
3291#[doc = "Normal IBI Queue Port Register"]
3292pub type Nibiqp = crate::RegValueT<Nibiqp_SPEC>;
3293
3294impl NoBitfieldReg<Nibiqp_SPEC> for Nibiqp {}
3295impl ::core::default::Default for Nibiqp {
3296    #[inline(always)]
3297    fn default() -> Nibiqp {
3298        <crate::RegValueT<Nibiqp_SPEC> as RegisterValue<_>>::new(0)
3299    }
3300}
3301
3302#[doc(hidden)]
3303#[derive(Copy, Clone, Eq, PartialEq)]
3304pub struct Nrsqp_SPEC;
3305impl crate::sealed::RegSpec for Nrsqp_SPEC {
3306    type DataType = u32;
3307}
3308#[doc = "Normal Receive Status Queue Port Register"]
3309pub type Nrsqp = crate::RegValueT<Nrsqp_SPEC>;
3310
3311impl NoBitfieldReg<Nrsqp_SPEC> for Nrsqp {}
3312impl ::core::default::Default for Nrsqp {
3313    #[inline(always)]
3314    fn default() -> Nrsqp {
3315        <crate::RegValueT<Nrsqp_SPEC> as RegisterValue<_>>::new(0)
3316    }
3317}
3318
3319#[doc(hidden)]
3320#[derive(Copy, Clone, Eq, PartialEq)]
3321pub struct Hcmdqp_SPEC;
3322impl crate::sealed::RegSpec for Hcmdqp_SPEC {
3323    type DataType = u32;
3324}
3325#[doc = "High Priority Command Queue Port Register"]
3326pub type Hcmdqp = crate::RegValueT<Hcmdqp_SPEC>;
3327
3328impl NoBitfieldReg<Hcmdqp_SPEC> for Hcmdqp {}
3329impl ::core::default::Default for Hcmdqp {
3330    #[inline(always)]
3331    fn default() -> Hcmdqp {
3332        <crate::RegValueT<Hcmdqp_SPEC> as RegisterValue<_>>::new(0)
3333    }
3334}
3335
3336#[doc(hidden)]
3337#[derive(Copy, Clone, Eq, PartialEq)]
3338pub struct Hrspqp_SPEC;
3339impl crate::sealed::RegSpec for Hrspqp_SPEC {
3340    type DataType = u32;
3341}
3342#[doc = "High Priority Response Queue Port Register"]
3343pub type Hrspqp = crate::RegValueT<Hrspqp_SPEC>;
3344
3345impl NoBitfieldReg<Hrspqp_SPEC> for Hrspqp {}
3346impl ::core::default::Default for Hrspqp {
3347    #[inline(always)]
3348    fn default() -> Hrspqp {
3349        <crate::RegValueT<Hrspqp_SPEC> as RegisterValue<_>>::new(0)
3350    }
3351}
3352
3353#[doc(hidden)]
3354#[derive(Copy, Clone, Eq, PartialEq)]
3355pub struct Htdtbp_SPEC;
3356impl crate::sealed::RegSpec for Htdtbp_SPEC {
3357    type DataType = u32;
3358}
3359#[doc = "High Priority Transfer Data Buffer Port Register"]
3360pub type Htdtbp = crate::RegValueT<Htdtbp_SPEC>;
3361
3362impl NoBitfieldReg<Htdtbp_SPEC> for Htdtbp {}
3363impl ::core::default::Default for Htdtbp {
3364    #[inline(always)]
3365    fn default() -> Htdtbp {
3366        <crate::RegValueT<Htdtbp_SPEC> as RegisterValue<_>>::new(0)
3367    }
3368}
3369
3370#[doc(hidden)]
3371#[derive(Copy, Clone, Eq, PartialEq)]
3372pub struct Nqthctl_SPEC;
3373impl crate::sealed::RegSpec for Nqthctl_SPEC {
3374    type DataType = u32;
3375}
3376#[doc = "Normal Queue Threshold Control Register"]
3377pub type Nqthctl = crate::RegValueT<Nqthctl_SPEC>;
3378
3379impl Nqthctl {
3380    #[doc = "Normal Command Ready Queue Threshold"]
3381    #[inline(always)]
3382    pub fn cmdqth(
3383        self,
3384    ) -> crate::common::RegisterField<0, 0xff, 1, 0, nqthctl::Cmdqth, Nqthctl_SPEC, crate::common::RW>
3385    {
3386        crate::common::RegisterField::<
3387            0,
3388            0xff,
3389            1,
3390            0,
3391            nqthctl::Cmdqth,
3392            Nqthctl_SPEC,
3393            crate::common::RW,
3394        >::from_register(self, 0)
3395    }
3396    #[doc = "Normal Response Queue Threshold"]
3397    #[inline(always)]
3398    pub fn rspqth(
3399        self,
3400    ) -> crate::common::RegisterField<8, 0xff, 1, 0, nqthctl::Rspqth, Nqthctl_SPEC, crate::common::RW>
3401    {
3402        crate::common::RegisterField::<
3403            8,
3404            0xff,
3405            1,
3406            0,
3407            nqthctl::Rspqth,
3408            Nqthctl_SPEC,
3409            crate::common::RW,
3410        >::from_register(self, 0)
3411    }
3412    #[doc = "Normal IBI Data Segment Size"]
3413    #[inline(always)]
3414    pub fn ibidssz(
3415        self,
3416    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Nqthctl_SPEC, crate::common::RW> {
3417        crate::common::RegisterField::<16,0xff,1,0,u8, Nqthctl_SPEC,crate::common::RW>::from_register(self,0)
3418    }
3419    #[doc = "Normal IBI Queue Threshold"]
3420    #[inline(always)]
3421    pub fn ibiqth(
3422        self,
3423    ) -> crate::common::RegisterField<
3424        24,
3425        0xff,
3426        1,
3427        0,
3428        nqthctl::Ibiqth,
3429        Nqthctl_SPEC,
3430        crate::common::RW,
3431    > {
3432        crate::common::RegisterField::<
3433            24,
3434            0xff,
3435            1,
3436            0,
3437            nqthctl::Ibiqth,
3438            Nqthctl_SPEC,
3439            crate::common::RW,
3440        >::from_register(self, 0)
3441    }
3442}
3443impl ::core::default::Default for Nqthctl {
3444    #[inline(always)]
3445    fn default() -> Nqthctl {
3446        <crate::RegValueT<Nqthctl_SPEC> as RegisterValue<_>>::new(16843009)
3447    }
3448}
3449pub mod nqthctl {
3450
3451    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3452    pub struct Cmdqth_SPEC;
3453    pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
3454    impl Cmdqth {
3455        #[doc = "Interrupt is issued when Command Queue is completely empty."]
3456        pub const _0_X_00: Self = Self::new(0);
3457        #[doc = "Interrupt is issued when Command Queue contains N empties. (N = CMDQTH\\[7:0\\])"]
3458        pub const OTHERS: Self = Self::new(0);
3459    }
3460    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3461    pub struct Rspqth_SPEC;
3462    pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
3463    impl Rspqth {
3464        #[doc = "Interrupt is issued when Response Queue contains 1 entry (DWORD)."]
3465        pub const _0_X_00: Self = Self::new(0);
3466        #[doc = "Interrupt is triggered when Response Queue contains N+1 entries (DWORD). (N = CMDQTH\\[7:0\\])"]
3467        pub const OTHERS: Self = Self::new(0);
3468    }
3469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3470    pub struct Ibiqth_SPEC;
3471    pub type Ibiqth = crate::EnumBitfieldStruct<u8, Ibiqth_SPEC>;
3472    impl Ibiqth {
3473        #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is 1 or more. I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer is completely empty."]
3474        pub const _0_X_00: Self = Self::new(0);
3475        #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is N + 1 or more. (N = CMDQTH\\[7:0\\]) I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer contains N empties."]
3476        pub const OTHERS: Self = Self::new(0);
3477    }
3478}
3479#[doc(hidden)]
3480#[derive(Copy, Clone, Eq, PartialEq)]
3481pub struct Ntbthctl0_SPEC;
3482impl crate::sealed::RegSpec for Ntbthctl0_SPEC {
3483    type DataType = u32;
3484}
3485#[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
3486pub type Ntbthctl0 = crate::RegValueT<Ntbthctl0_SPEC>;
3487
3488impl Ntbthctl0 {
3489    #[doc = "Normal Transmit Data Buffer Threshold"]
3490    #[inline(always)]
3491    pub fn txdbth(
3492        self,
3493    ) -> crate::common::RegisterField<
3494        0,
3495        0x7,
3496        1,
3497        0,
3498        ntbthctl0::Txdbth,
3499        Ntbthctl0_SPEC,
3500        crate::common::RW,
3501    > {
3502        crate::common::RegisterField::<
3503            0,
3504            0x7,
3505            1,
3506            0,
3507            ntbthctl0::Txdbth,
3508            Ntbthctl0_SPEC,
3509            crate::common::RW,
3510        >::from_register(self, 0)
3511    }
3512    #[doc = "Normal Receive Data Buffer Threshold"]
3513    #[inline(always)]
3514    pub fn rxdbth(
3515        self,
3516    ) -> crate::common::RegisterField<
3517        8,
3518        0x7,
3519        1,
3520        0,
3521        ntbthctl0::Rxdbth,
3522        Ntbthctl0_SPEC,
3523        crate::common::RW,
3524    > {
3525        crate::common::RegisterField::<
3526            8,
3527            0x7,
3528            1,
3529            0,
3530            ntbthctl0::Rxdbth,
3531            Ntbthctl0_SPEC,
3532            crate::common::RW,
3533        >::from_register(self, 0)
3534    }
3535    #[doc = "Normal Tx Start Threshold"]
3536    #[inline(always)]
3537    pub fn txstth(
3538        self,
3539    ) -> crate::common::RegisterField<
3540        16,
3541        0x7,
3542        1,
3543        0,
3544        ntbthctl0::Txstth,
3545        Ntbthctl0_SPEC,
3546        crate::common::RW,
3547    > {
3548        crate::common::RegisterField::<
3549            16,
3550            0x7,
3551            1,
3552            0,
3553            ntbthctl0::Txstth,
3554            Ntbthctl0_SPEC,
3555            crate::common::RW,
3556        >::from_register(self, 0)
3557    }
3558    #[doc = "Normal Rx Start Threshold"]
3559    #[inline(always)]
3560    pub fn rxstth(
3561        self,
3562    ) -> crate::common::RegisterField<
3563        24,
3564        0x7,
3565        1,
3566        0,
3567        ntbthctl0::Rxstth,
3568        Ntbthctl0_SPEC,
3569        crate::common::RW,
3570    > {
3571        crate::common::RegisterField::<
3572            24,
3573            0x7,
3574            1,
3575            0,
3576            ntbthctl0::Rxstth,
3577            Ntbthctl0_SPEC,
3578            crate::common::RW,
3579        >::from_register(self, 0)
3580    }
3581}
3582impl ::core::default::Default for Ntbthctl0 {
3583    #[inline(always)]
3584    fn default() -> Ntbthctl0 {
3585        <crate::RegValueT<Ntbthctl0_SPEC> as RegisterValue<_>>::new(16843009)
3586    }
3587}
3588pub mod ntbthctl0 {
3589
3590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3591    pub struct Txdbth_SPEC;
3592    pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
3593    impl Txdbth {
3594        #[doc = "Interrupt triggers at 2 Tx Buffer empties, DWORDs"]
3595        pub const _000: Self = Self::new(0);
3596        #[doc = "Interrupt triggers at 4 Tx Buffer empties, DWORDs"]
3597        pub const _001: Self = Self::new(1);
3598        #[doc = "Interrupt triggers at 8 Tx Buffer empties, DWORDs"]
3599        pub const _010: Self = Self::new(2);
3600        #[doc = "Interrupt triggers at 16 Tx Buffer empties, DWORDs"]
3601        pub const _011: Self = Self::new(3);
3602        #[doc = "Setting prohibited"]
3603        pub const OTHERS: Self = Self::new(0);
3604    }
3605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3606    pub struct Rxdbth_SPEC;
3607    pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
3608    impl Rxdbth {
3609        #[doc = "Interrupt triggers at 2 Rx Buffer entries, DWORDs"]
3610        pub const _000: Self = Self::new(0);
3611        #[doc = "Interrupt triggers at 4 Rx Buffer entries, DWORDs"]
3612        pub const _001: Self = Self::new(1);
3613        #[doc = "Interrupt triggers at 8 Rx Buffer entries, DWORDs"]
3614        pub const _010: Self = Self::new(2);
3615        #[doc = "Interrupt triggers at 16 Rx Buffer entries, DWORDs"]
3616        pub const _011: Self = Self::new(3);
3617        #[doc = "Setting prohibited"]
3618        pub const OTHERS: Self = Self::new(0);
3619    }
3620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3621    pub struct Txstth_SPEC;
3622    pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
3623    impl Txstth {
3624        #[doc = "Wait for 2 entry DWORDs"]
3625        pub const _000: Self = Self::new(0);
3626        #[doc = "Wait for 4 entry DWORDs"]
3627        pub const _001: Self = Self::new(1);
3628        #[doc = "Wait for 8 entry DWORDs"]
3629        pub const _010: Self = Self::new(2);
3630        #[doc = "Wait for 16 entry DWORDs"]
3631        pub const _011: Self = Self::new(3);
3632        #[doc = "Setting prohibited"]
3633        pub const OTHERS: Self = Self::new(0);
3634    }
3635    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3636    pub struct Rxstth_SPEC;
3637    pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
3638    impl Rxstth {
3639        #[doc = "Wait for 2 empty DWORDs"]
3640        pub const _000: Self = Self::new(0);
3641        #[doc = "Wait for 4 empty DWORDs"]
3642        pub const _001: Self = Self::new(1);
3643        #[doc = "Wait for 8 empty DWORDs"]
3644        pub const _010: Self = Self::new(2);
3645        #[doc = "Wait for 16 empty DWORDs"]
3646        pub const _011: Self = Self::new(3);
3647        #[doc = "Setting prohibited"]
3648        pub const OTHERS: Self = Self::new(0);
3649    }
3650}
3651#[doc(hidden)]
3652#[derive(Copy, Clone, Eq, PartialEq)]
3653pub struct Nrqthctl_SPEC;
3654impl crate::sealed::RegSpec for Nrqthctl_SPEC {
3655    type DataType = u32;
3656}
3657#[doc = "Normal Receive Status Queue Threshold Control Register"]
3658pub type Nrqthctl = crate::RegValueT<Nrqthctl_SPEC>;
3659
3660impl Nrqthctl {
3661    #[doc = "Normal Receive Status Queue Threshold"]
3662    #[inline(always)]
3663    pub fn rsqth(
3664        self,
3665    ) -> crate::common::RegisterField<
3666        0,
3667        0xff,
3668        1,
3669        0,
3670        nrqthctl::Rsqth,
3671        Nrqthctl_SPEC,
3672        crate::common::RW,
3673    > {
3674        crate::common::RegisterField::<
3675            0,
3676            0xff,
3677            1,
3678            0,
3679            nrqthctl::Rsqth,
3680            Nrqthctl_SPEC,
3681            crate::common::RW,
3682        >::from_register(self, 0)
3683    }
3684}
3685impl ::core::default::Default for Nrqthctl {
3686    #[inline(always)]
3687    fn default() -> Nrqthctl {
3688        <crate::RegValueT<Nrqthctl_SPEC> as RegisterValue<_>>::new(1)
3689    }
3690}
3691pub mod nrqthctl {
3692
3693    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3694    pub struct Rsqth_SPEC;
3695    pub type Rsqth = crate::EnumBitfieldStruct<u8, Rsqth_SPEC>;
3696    impl Rsqth {
3697        #[doc = "Interrupt is issued when Receive Status Queue contains 1 entry (DWORD)."]
3698        pub const _0_X_00: Self = Self::new(0);
3699        #[doc = "Interrupt is triggered when Receive Status Queue contains N+1 entries (DWORD). (N = RSQTH\\[7:0\\])"]
3700        pub const OTHERS: Self = Self::new(0);
3701    }
3702}
3703#[doc(hidden)]
3704#[derive(Copy, Clone, Eq, PartialEq)]
3705pub struct Hqthctl_SPEC;
3706impl crate::sealed::RegSpec for Hqthctl_SPEC {
3707    type DataType = u32;
3708}
3709#[doc = "High Priority Queue Threshold Control Register"]
3710pub type Hqthctl = crate::RegValueT<Hqthctl_SPEC>;
3711
3712impl Hqthctl {
3713    #[doc = "High Priority Command Ready Queue Threshold"]
3714    #[inline(always)]
3715    pub fn cmdqth(
3716        self,
3717    ) -> crate::common::RegisterField<0, 0xff, 1, 0, hqthctl::Cmdqth, Hqthctl_SPEC, crate::common::RW>
3718    {
3719        crate::common::RegisterField::<
3720            0,
3721            0xff,
3722            1,
3723            0,
3724            hqthctl::Cmdqth,
3725            Hqthctl_SPEC,
3726            crate::common::RW,
3727        >::from_register(self, 0)
3728    }
3729    #[doc = "High Priority Response Ready Queue Threshold"]
3730    #[inline(always)]
3731    pub fn rspqth(
3732        self,
3733    ) -> crate::common::RegisterField<8, 0xff, 1, 0, hqthctl::Rspqth, Hqthctl_SPEC, crate::common::RW>
3734    {
3735        crate::common::RegisterField::<
3736            8,
3737            0xff,
3738            1,
3739            0,
3740            hqthctl::Rspqth,
3741            Hqthctl_SPEC,
3742            crate::common::RW,
3743        >::from_register(self, 0)
3744    }
3745}
3746impl ::core::default::Default for Hqthctl {
3747    #[inline(always)]
3748    fn default() -> Hqthctl {
3749        <crate::RegValueT<Hqthctl_SPEC> as RegisterValue<_>>::new(257)
3750    }
3751}
3752pub mod hqthctl {
3753
3754    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3755    pub struct Cmdqth_SPEC;
3756    pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
3757    impl Cmdqth {
3758        #[doc = "Interrupt is issued when High Priority Command Queue is completely empty."]
3759        pub const _0_X_00: Self = Self::new(0);
3760        #[doc = "Interrupt is issued when High Priority Command Queue contains N entries. (N = CMDQTH\\[7:0\\])"]
3761        pub const OTHERS: Self = Self::new(0);
3762    }
3763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3764    pub struct Rspqth_SPEC;
3765    pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
3766    impl Rspqth {
3767        #[doc = "Interrupt is issued when High Priority Response Queue contains 1 entry (DWORD)."]
3768        pub const _0_X_00: Self = Self::new(0);
3769        #[doc = "Interrupt is triggered when High Priority Response Queue contains N+1 entries (DWORD). (N = RSPQTH\\[7:0\\])"]
3770        pub const OTHERS: Self = Self::new(0);
3771    }
3772}
3773#[doc(hidden)]
3774#[derive(Copy, Clone, Eq, PartialEq)]
3775pub struct Htbthctl_SPEC;
3776impl crate::sealed::RegSpec for Htbthctl_SPEC {
3777    type DataType = u32;
3778}
3779#[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
3780pub type Htbthctl = crate::RegValueT<Htbthctl_SPEC>;
3781
3782impl Htbthctl {
3783    #[doc = "High Priority Transmit Data Buffer Threshold"]
3784    #[inline(always)]
3785    pub fn txdbth(
3786        self,
3787    ) -> crate::common::RegisterField<
3788        0,
3789        0x7,
3790        1,
3791        0,
3792        htbthctl::Txdbth,
3793        Htbthctl_SPEC,
3794        crate::common::RW,
3795    > {
3796        crate::common::RegisterField::<
3797            0,
3798            0x7,
3799            1,
3800            0,
3801            htbthctl::Txdbth,
3802            Htbthctl_SPEC,
3803            crate::common::RW,
3804        >::from_register(self, 0)
3805    }
3806    #[doc = "High Priority Receive Data Buffer Threshold"]
3807    #[inline(always)]
3808    pub fn rxdbth(
3809        self,
3810    ) -> crate::common::RegisterField<
3811        8,
3812        0x7,
3813        1,
3814        0,
3815        htbthctl::Rxdbth,
3816        Htbthctl_SPEC,
3817        crate::common::RW,
3818    > {
3819        crate::common::RegisterField::<
3820            8,
3821            0x7,
3822            1,
3823            0,
3824            htbthctl::Rxdbth,
3825            Htbthctl_SPEC,
3826            crate::common::RW,
3827        >::from_register(self, 0)
3828    }
3829    #[doc = "High Priority Tx Start Threshold"]
3830    #[inline(always)]
3831    pub fn txstth(
3832        self,
3833    ) -> crate::common::RegisterField<
3834        16,
3835        0x7,
3836        1,
3837        0,
3838        htbthctl::Txstth,
3839        Htbthctl_SPEC,
3840        crate::common::RW,
3841    > {
3842        crate::common::RegisterField::<
3843            16,
3844            0x7,
3845            1,
3846            0,
3847            htbthctl::Txstth,
3848            Htbthctl_SPEC,
3849            crate::common::RW,
3850        >::from_register(self, 0)
3851    }
3852    #[doc = "High Priority Rx Start Threshold"]
3853    #[inline(always)]
3854    pub fn rxstth(
3855        self,
3856    ) -> crate::common::RegisterField<
3857        24,
3858        0x7,
3859        1,
3860        0,
3861        htbthctl::Rxstth,
3862        Htbthctl_SPEC,
3863        crate::common::RW,
3864    > {
3865        crate::common::RegisterField::<
3866            24,
3867            0x7,
3868            1,
3869            0,
3870            htbthctl::Rxstth,
3871            Htbthctl_SPEC,
3872            crate::common::RW,
3873        >::from_register(self, 0)
3874    }
3875}
3876impl ::core::default::Default for Htbthctl {
3877    #[inline(always)]
3878    fn default() -> Htbthctl {
3879        <crate::RegValueT<Htbthctl_SPEC> as RegisterValue<_>>::new(16843009)
3880    }
3881}
3882pub mod htbthctl {
3883
3884    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3885    pub struct Txdbth_SPEC;
3886    pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
3887    impl Txdbth {
3888        #[doc = "Interrupt triggers at 2 High Priority Tx Buffer empties, DWORDs"]
3889        pub const _000: Self = Self::new(0);
3890        #[doc = "Reserved"]
3891        pub const _001: Self = Self::new(1);
3892        #[doc = "Setting prohibited"]
3893        pub const OTHERS: Self = Self::new(0);
3894    }
3895    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3896    pub struct Rxdbth_SPEC;
3897    pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
3898    impl Rxdbth {
3899        #[doc = "Interrupt triggers at 2 High Priority Rx Buffer entries, DWORDs"]
3900        pub const _000: Self = Self::new(0);
3901        #[doc = "Reserved"]
3902        pub const _001: Self = Self::new(1);
3903        #[doc = "Setting prohibited"]
3904        pub const OTHERS: Self = Self::new(0);
3905    }
3906    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3907    pub struct Txstth_SPEC;
3908    pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
3909    impl Txstth {
3910        #[doc = "Wait for 2 entry DWORDs"]
3911        pub const _000: Self = Self::new(0);
3912        #[doc = "Reserved"]
3913        pub const _001: Self = Self::new(1);
3914        #[doc = "Setting prohibited"]
3915        pub const OTHERS: Self = Self::new(0);
3916    }
3917    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3918    pub struct Rxstth_SPEC;
3919    pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
3920    impl Rxstth {
3921        #[doc = "Wait for 2 empty DWORDs"]
3922        pub const _000: Self = Self::new(0);
3923        #[doc = "Reserved"]
3924        pub const _001: Self = Self::new(1);
3925        #[doc = "Setting prohibited"]
3926        pub const OTHERS: Self = Self::new(0);
3927    }
3928}
3929#[doc(hidden)]
3930#[derive(Copy, Clone, Eq, PartialEq)]
3931pub struct Bst_SPEC;
3932impl crate::sealed::RegSpec for Bst_SPEC {
3933    type DataType = u32;
3934}
3935#[doc = "Bus Status Register"]
3936pub type Bst = crate::RegValueT<Bst_SPEC>;
3937
3938impl Bst {
3939    #[doc = "START Condition Detection Flag"]
3940    #[inline(always)]
3941    pub fn stcnddf(
3942        self,
3943    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bst::Stcnddf, Bst_SPEC, crate::common::RW> {
3944        crate::common::RegisterField::<0,0x1,1,0,bst::Stcnddf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3945    }
3946    #[doc = "STOP Condition Detection Flag"]
3947    #[inline(always)]
3948    pub fn spcnddf(
3949        self,
3950    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bst::Spcnddf, Bst_SPEC, crate::common::RW> {
3951        crate::common::RegisterField::<1,0x1,1,0,bst::Spcnddf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3952    }
3953    #[doc = "HDR Exit Pattern Detection Flag"]
3954    #[inline(always)]
3955    pub fn hdrexdf(
3956        self,
3957    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bst::Hdrexdf, Bst_SPEC, crate::common::RW> {
3958        crate::common::RegisterField::<2,0x1,1,0,bst::Hdrexdf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3959    }
3960    #[doc = "NACK Detection Flag"]
3961    #[inline(always)]
3962    pub fn nackdf(
3963        self,
3964    ) -> crate::common::RegisterField<4, 0x1, 1, 0, bst::Nackdf, Bst_SPEC, crate::common::RW> {
3965        crate::common::RegisterField::<4,0x1,1,0,bst::Nackdf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3966    }
3967    #[doc = "Transmit End Flag"]
3968    #[inline(always)]
3969    pub fn tendf(
3970        self,
3971    ) -> crate::common::RegisterField<8, 0x1, 1, 0, bst::Tendf, Bst_SPEC, crate::common::RW> {
3972        crate::common::RegisterField::<8,0x1,1,0,bst::Tendf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3973    }
3974    #[doc = "Arbitration Lost Flag"]
3975    #[inline(always)]
3976    pub fn alf(
3977        self,
3978    ) -> crate::common::RegisterField<16, 0x1, 1, 0, bst::Alf, Bst_SPEC, crate::common::RW> {
3979        crate::common::RegisterField::<16,0x1,1,0,bst::Alf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3980    }
3981    #[doc = "Timeout Detection Flag"]
3982    #[inline(always)]
3983    pub fn todf(
3984        self,
3985    ) -> crate::common::RegisterField<20, 0x1, 1, 0, bst::Todf, Bst_SPEC, crate::common::RW> {
3986        crate::common::RegisterField::<20,0x1,1,0,bst::Todf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3987    }
3988    #[doc = "Wake-Up Condition Detection Flag"]
3989    #[inline(always)]
3990    pub fn wucnddf(
3991        self,
3992    ) -> crate::common::RegisterField<24, 0x1, 1, 0, bst::Wucnddf, Bst_SPEC, crate::common::RW>
3993    {
3994        crate::common::RegisterField::<24,0x1,1,0,bst::Wucnddf, Bst_SPEC,crate::common::RW>::from_register(self,0)
3995    }
3996}
3997impl ::core::default::Default for Bst {
3998    #[inline(always)]
3999    fn default() -> Bst {
4000        <crate::RegValueT<Bst_SPEC> as RegisterValue<_>>::new(0)
4001    }
4002}
4003pub mod bst {
4004
4005    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4006    pub struct Stcnddf_SPEC;
4007    pub type Stcnddf = crate::EnumBitfieldStruct<u8, Stcnddf_SPEC>;
4008    impl Stcnddf {
4009        #[doc = "START condition is not detected."]
4010        pub const _0: Self = Self::new(0);
4011        #[doc = "START condition is detected."]
4012        pub const _1: Self = Self::new(1);
4013    }
4014    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4015    pub struct Spcnddf_SPEC;
4016    pub type Spcnddf = crate::EnumBitfieldStruct<u8, Spcnddf_SPEC>;
4017    impl Spcnddf {
4018        #[doc = "STOP condition is not detected."]
4019        pub const _0: Self = Self::new(0);
4020        #[doc = "STOP condition is detected."]
4021        pub const _1: Self = Self::new(1);
4022    }
4023    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4024    pub struct Hdrexdf_SPEC;
4025    pub type Hdrexdf = crate::EnumBitfieldStruct<u8, Hdrexdf_SPEC>;
4026    impl Hdrexdf {
4027        #[doc = "HDR Exit Pattern is not detected"]
4028        pub const _0: Self = Self::new(0);
4029        #[doc = "HDR Exit Pattern is detected."]
4030        pub const _1: Self = Self::new(1);
4031    }
4032    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4033    pub struct Nackdf_SPEC;
4034    pub type Nackdf = crate::EnumBitfieldStruct<u8, Nackdf_SPEC>;
4035    impl Nackdf {
4036        #[doc = "NACK is not detected."]
4037        pub const _0: Self = Self::new(0);
4038        #[doc = "NACK is detected."]
4039        pub const _1: Self = Self::new(1);
4040    }
4041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4042    pub struct Tendf_SPEC;
4043    pub type Tendf = crate::EnumBitfieldStruct<u8, Tendf_SPEC>;
4044    impl Tendf {
4045        #[doc = "Data is being transmitted."]
4046        pub const _0: Self = Self::new(0);
4047        #[doc = "Data has been transmitted."]
4048        pub const _1: Self = Self::new(1);
4049    }
4050    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4051    pub struct Alf_SPEC;
4052    pub type Alf = crate::EnumBitfieldStruct<u8, Alf_SPEC>;
4053    impl Alf {
4054        #[doc = "Arbitration is not lost"]
4055        pub const _0: Self = Self::new(0);
4056        #[doc = "Arbitration is lost."]
4057        pub const _1: Self = Self::new(1);
4058    }
4059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4060    pub struct Todf_SPEC;
4061    pub type Todf = crate::EnumBitfieldStruct<u8, Todf_SPEC>;
4062    impl Todf {
4063        #[doc = "Timeout is not detected."]
4064        pub const _0: Self = Self::new(0);
4065        #[doc = "Timeout is detected."]
4066        pub const _1: Self = Self::new(1);
4067    }
4068    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4069    pub struct Wucnddf_SPEC;
4070    pub type Wucnddf = crate::EnumBitfieldStruct<u8, Wucnddf_SPEC>;
4071    impl Wucnddf {
4072        #[doc = "Wake-Up is not detected."]
4073        pub const _0: Self = Self::new(0);
4074        #[doc = "Wake-Up is detected."]
4075        pub const _1: Self = Self::new(1);
4076    }
4077}
4078#[doc(hidden)]
4079#[derive(Copy, Clone, Eq, PartialEq)]
4080pub struct Bste_SPEC;
4081impl crate::sealed::RegSpec for Bste_SPEC {
4082    type DataType = u32;
4083}
4084#[doc = "Bus Status Enable Register"]
4085pub type Bste = crate::RegValueT<Bste_SPEC>;
4086
4087impl Bste {
4088    #[doc = "START Condition Detection Enable"]
4089    #[inline(always)]
4090    pub fn stcndde(
4091        self,
4092    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bste::Stcndde, Bste_SPEC, crate::common::RW>
4093    {
4094        crate::common::RegisterField::<0,0x1,1,0,bste::Stcndde, Bste_SPEC,crate::common::RW>::from_register(self,0)
4095    }
4096    #[doc = "STOP Condition Detection Enable"]
4097    #[inline(always)]
4098    pub fn spcndde(
4099        self,
4100    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bste::Spcndde, Bste_SPEC, crate::common::RW>
4101    {
4102        crate::common::RegisterField::<1,0x1,1,0,bste::Spcndde, Bste_SPEC,crate::common::RW>::from_register(self,0)
4103    }
4104    #[doc = "HDR Exit Pattern Detection Enable"]
4105    #[inline(always)]
4106    pub fn hdrexde(
4107        self,
4108    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bste::Hdrexde, Bste_SPEC, crate::common::RW>
4109    {
4110        crate::common::RegisterField::<2,0x1,1,0,bste::Hdrexde, Bste_SPEC,crate::common::RW>::from_register(self,0)
4111    }
4112    #[doc = "NACK Detection Enable"]
4113    #[inline(always)]
4114    pub fn nackde(
4115        self,
4116    ) -> crate::common::RegisterField<4, 0x1, 1, 0, bste::Nackde, Bste_SPEC, crate::common::RW>
4117    {
4118        crate::common::RegisterField::<4,0x1,1,0,bste::Nackde, Bste_SPEC,crate::common::RW>::from_register(self,0)
4119    }
4120    #[doc = "Transmit End Enable"]
4121    #[inline(always)]
4122    pub fn tende(
4123        self,
4124    ) -> crate::common::RegisterField<8, 0x1, 1, 0, bste::Tende, Bste_SPEC, crate::common::RW> {
4125        crate::common::RegisterField::<8,0x1,1,0,bste::Tende, Bste_SPEC,crate::common::RW>::from_register(self,0)
4126    }
4127    #[doc = "Arbitration Lost Enable"]
4128    #[inline(always)]
4129    pub fn ale(
4130        self,
4131    ) -> crate::common::RegisterField<16, 0x1, 1, 0, bste::Ale, Bste_SPEC, crate::common::RW> {
4132        crate::common::RegisterField::<16,0x1,1,0,bste::Ale, Bste_SPEC,crate::common::RW>::from_register(self,0)
4133    }
4134    #[doc = "Timeout Detection Enable"]
4135    #[inline(always)]
4136    pub fn tode(
4137        self,
4138    ) -> crate::common::RegisterField<20, 0x1, 1, 0, bste::Tode, Bste_SPEC, crate::common::RW> {
4139        crate::common::RegisterField::<20,0x1,1,0,bste::Tode, Bste_SPEC,crate::common::RW>::from_register(self,0)
4140    }
4141    #[doc = "Wake-up Condition Detection Enable"]
4142    #[inline(always)]
4143    pub fn wucndde(
4144        self,
4145    ) -> crate::common::RegisterField<24, 0x1, 1, 0, bste::Wucndde, Bste_SPEC, crate::common::RW>
4146    {
4147        crate::common::RegisterField::<24,0x1,1,0,bste::Wucndde, Bste_SPEC,crate::common::RW>::from_register(self,0)
4148    }
4149}
4150impl ::core::default::Default for Bste {
4151    #[inline(always)]
4152    fn default() -> Bste {
4153        <crate::RegValueT<Bste_SPEC> as RegisterValue<_>>::new(0)
4154    }
4155}
4156pub mod bste {
4157
4158    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4159    pub struct Stcndde_SPEC;
4160    pub type Stcndde = crate::EnumBitfieldStruct<u8, Stcndde_SPEC>;
4161    impl Stcndde {
4162        #[doc = "Disables START condition Detection Interrupt Status logging."]
4163        pub const _0: Self = Self::new(0);
4164        #[doc = "Enables START condition Detection Interrupt Status logging."]
4165        pub const _1: Self = Self::new(1);
4166    }
4167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4168    pub struct Spcndde_SPEC;
4169    pub type Spcndde = crate::EnumBitfieldStruct<u8, Spcndde_SPEC>;
4170    impl Spcndde {
4171        #[doc = "Disables STOP condition Detection Interrupt Status logging."]
4172        pub const _0: Self = Self::new(0);
4173        #[doc = "Enables STOP condition Detection Interrupt Status logging."]
4174        pub const _1: Self = Self::new(1);
4175    }
4176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4177    pub struct Hdrexde_SPEC;
4178    pub type Hdrexde = crate::EnumBitfieldStruct<u8, Hdrexde_SPEC>;
4179    impl Hdrexde {
4180        #[doc = "Disables HDR Exit Pattern Detection Interrupt Status logging."]
4181        pub const _0: Self = Self::new(0);
4182        #[doc = "Enables HDR Exit Pattern Detection Interrupt Status logging."]
4183        pub const _1: Self = Self::new(1);
4184    }
4185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4186    pub struct Nackde_SPEC;
4187    pub type Nackde = crate::EnumBitfieldStruct<u8, Nackde_SPEC>;
4188    impl Nackde {
4189        #[doc = "Disables NACK Detection Interrupt Status logging."]
4190        pub const _0: Self = Self::new(0);
4191        #[doc = "Enables NACK Detection Interrupt Status logging."]
4192        pub const _1: Self = Self::new(1);
4193    }
4194    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4195    pub struct Tende_SPEC;
4196    pub type Tende = crate::EnumBitfieldStruct<u8, Tende_SPEC>;
4197    impl Tende {
4198        #[doc = "Disables Transmit End Interrupt Status logging."]
4199        pub const _0: Self = Self::new(0);
4200        #[doc = "Enables Transmit End Interrupt Status logging."]
4201        pub const _1: Self = Self::new(1);
4202    }
4203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4204    pub struct Ale_SPEC;
4205    pub type Ale = crate::EnumBitfieldStruct<u8, Ale_SPEC>;
4206    impl Ale {
4207        #[doc = "Disables Arbitration Lost Interrupt Status logging."]
4208        pub const _0: Self = Self::new(0);
4209        #[doc = "Enables Arbitration Lost Interrupt Status logging."]
4210        pub const _1: Self = Self::new(1);
4211    }
4212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4213    pub struct Tode_SPEC;
4214    pub type Tode = crate::EnumBitfieldStruct<u8, Tode_SPEC>;
4215    impl Tode {
4216        #[doc = "Disables Timeout Detection Interrupt Status logging."]
4217        pub const _0: Self = Self::new(0);
4218        #[doc = "Enables Timeout Detection Interrupt Status logging."]
4219        pub const _1: Self = Self::new(1);
4220    }
4221    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4222    pub struct Wucndde_SPEC;
4223    pub type Wucndde = crate::EnumBitfieldStruct<u8, Wucndde_SPEC>;
4224    impl Wucndde {
4225        #[doc = "Disables Wake-up Condition Detection Status logging."]
4226        pub const _0: Self = Self::new(0);
4227        #[doc = "Enables Wake-up Condition Detection Status logging."]
4228        pub const _1: Self = Self::new(1);
4229    }
4230}
4231#[doc(hidden)]
4232#[derive(Copy, Clone, Eq, PartialEq)]
4233pub struct Bie_SPEC;
4234impl crate::sealed::RegSpec for Bie_SPEC {
4235    type DataType = u32;
4236}
4237#[doc = "Bus Interrupt Enable Register"]
4238pub type Bie = crate::RegValueT<Bie_SPEC>;
4239
4240impl Bie {
4241    #[doc = "START Condition Detection Interrupt Enable"]
4242    #[inline(always)]
4243    pub fn stcnddie(
4244        self,
4245    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bie::Stcnddie, Bie_SPEC, crate::common::RW>
4246    {
4247        crate::common::RegisterField::<0,0x1,1,0,bie::Stcnddie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4248    }
4249    #[doc = "STOP Condition Detection Interrupt Enable"]
4250    #[inline(always)]
4251    pub fn spcnddie(
4252        self,
4253    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bie::Spcnddie, Bie_SPEC, crate::common::RW>
4254    {
4255        crate::common::RegisterField::<1,0x1,1,0,bie::Spcnddie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4256    }
4257    #[doc = "HDR Exit Pattern Detection Interrupt Enable"]
4258    #[inline(always)]
4259    pub fn hdrexdie(
4260        self,
4261    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bie::Hdrexdie, Bie_SPEC, crate::common::RW>
4262    {
4263        crate::common::RegisterField::<2,0x1,1,0,bie::Hdrexdie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4264    }
4265    #[doc = "NACK Detection Interrupt Enable"]
4266    #[inline(always)]
4267    pub fn nackdie(
4268        self,
4269    ) -> crate::common::RegisterField<4, 0x1, 1, 0, bie::Nackdie, Bie_SPEC, crate::common::RW> {
4270        crate::common::RegisterField::<4,0x1,1,0,bie::Nackdie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4271    }
4272    #[doc = "Transmit End Interrupt Enable"]
4273    #[inline(always)]
4274    pub fn tendie(
4275        self,
4276    ) -> crate::common::RegisterField<8, 0x1, 1, 0, bie::Tendie, Bie_SPEC, crate::common::RW> {
4277        crate::common::RegisterField::<8,0x1,1,0,bie::Tendie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4278    }
4279    #[doc = "Arbitration Lost Interrupt Enable"]
4280    #[inline(always)]
4281    pub fn alie(
4282        self,
4283    ) -> crate::common::RegisterField<16, 0x1, 1, 0, bie::Alie, Bie_SPEC, crate::common::RW> {
4284        crate::common::RegisterField::<16,0x1,1,0,bie::Alie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4285    }
4286    #[doc = "Timeout Detection Interrupt Enable"]
4287    #[inline(always)]
4288    pub fn todie(
4289        self,
4290    ) -> crate::common::RegisterField<20, 0x1, 1, 0, bie::Todie, Bie_SPEC, crate::common::RW> {
4291        crate::common::RegisterField::<20,0x1,1,0,bie::Todie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4292    }
4293    #[doc = "Wake-Up Condition Detection Interrupt Enable"]
4294    #[inline(always)]
4295    pub fn wucnddie(
4296        self,
4297    ) -> crate::common::RegisterField<24, 0x1, 1, 0, bie::Wucnddie, Bie_SPEC, crate::common::RW>
4298    {
4299        crate::common::RegisterField::<24,0x1,1,0,bie::Wucnddie, Bie_SPEC,crate::common::RW>::from_register(self,0)
4300    }
4301}
4302impl ::core::default::Default for Bie {
4303    #[inline(always)]
4304    fn default() -> Bie {
4305        <crate::RegValueT<Bie_SPEC> as RegisterValue<_>>::new(0)
4306    }
4307}
4308pub mod bie {
4309
4310    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4311    pub struct Stcnddie_SPEC;
4312    pub type Stcnddie = crate::EnumBitfieldStruct<u8, Stcnddie_SPEC>;
4313    impl Stcnddie {
4314        #[doc = "Disables START condition Detection Interrupt Signal."]
4315        pub const _0: Self = Self::new(0);
4316        #[doc = "Enables START condition Detection Interrupt Signal."]
4317        pub const _1: Self = Self::new(1);
4318    }
4319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4320    pub struct Spcnddie_SPEC;
4321    pub type Spcnddie = crate::EnumBitfieldStruct<u8, Spcnddie_SPEC>;
4322    impl Spcnddie {
4323        #[doc = "Disables STOP condition Detection Interrupt Signal."]
4324        pub const _0: Self = Self::new(0);
4325        #[doc = "Enables STOP condition Detection Interrupt Signal."]
4326        pub const _1: Self = Self::new(1);
4327    }
4328    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4329    pub struct Hdrexdie_SPEC;
4330    pub type Hdrexdie = crate::EnumBitfieldStruct<u8, Hdrexdie_SPEC>;
4331    impl Hdrexdie {
4332        #[doc = "Disables HDR Exit Pattern Detection Interrupt Signal."]
4333        pub const _0: Self = Self::new(0);
4334        #[doc = "Enables HDR Exit Pattern Detection Interrupt Signal."]
4335        pub const _1: Self = Self::new(1);
4336    }
4337    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4338    pub struct Nackdie_SPEC;
4339    pub type Nackdie = crate::EnumBitfieldStruct<u8, Nackdie_SPEC>;
4340    impl Nackdie {
4341        #[doc = "Disables NACK Detection Interrupt Signal."]
4342        pub const _0: Self = Self::new(0);
4343        #[doc = "Enables NACK Detection Interrupt Signal."]
4344        pub const _1: Self = Self::new(1);
4345    }
4346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4347    pub struct Tendie_SPEC;
4348    pub type Tendie = crate::EnumBitfieldStruct<u8, Tendie_SPEC>;
4349    impl Tendie {
4350        #[doc = "Disables Transmit End Interrupt Signal."]
4351        pub const _0: Self = Self::new(0);
4352        #[doc = "Enables Transmit End Interrupt Signal."]
4353        pub const _1: Self = Self::new(1);
4354    }
4355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4356    pub struct Alie_SPEC;
4357    pub type Alie = crate::EnumBitfieldStruct<u8, Alie_SPEC>;
4358    impl Alie {
4359        #[doc = "Disables Arbitration Lost Interrupt Signal."]
4360        pub const _0: Self = Self::new(0);
4361        #[doc = "Enables Arbitration Lost Interrupt Signal."]
4362        pub const _1: Self = Self::new(1);
4363    }
4364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4365    pub struct Todie_SPEC;
4366    pub type Todie = crate::EnumBitfieldStruct<u8, Todie_SPEC>;
4367    impl Todie {
4368        #[doc = "Disables Timeout Detection Interrupt Signal."]
4369        pub const _0: Self = Self::new(0);
4370        #[doc = "Enables Timeout Detection Interrupt Signal."]
4371        pub const _1: Self = Self::new(1);
4372    }
4373    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4374    pub struct Wucnddie_SPEC;
4375    pub type Wucnddie = crate::EnumBitfieldStruct<u8, Wucnddie_SPEC>;
4376    impl Wucnddie {
4377        #[doc = "Disables Wake-Up Condition Detection Interrupt Signal."]
4378        pub const _0: Self = Self::new(0);
4379        #[doc = "Enables Wake-Up Condition Detection Interrupt Signal."]
4380        pub const _1: Self = Self::new(1);
4381    }
4382}
4383#[doc(hidden)]
4384#[derive(Copy, Clone, Eq, PartialEq)]
4385pub struct Bstfc_SPEC;
4386impl crate::sealed::RegSpec for Bstfc_SPEC {
4387    type DataType = u32;
4388}
4389#[doc = "Bus Status Force Register"]
4390pub type Bstfc = crate::RegValueT<Bstfc_SPEC>;
4391
4392impl Bstfc {
4393    #[doc = "START condition Detection Force"]
4394    #[inline(always)]
4395    pub fn stcnddfc(
4396        self,
4397    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bstfc::Stcnddfc, Bstfc_SPEC, crate::common::W>
4398    {
4399        crate::common::RegisterField::<0,0x1,1,0,bstfc::Stcnddfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4400    }
4401    #[doc = "STOP condition Detection Force"]
4402    #[inline(always)]
4403    pub fn spcnddfc(
4404        self,
4405    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bstfc::Spcnddfc, Bstfc_SPEC, crate::common::W>
4406    {
4407        crate::common::RegisterField::<1,0x1,1,0,bstfc::Spcnddfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4408    }
4409    #[doc = "HDR Exit Pattern Detection Force"]
4410    #[inline(always)]
4411    pub fn hdrexdfc(
4412        self,
4413    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bstfc::Hdrexdfc, Bstfc_SPEC, crate::common::W>
4414    {
4415        crate::common::RegisterField::<2,0x1,1,0,bstfc::Hdrexdfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4416    }
4417    #[doc = "NACK Detection Force"]
4418    #[inline(always)]
4419    pub fn nackdfc(
4420        self,
4421    ) -> crate::common::RegisterField<4, 0x1, 1, 0, bstfc::Nackdfc, Bstfc_SPEC, crate::common::W>
4422    {
4423        crate::common::RegisterField::<4,0x1,1,0,bstfc::Nackdfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4424    }
4425    #[doc = "Transmit End Force"]
4426    #[inline(always)]
4427    pub fn tendfc(
4428        self,
4429    ) -> crate::common::RegisterField<8, 0x1, 1, 0, bstfc::Tendfc, Bstfc_SPEC, crate::common::W>
4430    {
4431        crate::common::RegisterField::<8,0x1,1,0,bstfc::Tendfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4432    }
4433    #[doc = "Arbitration Lost Force"]
4434    #[inline(always)]
4435    pub fn alfc(
4436        self,
4437    ) -> crate::common::RegisterField<16, 0x1, 1, 0, bstfc::Alfc, Bstfc_SPEC, crate::common::W>
4438    {
4439        crate::common::RegisterField::<16,0x1,1,0,bstfc::Alfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4440    }
4441    #[doc = "Timeout Detection Force"]
4442    #[inline(always)]
4443    pub fn todfc(
4444        self,
4445    ) -> crate::common::RegisterField<20, 0x1, 1, 0, bstfc::Todfc, Bstfc_SPEC, crate::common::W>
4446    {
4447        crate::common::RegisterField::<20,0x1,1,0,bstfc::Todfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4448    }
4449    #[doc = "Wake-Up Condition Detection Force"]
4450    #[inline(always)]
4451    pub fn wucnddfc(
4452        self,
4453    ) -> crate::common::RegisterField<24, 0x1, 1, 0, bstfc::Wucnddfc, Bstfc_SPEC, crate::common::W>
4454    {
4455        crate::common::RegisterField::<24,0x1,1,0,bstfc::Wucnddfc, Bstfc_SPEC,crate::common::W>::from_register(self,0)
4456    }
4457}
4458impl ::core::default::Default for Bstfc {
4459    #[inline(always)]
4460    fn default() -> Bstfc {
4461        <crate::RegValueT<Bstfc_SPEC> as RegisterValue<_>>::new(0)
4462    }
4463}
4464pub mod bstfc {
4465
4466    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4467    pub struct Stcnddfc_SPEC;
4468    pub type Stcnddfc = crate::EnumBitfieldStruct<u8, Stcnddfc_SPEC>;
4469    impl Stcnddfc {
4470        #[doc = "Not Force START condition Detection Interrupt for software testing."]
4471        pub const _0: Self = Self::new(0);
4472        #[doc = "Force START condition Detection Interrupt for software testing."]
4473        pub const _1: Self = Self::new(1);
4474    }
4475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4476    pub struct Spcnddfc_SPEC;
4477    pub type Spcnddfc = crate::EnumBitfieldStruct<u8, Spcnddfc_SPEC>;
4478    impl Spcnddfc {
4479        #[doc = "Not Force STOP condition Detection Interrupt for software testing."]
4480        pub const _0: Self = Self::new(0);
4481        #[doc = "Force STOP condition Detection Interrupt for software testing."]
4482        pub const _1: Self = Self::new(1);
4483    }
4484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4485    pub struct Hdrexdfc_SPEC;
4486    pub type Hdrexdfc = crate::EnumBitfieldStruct<u8, Hdrexdfc_SPEC>;
4487    impl Hdrexdfc {
4488        #[doc = "Not Force HDR Exit Pattern Detection Interrupt for software testing."]
4489        pub const _0: Self = Self::new(0);
4490        #[doc = "Force HDR Exit Pattern Detection Interrupt for software testing."]
4491        pub const _1: Self = Self::new(1);
4492    }
4493    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4494    pub struct Nackdfc_SPEC;
4495    pub type Nackdfc = crate::EnumBitfieldStruct<u8, Nackdfc_SPEC>;
4496    impl Nackdfc {
4497        #[doc = "Not Force NACK Detection Interrupt for software testing."]
4498        pub const _0: Self = Self::new(0);
4499        #[doc = "Force NACK Detection Interrupt for software testing."]
4500        pub const _1: Self = Self::new(1);
4501    }
4502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4503    pub struct Tendfc_SPEC;
4504    pub type Tendfc = crate::EnumBitfieldStruct<u8, Tendfc_SPEC>;
4505    impl Tendfc {
4506        #[doc = "Not Force Transmit End Interrupt for software testing."]
4507        pub const _0: Self = Self::new(0);
4508        #[doc = "Force Transmit End Interrupt for software testing."]
4509        pub const _1: Self = Self::new(1);
4510    }
4511    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4512    pub struct Alfc_SPEC;
4513    pub type Alfc = crate::EnumBitfieldStruct<u8, Alfc_SPEC>;
4514    impl Alfc {
4515        #[doc = "Not Force Arbitration Lost Interrupt for software testing."]
4516        pub const _0: Self = Self::new(0);
4517        #[doc = "Force Arbitration Lost Interrupt for software testing."]
4518        pub const _1: Self = Self::new(1);
4519    }
4520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4521    pub struct Todfc_SPEC;
4522    pub type Todfc = crate::EnumBitfieldStruct<u8, Todfc_SPEC>;
4523    impl Todfc {
4524        #[doc = "Not Force Timeout Detection Interrupt for software testing."]
4525        pub const _0: Self = Self::new(0);
4526        #[doc = "Force Timeout Detection Interrupt for software testing."]
4527        pub const _1: Self = Self::new(1);
4528    }
4529    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4530    pub struct Wucnddfc_SPEC;
4531    pub type Wucnddfc = crate::EnumBitfieldStruct<u8, Wucnddfc_SPEC>;
4532    impl Wucnddfc {
4533        #[doc = "Not Force Wake-Up Condition Detection Interrupt for software testing."]
4534        pub const _0: Self = Self::new(0);
4535        #[doc = "Force Wake-Up Condition Detection Interrupt for software testing."]
4536        pub const _1: Self = Self::new(1);
4537    }
4538}
4539#[doc(hidden)]
4540#[derive(Copy, Clone, Eq, PartialEq)]
4541pub struct Ntst_SPEC;
4542impl crate::sealed::RegSpec for Ntst_SPEC {
4543    type DataType = u32;
4544}
4545#[doc = "Normal Transfer Status Register"]
4546pub type Ntst = crate::RegValueT<Ntst_SPEC>;
4547
4548impl Ntst {
4549    #[doc = "Normal Transmit Data Buffer Empty Flag 0"]
4550    #[inline(always)]
4551    pub fn tdbef0(
4552        self,
4553    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ntst::Tdbef0, Ntst_SPEC, crate::common::RW>
4554    {
4555        crate::common::RegisterField::<0,0x1,1,0,ntst::Tdbef0, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4556    }
4557    #[doc = "Normal Receive Data Buffer Full Flag 0"]
4558    #[inline(always)]
4559    pub fn rdbff0(
4560        self,
4561    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ntst::Rdbff0, Ntst_SPEC, crate::common::RW>
4562    {
4563        crate::common::RegisterField::<1,0x1,1,0,ntst::Rdbff0, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4564    }
4565    #[doc = "Normal IBI Queue Empty/Full Flag"]
4566    #[inline(always)]
4567    pub fn ibiqeff(
4568        self,
4569    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ntst::Ibiqeff, Ntst_SPEC, crate::common::RW>
4570    {
4571        crate::common::RegisterField::<2,0x1,1,0,ntst::Ibiqeff, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4572    }
4573    #[doc = "Normal Command Queue Empty Flag"]
4574    #[inline(always)]
4575    pub fn cmdqef(
4576        self,
4577    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ntst::Cmdqef, Ntst_SPEC, crate::common::RW>
4578    {
4579        crate::common::RegisterField::<3,0x1,1,0,ntst::Cmdqef, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4580    }
4581    #[doc = "Normal Response Queue Full Flag"]
4582    #[inline(always)]
4583    pub fn rspqff(
4584        self,
4585    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ntst::Rspqff, Ntst_SPEC, crate::common::RW>
4586    {
4587        crate::common::RegisterField::<4,0x1,1,0,ntst::Rspqff, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4588    }
4589    #[doc = "Normal Transfer Abort Flag"]
4590    #[inline(always)]
4591    pub fn tabtf(
4592        self,
4593    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ntst::Tabtf, Ntst_SPEC, crate::common::RW> {
4594        crate::common::RegisterField::<5,0x1,1,0,ntst::Tabtf, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4595    }
4596    #[doc = "Normal Transfer Error Flag"]
4597    #[inline(always)]
4598    pub fn tef(
4599        self,
4600    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ntst::Tef, Ntst_SPEC, crate::common::RW> {
4601        crate::common::RegisterField::<9,0x1,1,0,ntst::Tef, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4602    }
4603    #[doc = "Normal Receive Status Queue Full Flag"]
4604    #[inline(always)]
4605    pub fn rsqff(
4606        self,
4607    ) -> crate::common::RegisterField<20, 0x1, 1, 0, ntst::Rsqff, Ntst_SPEC, crate::common::RW>
4608    {
4609        crate::common::RegisterField::<20,0x1,1,0,ntst::Rsqff, Ntst_SPEC,crate::common::RW>::from_register(self,0)
4610    }
4611}
4612impl ::core::default::Default for Ntst {
4613    #[inline(always)]
4614    fn default() -> Ntst {
4615        <crate::RegValueT<Ntst_SPEC> as RegisterValue<_>>::new(0)
4616    }
4617}
4618pub mod ntst {
4619
4620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4621    pub struct Tdbef0_SPEC;
4622    pub type Tdbef0 = crate::EnumBitfieldStruct<u8, Tdbef0_SPEC>;
4623    impl Tdbef0 {
4624        #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is less than the NTBTHCTL0.TXDBTH\\[2:0\\] threshold."]
4625        pub const _0: Self = Self::new(0);
4626        #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains no transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is the NTBTHCTL0.TXDBTH\\[2:0\\] threshold or more."]
4627        pub const _1: Self = Self::new(1);
4628    }
4629    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4630    pub struct Rdbff0_SPEC;
4631    pub type Rdbff0 = crate::EnumBitfieldStruct<u8, Rdbff0_SPEC>;
4632    impl Rdbff0 {
4633        #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains no receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is less than the NTBTHCTL0.RXDBTH\\[2:0\\] threshold."]
4634        pub const _0: Self = Self::new(0);
4635        #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is the NTBTHCTL0.RXDBTH\\[2:0\\] threshold or more."]
4636        pub const _1: Self = Self::new(1);
4637    }
4638    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4639    pub struct Ibiqeff_SPEC;
4640    pub type Ibiqeff = crate::EnumBitfieldStruct<u8, Ibiqeff_SPEC>;
4641    impl Ibiqeff {
4642        #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is the NQTHCTL.IBIQTH threshold or less. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is less than the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is less than the NQTHCTL.IBIQTH threshold."]
4643        pub const _0: Self = Self::new(0);
4644        #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is more than the NQTHCTL.IBIQTH threshold. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is the NQTHCTL.IBIQTH threshold or more."]
4645        pub const _1: Self = Self::new(1);
4646    }
4647    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4648    pub struct Cmdqef_SPEC;
4649    pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
4650    impl Cmdqef {
4651        #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is less than the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: The number of Command Queue empties is less than the NQTHCTL.CMDQTH threshold."]
4652        pub const _0: Self = Self::new(0);
4653        #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: 1: The number of Command Queue empties is the NQTHCTL.CMDQTH threshold or more."]
4654        pub const _1: Self = Self::new(1);
4655    }
4656    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4657    pub struct Rspqff_SPEC;
4658    pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
4659    impl Rspqff {
4660        #[doc = "The number of Response Queue entries is the NQTHCTL.RSPQTH threshold or less."]
4661        pub const _0: Self = Self::new(0);
4662        #[doc = "The number of Response Queue entries is more than the NQTHCTL.RSPQTH threshold."]
4663        pub const _1: Self = Self::new(1);
4664    }
4665    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4666    pub struct Tabtf_SPEC;
4667    pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
4668    impl Tabtf {
4669        #[doc = "Transfer Abort does not occur."]
4670        pub const _0: Self = Self::new(0);
4671        #[doc = "Transfer Abort occur. To clear, write 0 to this bit after 1 state is read."]
4672        pub const _1: Self = Self::new(1);
4673    }
4674    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4675    pub struct Tef_SPEC;
4676    pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
4677    impl Tef {
4678        #[doc = "Transfer Error does not occur."]
4679        pub const _0: Self = Self::new(0);
4680        #[doc = "Transfer Error occurs. To clear, write 0 to this bit after 1 state is read."]
4681        pub const _1: Self = Self::new(1);
4682    }
4683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4684    pub struct Rsqff_SPEC;
4685    pub type Rsqff = crate::EnumBitfieldStruct<u8, Rsqff_SPEC>;
4686    impl Rsqff {
4687        #[doc = "The number of Receive Status Queue entries is the NRQTHCTL.RSQTH threshold or less."]
4688        pub const _0: Self = Self::new(0);
4689        #[doc = "The number of Receive Status Queue entries is more than the NRQTHCTL.RSQTH threshold."]
4690        pub const _1: Self = Self::new(1);
4691    }
4692}
4693#[doc(hidden)]
4694#[derive(Copy, Clone, Eq, PartialEq)]
4695pub struct Ntste_SPEC;
4696impl crate::sealed::RegSpec for Ntste_SPEC {
4697    type DataType = u32;
4698}
4699#[doc = "Normal Transfer Status Enable Register"]
4700pub type Ntste = crate::RegValueT<Ntste_SPEC>;
4701
4702impl Ntste {
4703    #[doc = "Normal Transmit Data Buffer Empty Enable 0"]
4704    #[inline(always)]
4705    pub fn tdbee0(
4706        self,
4707    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ntste::Tdbee0, Ntste_SPEC, crate::common::RW>
4708    {
4709        crate::common::RegisterField::<0,0x1,1,0,ntste::Tdbee0, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4710    }
4711    #[doc = "Normal Receive Data Buffer Full Enable 0"]
4712    #[inline(always)]
4713    pub fn rdbfe0(
4714        self,
4715    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ntste::Rdbfe0, Ntste_SPEC, crate::common::RW>
4716    {
4717        crate::common::RegisterField::<1,0x1,1,0,ntste::Rdbfe0, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4718    }
4719    #[doc = "Normal IBI Queue Empty/Full Enable"]
4720    #[inline(always)]
4721    pub fn ibiqefe(
4722        self,
4723    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ntste::Ibiqefe, Ntste_SPEC, crate::common::RW>
4724    {
4725        crate::common::RegisterField::<2,0x1,1,0,ntste::Ibiqefe, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4726    }
4727    #[doc = "Normal Command Queue Empty Enable"]
4728    #[inline(always)]
4729    pub fn cmdqee(
4730        self,
4731    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ntste::Cmdqee, Ntste_SPEC, crate::common::RW>
4732    {
4733        crate::common::RegisterField::<3,0x1,1,0,ntste::Cmdqee, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4734    }
4735    #[doc = "Normal Response Queue Full Enable"]
4736    #[inline(always)]
4737    pub fn rspqfe(
4738        self,
4739    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ntste::Rspqfe, Ntste_SPEC, crate::common::RW>
4740    {
4741        crate::common::RegisterField::<4,0x1,1,0,ntste::Rspqfe, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4742    }
4743    #[doc = "Normal Transfer Abort Enable"]
4744    #[inline(always)]
4745    pub fn tabte(
4746        self,
4747    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ntste::Tabte, Ntste_SPEC, crate::common::RW>
4748    {
4749        crate::common::RegisterField::<5,0x1,1,0,ntste::Tabte, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4750    }
4751    #[doc = "Normal Transfer Error Enable"]
4752    #[inline(always)]
4753    pub fn tee(
4754        self,
4755    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ntste::Tee, Ntste_SPEC, crate::common::RW> {
4756        crate::common::RegisterField::<9,0x1,1,0,ntste::Tee, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4757    }
4758    #[doc = "Normal Receive Status Queue Full Enable"]
4759    #[inline(always)]
4760    pub fn rsqfe(
4761        self,
4762    ) -> crate::common::RegisterField<20, 0x1, 1, 0, ntste::Rsqfe, Ntste_SPEC, crate::common::RW>
4763    {
4764        crate::common::RegisterField::<20,0x1,1,0,ntste::Rsqfe, Ntste_SPEC,crate::common::RW>::from_register(self,0)
4765    }
4766}
4767impl ::core::default::Default for Ntste {
4768    #[inline(always)]
4769    fn default() -> Ntste {
4770        <crate::RegValueT<Ntste_SPEC> as RegisterValue<_>>::new(0)
4771    }
4772}
4773pub mod ntste {
4774
4775    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4776    pub struct Tdbee0_SPEC;
4777    pub type Tdbee0 = crate::EnumBitfieldStruct<u8, Tdbee0_SPEC>;
4778    impl Tdbee0 {
4779        #[doc = "Disables Tx0 Data Buffer Empty Interrupt Status logging."]
4780        pub const _0: Self = Self::new(0);
4781        #[doc = "Enables Tx0 Data Buffer Empty Interrupt Status logging."]
4782        pub const _1: Self = Self::new(1);
4783    }
4784    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4785    pub struct Rdbfe0_SPEC;
4786    pub type Rdbfe0 = crate::EnumBitfieldStruct<u8, Rdbfe0_SPEC>;
4787    impl Rdbfe0 {
4788        #[doc = "Disables Rx0 Data Buffer Full Interrupt Status logging."]
4789        pub const _0: Self = Self::new(0);
4790        #[doc = "Enables Rx0 Data Buffer Full Interrupt Status logging."]
4791        pub const _1: Self = Self::new(1);
4792    }
4793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4794    pub struct Ibiqefe_SPEC;
4795    pub type Ibiqefe = crate::EnumBitfieldStruct<u8, Ibiqefe_SPEC>;
4796    impl Ibiqefe {
4797        #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Status logging."]
4798        pub const _0: Self = Self::new(0);
4799        #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Status logging."]
4800        pub const _1: Self = Self::new(1);
4801    }
4802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4803    pub struct Cmdqee_SPEC;
4804    pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
4805    impl Cmdqee {
4806        #[doc = "Disables Command Buffer Empty Interrupt Status logging."]
4807        pub const _0: Self = Self::new(0);
4808        #[doc = "Enables Command Buffer Empty Interrupt Status logging."]
4809        pub const _1: Self = Self::new(1);
4810    }
4811    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4812    pub struct Rspqfe_SPEC;
4813    pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
4814    impl Rspqfe {
4815        #[doc = "Disables Response Buffer Full Interrupt Status logging."]
4816        pub const _0: Self = Self::new(0);
4817        #[doc = "Enables Response Buffer Full Interrupt Status logging."]
4818        pub const _1: Self = Self::new(1);
4819    }
4820    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4821    pub struct Tabte_SPEC;
4822    pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
4823    impl Tabte {
4824        #[doc = "Disables Transfer Abort Interrupt Status logging."]
4825        pub const _0: Self = Self::new(0);
4826        #[doc = "Enables Transfer Abort Interrupt Status logging."]
4827        pub const _1: Self = Self::new(1);
4828    }
4829    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4830    pub struct Tee_SPEC;
4831    pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
4832    impl Tee {
4833        #[doc = "Disables Transfer Error Interrupt Status logging."]
4834        pub const _0: Self = Self::new(0);
4835        #[doc = "Enables Transfer Error Interrupt Status logging."]
4836        pub const _1: Self = Self::new(1);
4837    }
4838    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4839    pub struct Rsqfe_SPEC;
4840    pub type Rsqfe = crate::EnumBitfieldStruct<u8, Rsqfe_SPEC>;
4841    impl Rsqfe {
4842        #[doc = "Disables Receive Status Buffer Full Interrupt Status logging."]
4843        pub const _0: Self = Self::new(0);
4844        #[doc = "Enables Receive Status Buffer Full Interrupt Status logging."]
4845        pub const _1: Self = Self::new(1);
4846    }
4847}
4848#[doc(hidden)]
4849#[derive(Copy, Clone, Eq, PartialEq)]
4850pub struct Ntie_SPEC;
4851impl crate::sealed::RegSpec for Ntie_SPEC {
4852    type DataType = u32;
4853}
4854#[doc = "Normal Transfer Interrupt Enable Register"]
4855pub type Ntie = crate::RegValueT<Ntie_SPEC>;
4856
4857impl Ntie {
4858    #[doc = "Normal Transmit Data Buffer Empty Interrupt Enable 0"]
4859    #[inline(always)]
4860    pub fn tdbeie0(
4861        self,
4862    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ntie::Tdbeie0, Ntie_SPEC, crate::common::RW>
4863    {
4864        crate::common::RegisterField::<0,0x1,1,0,ntie::Tdbeie0, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4865    }
4866    #[doc = "Normal Receive Data Buffer Full Interrupt Enable 0"]
4867    #[inline(always)]
4868    pub fn rdbfie0(
4869        self,
4870    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ntie::Rdbfie0, Ntie_SPEC, crate::common::RW>
4871    {
4872        crate::common::RegisterField::<1,0x1,1,0,ntie::Rdbfie0, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4873    }
4874    #[doc = "Normal IBI Queue Empty/Full Interrupt Enable"]
4875    #[inline(always)]
4876    pub fn ibiqefie(
4877        self,
4878    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ntie::Ibiqefie, Ntie_SPEC, crate::common::RW>
4879    {
4880        crate::common::RegisterField::<2,0x1,1,0,ntie::Ibiqefie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4881    }
4882    #[doc = "Normal Command Queue Empty Interrupt Enable"]
4883    #[inline(always)]
4884    pub fn cmdqeie(
4885        self,
4886    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ntie::Cmdqeie, Ntie_SPEC, crate::common::RW>
4887    {
4888        crate::common::RegisterField::<3,0x1,1,0,ntie::Cmdqeie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4889    }
4890    #[doc = "Normal Response Queue Full Interrupt Enable"]
4891    #[inline(always)]
4892    pub fn rspqfie(
4893        self,
4894    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ntie::Rspqfie, Ntie_SPEC, crate::common::RW>
4895    {
4896        crate::common::RegisterField::<4,0x1,1,0,ntie::Rspqfie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4897    }
4898    #[doc = "Normal Transfer Abort Interrupt Enable"]
4899    #[inline(always)]
4900    pub fn tabtie(
4901        self,
4902    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ntie::Tabtie, Ntie_SPEC, crate::common::RW>
4903    {
4904        crate::common::RegisterField::<5,0x1,1,0,ntie::Tabtie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4905    }
4906    #[doc = "Normal Transfer Error Interrupt Enable"]
4907    #[inline(always)]
4908    pub fn teie(
4909        self,
4910    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ntie::Teie, Ntie_SPEC, crate::common::RW> {
4911        crate::common::RegisterField::<9,0x1,1,0,ntie::Teie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4912    }
4913    #[doc = "Normal Receive Status Queue Full Interrupt Enable"]
4914    #[inline(always)]
4915    pub fn rsqfie(
4916        self,
4917    ) -> crate::common::RegisterField<20, 0x1, 1, 0, ntie::Rsqfie, Ntie_SPEC, crate::common::RW>
4918    {
4919        crate::common::RegisterField::<20,0x1,1,0,ntie::Rsqfie, Ntie_SPEC,crate::common::RW>::from_register(self,0)
4920    }
4921}
4922impl ::core::default::Default for Ntie {
4923    #[inline(always)]
4924    fn default() -> Ntie {
4925        <crate::RegValueT<Ntie_SPEC> as RegisterValue<_>>::new(0)
4926    }
4927}
4928pub mod ntie {
4929
4930    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4931    pub struct Tdbeie0_SPEC;
4932    pub type Tdbeie0 = crate::EnumBitfieldStruct<u8, Tdbeie0_SPEC>;
4933    impl Tdbeie0 {
4934        #[doc = "Disables Tx0 Data Buffer Empty Interrupt Signal."]
4935        pub const _0: Self = Self::new(0);
4936        #[doc = "Enables Tx0 Data Buffer Empty Interrupt Signal."]
4937        pub const _1: Self = Self::new(1);
4938    }
4939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4940    pub struct Rdbfie0_SPEC;
4941    pub type Rdbfie0 = crate::EnumBitfieldStruct<u8, Rdbfie0_SPEC>;
4942    impl Rdbfie0 {
4943        #[doc = "Disables Rx0 Data Buffer Full Interrupt Signal."]
4944        pub const _0: Self = Self::new(0);
4945        #[doc = "Enables Rx0 Data Buffer Full Interrupt Signal."]
4946        pub const _1: Self = Self::new(1);
4947    }
4948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4949    pub struct Ibiqefie_SPEC;
4950    pub type Ibiqefie = crate::EnumBitfieldStruct<u8, Ibiqefie_SPEC>;
4951    impl Ibiqefie {
4952        #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Signal."]
4953        pub const _0: Self = Self::new(0);
4954        #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Signal."]
4955        pub const _1: Self = Self::new(1);
4956    }
4957    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4958    pub struct Cmdqeie_SPEC;
4959    pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
4960    impl Cmdqeie {
4961        #[doc = "Disables Command Buffer Empty Interrupt Signal."]
4962        pub const _0: Self = Self::new(0);
4963        #[doc = "Enables Command Buffer Empty Interrupt Signal."]
4964        pub const _1: Self = Self::new(1);
4965    }
4966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4967    pub struct Rspqfie_SPEC;
4968    pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
4969    impl Rspqfie {
4970        #[doc = "Disables Response Buffer Full Interrupt Signal."]
4971        pub const _0: Self = Self::new(0);
4972        #[doc = "Enables Response Buffer Full Interrupt Signal."]
4973        pub const _1: Self = Self::new(1);
4974    }
4975    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4976    pub struct Tabtie_SPEC;
4977    pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
4978    impl Tabtie {
4979        #[doc = "Disables Transfer Abort Interrupt Signal."]
4980        pub const _0: Self = Self::new(0);
4981        #[doc = "Enables Transfer Abort Interrupt Signal."]
4982        pub const _1: Self = Self::new(1);
4983    }
4984    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4985    pub struct Teie_SPEC;
4986    pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
4987    impl Teie {
4988        #[doc = "Disables Transfer Error Interrupt Signal."]
4989        pub const _0: Self = Self::new(0);
4990        #[doc = "Enables Transfer Error Interrupt Signal."]
4991        pub const _1: Self = Self::new(1);
4992    }
4993    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4994    pub struct Rsqfie_SPEC;
4995    pub type Rsqfie = crate::EnumBitfieldStruct<u8, Rsqfie_SPEC>;
4996    impl Rsqfie {
4997        #[doc = "Disables Receive Status Buffer Full Interrupt Signal."]
4998        pub const _0: Self = Self::new(0);
4999        #[doc = "Enables Receive Status Buffer Full Interrupt Signal."]
5000        pub const _1: Self = Self::new(1);
5001    }
5002}
5003#[doc(hidden)]
5004#[derive(Copy, Clone, Eq, PartialEq)]
5005pub struct Ntstfc_SPEC;
5006impl crate::sealed::RegSpec for Ntstfc_SPEC {
5007    type DataType = u32;
5008}
5009#[doc = "Normal Transfer Status Force Register"]
5010pub type Ntstfc = crate::RegValueT<Ntstfc_SPEC>;
5011
5012impl Ntstfc {
5013    #[doc = "Normal Transmit Data Buffer Empty Force 0"]
5014    #[inline(always)]
5015    pub fn tdbefc0(
5016        self,
5017    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ntstfc::Tdbefc0, Ntstfc_SPEC, crate::common::W>
5018    {
5019        crate::common::RegisterField::<0,0x1,1,0,ntstfc::Tdbefc0, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5020    }
5021    #[doc = "Normal Receive Data Buffer Full Force 0"]
5022    #[inline(always)]
5023    pub fn rdbffc0(
5024        self,
5025    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ntstfc::Rdbffc0, Ntstfc_SPEC, crate::common::W>
5026    {
5027        crate::common::RegisterField::<1,0x1,1,0,ntstfc::Rdbffc0, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5028    }
5029    #[doc = "Normal IBI Queue Empty/Full Force"]
5030    #[inline(always)]
5031    pub fn ibiqeffc(
5032        self,
5033    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ntstfc::Ibiqeffc, Ntstfc_SPEC, crate::common::W>
5034    {
5035        crate::common::RegisterField::<2,0x1,1,0,ntstfc::Ibiqeffc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5036    }
5037    #[doc = "Normal Command Queue Empty Force"]
5038    #[inline(always)]
5039    pub fn cmdqefc(
5040        self,
5041    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ntstfc::Cmdqefc, Ntstfc_SPEC, crate::common::W>
5042    {
5043        crate::common::RegisterField::<3,0x1,1,0,ntstfc::Cmdqefc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5044    }
5045    #[doc = "Normal Response Queue Full Force"]
5046    #[inline(always)]
5047    pub fn rspqffc(
5048        self,
5049    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ntstfc::Rspqffc, Ntstfc_SPEC, crate::common::W>
5050    {
5051        crate::common::RegisterField::<4,0x1,1,0,ntstfc::Rspqffc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5052    }
5053    #[doc = "Normal Transfer Abort Force"]
5054    #[inline(always)]
5055    pub fn tabtfc(
5056        self,
5057    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ntstfc::Tabtfc, Ntstfc_SPEC, crate::common::W>
5058    {
5059        crate::common::RegisterField::<5,0x1,1,0,ntstfc::Tabtfc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5060    }
5061    #[doc = "Normal Transfer Error Force"]
5062    #[inline(always)]
5063    pub fn tefc(
5064        self,
5065    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ntstfc::Tefc, Ntstfc_SPEC, crate::common::W>
5066    {
5067        crate::common::RegisterField::<9,0x1,1,0,ntstfc::Tefc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5068    }
5069    #[doc = "Normal Receive Status Queue Full Force"]
5070    #[inline(always)]
5071    pub fn rsqffc(
5072        self,
5073    ) -> crate::common::RegisterField<20, 0x1, 1, 0, ntstfc::Rsqffc, Ntstfc_SPEC, crate::common::W>
5074    {
5075        crate::common::RegisterField::<20,0x1,1,0,ntstfc::Rsqffc, Ntstfc_SPEC,crate::common::W>::from_register(self,0)
5076    }
5077}
5078impl ::core::default::Default for Ntstfc {
5079    #[inline(always)]
5080    fn default() -> Ntstfc {
5081        <crate::RegValueT<Ntstfc_SPEC> as RegisterValue<_>>::new(0)
5082    }
5083}
5084pub mod ntstfc {
5085
5086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5087    pub struct Tdbefc0_SPEC;
5088    pub type Tdbefc0 = crate::EnumBitfieldStruct<u8, Tdbefc0_SPEC>;
5089    impl Tdbefc0 {
5090        #[doc = "Not Force Tx0 Data Buffer Empty Interrupt for software testing."]
5091        pub const _0: Self = Self::new(0);
5092        #[doc = "Force Tx0 Data Buffer Empty Interrupt for software testing."]
5093        pub const _1: Self = Self::new(1);
5094    }
5095    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5096    pub struct Rdbffc0_SPEC;
5097    pub type Rdbffc0 = crate::EnumBitfieldStruct<u8, Rdbffc0_SPEC>;
5098    impl Rdbffc0 {
5099        #[doc = "Not Force Rx0 Data Buffer Full Interrupt for software testing."]
5100        pub const _0: Self = Self::new(0);
5101        #[doc = "Force Rx0 Data Buffer Full Interrupt for software testing."]
5102        pub const _1: Self = Self::new(1);
5103    }
5104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5105    pub struct Ibiqeffc_SPEC;
5106    pub type Ibiqeffc = crate::EnumBitfieldStruct<u8, Ibiqeffc_SPEC>;
5107    impl Ibiqeffc {
5108        #[doc = "Not Force IBI Status Buffer Full Interrupt for software testing."]
5109        pub const _0: Self = Self::new(0);
5110        #[doc = "Force IBI Status Buffer Full Interrupt for software testing."]
5111        pub const _1: Self = Self::new(1);
5112    }
5113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5114    pub struct Cmdqefc_SPEC;
5115    pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
5116    impl Cmdqefc {
5117        #[doc = "Not Force Command Buffer Empty Interrupt for software testing."]
5118        pub const _0: Self = Self::new(0);
5119        #[doc = "Force Command Buffer Empty Interrupt for software testing."]
5120        pub const _1: Self = Self::new(1);
5121    }
5122    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5123    pub struct Rspqffc_SPEC;
5124    pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
5125    impl Rspqffc {
5126        #[doc = "Not Force Response Buffer Full Interrupt for software testing."]
5127        pub const _0: Self = Self::new(0);
5128        #[doc = "Force Response Buffer Full Interrupt for software testing."]
5129        pub const _1: Self = Self::new(1);
5130    }
5131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5132    pub struct Tabtfc_SPEC;
5133    pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
5134    impl Tabtfc {
5135        #[doc = "Not Force Transfer Abort Interrupt for software testing."]
5136        pub const _0: Self = Self::new(0);
5137        #[doc = "Force Transfer Abort Interrupt for software testing."]
5138        pub const _1: Self = Self::new(1);
5139    }
5140    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5141    pub struct Tefc_SPEC;
5142    pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
5143    impl Tefc {
5144        #[doc = "Not Force Transfer Error Interrupt for software testing."]
5145        pub const _0: Self = Self::new(0);
5146        #[doc = "Force Transfer Error Interrupt for software testing."]
5147        pub const _1: Self = Self::new(1);
5148    }
5149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5150    pub struct Rsqffc_SPEC;
5151    pub type Rsqffc = crate::EnumBitfieldStruct<u8, Rsqffc_SPEC>;
5152    impl Rsqffc {
5153        #[doc = "Not Force Receive Status Buffer Full Interrupt for software testing."]
5154        pub const _0: Self = Self::new(0);
5155        #[doc = "Force Receive Status Buffer Full Interrupt for software testing."]
5156        pub const _1: Self = Self::new(1);
5157    }
5158}
5159#[doc(hidden)]
5160#[derive(Copy, Clone, Eq, PartialEq)]
5161pub struct Htst_SPEC;
5162impl crate::sealed::RegSpec for Htst_SPEC {
5163    type DataType = u32;
5164}
5165#[doc = "High Priority Transfer Status Register"]
5166pub type Htst = crate::RegValueT<Htst_SPEC>;
5167
5168impl Htst {
5169    #[doc = "High Priority Transmit Data Buffer Empty Flag"]
5170    #[inline(always)]
5171    pub fn tdbef(
5172        self,
5173    ) -> crate::common::RegisterField<0, 0x1, 1, 0, htst::Tdbef, Htst_SPEC, crate::common::RW> {
5174        crate::common::RegisterField::<0,0x1,1,0,htst::Tdbef, Htst_SPEC,crate::common::RW>::from_register(self,0)
5175    }
5176    #[doc = "High Priority Receive Data Buffer Full Flag"]
5177    #[inline(always)]
5178    pub fn rdbff(
5179        self,
5180    ) -> crate::common::RegisterField<1, 0x1, 1, 0, htst::Rdbff, Htst_SPEC, crate::common::RW> {
5181        crate::common::RegisterField::<1,0x1,1,0,htst::Rdbff, Htst_SPEC,crate::common::RW>::from_register(self,0)
5182    }
5183    #[doc = "High Priority Command Queue Empty Flag"]
5184    #[inline(always)]
5185    pub fn cmdqef(
5186        self,
5187    ) -> crate::common::RegisterField<3, 0x1, 1, 0, htst::Cmdqef, Htst_SPEC, crate::common::RW>
5188    {
5189        crate::common::RegisterField::<3,0x1,1,0,htst::Cmdqef, Htst_SPEC,crate::common::RW>::from_register(self,0)
5190    }
5191    #[doc = "High Priority Response Queue Full Flag"]
5192    #[inline(always)]
5193    pub fn rspqff(
5194        self,
5195    ) -> crate::common::RegisterField<4, 0x1, 1, 0, htst::Rspqff, Htst_SPEC, crate::common::RW>
5196    {
5197        crate::common::RegisterField::<4,0x1,1,0,htst::Rspqff, Htst_SPEC,crate::common::RW>::from_register(self,0)
5198    }
5199    #[doc = "High Priority Transfer Abort Flag"]
5200    #[inline(always)]
5201    pub fn tabtf(
5202        self,
5203    ) -> crate::common::RegisterField<5, 0x1, 1, 0, htst::Tabtf, Htst_SPEC, crate::common::RW> {
5204        crate::common::RegisterField::<5,0x1,1,0,htst::Tabtf, Htst_SPEC,crate::common::RW>::from_register(self,0)
5205    }
5206    #[doc = "High Priority Transfer Error Flag"]
5207    #[inline(always)]
5208    pub fn tef(
5209        self,
5210    ) -> crate::common::RegisterField<9, 0x1, 1, 0, htst::Tef, Htst_SPEC, crate::common::RW> {
5211        crate::common::RegisterField::<9,0x1,1,0,htst::Tef, Htst_SPEC,crate::common::RW>::from_register(self,0)
5212    }
5213}
5214impl ::core::default::Default for Htst {
5215    #[inline(always)]
5216    fn default() -> Htst {
5217        <crate::RegValueT<Htst_SPEC> as RegisterValue<_>>::new(0)
5218    }
5219}
5220pub mod htst {
5221
5222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5223    pub struct Tdbef_SPEC;
5224    pub type Tdbef = crate::EnumBitfieldStruct<u8, Tdbef_SPEC>;
5225    impl Tdbef {
5226        #[doc = "The number of empties in the High Priority Transmit Data Buffer is less than the HTBTHCTL.TXDBTH\\[2:0\\] threshold."]
5227        pub const _0: Self = Self::new(0);
5228        #[doc = "The number of empties in the High Priority Transmit Data Buffer is the HTBTHCTL.TXDBTH\\[2:0\\] threshold or more."]
5229        pub const _1: Self = Self::new(1);
5230    }
5231    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5232    pub struct Rdbff_SPEC;
5233    pub type Rdbff = crate::EnumBitfieldStruct<u8, Rdbff_SPEC>;
5234    impl Rdbff {
5235        #[doc = "The number of entries in the High Priority Receive Data Buffer is less than the HTBTHCTL.RXDBTH\\[2:0\\] threshold."]
5236        pub const _0: Self = Self::new(0);
5237        #[doc = "The number of entries in the High Priority Receive Data Buffer is the HTBTHCTL.RXDBTH\\[2:0\\] threshold or more."]
5238        pub const _1: Self = Self::new(1);
5239    }
5240    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5241    pub struct Cmdqef_SPEC;
5242    pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
5243    impl Cmdqef {
5244        #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is less than the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is less than the HQTHCTL.CMDQTH threshold."]
5245        pub const _0: Self = Self::new(0);
5246        #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is the HQTHCTL.CMDQTH threshold or more."]
5247        pub const _1: Self = Self::new(1);
5248    }
5249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5250    pub struct Rspqff_SPEC;
5251    pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
5252    impl Rspqff {
5253        #[doc = "The number of High Priority Response Queue entries is less than the HQTHCTL .RSPQTH threshold."]
5254        pub const _0: Self = Self::new(0);
5255        #[doc = "The number of High Priority Response Queue entries is the HQTHCTL .RSPQTH threshold or more."]
5256        pub const _1: Self = Self::new(1);
5257    }
5258    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5259    pub struct Tabtf_SPEC;
5260    pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
5261    impl Tabtf {
5262        #[doc = "High Priority Transfer Abort does not occur."]
5263        pub const _0: Self = Self::new(0);
5264        #[doc = "High Priority Transfer Abort occurs. To clear, write 0 to this bit after 1 is read."]
5265        pub const _1: Self = Self::new(1);
5266    }
5267    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5268    pub struct Tef_SPEC;
5269    pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
5270    impl Tef {
5271        #[doc = "High Priority Transfer Error does not occur."]
5272        pub const _0: Self = Self::new(0);
5273        #[doc = "High Priority Transfer Error occurs. To clear, write 0 to this bit after 1 is read."]
5274        pub const _1: Self = Self::new(1);
5275    }
5276}
5277#[doc(hidden)]
5278#[derive(Copy, Clone, Eq, PartialEq)]
5279pub struct Htste_SPEC;
5280impl crate::sealed::RegSpec for Htste_SPEC {
5281    type DataType = u32;
5282}
5283#[doc = "High Priority Transfer Status Enable Register"]
5284pub type Htste = crate::RegValueT<Htste_SPEC>;
5285
5286impl Htste {
5287    #[doc = "High Priority Transmit Data Buffer Empty Enable"]
5288    #[inline(always)]
5289    pub fn tdbee(
5290        self,
5291    ) -> crate::common::RegisterField<0, 0x1, 1, 0, htste::Tdbee, Htste_SPEC, crate::common::RW>
5292    {
5293        crate::common::RegisterField::<0,0x1,1,0,htste::Tdbee, Htste_SPEC,crate::common::RW>::from_register(self,0)
5294    }
5295    #[doc = "High Priority Receive Data Buffer Full Enable"]
5296    #[inline(always)]
5297    pub fn rdbfe(
5298        self,
5299    ) -> crate::common::RegisterField<1, 0x1, 1, 0, htste::Rdbfe, Htste_SPEC, crate::common::RW>
5300    {
5301        crate::common::RegisterField::<1,0x1,1,0,htste::Rdbfe, Htste_SPEC,crate::common::RW>::from_register(self,0)
5302    }
5303    #[doc = "High Priority Command Queue Empty Enable"]
5304    #[inline(always)]
5305    pub fn cmdqee(
5306        self,
5307    ) -> crate::common::RegisterField<3, 0x1, 1, 0, htste::Cmdqee, Htste_SPEC, crate::common::RW>
5308    {
5309        crate::common::RegisterField::<3,0x1,1,0,htste::Cmdqee, Htste_SPEC,crate::common::RW>::from_register(self,0)
5310    }
5311    #[doc = "High Priority Response Queue Full Enable"]
5312    #[inline(always)]
5313    pub fn rspqfe(
5314        self,
5315    ) -> crate::common::RegisterField<4, 0x1, 1, 0, htste::Rspqfe, Htste_SPEC, crate::common::RW>
5316    {
5317        crate::common::RegisterField::<4,0x1,1,0,htste::Rspqfe, Htste_SPEC,crate::common::RW>::from_register(self,0)
5318    }
5319    #[doc = "High Priority Transfer Abort Enable"]
5320    #[inline(always)]
5321    pub fn tabte(
5322        self,
5323    ) -> crate::common::RegisterField<5, 0x1, 1, 0, htste::Tabte, Htste_SPEC, crate::common::RW>
5324    {
5325        crate::common::RegisterField::<5,0x1,1,0,htste::Tabte, Htste_SPEC,crate::common::RW>::from_register(self,0)
5326    }
5327    #[doc = "High Priority Transfer Error Enable"]
5328    #[inline(always)]
5329    pub fn tee(
5330        self,
5331    ) -> crate::common::RegisterField<9, 0x1, 1, 0, htste::Tee, Htste_SPEC, crate::common::RW> {
5332        crate::common::RegisterField::<9,0x1,1,0,htste::Tee, Htste_SPEC,crate::common::RW>::from_register(self,0)
5333    }
5334}
5335impl ::core::default::Default for Htste {
5336    #[inline(always)]
5337    fn default() -> Htste {
5338        <crate::RegValueT<Htste_SPEC> as RegisterValue<_>>::new(0)
5339    }
5340}
5341pub mod htste {
5342
5343    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5344    pub struct Tdbee_SPEC;
5345    pub type Tdbee = crate::EnumBitfieldStruct<u8, Tdbee_SPEC>;
5346    impl Tdbee {
5347        #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
5348        pub const _0: Self = Self::new(0);
5349        #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
5350        pub const _1: Self = Self::new(1);
5351    }
5352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5353    pub struct Rdbfe_SPEC;
5354    pub type Rdbfe = crate::EnumBitfieldStruct<u8, Rdbfe_SPEC>;
5355    impl Rdbfe {
5356        #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Status logging."]
5357        pub const _0: Self = Self::new(0);
5358        #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Status logging."]
5359        pub const _1: Self = Self::new(1);
5360    }
5361    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5362    pub struct Cmdqee_SPEC;
5363    pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
5364    impl Cmdqee {
5365        #[doc = "Disables High Priority Command Buffer Empty Interrupt Status logging."]
5366        pub const _0: Self = Self::new(0);
5367        #[doc = "Enables High Priority Command Buffer Empty Interrupt Status logging."]
5368        pub const _1: Self = Self::new(1);
5369    }
5370    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5371    pub struct Rspqfe_SPEC;
5372    pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
5373    impl Rspqfe {
5374        #[doc = "Disables High Priority Response Buffer Full Interrupt Status logging."]
5375        pub const _0: Self = Self::new(0);
5376        #[doc = "Enables High Priority Response Buffer Full Interrupt Status logging."]
5377        pub const _1: Self = Self::new(1);
5378    }
5379    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5380    pub struct Tabte_SPEC;
5381    pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
5382    impl Tabte {
5383        #[doc = "Disables High PriorityTransfer Abort Interrupt Status logging."]
5384        pub const _0: Self = Self::new(0);
5385        #[doc = "Enables High Priority Transfer Abort Interrupt Status logging."]
5386        pub const _1: Self = Self::new(1);
5387    }
5388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5389    pub struct Tee_SPEC;
5390    pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
5391    impl Tee {
5392        #[doc = "Disables High Priority Transfer Error interrupt Stats logging."]
5393        pub const _0: Self = Self::new(0);
5394        #[doc = "Enables High Priority Transfer Error interrupt Stats logging."]
5395        pub const _1: Self = Self::new(1);
5396    }
5397}
5398#[doc(hidden)]
5399#[derive(Copy, Clone, Eq, PartialEq)]
5400pub struct Htie_SPEC;
5401impl crate::sealed::RegSpec for Htie_SPEC {
5402    type DataType = u32;
5403}
5404#[doc = "High Priority Transfer Interrupt Enable Register"]
5405pub type Htie = crate::RegValueT<Htie_SPEC>;
5406
5407impl Htie {
5408    #[doc = "High Priority Transmit Data Buffer Empty Interrupt Enable"]
5409    #[inline(always)]
5410    pub fn tdbeie(
5411        self,
5412    ) -> crate::common::RegisterField<0, 0x1, 1, 0, htie::Tdbeie, Htie_SPEC, crate::common::RW>
5413    {
5414        crate::common::RegisterField::<0,0x1,1,0,htie::Tdbeie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5415    }
5416    #[doc = "High Priority Receive Data Buffer Full Interrupt Enable"]
5417    #[inline(always)]
5418    pub fn rdbfie(
5419        self,
5420    ) -> crate::common::RegisterField<1, 0x1, 1, 0, htie::Rdbfie, Htie_SPEC, crate::common::RW>
5421    {
5422        crate::common::RegisterField::<1,0x1,1,0,htie::Rdbfie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5423    }
5424    #[doc = "High Priority Command Queue Empty Interrupt Enable"]
5425    #[inline(always)]
5426    pub fn cmdqeie(
5427        self,
5428    ) -> crate::common::RegisterField<3, 0x1, 1, 0, htie::Cmdqeie, Htie_SPEC, crate::common::RW>
5429    {
5430        crate::common::RegisterField::<3,0x1,1,0,htie::Cmdqeie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5431    }
5432    #[doc = "High Priority Response Queue Full Interrupt Enable"]
5433    #[inline(always)]
5434    pub fn rspqfie(
5435        self,
5436    ) -> crate::common::RegisterField<4, 0x1, 1, 0, htie::Rspqfie, Htie_SPEC, crate::common::RW>
5437    {
5438        crate::common::RegisterField::<4,0x1,1,0,htie::Rspqfie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5439    }
5440    #[doc = "High Priority Transfer Abort Interrupt Enable"]
5441    #[inline(always)]
5442    pub fn tabtie(
5443        self,
5444    ) -> crate::common::RegisterField<5, 0x1, 1, 0, htie::Tabtie, Htie_SPEC, crate::common::RW>
5445    {
5446        crate::common::RegisterField::<5,0x1,1,0,htie::Tabtie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5447    }
5448    #[doc = "High Priority Transfer Error Interrupt Enable"]
5449    #[inline(always)]
5450    pub fn teie(
5451        self,
5452    ) -> crate::common::RegisterField<9, 0x1, 1, 0, htie::Teie, Htie_SPEC, crate::common::RW> {
5453        crate::common::RegisterField::<9,0x1,1,0,htie::Teie, Htie_SPEC,crate::common::RW>::from_register(self,0)
5454    }
5455}
5456impl ::core::default::Default for Htie {
5457    #[inline(always)]
5458    fn default() -> Htie {
5459        <crate::RegValueT<Htie_SPEC> as RegisterValue<_>>::new(0)
5460    }
5461}
5462pub mod htie {
5463
5464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5465    pub struct Tdbeie_SPEC;
5466    pub type Tdbeie = crate::EnumBitfieldStruct<u8, Tdbeie_SPEC>;
5467    impl Tdbeie {
5468        #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Signal."]
5469        pub const _0: Self = Self::new(0);
5470        #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Signal."]
5471        pub const _1: Self = Self::new(1);
5472    }
5473    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5474    pub struct Rdbfie_SPEC;
5475    pub type Rdbfie = crate::EnumBitfieldStruct<u8, Rdbfie_SPEC>;
5476    impl Rdbfie {
5477        #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Signal."]
5478        pub const _0: Self = Self::new(0);
5479        #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Signal."]
5480        pub const _1: Self = Self::new(1);
5481    }
5482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5483    pub struct Cmdqeie_SPEC;
5484    pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
5485    impl Cmdqeie {
5486        #[doc = "Disables High Priority Command Buffer Empty Interrupt Signal."]
5487        pub const _0: Self = Self::new(0);
5488        #[doc = "Enables High Priority Command Buffer Empty Interrupt Signal."]
5489        pub const _1: Self = Self::new(1);
5490    }
5491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5492    pub struct Rspqfie_SPEC;
5493    pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
5494    impl Rspqfie {
5495        #[doc = "Disables High Priority Response Buffer Full Interrupt Signal."]
5496        pub const _0: Self = Self::new(0);
5497        #[doc = "Enables High Priority Response Buffer Full Interrupt Signal."]
5498        pub const _1: Self = Self::new(1);
5499    }
5500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5501    pub struct Tabtie_SPEC;
5502    pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
5503    impl Tabtie {
5504        #[doc = "Disables High Priority Transfer Abort interrupt Signal."]
5505        pub const _0: Self = Self::new(0);
5506        #[doc = "Enables High Priority Transfer Abort interrupt Signal."]
5507        pub const _1: Self = Self::new(1);
5508    }
5509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5510    pub struct Teie_SPEC;
5511    pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
5512    impl Teie {
5513        #[doc = "Disables High Priority Transfer Error Interrupt Signal."]
5514        pub const _0: Self = Self::new(0);
5515        #[doc = "Enables High Priority Transfer Error Interrupt Signal."]
5516        pub const _1: Self = Self::new(1);
5517    }
5518}
5519#[doc(hidden)]
5520#[derive(Copy, Clone, Eq, PartialEq)]
5521pub struct Htstfc_SPEC;
5522impl crate::sealed::RegSpec for Htstfc_SPEC {
5523    type DataType = u32;
5524}
5525#[doc = "High Priority Transfer Status Force Register"]
5526pub type Htstfc = crate::RegValueT<Htstfc_SPEC>;
5527
5528impl Htstfc {
5529    #[doc = "High Priority Transmit Data Buffer Empty Force"]
5530    #[inline(always)]
5531    pub fn tdbefc(
5532        self,
5533    ) -> crate::common::RegisterField<0, 0x1, 1, 0, htstfc::Tdbefc, Htstfc_SPEC, crate::common::W>
5534    {
5535        crate::common::RegisterField::<0,0x1,1,0,htstfc::Tdbefc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5536    }
5537    #[doc = "High Priority Receive Data Buffer Full Force"]
5538    #[inline(always)]
5539    pub fn rdbffc(
5540        self,
5541    ) -> crate::common::RegisterField<1, 0x1, 1, 0, htstfc::Rdbffc, Htstfc_SPEC, crate::common::W>
5542    {
5543        crate::common::RegisterField::<1,0x1,1,0,htstfc::Rdbffc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5544    }
5545    #[doc = "High Priority Command Queue Empty Force"]
5546    #[inline(always)]
5547    pub fn cmdqefc(
5548        self,
5549    ) -> crate::common::RegisterField<3, 0x1, 1, 0, htstfc::Cmdqefc, Htstfc_SPEC, crate::common::W>
5550    {
5551        crate::common::RegisterField::<3,0x1,1,0,htstfc::Cmdqefc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5552    }
5553    #[doc = "High Priority Response Queue Full Force"]
5554    #[inline(always)]
5555    pub fn rspqffc(
5556        self,
5557    ) -> crate::common::RegisterField<4, 0x1, 1, 0, htstfc::Rspqffc, Htstfc_SPEC, crate::common::W>
5558    {
5559        crate::common::RegisterField::<4,0x1,1,0,htstfc::Rspqffc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5560    }
5561    #[doc = "High Priority Transfer Abort Force"]
5562    #[inline(always)]
5563    pub fn tabtfc(
5564        self,
5565    ) -> crate::common::RegisterField<5, 0x1, 1, 0, htstfc::Tabtfc, Htstfc_SPEC, crate::common::W>
5566    {
5567        crate::common::RegisterField::<5,0x1,1,0,htstfc::Tabtfc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5568    }
5569    #[doc = "High Priority Transfer Error Force"]
5570    #[inline(always)]
5571    pub fn tefc(
5572        self,
5573    ) -> crate::common::RegisterField<9, 0x1, 1, 0, htstfc::Tefc, Htstfc_SPEC, crate::common::W>
5574    {
5575        crate::common::RegisterField::<9,0x1,1,0,htstfc::Tefc, Htstfc_SPEC,crate::common::W>::from_register(self,0)
5576    }
5577}
5578impl ::core::default::Default for Htstfc {
5579    #[inline(always)]
5580    fn default() -> Htstfc {
5581        <crate::RegValueT<Htstfc_SPEC> as RegisterValue<_>>::new(0)
5582    }
5583}
5584pub mod htstfc {
5585
5586    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5587    pub struct Tdbefc_SPEC;
5588    pub type Tdbefc = crate::EnumBitfieldStruct<u8, Tdbefc_SPEC>;
5589    impl Tdbefc {
5590        #[doc = "Not Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
5591        pub const _0: Self = Self::new(0);
5592        #[doc = "Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
5593        pub const _1: Self = Self::new(1);
5594    }
5595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5596    pub struct Rdbffc_SPEC;
5597    pub type Rdbffc = crate::EnumBitfieldStruct<u8, Rdbffc_SPEC>;
5598    impl Rdbffc {
5599        #[doc = "Not Force High Priority Receive Data Buffer Full Interrupt for software testing."]
5600        pub const _0: Self = Self::new(0);
5601        #[doc = "Force High Priority Receive Data Buffer Full Interrupt for software testing."]
5602        pub const _1: Self = Self::new(1);
5603    }
5604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5605    pub struct Cmdqefc_SPEC;
5606    pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
5607    impl Cmdqefc {
5608        #[doc = "Not Force High Priority Command Buffer Empty Interrupt for software testing."]
5609        pub const _0: Self = Self::new(0);
5610        #[doc = "Force High Priority Command Buffer Empty Interrupt for software testing."]
5611        pub const _1: Self = Self::new(1);
5612    }
5613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5614    pub struct Rspqffc_SPEC;
5615    pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
5616    impl Rspqffc {
5617        #[doc = "Not Force High Priority Response Buffer Full Interrupt for software testing."]
5618        pub const _0: Self = Self::new(0);
5619        #[doc = "Force High Priority Response Buffer Full Interrupt for software testing."]
5620        pub const _1: Self = Self::new(1);
5621    }
5622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5623    pub struct Tabtfc_SPEC;
5624    pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
5625    impl Tabtfc {
5626        #[doc = "Not Force High Priority Transfer Abort Interrupt for software testing."]
5627        pub const _0: Self = Self::new(0);
5628        #[doc = "Force High Priority Transfer Abort Interrupt for software testing."]
5629        pub const _1: Self = Self::new(1);
5630    }
5631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5632    pub struct Tefc_SPEC;
5633    pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
5634    impl Tefc {
5635        #[doc = "Not Force High Priority Transfer Error Interrupt for software testing."]
5636        pub const _0: Self = Self::new(0);
5637        #[doc = "Force High Priority Transfer Error Interrupt for software testing."]
5638        pub const _1: Self = Self::new(1);
5639    }
5640}
5641#[doc(hidden)]
5642#[derive(Copy, Clone, Eq, PartialEq)]
5643pub struct Bcst_SPEC;
5644impl crate::sealed::RegSpec for Bcst_SPEC {
5645    type DataType = u32;
5646}
5647#[doc = "Bus Condition Status Register"]
5648pub type Bcst = crate::RegValueT<Bcst_SPEC>;
5649
5650impl Bcst {
5651    #[doc = "Bus Free Detection Flag"]
5652    #[inline(always)]
5653    pub fn bfref(
5654        self,
5655    ) -> crate::common::RegisterField<0, 0x1, 1, 0, bcst::Bfref, Bcst_SPEC, crate::common::R> {
5656        crate::common::RegisterField::<0,0x1,1,0,bcst::Bfref, Bcst_SPEC,crate::common::R>::from_register(self,0)
5657    }
5658    #[doc = "Bus Available Detection Flag"]
5659    #[inline(always)]
5660    pub fn bavlf(
5661        self,
5662    ) -> crate::common::RegisterField<1, 0x1, 1, 0, bcst::Bavlf, Bcst_SPEC, crate::common::R> {
5663        crate::common::RegisterField::<1,0x1,1,0,bcst::Bavlf, Bcst_SPEC,crate::common::R>::from_register(self,0)
5664    }
5665    #[doc = "Bus Idle Detection Flag"]
5666    #[inline(always)]
5667    pub fn bidlf(
5668        self,
5669    ) -> crate::common::RegisterField<2, 0x1, 1, 0, bcst::Bidlf, Bcst_SPEC, crate::common::R> {
5670        crate::common::RegisterField::<2,0x1,1,0,bcst::Bidlf, Bcst_SPEC,crate::common::R>::from_register(self,0)
5671    }
5672}
5673impl ::core::default::Default for Bcst {
5674    #[inline(always)]
5675    fn default() -> Bcst {
5676        <crate::RegValueT<Bcst_SPEC> as RegisterValue<_>>::new(0)
5677    }
5678}
5679pub mod bcst {
5680
5681    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5682    pub struct Bfref_SPEC;
5683    pub type Bfref = crate::EnumBitfieldStruct<u8, Bfref_SPEC>;
5684    impl Bfref {
5685        #[doc = "Have not Detected Bus Free"]
5686        pub const _0: Self = Self::new(0);
5687        #[doc = "Have Detected Bus Free"]
5688        pub const _1: Self = Self::new(1);
5689    }
5690    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5691    pub struct Bavlf_SPEC;
5692    pub type Bavlf = crate::EnumBitfieldStruct<u8, Bavlf_SPEC>;
5693    impl Bavlf {
5694        #[doc = "Have not Detected Bus Available"]
5695        pub const _0: Self = Self::new(0);
5696        #[doc = "Have Detected Bus Available"]
5697        pub const _1: Self = Self::new(1);
5698    }
5699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5700    pub struct Bidlf_SPEC;
5701    pub type Bidlf = crate::EnumBitfieldStruct<u8, Bidlf_SPEC>;
5702    impl Bidlf {
5703        #[doc = "Have not Detected Bus Idle"]
5704        pub const _0: Self = Self::new(0);
5705        #[doc = "Have Detected Bus Idle"]
5706        pub const _1: Self = Self::new(1);
5707    }
5708}
5709#[doc(hidden)]
5710#[derive(Copy, Clone, Eq, PartialEq)]
5711pub struct Svst_SPEC;
5712impl crate::sealed::RegSpec for Svst_SPEC {
5713    type DataType = u32;
5714}
5715#[doc = "Slave Status Register"]
5716pub type Svst = crate::RegValueT<Svst_SPEC>;
5717
5718impl Svst {
5719    #[doc = "General Call Address Detection Flag"]
5720    #[inline(always)]
5721    pub fn gcaf(
5722        self,
5723    ) -> crate::common::RegisterField<0, 0x1, 1, 0, svst::Gcaf, Svst_SPEC, crate::common::RW> {
5724        crate::common::RegisterField::<0,0x1,1,0,svst::Gcaf, Svst_SPEC,crate::common::RW>::from_register(self,0)
5725    }
5726    #[doc = "Hs-mode Master Code Detection Flag"]
5727    #[inline(always)]
5728    pub fn hsmcf(
5729        self,
5730    ) -> crate::common::RegisterField<5, 0x1, 1, 0, svst::Hsmcf, Svst_SPEC, crate::common::RW> {
5731        crate::common::RegisterField::<5,0x1,1,0,svst::Hsmcf, Svst_SPEC,crate::common::RW>::from_register(self,0)
5732    }
5733    #[doc = "Device-ID Address Detection Flag"]
5734    #[inline(always)]
5735    pub fn dvidf(
5736        self,
5737    ) -> crate::common::RegisterField<6, 0x1, 1, 0, svst::Dvidf, Svst_SPEC, crate::common::RW> {
5738        crate::common::RegisterField::<6,0x1,1,0,svst::Dvidf, Svst_SPEC,crate::common::RW>::from_register(self,0)
5739    }
5740    #[doc = "Host Address Detection Flag"]
5741    #[inline(always)]
5742    pub fn hoaf(
5743        self,
5744    ) -> crate::common::RegisterField<15, 0x1, 1, 0, svst::Hoaf, Svst_SPEC, crate::common::RW> {
5745        crate::common::RegisterField::<15,0x1,1,0,svst::Hoaf, Svst_SPEC,crate::common::RW>::from_register(self,0)
5746    }
5747    #[doc = "Slave Address Detection Flag n ( n = 0 to 2 )"]
5748    #[inline(always)]
5749    pub fn svaf(
5750        self,
5751    ) -> crate::common::RegisterField<16, 0x7, 1, 0, svst::Svaf, Svst_SPEC, crate::common::RW> {
5752        crate::common::RegisterField::<16,0x7,1,0,svst::Svaf, Svst_SPEC,crate::common::RW>::from_register(self,0)
5753    }
5754}
5755impl ::core::default::Default for Svst {
5756    #[inline(always)]
5757    fn default() -> Svst {
5758        <crate::RegValueT<Svst_SPEC> as RegisterValue<_>>::new(0)
5759    }
5760}
5761pub mod svst {
5762
5763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5764    pub struct Gcaf_SPEC;
5765    pub type Gcaf = crate::EnumBitfieldStruct<u8, Gcaf_SPEC>;
5766    impl Gcaf {
5767        #[doc = "General call address does not detect."]
5768        pub const _0: Self = Self::new(0);
5769        #[doc = "General call address detects."]
5770        pub const _1: Self = Self::new(1);
5771    }
5772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5773    pub struct Hsmcf_SPEC;
5774    pub type Hsmcf = crate::EnumBitfieldStruct<u8, Hsmcf_SPEC>;
5775    impl Hsmcf {
5776        #[doc = "Hs-mode Master Code does not detect."]
5777        pub const _0: Self = Self::new(0);
5778        #[doc = "Hs-mode Master Code detects."]
5779        pub const _1: Self = Self::new(1);
5780    }
5781    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5782    pub struct Dvidf_SPEC;
5783    pub type Dvidf = crate::EnumBitfieldStruct<u8, Dvidf_SPEC>;
5784    impl Dvidf {
5785        #[doc = "Device-ID command does not detect."]
5786        pub const _0: Self = Self::new(0);
5787        #[doc = "Device-ID command detects. This bit set to 1 when the first frame received immediately after a START condition is detected matches a value of (device ID (1111 100) + 0\\[W\\])."]
5788        pub const _1: Self = Self::new(1);
5789    }
5790    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5791    pub struct Hoaf_SPEC;
5792    pub type Hoaf = crate::EnumBitfieldStruct<u8, Hoaf_SPEC>;
5793    impl Hoaf {
5794        #[doc = "Host address does not detect."]
5795        pub const _0: Self = Self::new(0);
5796        #[doc = "Host address detects. This bit set to 1 when the received slave address matches the host address (0001 000)."]
5797        pub const _1: Self = Self::new(1);
5798    }
5799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5800    pub struct Svaf_SPEC;
5801    pub type Svaf = crate::EnumBitfieldStruct<u8, Svaf_SPEC>;
5802    impl Svaf {
5803        #[doc = "Slave n does not detect"]
5804        pub const _0: Self = Self::new(0);
5805        #[doc = "Slave n detect"]
5806        pub const _1: Self = Self::new(1);
5807    }
5808}
5809#[doc(hidden)]
5810#[derive(Copy, Clone, Eq, PartialEq)]
5811pub struct Wust_SPEC;
5812impl crate::sealed::RegSpec for Wust_SPEC {
5813    type DataType = u32;
5814}
5815#[doc = "Wake Up Unit Operating Status Register"]
5816pub type Wust = crate::RegValueT<Wust_SPEC>;
5817
5818impl Wust {
5819    #[doc = "Wake-up function asynchronous operation status flag"]
5820    #[inline(always)]
5821    pub fn wuasynf(
5822        self,
5823    ) -> crate::common::RegisterField<0, 0x1, 1, 0, wust::Wuasynf, Wust_SPEC, crate::common::R>
5824    {
5825        crate::common::RegisterField::<0,0x1,1,0,wust::Wuasynf, Wust_SPEC,crate::common::R>::from_register(self,0)
5826    }
5827}
5828impl ::core::default::Default for Wust {
5829    #[inline(always)]
5830    fn default() -> Wust {
5831        <crate::RegValueT<Wust_SPEC> as RegisterValue<_>>::new(0)
5832    }
5833}
5834pub mod wust {
5835
5836    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5837    pub struct Wuasynf_SPEC;
5838    pub type Wuasynf = crate::EnumBitfieldStruct<u8, Wuasynf_SPEC>;
5839    impl Wuasynf {
5840        #[doc = "I3C synchronous circuit enable condition."]
5841        pub const _0: Self = Self::new(0);
5842        #[doc = "I3C asynchronous circuit enable condition."]
5843        pub const _1: Self = Self::new(1);
5844    }
5845}
5846#[doc(hidden)]
5847#[derive(Copy, Clone, Eq, PartialEq)]
5848pub struct Mrccpt_SPEC;
5849impl crate::sealed::RegSpec for Mrccpt_SPEC {
5850    type DataType = u32;
5851}
5852#[doc = "MsyncCNT Counter Capture Register"]
5853pub type Mrccpt = crate::RegValueT<Mrccpt_SPEC>;
5854
5855impl NoBitfieldReg<Mrccpt_SPEC> for Mrccpt {}
5856impl ::core::default::Default for Mrccpt {
5857    #[inline(always)]
5858    fn default() -> Mrccpt {
5859        <crate::RegValueT<Mrccpt_SPEC> as RegisterValue<_>>::new(0)
5860    }
5861}
5862
5863#[doc(hidden)]
5864#[derive(Copy, Clone, Eq, PartialEq)]
5865pub struct Datbas_SPEC;
5866impl crate::sealed::RegSpec for Datbas_SPEC {
5867    type DataType = u32;
5868}
5869#[doc = "Device Address Table Basic Register %s"]
5870pub type Datbas = crate::RegValueT<Datbas_SPEC>;
5871
5872impl Datbas {
5873    #[doc = "Device Static Address"]
5874    #[inline(always)]
5875    pub fn dvstad(
5876        self,
5877    ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, Datbas_SPEC, crate::common::RW> {
5878        crate::common::RegisterField::<0,0x7f,1,0,u8, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5879    }
5880    #[doc = "Device IBI Payload"]
5881    #[inline(always)]
5882    pub fn dvibipl(
5883        self,
5884    ) -> crate::common::RegisterField<12, 0x1, 1, 0, datbas::Dvibipl, Datbas_SPEC, crate::common::RW>
5885    {
5886        crate::common::RegisterField::<12,0x1,1,0,datbas::Dvibipl, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5887    }
5888    #[doc = "Device In-Band Slave Interrupt Request Reject"]
5889    #[inline(always)]
5890    pub fn dvsirrj(
5891        self,
5892    ) -> crate::common::RegisterField<13, 0x1, 1, 0, datbas::Dvsirrj, Datbas_SPEC, crate::common::RW>
5893    {
5894        crate::common::RegisterField::<13,0x1,1,0,datbas::Dvsirrj, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5895    }
5896    #[doc = "Device In-Band Master Request Reject"]
5897    #[inline(always)]
5898    pub fn dvmrrj(
5899        self,
5900    ) -> crate::common::RegisterField<14, 0x1, 1, 0, datbas::Dvmrrj, Datbas_SPEC, crate::common::RW>
5901    {
5902        crate::common::RegisterField::<14,0x1,1,0,datbas::Dvmrrj, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5903    }
5904    #[doc = "Device IBI Time-stamp"]
5905    #[inline(always)]
5906    pub fn dvibits(
5907        self,
5908    ) -> crate::common::RegisterField<15, 0x1, 1, 0, datbas::Dvibits, Datbas_SPEC, crate::common::RW>
5909    {
5910        crate::common::RegisterField::<15,0x1,1,0,datbas::Dvibits, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5911    }
5912    #[doc = "Device I3C Dynamic Address"]
5913    #[inline(always)]
5914    pub fn dvdyad(
5915        self,
5916    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Datbas_SPEC, crate::common::RW> {
5917        crate::common::RegisterField::<16,0xff,1,0,u8, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5918    }
5919    #[doc = "Device NACK Retry Count"]
5920    #[inline(always)]
5921    pub fn dvnack(
5922        self,
5923    ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, Datbas_SPEC, crate::common::RW> {
5924        crate::common::RegisterField::<29,0x3,1,0,u8, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5925    }
5926    #[doc = "Device Type"]
5927    #[inline(always)]
5928    pub fn dvtyp(
5929        self,
5930    ) -> crate::common::RegisterField<31, 0x1, 1, 0, datbas::Dvtyp, Datbas_SPEC, crate::common::RW>
5931    {
5932        crate::common::RegisterField::<31,0x1,1,0,datbas::Dvtyp, Datbas_SPEC,crate::common::RW>::from_register(self,0)
5933    }
5934}
5935impl ::core::default::Default for Datbas {
5936    #[inline(always)]
5937    fn default() -> Datbas {
5938        <crate::RegValueT<Datbas_SPEC> as RegisterValue<_>>::new(0)
5939    }
5940}
5941pub mod datbas {
5942
5943    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5944    pub struct Dvibipl_SPEC;
5945    pub type Dvibipl = crate::EnumBitfieldStruct<u8, Dvibipl_SPEC>;
5946    impl Dvibipl {
5947        #[doc = "IBIs from this Device do not carry a Data Payload."]
5948        pub const _0: Self = Self::new(0);
5949        #[doc = "IBIs from this Device do carry a Data Payload."]
5950        pub const _1: Self = Self::new(1);
5951    }
5952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5953    pub struct Dvsirrj_SPEC;
5954    pub type Dvsirrj = crate::EnumBitfieldStruct<u8, Dvsirrj_SPEC>;
5955    impl Dvsirrj {
5956        #[doc = "This Device shall ACK the SIR."]
5957        pub const _0: Self = Self::new(0);
5958        #[doc = "This Device shall NACK the SIR and send the auto-disable CCC."]
5959        pub const _1: Self = Self::new(1);
5960    }
5961    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5962    pub struct Dvmrrj_SPEC;
5963    pub type Dvmrrj = crate::EnumBitfieldStruct<u8, Dvmrrj_SPEC>;
5964    impl Dvmrrj {
5965        #[doc = "This Device shall ACK Master Requests."]
5966        pub const _0: Self = Self::new(0);
5967        #[doc = "This Device shall NACK Master Requests and send the auto-disable command."]
5968        pub const _1: Self = Self::new(1);
5969    }
5970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5971    pub struct Dvibits_SPEC;
5972    pub type Dvibits = crate::EnumBitfieldStruct<u8, Dvibits_SPEC>;
5973    impl Dvibits {
5974        #[doc = "The Master shall not time-stamp IBIs from this Device with Master Time-stamps."]
5975        pub const _0: Self = Self::new(0);
5976        #[doc = "The Master shall time-stamp IBIs for this Device with Master Time-stamps."]
5977        pub const _1: Self = Self::new(1);
5978    }
5979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5980    pub struct Dvtyp_SPEC;
5981    pub type Dvtyp = crate::EnumBitfieldStruct<u8, Dvtyp_SPEC>;
5982    impl Dvtyp {
5983        #[doc = "I3C Device"]
5984        pub const _0: Self = Self::new(0);
5985        #[doc = "I2C Device"]
5986        pub const _1: Self = Self::new(1);
5987    }
5988}
5989#[doc(hidden)]
5990#[derive(Copy, Clone, Eq, PartialEq)]
5991pub struct Exdatbas_SPEC;
5992impl crate::sealed::RegSpec for Exdatbas_SPEC {
5993    type DataType = u32;
5994}
5995#[doc = "Extended Device Address Table Basic Register"]
5996pub type Exdatbas = crate::RegValueT<Exdatbas_SPEC>;
5997
5998impl Exdatbas {
5999    #[doc = "Extended Device Static Address"]
6000    #[inline(always)]
6001    pub fn edstad(
6002        self,
6003    ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, Exdatbas_SPEC, crate::common::RW> {
6004        crate::common::RegisterField::<0,0x7f,1,0,u8, Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
6005    }
6006    #[doc = "Extended Device I3C Dynamic Address"]
6007    #[inline(always)]
6008    pub fn eddyad(
6009        self,
6010    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Exdatbas_SPEC, crate::common::RW> {
6011        crate::common::RegisterField::<16,0xff,1,0,u8, Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
6012    }
6013    #[doc = "Extended Device NACK Retry Count"]
6014    #[inline(always)]
6015    pub fn ednack(
6016        self,
6017    ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, Exdatbas_SPEC, crate::common::RW> {
6018        crate::common::RegisterField::<29,0x3,1,0,u8, Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
6019    }
6020    #[doc = "Extended Device Type"]
6021    #[inline(always)]
6022    pub fn edtyp(
6023        self,
6024    ) -> crate::common::RegisterField<
6025        31,
6026        0x1,
6027        1,
6028        0,
6029        exdatbas::Edtyp,
6030        Exdatbas_SPEC,
6031        crate::common::RW,
6032    > {
6033        crate::common::RegisterField::<
6034            31,
6035            0x1,
6036            1,
6037            0,
6038            exdatbas::Edtyp,
6039            Exdatbas_SPEC,
6040            crate::common::RW,
6041        >::from_register(self, 0)
6042    }
6043}
6044impl ::core::default::Default for Exdatbas {
6045    #[inline(always)]
6046    fn default() -> Exdatbas {
6047        <crate::RegValueT<Exdatbas_SPEC> as RegisterValue<_>>::new(0)
6048    }
6049}
6050pub mod exdatbas {
6051
6052    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6053    pub struct Edtyp_SPEC;
6054    pub type Edtyp = crate::EnumBitfieldStruct<u8, Edtyp_SPEC>;
6055    impl Edtyp {
6056        #[doc = "I3C Device"]
6057        pub const _0: Self = Self::new(0);
6058        #[doc = "I2C Device"]
6059        pub const _1: Self = Self::new(1);
6060    }
6061}
6062#[doc(hidden)]
6063#[derive(Copy, Clone, Eq, PartialEq)]
6064pub struct Sdatbas0_SPEC;
6065impl crate::sealed::RegSpec for Sdatbas0_SPEC {
6066    type DataType = u32;
6067}
6068#[doc = "Slave Device Address Table Basic Register 0"]
6069pub type Sdatbas0 = crate::RegValueT<Sdatbas0_SPEC>;
6070
6071impl Sdatbas0 {
6072    #[doc = "Slave Device Static Address"]
6073    #[inline(always)]
6074    pub fn sdstad(
6075        self,
6076    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, Sdatbas0_SPEC, crate::common::RW> {
6077        crate::common::RegisterField::<0,0x3ff,1,0,u16, Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
6078    }
6079    #[doc = "Slave Device Address Length Selection"]
6080    #[inline(always)]
6081    pub fn sdadls(
6082        self,
6083    ) -> crate::common::RegisterField<
6084        10,
6085        0x1,
6086        1,
6087        0,
6088        sdatbas0::Sdadls,
6089        Sdatbas0_SPEC,
6090        crate::common::RW,
6091    > {
6092        crate::common::RegisterField::<
6093            10,
6094            0x1,
6095            1,
6096            0,
6097            sdatbas0::Sdadls,
6098            Sdatbas0_SPEC,
6099            crate::common::RW,
6100        >::from_register(self, 0)
6101    }
6102    #[doc = "Slave Device IBI Payload"]
6103    #[inline(always)]
6104    pub fn sdibipl(
6105        self,
6106    ) -> crate::common::RegisterField<
6107        12,
6108        0x1,
6109        1,
6110        0,
6111        sdatbas0::Sdibipl,
6112        Sdatbas0_SPEC,
6113        crate::common::RW,
6114    > {
6115        crate::common::RegisterField::<
6116            12,
6117            0x1,
6118            1,
6119            0,
6120            sdatbas0::Sdibipl,
6121            Sdatbas0_SPEC,
6122            crate::common::RW,
6123        >::from_register(self, 0)
6124    }
6125    #[doc = "Slave Device I3C Dynamic Address"]
6126    #[inline(always)]
6127    pub fn sddyad(
6128        self,
6129    ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, Sdatbas0_SPEC, crate::common::RW> {
6130        crate::common::RegisterField::<16,0x7f,1,0,u8, Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
6131    }
6132}
6133impl ::core::default::Default for Sdatbas0 {
6134    #[inline(always)]
6135    fn default() -> Sdatbas0 {
6136        <crate::RegValueT<Sdatbas0_SPEC> as RegisterValue<_>>::new(0)
6137    }
6138}
6139pub mod sdatbas0 {
6140
6141    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6142    pub struct Sdadls_SPEC;
6143    pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
6144    impl Sdadls {
6145        #[doc = "Slave device address length 7 bits selected."]
6146        pub const _0: Self = Self::new(0);
6147        #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
6148        pub const _1: Self = Self::new(1);
6149    }
6150    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6151    pub struct Sdibipl_SPEC;
6152    pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
6153    impl Sdibipl {
6154        #[doc = "IBIs from this device do not carry a data payload."]
6155        pub const _0: Self = Self::new(0);
6156        #[doc = "IBIs from this device carry a data payload."]
6157        pub const _1: Self = Self::new(1);
6158    }
6159}
6160#[doc(hidden)]
6161#[derive(Copy, Clone, Eq, PartialEq)]
6162pub struct Sdatbas1_SPEC;
6163impl crate::sealed::RegSpec for Sdatbas1_SPEC {
6164    type DataType = u32;
6165}
6166#[doc = "Slave Device Address Table Basic Register 1"]
6167pub type Sdatbas1 = crate::RegValueT<Sdatbas1_SPEC>;
6168
6169impl Sdatbas1 {
6170    #[doc = "Slave Device Static Address"]
6171    #[inline(always)]
6172    pub fn sdstad(
6173        self,
6174    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, Sdatbas1_SPEC, crate::common::RW> {
6175        crate::common::RegisterField::<0,0x3ff,1,0,u16, Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
6176    }
6177    #[doc = "Slave Device Address Length Selection"]
6178    #[inline(always)]
6179    pub fn sdadls(
6180        self,
6181    ) -> crate::common::RegisterField<
6182        10,
6183        0x1,
6184        1,
6185        0,
6186        sdatbas1::Sdadls,
6187        Sdatbas1_SPEC,
6188        crate::common::RW,
6189    > {
6190        crate::common::RegisterField::<
6191            10,
6192            0x1,
6193            1,
6194            0,
6195            sdatbas1::Sdadls,
6196            Sdatbas1_SPEC,
6197            crate::common::RW,
6198        >::from_register(self, 0)
6199    }
6200    #[doc = "Slave Device IBI Payload"]
6201    #[inline(always)]
6202    pub fn sdibipl(
6203        self,
6204    ) -> crate::common::RegisterField<
6205        12,
6206        0x1,
6207        1,
6208        0,
6209        sdatbas1::Sdibipl,
6210        Sdatbas1_SPEC,
6211        crate::common::RW,
6212    > {
6213        crate::common::RegisterField::<
6214            12,
6215            0x1,
6216            1,
6217            0,
6218            sdatbas1::Sdibipl,
6219            Sdatbas1_SPEC,
6220            crate::common::RW,
6221        >::from_register(self, 0)
6222    }
6223    #[doc = "Slave Device I3C Dynamic Address"]
6224    #[inline(always)]
6225    pub fn sddyad(
6226        self,
6227    ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, Sdatbas1_SPEC, crate::common::RW> {
6228        crate::common::RegisterField::<16,0x7f,1,0,u8, Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
6229    }
6230}
6231impl ::core::default::Default for Sdatbas1 {
6232    #[inline(always)]
6233    fn default() -> Sdatbas1 {
6234        <crate::RegValueT<Sdatbas1_SPEC> as RegisterValue<_>>::new(0)
6235    }
6236}
6237pub mod sdatbas1 {
6238
6239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6240    pub struct Sdadls_SPEC;
6241    pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
6242    impl Sdadls {
6243        #[doc = "Slave device address length 7 bits selected."]
6244        pub const _0: Self = Self::new(0);
6245        #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
6246        pub const _1: Self = Self::new(1);
6247    }
6248    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6249    pub struct Sdibipl_SPEC;
6250    pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
6251    impl Sdibipl {
6252        #[doc = "IBIs from this device do not carry a data payload."]
6253        pub const _0: Self = Self::new(0);
6254        #[doc = "IBIs from this device carry a data payload."]
6255        pub const _1: Self = Self::new(1);
6256    }
6257}
6258#[doc(hidden)]
6259#[derive(Copy, Clone, Eq, PartialEq)]
6260pub struct Sdatbas2_SPEC;
6261impl crate::sealed::RegSpec for Sdatbas2_SPEC {
6262    type DataType = u32;
6263}
6264#[doc = "Slave Device Address Table Basic Register 2"]
6265pub type Sdatbas2 = crate::RegValueT<Sdatbas2_SPEC>;
6266
6267impl Sdatbas2 {
6268    #[doc = "Slave Device Static Address"]
6269    #[inline(always)]
6270    pub fn sdstad(
6271        self,
6272    ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, Sdatbas2_SPEC, crate::common::RW> {
6273        crate::common::RegisterField::<0,0x3ff,1,0,u16, Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
6274    }
6275    #[doc = "Slave Device Address Length Selection"]
6276    #[inline(always)]
6277    pub fn sdadls(
6278        self,
6279    ) -> crate::common::RegisterField<
6280        10,
6281        0x1,
6282        1,
6283        0,
6284        sdatbas2::Sdadls,
6285        Sdatbas2_SPEC,
6286        crate::common::RW,
6287    > {
6288        crate::common::RegisterField::<
6289            10,
6290            0x1,
6291            1,
6292            0,
6293            sdatbas2::Sdadls,
6294            Sdatbas2_SPEC,
6295            crate::common::RW,
6296        >::from_register(self, 0)
6297    }
6298    #[doc = "Slave Device IBI Payload"]
6299    #[inline(always)]
6300    pub fn sdibipl(
6301        self,
6302    ) -> crate::common::RegisterField<
6303        12,
6304        0x1,
6305        1,
6306        0,
6307        sdatbas2::Sdibipl,
6308        Sdatbas2_SPEC,
6309        crate::common::RW,
6310    > {
6311        crate::common::RegisterField::<
6312            12,
6313            0x1,
6314            1,
6315            0,
6316            sdatbas2::Sdibipl,
6317            Sdatbas2_SPEC,
6318            crate::common::RW,
6319        >::from_register(self, 0)
6320    }
6321    #[doc = "Slave Device I3C Dynamic Address"]
6322    #[inline(always)]
6323    pub fn sddyad(
6324        self,
6325    ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, Sdatbas2_SPEC, crate::common::RW> {
6326        crate::common::RegisterField::<16,0x7f,1,0,u8, Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
6327    }
6328}
6329impl ::core::default::Default for Sdatbas2 {
6330    #[inline(always)]
6331    fn default() -> Sdatbas2 {
6332        <crate::RegValueT<Sdatbas2_SPEC> as RegisterValue<_>>::new(0)
6333    }
6334}
6335pub mod sdatbas2 {
6336
6337    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6338    pub struct Sdadls_SPEC;
6339    pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
6340    impl Sdadls {
6341        #[doc = "Slave device address length 7 bits selected."]
6342        pub const _0: Self = Self::new(0);
6343        #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
6344        pub const _1: Self = Self::new(1);
6345    }
6346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6347    pub struct Sdibipl_SPEC;
6348    pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
6349    impl Sdibipl {
6350        #[doc = "IBIs from this device do not carry a data payload."]
6351        pub const _0: Self = Self::new(0);
6352        #[doc = "IBIs from this device carry a data payload."]
6353        pub const _1: Self = Self::new(1);
6354    }
6355}
6356#[doc(hidden)]
6357#[derive(Copy, Clone, Eq, PartialEq)]
6358pub struct Msdct_SPEC;
6359impl crate::sealed::RegSpec for Msdct_SPEC {
6360    type DataType = u32;
6361}
6362#[doc = "Master Device Characteristic Table Register %s"]
6363pub type Msdct = crate::RegValueT<Msdct_SPEC>;
6364
6365impl Msdct {
6366    #[doc = "Max Data Speed Limitation"]
6367    #[inline(always)]
6368    pub fn rbcr0(
6369        self,
6370    ) -> crate::common::RegisterField<8, 0x1, 1, 0, msdct::Rbcr0, Msdct_SPEC, crate::common::RW>
6371    {
6372        crate::common::RegisterField::<8,0x1,1,0,msdct::Rbcr0, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6373    }
6374    #[doc = "IBI Request Capable"]
6375    #[inline(always)]
6376    pub fn rbcr1(
6377        self,
6378    ) -> crate::common::RegisterField<9, 0x1, 1, 0, msdct::Rbcr1, Msdct_SPEC, crate::common::RW>
6379    {
6380        crate::common::RegisterField::<9,0x1,1,0,msdct::Rbcr1, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6381    }
6382    #[doc = "IBI Payload"]
6383    #[inline(always)]
6384    pub fn rbcr2(
6385        self,
6386    ) -> crate::common::RegisterField<10, 0x1, 1, 0, msdct::Rbcr2, Msdct_SPEC, crate::common::RW>
6387    {
6388        crate::common::RegisterField::<10,0x1,1,0,msdct::Rbcr2, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6389    }
6390    #[doc = "Offline Capable"]
6391    #[inline(always)]
6392    pub fn rbcr3(
6393        self,
6394    ) -> crate::common::RegisterField<11, 0x1, 1, 0, msdct::Rbcr3, Msdct_SPEC, crate::common::RW>
6395    {
6396        crate::common::RegisterField::<11,0x1,1,0,msdct::Rbcr3, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6397    }
6398    #[doc = "Bridge Identifier"]
6399    #[inline(always)]
6400    pub fn rbcr4(
6401        self,
6402    ) -> crate::common::RegisterField<12, 0x1, 1, 0, msdct::Rbcr4, Msdct_SPEC, crate::common::RW>
6403    {
6404        crate::common::RegisterField::<12,0x1,1,0,msdct::Rbcr4, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6405    }
6406    #[doc = "Device Role"]
6407    #[inline(always)]
6408    pub fn rbcr76(
6409        self,
6410    ) -> crate::common::RegisterField<14, 0x3, 1, 0, msdct::Rbcr76, Msdct_SPEC, crate::common::RW>
6411    {
6412        crate::common::RegisterField::<14,0x3,1,0,msdct::Rbcr76, Msdct_SPEC,crate::common::RW>::from_register(self,0)
6413    }
6414}
6415impl ::core::default::Default for Msdct {
6416    #[inline(always)]
6417    fn default() -> Msdct {
6418        <crate::RegValueT<Msdct_SPEC> as RegisterValue<_>>::new(0)
6419    }
6420}
6421pub mod msdct {
6422
6423    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6424    pub struct Rbcr0_SPEC;
6425    pub type Rbcr0 = crate::EnumBitfieldStruct<u8, Rbcr0_SPEC>;
6426    impl Rbcr0 {
6427        #[doc = "No Limitation"]
6428        pub const _0: Self = Self::new(0);
6429        #[doc = "Limitation"]
6430        pub const _1: Self = Self::new(1);
6431    }
6432    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6433    pub struct Rbcr1_SPEC;
6434    pub type Rbcr1 = crate::EnumBitfieldStruct<u8, Rbcr1_SPEC>;
6435    impl Rbcr1 {
6436        #[doc = "Not Capable"]
6437        pub const _0: Self = Self::new(0);
6438        #[doc = "Capable"]
6439        pub const _1: Self = Self::new(1);
6440    }
6441    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6442    pub struct Rbcr2_SPEC;
6443    pub type Rbcr2 = crate::EnumBitfieldStruct<u8, Rbcr2_SPEC>;
6444    impl Rbcr2 {
6445        #[doc = "No data byte follows the accepted IBI."]
6446        pub const _0: Self = Self::new(0);
6447        #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
6448        pub const _1: Self = Self::new(1);
6449    }
6450    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6451    pub struct Rbcr3_SPEC;
6452    pub type Rbcr3 = crate::EnumBitfieldStruct<u8, Rbcr3_SPEC>;
6453    impl Rbcr3 {
6454        #[doc = "Device will always respond to I3C bus commands."]
6455        pub const _0: Self = Self::new(0);
6456        #[doc = "Device will not always respond to I3C bus commands."]
6457        pub const _1: Self = Self::new(1);
6458    }
6459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6460    pub struct Rbcr4_SPEC;
6461    pub type Rbcr4 = crate::EnumBitfieldStruct<u8, Rbcr4_SPEC>;
6462    impl Rbcr4 {
6463        #[doc = "Not a Bridge Device"]
6464        pub const _0: Self = Self::new(0);
6465        #[doc = "A Bridge Device"]
6466        pub const _1: Self = Self::new(1);
6467    }
6468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6469    pub struct Rbcr76_SPEC;
6470    pub type Rbcr76 = crate::EnumBitfieldStruct<u8, Rbcr76_SPEC>;
6471    impl Rbcr76 {
6472        #[doc = "I3C Slave"]
6473        pub const _00: Self = Self::new(0);
6474        #[doc = "I3C Master"]
6475        pub const _01: Self = Self::new(1);
6476        #[doc = "Setting prohibited"]
6477        pub const OTHERS: Self = Self::new(0);
6478    }
6479}
6480#[doc(hidden)]
6481#[derive(Copy, Clone, Eq, PartialEq)]
6482pub struct Svdct_SPEC;
6483impl crate::sealed::RegSpec for Svdct_SPEC {
6484    type DataType = u32;
6485}
6486#[doc = "Slave Device Characteristic Table Register"]
6487pub type Svdct = crate::RegValueT<Svdct_SPEC>;
6488
6489impl Svdct {
6490    #[doc = "Transfar Device Characteristic Register"]
6491    #[inline(always)]
6492    pub fn tdcr(
6493        self,
6494    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Svdct_SPEC, crate::common::RW> {
6495        crate::common::RegisterField::<0,0xff,1,0,u8, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6496    }
6497    #[doc = "Max Data Speed Limitation"]
6498    #[inline(always)]
6499    pub fn tbcr0(
6500        self,
6501    ) -> crate::common::RegisterField<8, 0x1, 1, 0, svdct::Tbcr0, Svdct_SPEC, crate::common::RW>
6502    {
6503        crate::common::RegisterField::<8,0x1,1,0,svdct::Tbcr0, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6504    }
6505    #[doc = "IBI Request Capable"]
6506    #[inline(always)]
6507    pub fn tbcr1(
6508        self,
6509    ) -> crate::common::RegisterField<9, 0x1, 1, 0, svdct::Tbcr1, Svdct_SPEC, crate::common::RW>
6510    {
6511        crate::common::RegisterField::<9,0x1,1,0,svdct::Tbcr1, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6512    }
6513    #[doc = "IBI Payload"]
6514    #[inline(always)]
6515    pub fn tbcr2(
6516        self,
6517    ) -> crate::common::RegisterField<10, 0x1, 1, 0, svdct::Tbcr2, Svdct_SPEC, crate::common::RW>
6518    {
6519        crate::common::RegisterField::<10,0x1,1,0,svdct::Tbcr2, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6520    }
6521    #[doc = "Offline Capable"]
6522    #[inline(always)]
6523    pub fn tbcr3(
6524        self,
6525    ) -> crate::common::RegisterField<11, 0x1, 1, 0, svdct::Tbcr3, Svdct_SPEC, crate::common::RW>
6526    {
6527        crate::common::RegisterField::<11,0x1,1,0,svdct::Tbcr3, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6528    }
6529    #[doc = "Bridge Identifier"]
6530    #[inline(always)]
6531    pub fn tbcr4(
6532        self,
6533    ) -> crate::common::RegisterField<12, 0x1, 1, 0, svdct::Tbcr4, Svdct_SPEC, crate::common::RW>
6534    {
6535        crate::common::RegisterField::<12,0x1,1,0,svdct::Tbcr4, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6536    }
6537    #[doc = "Device Role"]
6538    #[inline(always)]
6539    pub fn tbcr76(
6540        self,
6541    ) -> crate::common::RegisterField<14, 0x3, 1, 0, svdct::Tbcr76, Svdct_SPEC, crate::common::RW>
6542    {
6543        crate::common::RegisterField::<14,0x3,1,0,svdct::Tbcr76, Svdct_SPEC,crate::common::RW>::from_register(self,0)
6544    }
6545}
6546impl ::core::default::Default for Svdct {
6547    #[inline(always)]
6548    fn default() -> Svdct {
6549        <crate::RegValueT<Svdct_SPEC> as RegisterValue<_>>::new(0)
6550    }
6551}
6552pub mod svdct {
6553
6554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6555    pub struct Tbcr0_SPEC;
6556    pub type Tbcr0 = crate::EnumBitfieldStruct<u8, Tbcr0_SPEC>;
6557    impl Tbcr0 {
6558        #[doc = "No Limitation"]
6559        pub const _0: Self = Self::new(0);
6560        #[doc = "Limitation"]
6561        pub const _1: Self = Self::new(1);
6562    }
6563    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6564    pub struct Tbcr1_SPEC;
6565    pub type Tbcr1 = crate::EnumBitfieldStruct<u8, Tbcr1_SPEC>;
6566    impl Tbcr1 {
6567        #[doc = "Not Capable"]
6568        pub const _0: Self = Self::new(0);
6569        #[doc = "Capable"]
6570        pub const _1: Self = Self::new(1);
6571    }
6572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6573    pub struct Tbcr2_SPEC;
6574    pub type Tbcr2 = crate::EnumBitfieldStruct<u8, Tbcr2_SPEC>;
6575    impl Tbcr2 {
6576        #[doc = "No data byte follows the accepted IBI."]
6577        pub const _0: Self = Self::new(0);
6578        #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
6579        pub const _1: Self = Self::new(1);
6580    }
6581    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6582    pub struct Tbcr3_SPEC;
6583    pub type Tbcr3 = crate::EnumBitfieldStruct<u8, Tbcr3_SPEC>;
6584    impl Tbcr3 {
6585        #[doc = "Device will always respond to I3C bus commands."]
6586        pub const _0: Self = Self::new(0);
6587        #[doc = "Device will not always respond to I3C bus commands."]
6588        pub const _1: Self = Self::new(1);
6589    }
6590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6591    pub struct Tbcr4_SPEC;
6592    pub type Tbcr4 = crate::EnumBitfieldStruct<u8, Tbcr4_SPEC>;
6593    impl Tbcr4 {
6594        #[doc = "Not a Bridge Device"]
6595        pub const _0: Self = Self::new(0);
6596        #[doc = "A Bridge Device"]
6597        pub const _1: Self = Self::new(1);
6598    }
6599    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6600    pub struct Tbcr76_SPEC;
6601    pub type Tbcr76 = crate::EnumBitfieldStruct<u8, Tbcr76_SPEC>;
6602    impl Tbcr76 {
6603        #[doc = "I3C Slave"]
6604        pub const _00: Self = Self::new(0);
6605        #[doc = "I3C Master"]
6606        pub const _01: Self = Self::new(1);
6607        #[doc = "Setting prohibited"]
6608        pub const OTHERS: Self = Self::new(0);
6609    }
6610}
6611#[doc(hidden)]
6612#[derive(Copy, Clone, Eq, PartialEq)]
6613pub struct Sdctpidl_SPEC;
6614impl crate::sealed::RegSpec for Sdctpidl_SPEC {
6615    type DataType = u32;
6616}
6617#[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
6618pub type Sdctpidl = crate::RegValueT<Sdctpidl_SPEC>;
6619
6620impl NoBitfieldReg<Sdctpidl_SPEC> for Sdctpidl {}
6621impl ::core::default::Default for Sdctpidl {
6622    #[inline(always)]
6623    fn default() -> Sdctpidl {
6624        <crate::RegValueT<Sdctpidl_SPEC> as RegisterValue<_>>::new(0)
6625    }
6626}
6627
6628#[doc(hidden)]
6629#[derive(Copy, Clone, Eq, PartialEq)]
6630pub struct Sdctpidh_SPEC;
6631impl crate::sealed::RegSpec for Sdctpidh_SPEC {
6632    type DataType = u32;
6633}
6634#[doc = "Slave Device Characteristic Table Provisional ID High Register"]
6635pub type Sdctpidh = crate::RegValueT<Sdctpidh_SPEC>;
6636
6637impl NoBitfieldReg<Sdctpidh_SPEC> for Sdctpidh {}
6638impl ::core::default::Default for Sdctpidh {
6639    #[inline(always)]
6640    fn default() -> Sdctpidh {
6641        <crate::RegValueT<Sdctpidh_SPEC> as RegisterValue<_>>::new(0)
6642    }
6643}
6644
6645#[doc(hidden)]
6646#[derive(Copy, Clone, Eq, PartialEq)]
6647pub struct Svdvad_SPEC;
6648impl crate::sealed::RegSpec for Svdvad_SPEC {
6649    type DataType = u32;
6650}
6651#[doc = "Slave Device Address Register %s"]
6652pub type Svdvad = crate::RegValueT<Svdvad_SPEC>;
6653
6654impl Svdvad {
6655    #[doc = "Slave Address"]
6656    #[inline(always)]
6657    pub fn svad(
6658        self,
6659    ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, Svdvad_SPEC, crate::common::R> {
6660        crate::common::RegisterField::<16,0x3ff,1,0,u16, Svdvad_SPEC,crate::common::R>::from_register(self,0)
6661    }
6662    #[doc = "Slave Address Length"]
6663    #[inline(always)]
6664    pub fn sadlg(
6665        self,
6666    ) -> crate::common::RegisterField<27, 0x1, 1, 0, svdvad::Sadlg, Svdvad_SPEC, crate::common::R>
6667    {
6668        crate::common::RegisterField::<27,0x1,1,0,svdvad::Sadlg, Svdvad_SPEC,crate::common::R>::from_register(self,0)
6669    }
6670    #[doc = "Slave Static Address Valid"]
6671    #[inline(always)]
6672    pub fn sstadv(
6673        self,
6674    ) -> crate::common::RegisterField<30, 0x1, 1, 0, svdvad::Sstadv, Svdvad_SPEC, crate::common::R>
6675    {
6676        crate::common::RegisterField::<30,0x1,1,0,svdvad::Sstadv, Svdvad_SPEC,crate::common::R>::from_register(self,0)
6677    }
6678    #[doc = "Slave Dynamic Address Valid"]
6679    #[inline(always)]
6680    pub fn sdyadv(
6681        self,
6682    ) -> crate::common::RegisterField<31, 0x1, 1, 0, svdvad::Sdyadv, Svdvad_SPEC, crate::common::R>
6683    {
6684        crate::common::RegisterField::<31,0x1,1,0,svdvad::Sdyadv, Svdvad_SPEC,crate::common::R>::from_register(self,0)
6685    }
6686}
6687impl ::core::default::Default for Svdvad {
6688    #[inline(always)]
6689    fn default() -> Svdvad {
6690        <crate::RegValueT<Svdvad_SPEC> as RegisterValue<_>>::new(0)
6691    }
6692}
6693pub mod svdvad {
6694
6695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6696    pub struct Sadlg_SPEC;
6697    pub type Sadlg = crate::EnumBitfieldStruct<u8, Sadlg_SPEC>;
6698    impl Sadlg {
6699        #[doc = "The 7-bit address format is selected."]
6700        pub const _0: Self = Self::new(0);
6701        #[doc = "The 10-bit address format is selected."]
6702        pub const _1: Self = Self::new(1);
6703    }
6704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6705    pub struct Sstadv_SPEC;
6706    pub type Sstadv = crate::EnumBitfieldStruct<u8, Sstadv_SPEC>;
6707    impl Sstadv {
6708        #[doc = "Slave address is disabled."]
6709        pub const _0: Self = Self::new(0);
6710        #[doc = "Slave address is enabled."]
6711        pub const _1: Self = Self::new(1);
6712    }
6713    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6714    pub struct Sdyadv_SPEC;
6715    pub type Sdyadv = crate::EnumBitfieldStruct<u8, Sdyadv_SPEC>;
6716    impl Sdyadv {
6717        #[doc = "Dynamic Address is disabled."]
6718        pub const _0: Self = Self::new(0);
6719        #[doc = "Dynamic Address is enabled."]
6720        pub const _1: Self = Self::new(1);
6721    }
6722}
6723#[doc(hidden)]
6724#[derive(Copy, Clone, Eq, PartialEq)]
6725pub struct Csecmd_SPEC;
6726impl crate::sealed::RegSpec for Csecmd_SPEC {
6727    type DataType = u32;
6728}
6729#[doc = "CCC Slave Events Command Register"]
6730pub type Csecmd = crate::RegValueT<Csecmd_SPEC>;
6731
6732impl Csecmd {
6733    #[doc = "Slave Interrupt Requests Enable"]
6734    #[inline(always)]
6735    pub fn svirqe(
6736        self,
6737    ) -> crate::common::RegisterField<0, 0x1, 1, 0, csecmd::Svirqe, Csecmd_SPEC, crate::common::RW>
6738    {
6739        crate::common::RegisterField::<0,0x1,1,0,csecmd::Svirqe, Csecmd_SPEC,crate::common::RW>::from_register(self,0)
6740    }
6741    #[doc = "Mastership Requests Enable"]
6742    #[inline(always)]
6743    pub fn msrqe(
6744        self,
6745    ) -> crate::common::RegisterField<1, 0x1, 1, 0, csecmd::Msrqe, Csecmd_SPEC, crate::common::RW>
6746    {
6747        crate::common::RegisterField::<1,0x1,1,0,csecmd::Msrqe, Csecmd_SPEC,crate::common::RW>::from_register(self,0)
6748    }
6749}
6750impl ::core::default::Default for Csecmd {
6751    #[inline(always)]
6752    fn default() -> Csecmd {
6753        <crate::RegValueT<Csecmd_SPEC> as RegisterValue<_>>::new(0)
6754    }
6755}
6756pub mod csecmd {
6757
6758    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6759    pub struct Svirqe_SPEC;
6760    pub type Svirqe = crate::EnumBitfieldStruct<u8, Svirqe_SPEC>;
6761    impl Svirqe {
6762        #[doc = "DISABLED: Slave-initiated Interrupts is Disabled by the Master to control."]
6763        pub const _0: Self = Self::new(0);
6764        #[doc = "ENABLED: Slave-initiated Interrupts is Enabled by the Master to control."]
6765        pub const _1: Self = Self::new(1);
6766    }
6767    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6768    pub struct Msrqe_SPEC;
6769    pub type Msrqe = crate::EnumBitfieldStruct<u8, Msrqe_SPEC>;
6770    impl Msrqe {
6771        #[doc = "DISABLED: Mastership requests from Secondary Masters is Disabled by the Current Master to control."]
6772        pub const _0: Self = Self::new(0);
6773        #[doc = "ENABLED: Mastership requests from Secondary Masters is Enabled by the Current Master to control."]
6774        pub const _1: Self = Self::new(1);
6775    }
6776}
6777#[doc(hidden)]
6778#[derive(Copy, Clone, Eq, PartialEq)]
6779pub struct Ceactst_SPEC;
6780impl crate::sealed::RegSpec for Ceactst_SPEC {
6781    type DataType = u32;
6782}
6783#[doc = "CCC Enter Activity State Register"]
6784pub type Ceactst = crate::RegValueT<Ceactst_SPEC>;
6785
6786impl Ceactst {
6787    #[doc = "Activity State"]
6788    #[inline(always)]
6789    pub fn actst(
6790        self,
6791    ) -> crate::common::RegisterField<0, 0xf, 1, 0, ceactst::Actst, Ceactst_SPEC, crate::common::RW>
6792    {
6793        crate::common::RegisterField::<0,0xf,1,0,ceactst::Actst, Ceactst_SPEC,crate::common::RW>::from_register(self,0)
6794    }
6795}
6796impl ::core::default::Default for Ceactst {
6797    #[inline(always)]
6798    fn default() -> Ceactst {
6799        <crate::RegValueT<Ceactst_SPEC> as RegisterValue<_>>::new(0)
6800    }
6801}
6802pub mod ceactst {
6803
6804    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6805    pub struct Actst_SPEC;
6806    pub type Actst = crate::EnumBitfieldStruct<u8, Actst_SPEC>;
6807    impl Actst {
6808        #[doc = "ENTAS0 (1µs: Latency-free operation)"]
6809        pub const _0_X_1: Self = Self::new(1);
6810        #[doc = "ENTAS1 (100 µs)"]
6811        pub const _0_X_2: Self = Self::new(2);
6812        #[doc = "ENTAS2 (2 ms)"]
6813        pub const _0_X_4: Self = Self::new(4);
6814        #[doc = "ENTAS3 (50 ms: Lowest-activity operation)"]
6815        pub const _0_X_8: Self = Self::new(8);
6816        #[doc = "Setting prohibited"]
6817        pub const OTHERS: Self = Self::new(0);
6818    }
6819}
6820#[doc(hidden)]
6821#[derive(Copy, Clone, Eq, PartialEq)]
6822pub struct Cmwlg_SPEC;
6823impl crate::sealed::RegSpec for Cmwlg_SPEC {
6824    type DataType = u32;
6825}
6826#[doc = "CCC Max Write Length Register"]
6827pub type Cmwlg = crate::RegValueT<Cmwlg_SPEC>;
6828
6829impl Cmwlg {
6830    #[doc = "Max Write Length"]
6831    #[inline(always)]
6832    pub fn mwlg(
6833        self,
6834    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Cmwlg_SPEC, crate::common::RW> {
6835        crate::common::RegisterField::<0,0xffff,1,0,u16, Cmwlg_SPEC,crate::common::RW>::from_register(self,0)
6836    }
6837}
6838impl ::core::default::Default for Cmwlg {
6839    #[inline(always)]
6840    fn default() -> Cmwlg {
6841        <crate::RegValueT<Cmwlg_SPEC> as RegisterValue<_>>::new(0)
6842    }
6843}
6844
6845#[doc(hidden)]
6846#[derive(Copy, Clone, Eq, PartialEq)]
6847pub struct Cmrlg_SPEC;
6848impl crate::sealed::RegSpec for Cmrlg_SPEC {
6849    type DataType = u32;
6850}
6851#[doc = "CCC Max Read Length Register"]
6852pub type Cmrlg = crate::RegValueT<Cmrlg_SPEC>;
6853
6854impl Cmrlg {
6855    #[doc = "Max Read Length"]
6856    #[inline(always)]
6857    pub fn mrlg(
6858        self,
6859    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Cmrlg_SPEC, crate::common::RW> {
6860        crate::common::RegisterField::<0,0xffff,1,0,u16, Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
6861    }
6862    #[doc = "IBI Payload Size"]
6863    #[inline(always)]
6864    pub fn ibipsz(
6865        self,
6866    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Cmrlg_SPEC, crate::common::RW> {
6867        crate::common::RegisterField::<16,0xff,1,0,u8, Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
6868    }
6869}
6870impl ::core::default::Default for Cmrlg {
6871    #[inline(always)]
6872    fn default() -> Cmrlg {
6873        <crate::RegValueT<Cmrlg_SPEC> as RegisterValue<_>>::new(0)
6874    }
6875}
6876
6877#[doc(hidden)]
6878#[derive(Copy, Clone, Eq, PartialEq)]
6879pub struct Cetstmd_SPEC;
6880impl crate::sealed::RegSpec for Cetstmd_SPEC {
6881    type DataType = u32;
6882}
6883#[doc = "CCC Enter Test Mode Register"]
6884pub type Cetstmd = crate::RegValueT<Cetstmd_SPEC>;
6885
6886impl Cetstmd {
6887    #[doc = "Test Mode"]
6888    #[inline(always)]
6889    pub fn tstmd(
6890        self,
6891    ) -> crate::common::RegisterField<0, 0xff, 1, 0, cetstmd::Tstmd, Cetstmd_SPEC, crate::common::R>
6892    {
6893        crate::common::RegisterField::<0,0xff,1,0,cetstmd::Tstmd, Cetstmd_SPEC,crate::common::R>::from_register(self,0)
6894    }
6895}
6896impl ::core::default::Default for Cetstmd {
6897    #[inline(always)]
6898    fn default() -> Cetstmd {
6899        <crate::RegValueT<Cetstmd_SPEC> as RegisterValue<_>>::new(0)
6900    }
6901}
6902pub mod cetstmd {
6903
6904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6905    pub struct Tstmd_SPEC;
6906    pub type Tstmd = crate::EnumBitfieldStruct<u8, Tstmd_SPEC>;
6907    impl Tstmd {
6908        #[doc = "Exit Test Mode This value removes all I3C devices from Test Mode."]
6909        pub const _0_X_00: Self = Self::new(0);
6910        #[doc = "Vendor Test Mode This value indicates that I3C devices shall return a random 32bit value in the provisional ID during the Dynamic Address Assignment procedure."]
6911        pub const _0_X_01: Self = Self::new(1);
6912        #[doc = "Setting prohibited"]
6913        pub const OTHERS: Self = Self::new(0);
6914    }
6915}
6916#[doc(hidden)]
6917#[derive(Copy, Clone, Eq, PartialEq)]
6918pub struct Cgdvst_SPEC;
6919impl crate::sealed::RegSpec for Cgdvst_SPEC {
6920    type DataType = u32;
6921}
6922#[doc = "CCC Get Device Status Register"]
6923pub type Cgdvst = crate::RegValueT<Cgdvst_SPEC>;
6924
6925impl Cgdvst {
6926    #[doc = "Pending Interrupt"]
6927    #[inline(always)]
6928    pub fn pndint(
6929        self,
6930    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, Cgdvst_SPEC, crate::common::RW> {
6931        crate::common::RegisterField::<0,0xf,1,0,u8, Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
6932    }
6933    #[doc = "Protocol Error"]
6934    #[inline(always)]
6935    pub fn prte(
6936        self,
6937    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cgdvst::Prte, Cgdvst_SPEC, crate::common::RW>
6938    {
6939        crate::common::RegisterField::<5,0x1,1,0,cgdvst::Prte, Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
6940    }
6941    #[doc = "Slave Device’s current Activity Mode"]
6942    #[inline(always)]
6943    pub fn actmd(
6944        self,
6945    ) -> crate::common::RegisterField<6, 0x3, 1, 0, cgdvst::Actmd, Cgdvst_SPEC, crate::common::RW>
6946    {
6947        crate::common::RegisterField::<6,0x3,1,0,cgdvst::Actmd, Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
6948    }
6949    #[doc = "Vendor Reserved"]
6950    #[inline(always)]
6951    pub fn vdrsv(
6952        self,
6953    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Cgdvst_SPEC, crate::common::RW> {
6954        crate::common::RegisterField::<8,0xff,1,0,u8, Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
6955    }
6956}
6957impl ::core::default::Default for Cgdvst {
6958    #[inline(always)]
6959    fn default() -> Cgdvst {
6960        <crate::RegValueT<Cgdvst_SPEC> as RegisterValue<_>>::new(0)
6961    }
6962}
6963pub mod cgdvst {
6964
6965    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6966    pub struct Prte_SPEC;
6967    pub type Prte = crate::EnumBitfieldStruct<u8, Prte_SPEC>;
6968    impl Prte {
6969        #[doc = "The Slave has not detected a protocol error since the last Status read."]
6970        pub const _0: Self = Self::new(0);
6971        #[doc = "The Slave has detected a protocol error since the last Status read."]
6972        pub const _1: Self = Self::new(1);
6973    }
6974    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6975    pub struct Actmd_SPEC;
6976    pub type Actmd = crate::EnumBitfieldStruct<u8, Actmd_SPEC>;
6977    impl Actmd {
6978        #[doc = "Activity Mode 0"]
6979        pub const _00: Self = Self::new(0);
6980        #[doc = "Activity Mode 1"]
6981        pub const _01: Self = Self::new(1);
6982        #[doc = "Activity Mode 2"]
6983        pub const _10: Self = Self::new(2);
6984        #[doc = "Activity Mode 3"]
6985        pub const _11: Self = Self::new(3);
6986    }
6987}
6988#[doc(hidden)]
6989#[derive(Copy, Clone, Eq, PartialEq)]
6990pub struct Cmdspw_SPEC;
6991impl crate::sealed::RegSpec for Cmdspw_SPEC {
6992    type DataType = u32;
6993}
6994#[doc = "CCC Max Data Speed W (Write) Register"]
6995pub type Cmdspw = crate::RegValueT<Cmdspw_SPEC>;
6996
6997impl Cmdspw {
6998    #[doc = "Maximum Sustained Write Data Rate"]
6999    #[inline(always)]
7000    pub fn mswdr(
7001        self,
7002    ) -> crate::common::RegisterField<0, 0x7, 1, 0, cmdspw::Mswdr, Cmdspw_SPEC, crate::common::RW>
7003    {
7004        crate::common::RegisterField::<0,0x7,1,0,cmdspw::Mswdr, Cmdspw_SPEC,crate::common::RW>::from_register(self,0)
7005    }
7006}
7007impl ::core::default::Default for Cmdspw {
7008    #[inline(always)]
7009    fn default() -> Cmdspw {
7010        <crate::RegValueT<Cmdspw_SPEC> as RegisterValue<_>>::new(0)
7011    }
7012}
7013pub mod cmdspw {
7014
7015    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7016    pub struct Mswdr_SPEC;
7017    pub type Mswdr = crate::EnumBitfieldStruct<u8, Mswdr_SPEC>;
7018    impl Mswdr {
7019        #[doc = "fscl Max (default value)"]
7020        pub const _000: Self = Self::new(0);
7021        #[doc = "8 MHz"]
7022        pub const _001: Self = Self::new(1);
7023        #[doc = "6 MHz"]
7024        pub const _010: Self = Self::new(2);
7025        #[doc = "4 MHz"]
7026        pub const _011: Self = Self::new(3);
7027        #[doc = "2 MHz"]
7028        pub const _100: Self = Self::new(4);
7029        #[doc = "Setting prohibited"]
7030        pub const OTHERS: Self = Self::new(0);
7031    }
7032}
7033#[doc(hidden)]
7034#[derive(Copy, Clone, Eq, PartialEq)]
7035pub struct Cmdspr_SPEC;
7036impl crate::sealed::RegSpec for Cmdspr_SPEC {
7037    type DataType = u32;
7038}
7039#[doc = "CCC Max Data Speed R (Read) Register"]
7040pub type Cmdspr = crate::RegValueT<Cmdspr_SPEC>;
7041
7042impl Cmdspr {
7043    #[doc = "Maximum Sustained Read Data Rate"]
7044    #[inline(always)]
7045    pub fn msrdr(
7046        self,
7047    ) -> crate::common::RegisterField<0, 0x7, 1, 0, cmdspr::Msrdr, Cmdspr_SPEC, crate::common::RW>
7048    {
7049        crate::common::RegisterField::<0,0x7,1,0,cmdspr::Msrdr, Cmdspr_SPEC,crate::common::RW>::from_register(self,0)
7050    }
7051    #[doc = "Clock to Data Turnaround Time (TSCO)"]
7052    #[inline(always)]
7053    pub fn cdttim(
7054        self,
7055    ) -> crate::common::RegisterField<3, 0x7, 1, 0, cmdspr::Cdttim, Cmdspr_SPEC, crate::common::RW>
7056    {
7057        crate::common::RegisterField::<3,0x7,1,0,cmdspr::Cdttim, Cmdspr_SPEC,crate::common::RW>::from_register(self,0)
7058    }
7059}
7060impl ::core::default::Default for Cmdspr {
7061    #[inline(always)]
7062    fn default() -> Cmdspr {
7063        <crate::RegValueT<Cmdspr_SPEC> as RegisterValue<_>>::new(0)
7064    }
7065}
7066pub mod cmdspr {
7067
7068    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7069    pub struct Msrdr_SPEC;
7070    pub type Msrdr = crate::EnumBitfieldStruct<u8, Msrdr_SPEC>;
7071    impl Msrdr {
7072        #[doc = "fscl Max (default value)"]
7073        pub const _000: Self = Self::new(0);
7074        #[doc = "8 MHz"]
7075        pub const _001: Self = Self::new(1);
7076        #[doc = "6 MHz"]
7077        pub const _010: Self = Self::new(2);
7078        #[doc = "4 MHz"]
7079        pub const _011: Self = Self::new(3);
7080        #[doc = "2 MHz"]
7081        pub const _100: Self = Self::new(4);
7082        #[doc = "Setting prohibited"]
7083        pub const OTHERS: Self = Self::new(0);
7084    }
7085    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7086    pub struct Cdttim_SPEC;
7087    pub type Cdttim = crate::EnumBitfieldStruct<u8, Cdttim_SPEC>;
7088    impl Cdttim {
7089        #[doc = "8 ns or less (default value)"]
7090        pub const _000: Self = Self::new(0);
7091        #[doc = "9 ns or less"]
7092        pub const _001: Self = Self::new(1);
7093        #[doc = "10 ns or less"]
7094        pub const _010: Self = Self::new(2);
7095        #[doc = "11 ns or less"]
7096        pub const _011: Self = Self::new(3);
7097        #[doc = "12 ns or less"]
7098        pub const _100: Self = Self::new(4);
7099        #[doc = "TSCO is more than 12 ns, and is reported by private agreement."]
7100        pub const _111: Self = Self::new(7);
7101        #[doc = "Setting prohibited"]
7102        pub const OTHERS: Self = Self::new(0);
7103    }
7104}
7105#[doc(hidden)]
7106#[derive(Copy, Clone, Eq, PartialEq)]
7107pub struct Cmdspt_SPEC;
7108impl crate::sealed::RegSpec for Cmdspt_SPEC {
7109    type DataType = u32;
7110}
7111#[doc = "CCC Max Data Speed T (Turnaround) Register"]
7112pub type Cmdspt = crate::RegValueT<Cmdspt_SPEC>;
7113
7114impl Cmdspt {
7115    #[doc = "Maximum Read Turnaround Time"]
7116    #[inline(always)]
7117    pub fn mrttim(
7118        self,
7119    ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, Cmdspt_SPEC, crate::common::RW> {
7120        crate::common::RegisterField::<0,0xffffff,1,0,u32, Cmdspt_SPEC,crate::common::RW>::from_register(self,0)
7121    }
7122    #[doc = "Maximum Read Turnaround Time Enable"]
7123    #[inline(always)]
7124    pub fn mrte(
7125        self,
7126    ) -> crate::common::RegisterField<31, 0x1, 1, 0, cmdspt::Mrte, Cmdspt_SPEC, crate::common::RW>
7127    {
7128        crate::common::RegisterField::<31,0x1,1,0,cmdspt::Mrte, Cmdspt_SPEC,crate::common::RW>::from_register(self,0)
7129    }
7130}
7131impl ::core::default::Default for Cmdspt {
7132    #[inline(always)]
7133    fn default() -> Cmdspt {
7134        <crate::RegValueT<Cmdspt_SPEC> as RegisterValue<_>>::new(0)
7135    }
7136}
7137pub mod cmdspt {
7138
7139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7140    pub struct Mrte_SPEC;
7141    pub type Mrte = crate::EnumBitfieldStruct<u8, Mrte_SPEC>;
7142    impl Mrte {
7143        #[doc = "Disables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 1: Without Turnaround)"]
7144        pub const _0: Self = Self::new(0);
7145        #[doc = "Enables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 2: With Turnaround)"]
7146        pub const _1: Self = Self::new(1);
7147    }
7148}
7149#[doc(hidden)]
7150#[derive(Copy, Clone, Eq, PartialEq)]
7151pub struct Cetsm_SPEC;
7152impl crate::sealed::RegSpec for Cetsm_SPEC {
7153    type DataType = u32;
7154}
7155#[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
7156pub type Cetsm = crate::RegValueT<Cetsm_SPEC>;
7157
7158impl Cetsm {
7159    #[doc = "Supports Sync Mode"]
7160    #[inline(always)]
7161    pub fn sptsyn(
7162        self,
7163    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cetsm::Sptsyn, Cetsm_SPEC, crate::common::RW>
7164    {
7165        crate::common::RegisterField::<0,0x1,1,0,cetsm::Sptsyn, Cetsm_SPEC,crate::common::RW>::from_register(self,0)
7166    }
7167    #[doc = "Support Async Mode 0"]
7168    #[inline(always)]
7169    pub fn sptasyn0(
7170        self,
7171    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cetsm::Sptasyn0, Cetsm_SPEC, crate::common::RW>
7172    {
7173        crate::common::RegisterField::<1,0x1,1,0,cetsm::Sptasyn0, Cetsm_SPEC,crate::common::RW>::from_register(self,0)
7174    }
7175    #[doc = "Support Async Mode 1"]
7176    #[inline(always)]
7177    pub fn sptasyn1(
7178        self,
7179    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cetsm::Sptasyn1, Cetsm_SPEC, crate::common::RW>
7180    {
7181        crate::common::RegisterField::<2,0x1,1,0,cetsm::Sptasyn1, Cetsm_SPEC,crate::common::RW>::from_register(self,0)
7182    }
7183    #[doc = "Frequency Byte"]
7184    #[inline(always)]
7185    pub fn freq(
7186        self,
7187    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Cetsm_SPEC, crate::common::RW> {
7188        crate::common::RegisterField::<8,0xff,1,0,u8, Cetsm_SPEC,crate::common::RW>::from_register(self,0)
7189    }
7190    #[doc = "Inaccuracy Byte"]
7191    #[inline(always)]
7192    pub fn inac(
7193        self,
7194    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Cetsm_SPEC, crate::common::RW> {
7195        crate::common::RegisterField::<16,0xff,1,0,u8, Cetsm_SPEC,crate::common::RW>::from_register(self,0)
7196    }
7197}
7198impl ::core::default::Default for Cetsm {
7199    #[inline(always)]
7200    fn default() -> Cetsm {
7201        <crate::RegValueT<Cetsm_SPEC> as RegisterValue<_>>::new(0)
7202    }
7203}
7204pub mod cetsm {
7205
7206    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7207    pub struct Sptsyn_SPEC;
7208    pub type Sptsyn = crate::EnumBitfieldStruct<u8, Sptsyn_SPEC>;
7209    impl Sptsyn {
7210        #[doc = "Sync Mode is not supported."]
7211        pub const _0: Self = Self::new(0);
7212        #[doc = "Sync Mode is supported."]
7213        pub const _1: Self = Self::new(1);
7214    }
7215    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7216    pub struct Sptasyn0_SPEC;
7217    pub type Sptasyn0 = crate::EnumBitfieldStruct<u8, Sptasyn0_SPEC>;
7218    impl Sptasyn0 {
7219        #[doc = "Async Mode 0 is not supported."]
7220        pub const _0: Self = Self::new(0);
7221        #[doc = "Async Mode 0 is supported."]
7222        pub const _1: Self = Self::new(1);
7223    }
7224    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7225    pub struct Sptasyn1_SPEC;
7226    pub type Sptasyn1 = crate::EnumBitfieldStruct<u8, Sptasyn1_SPEC>;
7227    impl Sptasyn1 {
7228        #[doc = "Async Mode 1 is not supported."]
7229        pub const _0: Self = Self::new(0);
7230        #[doc = "Async Mode 1 is supported."]
7231        pub const _1: Self = Self::new(1);
7232    }
7233}
7234#[doc(hidden)]
7235#[derive(Copy, Clone, Eq, PartialEq)]
7236pub struct Cetss_SPEC;
7237impl crate::sealed::RegSpec for Cetss_SPEC {
7238    type DataType = u32;
7239}
7240#[doc = "CCC Exchange Timing Support Information S (State) Register"]
7241pub type Cetss = crate::RegValueT<Cetss_SPEC>;
7242
7243impl Cetss {
7244    #[doc = "Sync Mode Enabled"]
7245    #[inline(always)]
7246    pub fn syne(
7247        self,
7248    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cetss::Syne, Cetss_SPEC, crate::common::RW>
7249    {
7250        crate::common::RegisterField::<0,0x1,1,0,cetss::Syne, Cetss_SPEC,crate::common::RW>::from_register(self,0)
7251    }
7252    #[doc = "Async Mode Enabled"]
7253    #[inline(always)]
7254    pub fn asyne(
7255        self,
7256    ) -> crate::common::RegisterField<1, 0x3, 1, 0, cetss::Asyne, Cetss_SPEC, crate::common::RW>
7257    {
7258        crate::common::RegisterField::<1,0x3,1,0,cetss::Asyne, Cetss_SPEC,crate::common::RW>::from_register(self,0)
7259    }
7260    #[doc = "Internal Counter Overflow"]
7261    #[inline(always)]
7262    pub fn icovf(
7263        self,
7264    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cetss::Icovf, Cetss_SPEC, crate::common::RW>
7265    {
7266        crate::common::RegisterField::<7,0x1,1,0,cetss::Icovf, Cetss_SPEC,crate::common::RW>::from_register(self,0)
7267    }
7268}
7269impl ::core::default::Default for Cetss {
7270    #[inline(always)]
7271    fn default() -> Cetss {
7272        <crate::RegValueT<Cetss_SPEC> as RegisterValue<_>>::new(0)
7273    }
7274}
7275pub mod cetss {
7276
7277    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7278    pub struct Syne_SPEC;
7279    pub type Syne = crate::EnumBitfieldStruct<u8, Syne_SPEC>;
7280    impl Syne {
7281        #[doc = "Sync Mode Disabled"]
7282        pub const _0: Self = Self::new(0);
7283        #[doc = "Sync Mode Enabled"]
7284        pub const _1: Self = Self::new(1);
7285    }
7286    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7287    pub struct Asyne_SPEC;
7288    pub type Asyne = crate::EnumBitfieldStruct<u8, Asyne_SPEC>;
7289    impl Asyne {
7290        #[doc = "All Mode Disable"]
7291        pub const _00: Self = Self::new(0);
7292        #[doc = "Async Mode 0 Enabled"]
7293        pub const _01: Self = Self::new(1);
7294        #[doc = "Async Mode 1 Enabled"]
7295        pub const _10: Self = Self::new(2);
7296        #[doc = "Setting prohibited"]
7297        pub const OTHERS: Self = Self::new(0);
7298    }
7299    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7300    pub struct Icovf_SPEC;
7301    pub type Icovf = crate::EnumBitfieldStruct<u8, Icovf_SPEC>;
7302    impl Icovf {
7303        #[doc = "Slave has not experienced a counter overflow since the most recent previous check."]
7304        pub const _0: Self = Self::new(0);
7305        #[doc = "Slave experienced a counter overflow since the most recent previous check."]
7306        pub const _1: Self = Self::new(1);
7307    }
7308}
7309#[doc(hidden)]
7310#[derive(Copy, Clone, Eq, PartialEq)]
7311pub struct Bitcnt_SPEC;
7312impl crate::sealed::RegSpec for Bitcnt_SPEC {
7313    type DataType = u32;
7314}
7315#[doc = "Bit Count Register"]
7316pub type Bitcnt = crate::RegValueT<Bitcnt_SPEC>;
7317
7318impl Bitcnt {
7319    #[doc = "Bit Counter"]
7320    #[inline(always)]
7321    pub fn bcnt(
7322        self,
7323    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, Bitcnt_SPEC, crate::common::R> {
7324        crate::common::RegisterField::<0,0x1f,1,0,u8, Bitcnt_SPEC,crate::common::R>::from_register(self,0)
7325    }
7326}
7327impl ::core::default::Default for Bitcnt {
7328    #[inline(always)]
7329    fn default() -> Bitcnt {
7330        <crate::RegValueT<Bitcnt_SPEC> as RegisterValue<_>>::new(0)
7331    }
7332}
7333
7334#[doc(hidden)]
7335#[derive(Copy, Clone, Eq, PartialEq)]
7336pub struct Nqstlv_SPEC;
7337impl crate::sealed::RegSpec for Nqstlv_SPEC {
7338    type DataType = u32;
7339}
7340#[doc = "Normal Queue Status Level Register"]
7341pub type Nqstlv = crate::RegValueT<Nqstlv_SPEC>;
7342
7343impl Nqstlv {
7344    #[doc = "Normal Command Queue Free Level"]
7345    #[inline(always)]
7346    pub fn cmdqflv(
7347        self,
7348    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Nqstlv_SPEC, crate::common::R> {
7349        crate::common::RegisterField::<0,0xff,1,0,u8, Nqstlv_SPEC,crate::common::R>::from_register(self,0)
7350    }
7351    #[doc = "Normal Response Queue Level"]
7352    #[inline(always)]
7353    pub fn rspqlv(
7354        self,
7355    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Nqstlv_SPEC, crate::common::R> {
7356        crate::common::RegisterField::<8,0xff,1,0,u8, Nqstlv_SPEC,crate::common::R>::from_register(self,0)
7357    }
7358    #[doc = "Normal IBI Queue Level"]
7359    #[inline(always)]
7360    pub fn ibiqlv(
7361        self,
7362    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, Nqstlv_SPEC, crate::common::R> {
7363        crate::common::RegisterField::<16,0xff,1,0,u8, Nqstlv_SPEC,crate::common::R>::from_register(self,0)
7364    }
7365    #[doc = "Normal IBI Status Count"]
7366    #[inline(always)]
7367    pub fn ibiscnt(
7368        self,
7369    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, Nqstlv_SPEC, crate::common::R> {
7370        crate::common::RegisterField::<24,0x1f,1,0,u8, Nqstlv_SPEC,crate::common::R>::from_register(self,0)
7371    }
7372}
7373impl ::core::default::Default for Nqstlv {
7374    #[inline(always)]
7375    fn default() -> Nqstlv {
7376        <crate::RegValueT<Nqstlv_SPEC> as RegisterValue<_>>::new(4)
7377    }
7378}
7379
7380#[doc(hidden)]
7381#[derive(Copy, Clone, Eq, PartialEq)]
7382pub struct Ndbstlv0_SPEC;
7383impl crate::sealed::RegSpec for Ndbstlv0_SPEC {
7384    type DataType = u32;
7385}
7386#[doc = "Normal Data Buffer Status Level Register 0"]
7387pub type Ndbstlv0 = crate::RegValueT<Ndbstlv0_SPEC>;
7388
7389impl Ndbstlv0 {
7390    #[doc = "Normal Transmit Data Buffer Free Level"]
7391    #[inline(always)]
7392    pub fn tdbflv(
7393        self,
7394    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Ndbstlv0_SPEC, crate::common::R> {
7395        crate::common::RegisterField::<0,0xff,1,0,u8, Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
7396    }
7397    #[doc = "Normal Receive Data Buffer Level"]
7398    #[inline(always)]
7399    pub fn rdblv(
7400        self,
7401    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Ndbstlv0_SPEC, crate::common::R> {
7402        crate::common::RegisterField::<8,0xff,1,0,u8, Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
7403    }
7404}
7405impl ::core::default::Default for Ndbstlv0 {
7406    #[inline(always)]
7407    fn default() -> Ndbstlv0 {
7408        <crate::RegValueT<Ndbstlv0_SPEC> as RegisterValue<_>>::new(1)
7409    }
7410}
7411
7412#[doc(hidden)]
7413#[derive(Copy, Clone, Eq, PartialEq)]
7414pub struct Nrsqstlv_SPEC;
7415impl crate::sealed::RegSpec for Nrsqstlv_SPEC {
7416    type DataType = u32;
7417}
7418#[doc = "Normal Receive Status Queue Status Level Register"]
7419pub type Nrsqstlv = crate::RegValueT<Nrsqstlv_SPEC>;
7420
7421impl Nrsqstlv {
7422    #[doc = "Normal Receive Status Queue Level"]
7423    #[inline(always)]
7424    pub fn rsqlv(
7425        self,
7426    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Nrsqstlv_SPEC, crate::common::R> {
7427        crate::common::RegisterField::<0,0xff,1,0,u8, Nrsqstlv_SPEC,crate::common::R>::from_register(self,0)
7428    }
7429}
7430impl ::core::default::Default for Nrsqstlv {
7431    #[inline(always)]
7432    fn default() -> Nrsqstlv {
7433        <crate::RegValueT<Nrsqstlv_SPEC> as RegisterValue<_>>::new(0)
7434    }
7435}
7436
7437#[doc(hidden)]
7438#[derive(Copy, Clone, Eq, PartialEq)]
7439pub struct Hqstlv_SPEC;
7440impl crate::sealed::RegSpec for Hqstlv_SPEC {
7441    type DataType = u32;
7442}
7443#[doc = "High Priority Queue Status Level Register"]
7444pub type Hqstlv = crate::RegValueT<Hqstlv_SPEC>;
7445
7446impl Hqstlv {
7447    #[doc = "High Priority Command Queue Level"]
7448    #[inline(always)]
7449    pub fn cmdqlv(
7450        self,
7451    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Hqstlv_SPEC, crate::common::R> {
7452        crate::common::RegisterField::<0,0xff,1,0,u8, Hqstlv_SPEC,crate::common::R>::from_register(self,0)
7453    }
7454    #[doc = "High Priority Response Queue Level"]
7455    #[inline(always)]
7456    pub fn rspqlv(
7457        self,
7458    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Hqstlv_SPEC, crate::common::R> {
7459        crate::common::RegisterField::<8,0xff,1,0,u8, Hqstlv_SPEC,crate::common::R>::from_register(self,0)
7460    }
7461}
7462impl ::core::default::Default for Hqstlv {
7463    #[inline(always)]
7464    fn default() -> Hqstlv {
7465        <crate::RegValueT<Hqstlv_SPEC> as RegisterValue<_>>::new(2)
7466    }
7467}
7468
7469#[doc(hidden)]
7470#[derive(Copy, Clone, Eq, PartialEq)]
7471pub struct Hdbstlv_SPEC;
7472impl crate::sealed::RegSpec for Hdbstlv_SPEC {
7473    type DataType = u32;
7474}
7475#[doc = "High Priority Data Buffer Status Level Register"]
7476pub type Hdbstlv = crate::RegValueT<Hdbstlv_SPEC>;
7477
7478impl Hdbstlv {
7479    #[doc = "High Priority Transmit Data Buffer Free Level"]
7480    #[inline(always)]
7481    pub fn tdbflv(
7482        self,
7483    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Hdbstlv_SPEC, crate::common::R> {
7484        crate::common::RegisterField::<0,0xff,1,0,u8, Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
7485    }
7486    #[doc = "High Priority Receive Data Buffer Level"]
7487    #[inline(always)]
7488    pub fn rdblv(
7489        self,
7490    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Hdbstlv_SPEC, crate::common::R> {
7491        crate::common::RegisterField::<8,0xff,1,0,u8, Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
7492    }
7493}
7494impl ::core::default::Default for Hdbstlv {
7495    #[inline(always)]
7496    fn default() -> Hdbstlv {
7497        <crate::RegValueT<Hdbstlv_SPEC> as RegisterValue<_>>::new(2)
7498    }
7499}
7500
7501#[doc(hidden)]
7502#[derive(Copy, Clone, Eq, PartialEq)]
7503pub struct Prstdbg_SPEC;
7504impl crate::sealed::RegSpec for Prstdbg_SPEC {
7505    type DataType = u32;
7506}
7507#[doc = "Present State Debug Register"]
7508pub type Prstdbg = crate::RegValueT<Prstdbg_SPEC>;
7509
7510impl Prstdbg {
7511    #[doc = "SCL Line Signal Level"]
7512    #[inline(always)]
7513    pub fn scilv(
7514        self,
7515    ) -> crate::common::RegisterFieldBool<0, 1, 0, Prstdbg_SPEC, crate::common::R> {
7516        crate::common::RegisterFieldBool::<0, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
7517            self, 0,
7518        )
7519    }
7520    #[doc = "SDA Line Signal Level"]
7521    #[inline(always)]
7522    pub fn sdilv(
7523        self,
7524    ) -> crate::common::RegisterFieldBool<1, 1, 0, Prstdbg_SPEC, crate::common::R> {
7525        crate::common::RegisterFieldBool::<1, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
7526            self, 0,
7527        )
7528    }
7529    #[doc = "SCL Output Level"]
7530    #[inline(always)]
7531    pub fn scolv(
7532        self,
7533    ) -> crate::common::RegisterField<2, 0x1, 1, 0, prstdbg::Scolv, Prstdbg_SPEC, crate::common::R>
7534    {
7535        crate::common::RegisterField::<2,0x1,1,0,prstdbg::Scolv, Prstdbg_SPEC,crate::common::R>::from_register(self,0)
7536    }
7537    #[doc = "SDA Output Level"]
7538    #[inline(always)]
7539    pub fn sdolv(
7540        self,
7541    ) -> crate::common::RegisterField<3, 0x1, 1, 0, prstdbg::Sdolv, Prstdbg_SPEC, crate::common::R>
7542    {
7543        crate::common::RegisterField::<3,0x1,1,0,prstdbg::Sdolv, Prstdbg_SPEC,crate::common::R>::from_register(self,0)
7544    }
7545}
7546impl ::core::default::Default for Prstdbg {
7547    #[inline(always)]
7548    fn default() -> Prstdbg {
7549        <crate::RegValueT<Prstdbg_SPEC> as RegisterValue<_>>::new(15)
7550    }
7551}
7552pub mod prstdbg {
7553
7554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7555    pub struct Scolv_SPEC;
7556    pub type Scolv = crate::EnumBitfieldStruct<u8, Scolv_SPEC>;
7557    impl Scolv {
7558        #[doc = "I3C has driven the SCL pin low."]
7559        pub const _0: Self = Self::new(0);
7560        #[doc = "I3C has released the SCL pin."]
7561        pub const _1: Self = Self::new(1);
7562    }
7563    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7564    pub struct Sdolv_SPEC;
7565    pub type Sdolv = crate::EnumBitfieldStruct<u8, Sdolv_SPEC>;
7566    impl Sdolv {
7567        #[doc = "I3C has driven the SDA pin low."]
7568        pub const _0: Self = Self::new(0);
7569        #[doc = "I3C has released the SDA pin."]
7570        pub const _1: Self = Self::new(1);
7571    }
7572}
7573#[doc(hidden)]
7574#[derive(Copy, Clone, Eq, PartialEq)]
7575pub struct Mserrcnt_SPEC;
7576impl crate::sealed::RegSpec for Mserrcnt_SPEC {
7577    type DataType = u32;
7578}
7579#[doc = "Master Error Counters Register"]
7580pub type Mserrcnt = crate::RegValueT<Mserrcnt_SPEC>;
7581
7582impl Mserrcnt {
7583    #[doc = "M2 Error Counter"]
7584    #[inline(always)]
7585    pub fn m2ecnt(
7586        self,
7587    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Mserrcnt_SPEC, crate::common::R> {
7588        crate::common::RegisterField::<0,0xff,1,0,u8, Mserrcnt_SPEC,crate::common::R>::from_register(self,0)
7589    }
7590}
7591impl ::core::default::Default for Mserrcnt {
7592    #[inline(always)]
7593    fn default() -> Mserrcnt {
7594        <crate::RegValueT<Mserrcnt_SPEC> as RegisterValue<_>>::new(0)
7595    }
7596}
7597
7598#[doc(hidden)]
7599#[derive(Copy, Clone, Eq, PartialEq)]
7600pub struct Sc1Cpt_SPEC;
7601impl crate::sealed::RegSpec for Sc1Cpt_SPEC {
7602    type DataType = u32;
7603}
7604#[doc = "SC1 Capture monitor Register"]
7605pub type Sc1Cpt = crate::RegValueT<Sc1Cpt_SPEC>;
7606
7607impl Sc1Cpt {
7608    #[doc = "SC1 Capture"]
7609    #[inline(always)]
7610    pub fn sc1c(
7611        self,
7612    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Sc1Cpt_SPEC, crate::common::R> {
7613        crate::common::RegisterField::<0,0xffff,1,0,u16, Sc1Cpt_SPEC,crate::common::R>::from_register(self,0)
7614    }
7615}
7616impl ::core::default::Default for Sc1Cpt {
7617    #[inline(always)]
7618    fn default() -> Sc1Cpt {
7619        <crate::RegValueT<Sc1Cpt_SPEC> as RegisterValue<_>>::new(0)
7620    }
7621}
7622
7623#[doc(hidden)]
7624#[derive(Copy, Clone, Eq, PartialEq)]
7625pub struct Sc2Cpt_SPEC;
7626impl crate::sealed::RegSpec for Sc2Cpt_SPEC {
7627    type DataType = u32;
7628}
7629#[doc = "SC2 Capture monitor Register"]
7630pub type Sc2Cpt = crate::RegValueT<Sc2Cpt_SPEC>;
7631
7632impl Sc2Cpt {
7633    #[doc = "SC2 Capture"]
7634    #[inline(always)]
7635    pub fn sc2c(
7636        self,
7637    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Sc2Cpt_SPEC, crate::common::R> {
7638        crate::common::RegisterField::<0,0xffff,1,0,u16, Sc2Cpt_SPEC,crate::common::R>::from_register(self,0)
7639    }
7640}
7641impl ::core::default::Default for Sc2Cpt {
7642    #[inline(always)]
7643    fn default() -> Sc2Cpt {
7644        <crate::RegValueT<Sc2Cpt_SPEC> as RegisterValue<_>>::new(0)
7645    }
7646}