1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Direct memory access controller 0"]
28unsafe impl ::core::marker::Send for super::Dmac0 {}
29unsafe impl ::core::marker::Sync for super::Dmac0 {}
30impl super::Dmac0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36 #[doc = "DMA Source Address Register"]
37 #[inline(always)]
38 pub const fn dmsar(&self) -> &'static crate::common::Reg<self::Dmsar_SPEC, crate::common::RW> {
39 unsafe {
40 crate::common::Reg::<self::Dmsar_SPEC, crate::common::RW>::from_ptr(
41 self._svd2pac_as_ptr().add(0usize),
42 )
43 }
44 }
45
46 #[doc = "DMA Destination Address Register"]
47 #[inline(always)]
48 pub const fn dmdar(&self) -> &'static crate::common::Reg<self::Dmdar_SPEC, crate::common::RW> {
49 unsafe {
50 crate::common::Reg::<self::Dmdar_SPEC, crate::common::RW>::from_ptr(
51 self._svd2pac_as_ptr().add(4usize),
52 )
53 }
54 }
55
56 #[doc = "DMA Transfer Count Register"]
57 #[inline(always)]
58 pub const fn dmcra(&self) -> &'static crate::common::Reg<self::Dmcra_SPEC, crate::common::RW> {
59 unsafe {
60 crate::common::Reg::<self::Dmcra_SPEC, crate::common::RW>::from_ptr(
61 self._svd2pac_as_ptr().add(8usize),
62 )
63 }
64 }
65
66 #[doc = "DMA Block Transfer Count Register"]
67 #[inline(always)]
68 pub const fn dmcrb(&self) -> &'static crate::common::Reg<self::Dmcrb_SPEC, crate::common::RW> {
69 unsafe {
70 crate::common::Reg::<self::Dmcrb_SPEC, crate::common::RW>::from_ptr(
71 self._svd2pac_as_ptr().add(12usize),
72 )
73 }
74 }
75
76 #[doc = "DMA Transfer Mode Register"]
77 #[inline(always)]
78 pub const fn dmtmd(&self) -> &'static crate::common::Reg<self::Dmtmd_SPEC, crate::common::RW> {
79 unsafe {
80 crate::common::Reg::<self::Dmtmd_SPEC, crate::common::RW>::from_ptr(
81 self._svd2pac_as_ptr().add(16usize),
82 )
83 }
84 }
85
86 #[doc = "DMA Interrupt Setting Register"]
87 #[inline(always)]
88 pub const fn dmint(&self) -> &'static crate::common::Reg<self::Dmint_SPEC, crate::common::RW> {
89 unsafe {
90 crate::common::Reg::<self::Dmint_SPEC, crate::common::RW>::from_ptr(
91 self._svd2pac_as_ptr().add(19usize),
92 )
93 }
94 }
95
96 #[doc = "DMA Address Mode Register"]
97 #[inline(always)]
98 pub const fn dmamd(&self) -> &'static crate::common::Reg<self::Dmamd_SPEC, crate::common::RW> {
99 unsafe {
100 crate::common::Reg::<self::Dmamd_SPEC, crate::common::RW>::from_ptr(
101 self._svd2pac_as_ptr().add(20usize),
102 )
103 }
104 }
105
106 #[doc = "DMA Offset Register"]
107 #[inline(always)]
108 pub const fn dmofr(&self) -> &'static crate::common::Reg<self::Dmofr_SPEC, crate::common::RW> {
109 unsafe {
110 crate::common::Reg::<self::Dmofr_SPEC, crate::common::RW>::from_ptr(
111 self._svd2pac_as_ptr().add(24usize),
112 )
113 }
114 }
115
116 #[doc = "DMA Transfer Enable Register"]
117 #[inline(always)]
118 pub const fn dmcnt(&self) -> &'static crate::common::Reg<self::Dmcnt_SPEC, crate::common::RW> {
119 unsafe {
120 crate::common::Reg::<self::Dmcnt_SPEC, crate::common::RW>::from_ptr(
121 self._svd2pac_as_ptr().add(28usize),
122 )
123 }
124 }
125
126 #[doc = "DMA Software Start Register"]
127 #[inline(always)]
128 pub const fn dmreq(&self) -> &'static crate::common::Reg<self::Dmreq_SPEC, crate::common::RW> {
129 unsafe {
130 crate::common::Reg::<self::Dmreq_SPEC, crate::common::RW>::from_ptr(
131 self._svd2pac_as_ptr().add(29usize),
132 )
133 }
134 }
135
136 #[doc = "DMA Status Register"]
137 #[inline(always)]
138 pub const fn dmsts(&self) -> &'static crate::common::Reg<self::Dmsts_SPEC, crate::common::RW> {
139 unsafe {
140 crate::common::Reg::<self::Dmsts_SPEC, crate::common::RW>::from_ptr(
141 self._svd2pac_as_ptr().add(30usize),
142 )
143 }
144 }
145
146 #[doc = "DMA Source Reload Address Register"]
147 #[inline(always)]
148 pub const fn dmsrr(&self) -> &'static crate::common::Reg<self::Dmsrr_SPEC, crate::common::RW> {
149 unsafe {
150 crate::common::Reg::<self::Dmsrr_SPEC, crate::common::RW>::from_ptr(
151 self._svd2pac_as_ptr().add(32usize),
152 )
153 }
154 }
155
156 #[doc = "DMA Destination Reload Address Register"]
157 #[inline(always)]
158 pub const fn dmdrr(&self) -> &'static crate::common::Reg<self::Dmdrr_SPEC, crate::common::RW> {
159 unsafe {
160 crate::common::Reg::<self::Dmdrr_SPEC, crate::common::RW>::from_ptr(
161 self._svd2pac_as_ptr().add(36usize),
162 )
163 }
164 }
165
166 #[doc = "DMA Source Buffer Size Register"]
167 #[inline(always)]
168 pub const fn dmsbs(&self) -> &'static crate::common::Reg<self::Dmsbs_SPEC, crate::common::RW> {
169 unsafe {
170 crate::common::Reg::<self::Dmsbs_SPEC, crate::common::RW>::from_ptr(
171 self._svd2pac_as_ptr().add(40usize),
172 )
173 }
174 }
175
176 #[doc = "DMA Destination Buffer Size Register"]
177 #[inline(always)]
178 pub const fn dmdbs(&self) -> &'static crate::common::Reg<self::Dmdbs_SPEC, crate::common::RW> {
179 unsafe {
180 crate::common::Reg::<self::Dmdbs_SPEC, crate::common::RW>::from_ptr(
181 self._svd2pac_as_ptr().add(44usize),
182 )
183 }
184 }
185}
186#[doc(hidden)]
187#[derive(Copy, Clone, Eq, PartialEq)]
188pub struct Dmsar_SPEC;
189impl crate::sealed::RegSpec for Dmsar_SPEC {
190 type DataType = u32;
191}
192#[doc = "DMA Source Address Register"]
193pub type Dmsar = crate::RegValueT<Dmsar_SPEC>;
194
195impl NoBitfieldReg<Dmsar_SPEC> for Dmsar {}
196impl ::core::default::Default for Dmsar {
197 #[inline(always)]
198 fn default() -> Dmsar {
199 <crate::RegValueT<Dmsar_SPEC> as RegisterValue<_>>::new(0)
200 }
201}
202
203#[doc(hidden)]
204#[derive(Copy, Clone, Eq, PartialEq)]
205pub struct Dmdar_SPEC;
206impl crate::sealed::RegSpec for Dmdar_SPEC {
207 type DataType = u32;
208}
209#[doc = "DMA Destination Address Register"]
210pub type Dmdar = crate::RegValueT<Dmdar_SPEC>;
211
212impl NoBitfieldReg<Dmdar_SPEC> for Dmdar {}
213impl ::core::default::Default for Dmdar {
214 #[inline(always)]
215 fn default() -> Dmdar {
216 <crate::RegValueT<Dmdar_SPEC> as RegisterValue<_>>::new(0)
217 }
218}
219
220#[doc(hidden)]
221#[derive(Copy, Clone, Eq, PartialEq)]
222pub struct Dmcra_SPEC;
223impl crate::sealed::RegSpec for Dmcra_SPEC {
224 type DataType = u32;
225}
226#[doc = "DMA Transfer Count Register"]
227pub type Dmcra = crate::RegValueT<Dmcra_SPEC>;
228
229impl Dmcra {
230 #[doc = "Lower bits of transfer count"]
231 #[inline(always)]
232 pub fn dmcral(
233 self,
234 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Dmcra_SPEC, crate::common::RW> {
235 crate::common::RegisterField::<0,0xffff,1,0,u16, Dmcra_SPEC,crate::common::RW>::from_register(self,0)
236 }
237 #[doc = "Upper bits of transfer count"]
238 #[inline(always)]
239 pub fn dmcrah(
240 self,
241 ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, Dmcra_SPEC, crate::common::RW> {
242 crate::common::RegisterField::<16,0x3ff,1,0,u16, Dmcra_SPEC,crate::common::RW>::from_register(self,0)
243 }
244}
245impl ::core::default::Default for Dmcra {
246 #[inline(always)]
247 fn default() -> Dmcra {
248 <crate::RegValueT<Dmcra_SPEC> as RegisterValue<_>>::new(0)
249 }
250}
251
252#[doc(hidden)]
253#[derive(Copy, Clone, Eq, PartialEq)]
254pub struct Dmcrb_SPEC;
255impl crate::sealed::RegSpec for Dmcrb_SPEC {
256 type DataType = u32;
257}
258#[doc = "DMA Block Transfer Count Register"]
259pub type Dmcrb = crate::RegValueT<Dmcrb_SPEC>;
260
261impl Dmcrb {
262 #[doc = "Functions as a number of block, repeat or repeat-block transfer counter."]
263 #[inline(always)]
264 pub fn dmcrbl(
265 self,
266 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Dmcrb_SPEC, crate::common::RW> {
267 crate::common::RegisterField::<0,0xffff,1,0,u16, Dmcrb_SPEC,crate::common::RW>::from_register(self,0)
268 }
269 #[doc = "Specifies the number of block, repeat or repeat-block transfer operations."]
270 #[inline(always)]
271 pub fn dmcrbh(
272 self,
273 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, Dmcrb_SPEC, crate::common::RW> {
274 crate::common::RegisterField::<16,0xffff,1,0,u16, Dmcrb_SPEC,crate::common::RW>::from_register(self,0)
275 }
276}
277impl ::core::default::Default for Dmcrb {
278 #[inline(always)]
279 fn default() -> Dmcrb {
280 <crate::RegValueT<Dmcrb_SPEC> as RegisterValue<_>>::new(0)
281 }
282}
283
284#[doc(hidden)]
285#[derive(Copy, Clone, Eq, PartialEq)]
286pub struct Dmtmd_SPEC;
287impl crate::sealed::RegSpec for Dmtmd_SPEC {
288 type DataType = u16;
289}
290#[doc = "DMA Transfer Mode Register"]
291pub type Dmtmd = crate::RegValueT<Dmtmd_SPEC>;
292
293impl Dmtmd {
294 #[doc = "Transfer Request Source Select"]
295 #[inline(always)]
296 pub fn dctg(
297 self,
298 ) -> crate::common::RegisterField<0, 0x3, 1, 0, dmtmd::Dctg, Dmtmd_SPEC, crate::common::RW>
299 {
300 crate::common::RegisterField::<0,0x3,1,0,dmtmd::Dctg, Dmtmd_SPEC,crate::common::RW>::from_register(self,0)
301 }
302 #[doc = "Transfer Data Size Select"]
303 #[inline(always)]
304 pub fn sz(
305 self,
306 ) -> crate::common::RegisterField<8, 0x3, 1, 0, dmtmd::Sz, Dmtmd_SPEC, crate::common::RW> {
307 crate::common::RegisterField::<8,0x3,1,0,dmtmd::Sz, Dmtmd_SPEC,crate::common::RW>::from_register(self,0)
308 }
309 #[doc = "Transfer Keeping"]
310 #[inline(always)]
311 pub fn tkp(
312 self,
313 ) -> crate::common::RegisterField<10, 0x1, 1, 0, dmtmd::Tkp, Dmtmd_SPEC, crate::common::RW>
314 {
315 crate::common::RegisterField::<10,0x1,1,0,dmtmd::Tkp, Dmtmd_SPEC,crate::common::RW>::from_register(self,0)
316 }
317 #[doc = "Repeat Area Select"]
318 #[inline(always)]
319 pub fn dts(
320 self,
321 ) -> crate::common::RegisterField<12, 0x3, 1, 0, dmtmd::Dts, Dmtmd_SPEC, crate::common::RW>
322 {
323 crate::common::RegisterField::<12,0x3,1,0,dmtmd::Dts, Dmtmd_SPEC,crate::common::RW>::from_register(self,0)
324 }
325 #[doc = "Transfer Mode Select"]
326 #[inline(always)]
327 pub fn md(
328 self,
329 ) -> crate::common::RegisterField<14, 0x3, 1, 0, dmtmd::Md, Dmtmd_SPEC, crate::common::RW> {
330 crate::common::RegisterField::<14,0x3,1,0,dmtmd::Md, Dmtmd_SPEC,crate::common::RW>::from_register(self,0)
331 }
332}
333impl ::core::default::Default for Dmtmd {
334 #[inline(always)]
335 fn default() -> Dmtmd {
336 <crate::RegValueT<Dmtmd_SPEC> as RegisterValue<_>>::new(0)
337 }
338}
339pub mod dmtmd {
340
341 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
342 pub struct Dctg_SPEC;
343 pub type Dctg = crate::EnumBitfieldStruct<u8, Dctg_SPEC>;
344 impl Dctg {
345 #[doc = "Software request"]
346 pub const _00: Self = Self::new(0);
347 #[doc = "Hardware request"]
348 pub const _01: Self = Self::new(1);
349 #[doc = "Setting prohibited"]
350 pub const _10: Self = Self::new(2);
351 #[doc = "Setting prohibited"]
352 pub const _11: Self = Self::new(3);
353 }
354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
355 pub struct Sz_SPEC;
356 pub type Sz = crate::EnumBitfieldStruct<u8, Sz_SPEC>;
357 impl Sz {
358 #[doc = "8 bits"]
359 pub const _00: Self = Self::new(0);
360 #[doc = "16 bits"]
361 pub const _01: Self = Self::new(1);
362 #[doc = "32 bits"]
363 pub const _10: Self = Self::new(2);
364 #[doc = "Setting prohibited"]
365 pub const _11: Self = Self::new(3);
366 }
367 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
368 pub struct Tkp_SPEC;
369 pub type Tkp = crate::EnumBitfieldStruct<u8, Tkp_SPEC>;
370 impl Tkp {
371 #[doc = "Transfer is stopped by completion of specified total number of transfer operations."]
372 pub const _0: Self = Self::new(0);
373 #[doc = "Transfer is not stopped by completion of specified total number of transfer operations (free-running)."]
374 pub const _1: Self = Self::new(1);
375 }
376 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
377 pub struct Dts_SPEC;
378 pub type Dts = crate::EnumBitfieldStruct<u8, Dts_SPEC>;
379 impl Dts {
380 #[doc = "The destination is specified as the repeat area or block area."]
381 pub const _00: Self = Self::new(0);
382 #[doc = "The source is specified as the repeat area or block area."]
383 pub const _01: Self = Self::new(1);
384 #[doc = "The repeat area or block area is not specified."]
385 pub const _10: Self = Self::new(2);
386 #[doc = "Setting prohibited."]
387 pub const _11: Self = Self::new(3);
388 }
389 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
390 pub struct Md_SPEC;
391 pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
392 impl Md {
393 #[doc = "Normal transfer"]
394 pub const _00: Self = Self::new(0);
395 #[doc = "Repeat transfer"]
396 pub const _01: Self = Self::new(1);
397 #[doc = "Block transfer"]
398 pub const _10: Self = Self::new(2);
399 #[doc = "Repeat-block transfer"]
400 pub const _11: Self = Self::new(3);
401 }
402}
403#[doc(hidden)]
404#[derive(Copy, Clone, Eq, PartialEq)]
405pub struct Dmint_SPEC;
406impl crate::sealed::RegSpec for Dmint_SPEC {
407 type DataType = u8;
408}
409#[doc = "DMA Interrupt Setting Register"]
410pub type Dmint = crate::RegValueT<Dmint_SPEC>;
411
412impl Dmint {
413 #[doc = "Destination Address Extended Repeat Area Overflow Interrupt Enable"]
414 #[inline(always)]
415 pub fn darie(
416 self,
417 ) -> crate::common::RegisterField<0, 0x1, 1, 0, dmint::Darie, Dmint_SPEC, crate::common::RW>
418 {
419 crate::common::RegisterField::<0,0x1,1,0,dmint::Darie, Dmint_SPEC,crate::common::RW>::from_register(self,0)
420 }
421 #[doc = "Source Address Extended Repeat Area Overflow Interrupt Enable"]
422 #[inline(always)]
423 pub fn sarie(
424 self,
425 ) -> crate::common::RegisterField<1, 0x1, 1, 0, dmint::Sarie, Dmint_SPEC, crate::common::RW>
426 {
427 crate::common::RegisterField::<1,0x1,1,0,dmint::Sarie, Dmint_SPEC,crate::common::RW>::from_register(self,0)
428 }
429 #[doc = "Repeat Size End Interrupt Enable"]
430 #[inline(always)]
431 pub fn rptie(
432 self,
433 ) -> crate::common::RegisterField<2, 0x1, 1, 0, dmint::Rptie, Dmint_SPEC, crate::common::RW>
434 {
435 crate::common::RegisterField::<2,0x1,1,0,dmint::Rptie, Dmint_SPEC,crate::common::RW>::from_register(self,0)
436 }
437 #[doc = "Transfer Escape End Interrupt Enable"]
438 #[inline(always)]
439 pub fn esie(
440 self,
441 ) -> crate::common::RegisterField<3, 0x1, 1, 0, dmint::Esie, Dmint_SPEC, crate::common::RW>
442 {
443 crate::common::RegisterField::<3,0x1,1,0,dmint::Esie, Dmint_SPEC,crate::common::RW>::from_register(self,0)
444 }
445 #[doc = "Transfer End Interrupt Enable"]
446 #[inline(always)]
447 pub fn dtie(
448 self,
449 ) -> crate::common::RegisterField<4, 0x1, 1, 0, dmint::Dtie, Dmint_SPEC, crate::common::RW>
450 {
451 crate::common::RegisterField::<4,0x1,1,0,dmint::Dtie, Dmint_SPEC,crate::common::RW>::from_register(self,0)
452 }
453}
454impl ::core::default::Default for Dmint {
455 #[inline(always)]
456 fn default() -> Dmint {
457 <crate::RegValueT<Dmint_SPEC> as RegisterValue<_>>::new(0)
458 }
459}
460pub mod dmint {
461
462 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
463 pub struct Darie_SPEC;
464 pub type Darie = crate::EnumBitfieldStruct<u8, Darie_SPEC>;
465 impl Darie {
466 #[doc = "Disables an interrupt request for an extended repeat area overflow on the destination address."]
467 pub const _0: Self = Self::new(0);
468 #[doc = "Enables an interrupt request for an extended repeat area overflow on the destination address."]
469 pub const _1: Self = Self::new(1);
470 }
471 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
472 pub struct Sarie_SPEC;
473 pub type Sarie = crate::EnumBitfieldStruct<u8, Sarie_SPEC>;
474 impl Sarie {
475 #[doc = "Disables an interrupt request for an extended repeat area overflow on the source address."]
476 pub const _0: Self = Self::new(0);
477 #[doc = "Enables an interrupt request for an extended repeat area overflow on the source address."]
478 pub const _1: Self = Self::new(1);
479 }
480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481 pub struct Rptie_SPEC;
482 pub type Rptie = crate::EnumBitfieldStruct<u8, Rptie_SPEC>;
483 impl Rptie {
484 #[doc = "Disables the repeat size end interrupt request."]
485 pub const _0: Self = Self::new(0);
486 #[doc = "Enables the repeat size end interrupt request."]
487 pub const _1: Self = Self::new(1);
488 }
489 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
490 pub struct Esie_SPEC;
491 pub type Esie = crate::EnumBitfieldStruct<u8, Esie_SPEC>;
492 impl Esie {
493 #[doc = "Disables the transfer escape end interrupt request."]
494 pub const _0: Self = Self::new(0);
495 #[doc = "Enables the transfer escape end interrupt request."]
496 pub const _1: Self = Self::new(1);
497 }
498 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
499 pub struct Dtie_SPEC;
500 pub type Dtie = crate::EnumBitfieldStruct<u8, Dtie_SPEC>;
501 impl Dtie {
502 #[doc = "Disables the transfer end interrupt request."]
503 pub const _0: Self = Self::new(0);
504 #[doc = "Enables the transfer end interrupt request."]
505 pub const _1: Self = Self::new(1);
506 }
507}
508#[doc(hidden)]
509#[derive(Copy, Clone, Eq, PartialEq)]
510pub struct Dmamd_SPEC;
511impl crate::sealed::RegSpec for Dmamd_SPEC {
512 type DataType = u16;
513}
514#[doc = "DMA Address Mode Register"]
515pub type Dmamd = crate::RegValueT<Dmamd_SPEC>;
516
517impl Dmamd {
518 #[doc = "Destination Address Extended Repeat Area"]
519 #[inline(always)]
520 pub fn dara(
521 self,
522 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, Dmamd_SPEC, crate::common::RW> {
523 crate::common::RegisterField::<0,0x1f,1,0,u8, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
524 }
525 #[doc = "Destination Address Update Select After Reload"]
526 #[inline(always)]
527 pub fn dadr(
528 self,
529 ) -> crate::common::RegisterField<5, 0x1, 1, 0, dmamd::Dadr, Dmamd_SPEC, crate::common::RW>
530 {
531 crate::common::RegisterField::<5,0x1,1,0,dmamd::Dadr, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
532 }
533 #[doc = "Destination Address Update Mode"]
534 #[inline(always)]
535 pub fn dm(
536 self,
537 ) -> crate::common::RegisterField<6, 0x3, 1, 0, dmamd::Dm, Dmamd_SPEC, crate::common::RW> {
538 crate::common::RegisterField::<6,0x3,1,0,dmamd::Dm, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
539 }
540 #[doc = "Source Address Extended Repeat Area"]
541 #[inline(always)]
542 pub fn sara(
543 self,
544 ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, Dmamd_SPEC, crate::common::RW> {
545 crate::common::RegisterField::<8,0x1f,1,0,u8, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
546 }
547 #[doc = "Source Address Update Select After Reload"]
548 #[inline(always)]
549 pub fn sadr(
550 self,
551 ) -> crate::common::RegisterField<13, 0x1, 1, 0, dmamd::Sadr, Dmamd_SPEC, crate::common::RW>
552 {
553 crate::common::RegisterField::<13,0x1,1,0,dmamd::Sadr, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
554 }
555 #[doc = "Source Address Update Mode"]
556 #[inline(always)]
557 pub fn sm(
558 self,
559 ) -> crate::common::RegisterField<14, 0x3, 1, 0, dmamd::Sm, Dmamd_SPEC, crate::common::RW> {
560 crate::common::RegisterField::<14,0x3,1,0,dmamd::Sm, Dmamd_SPEC,crate::common::RW>::from_register(self,0)
561 }
562}
563impl ::core::default::Default for Dmamd {
564 #[inline(always)]
565 fn default() -> Dmamd {
566 <crate::RegValueT<Dmamd_SPEC> as RegisterValue<_>>::new(0)
567 }
568}
569pub mod dmamd {
570
571 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
572 pub struct Dadr_SPEC;
573 pub type Dadr = crate::EnumBitfieldStruct<u8, Dadr_SPEC>;
574 impl Dadr {
575 #[doc = "Only reloading."]
576 pub const _0: Self = Self::new(0);
577 #[doc = "Add index after reloading."]
578 pub const _1: Self = Self::new(1);
579 }
580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
581 pub struct Dm_SPEC;
582 pub type Dm = crate::EnumBitfieldStruct<u8, Dm_SPEC>;
583 impl Dm {
584 #[doc = "Destination address is fixed."]
585 pub const _00: Self = Self::new(0);
586 #[doc = "Offset addition."]
587 pub const _01: Self = Self::new(1);
588 #[doc = "Destination address is incremented."]
589 pub const _10: Self = Self::new(2);
590 #[doc = "Destination address is decremented."]
591 pub const _11: Self = Self::new(3);
592 }
593 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
594 pub struct Sadr_SPEC;
595 pub type Sadr = crate::EnumBitfieldStruct<u8, Sadr_SPEC>;
596 impl Sadr {
597 #[doc = "Only reloading."]
598 pub const _0: Self = Self::new(0);
599 #[doc = "Add index after reloading."]
600 pub const _1: Self = Self::new(1);
601 }
602 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
603 pub struct Sm_SPEC;
604 pub type Sm = crate::EnumBitfieldStruct<u8, Sm_SPEC>;
605 impl Sm {
606 #[doc = "Source address is fixed."]
607 pub const _00: Self = Self::new(0);
608 #[doc = "Offset addition."]
609 pub const _01: Self = Self::new(1);
610 #[doc = "Source address is incremented."]
611 pub const _10: Self = Self::new(2);
612 #[doc = "Source address is decremented."]
613 pub const _11: Self = Self::new(3);
614 }
615}
616#[doc(hidden)]
617#[derive(Copy, Clone, Eq, PartialEq)]
618pub struct Dmofr_SPEC;
619impl crate::sealed::RegSpec for Dmofr_SPEC {
620 type DataType = u32;
621}
622#[doc = "DMA Offset Register"]
623pub type Dmofr = crate::RegValueT<Dmofr_SPEC>;
624
625impl NoBitfieldReg<Dmofr_SPEC> for Dmofr {}
626impl ::core::default::Default for Dmofr {
627 #[inline(always)]
628 fn default() -> Dmofr {
629 <crate::RegValueT<Dmofr_SPEC> as RegisterValue<_>>::new(0)
630 }
631}
632
633#[doc(hidden)]
634#[derive(Copy, Clone, Eq, PartialEq)]
635pub struct Dmcnt_SPEC;
636impl crate::sealed::RegSpec for Dmcnt_SPEC {
637 type DataType = u8;
638}
639#[doc = "DMA Transfer Enable Register"]
640pub type Dmcnt = crate::RegValueT<Dmcnt_SPEC>;
641
642impl Dmcnt {
643 #[doc = "DMA Transfer Enable"]
644 #[inline(always)]
645 pub fn dte(
646 self,
647 ) -> crate::common::RegisterField<0, 0x1, 1, 0, dmcnt::Dte, Dmcnt_SPEC, crate::common::RW> {
648 crate::common::RegisterField::<0,0x1,1,0,dmcnt::Dte, Dmcnt_SPEC,crate::common::RW>::from_register(self,0)
649 }
650}
651impl ::core::default::Default for Dmcnt {
652 #[inline(always)]
653 fn default() -> Dmcnt {
654 <crate::RegValueT<Dmcnt_SPEC> as RegisterValue<_>>::new(0)
655 }
656}
657pub mod dmcnt {
658
659 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
660 pub struct Dte_SPEC;
661 pub type Dte = crate::EnumBitfieldStruct<u8, Dte_SPEC>;
662 impl Dte {
663 #[doc = "Disables DMA transfer."]
664 pub const _0: Self = Self::new(0);
665 #[doc = "Enables DMA transfer."]
666 pub const _1: Self = Self::new(1);
667 }
668}
669#[doc(hidden)]
670#[derive(Copy, Clone, Eq, PartialEq)]
671pub struct Dmreq_SPEC;
672impl crate::sealed::RegSpec for Dmreq_SPEC {
673 type DataType = u8;
674}
675#[doc = "DMA Software Start Register"]
676pub type Dmreq = crate::RegValueT<Dmreq_SPEC>;
677
678impl Dmreq {
679 #[doc = "DMA Software Start"]
680 #[inline(always)]
681 pub fn swreq(
682 self,
683 ) -> crate::common::RegisterField<0, 0x1, 1, 0, dmreq::Swreq, Dmreq_SPEC, crate::common::RW>
684 {
685 crate::common::RegisterField::<0,0x1,1,0,dmreq::Swreq, Dmreq_SPEC,crate::common::RW>::from_register(self,0)
686 }
687 #[doc = "DMA Software Start Bit Auto Clear Select"]
688 #[inline(always)]
689 pub fn clrs(
690 self,
691 ) -> crate::common::RegisterField<4, 0x1, 1, 0, dmreq::Clrs, Dmreq_SPEC, crate::common::RW>
692 {
693 crate::common::RegisterField::<4,0x1,1,0,dmreq::Clrs, Dmreq_SPEC,crate::common::RW>::from_register(self,0)
694 }
695}
696impl ::core::default::Default for Dmreq {
697 #[inline(always)]
698 fn default() -> Dmreq {
699 <crate::RegValueT<Dmreq_SPEC> as RegisterValue<_>>::new(0)
700 }
701}
702pub mod dmreq {
703
704 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
705 pub struct Swreq_SPEC;
706 pub type Swreq = crate::EnumBitfieldStruct<u8, Swreq_SPEC>;
707 impl Swreq {
708 #[doc = "DMA transfer is not requested."]
709 pub const _0: Self = Self::new(0);
710 #[doc = "DMA transfer is requested."]
711 pub const _1: Self = Self::new(1);
712 }
713 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
714 pub struct Clrs_SPEC;
715 pub type Clrs = crate::EnumBitfieldStruct<u8, Clrs_SPEC>;
716 impl Clrs {
717 #[doc = "SWREQ bit is cleared after DMA transfer is started by software."]
718 pub const _0: Self = Self::new(0);
719 #[doc = "SWREQ bit is not cleared after DMA transfer is started by software."]
720 pub const _1: Self = Self::new(1);
721 }
722}
723#[doc(hidden)]
724#[derive(Copy, Clone, Eq, PartialEq)]
725pub struct Dmsts_SPEC;
726impl crate::sealed::RegSpec for Dmsts_SPEC {
727 type DataType = u8;
728}
729#[doc = "DMA Status Register"]
730pub type Dmsts = crate::RegValueT<Dmsts_SPEC>;
731
732impl Dmsts {
733 #[doc = "Transfer Escape End Interrupt Flag"]
734 #[inline(always)]
735 pub fn esif(
736 self,
737 ) -> crate::common::RegisterField<0, 0x1, 1, 0, dmsts::Esif, Dmsts_SPEC, crate::common::RW>
738 {
739 crate::common::RegisterField::<0,0x1,1,0,dmsts::Esif, Dmsts_SPEC,crate::common::RW>::from_register(self,0)
740 }
741 #[doc = "Transfer End Interrupt Flag"]
742 #[inline(always)]
743 pub fn dtif(
744 self,
745 ) -> crate::common::RegisterField<4, 0x1, 1, 0, dmsts::Dtif, Dmsts_SPEC, crate::common::RW>
746 {
747 crate::common::RegisterField::<4,0x1,1,0,dmsts::Dtif, Dmsts_SPEC,crate::common::RW>::from_register(self,0)
748 }
749 #[doc = "DMAC Active Flag"]
750 #[inline(always)]
751 pub fn act(
752 self,
753 ) -> crate::common::RegisterField<7, 0x1, 1, 0, dmsts::Act, Dmsts_SPEC, crate::common::R> {
754 crate::common::RegisterField::<7,0x1,1,0,dmsts::Act, Dmsts_SPEC,crate::common::R>::from_register(self,0)
755 }
756}
757impl ::core::default::Default for Dmsts {
758 #[inline(always)]
759 fn default() -> Dmsts {
760 <crate::RegValueT<Dmsts_SPEC> as RegisterValue<_>>::new(0)
761 }
762}
763pub mod dmsts {
764
765 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
766 pub struct Esif_SPEC;
767 pub type Esif = crate::EnumBitfieldStruct<u8, Esif_SPEC>;
768 impl Esif {
769 #[doc = "A transfer escape end interrupt has not been generated."]
770 pub const _0: Self = Self::new(0);
771 #[doc = "A transfer escape end interrupt has been generated."]
772 pub const _1: Self = Self::new(1);
773 }
774 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
775 pub struct Dtif_SPEC;
776 pub type Dtif = crate::EnumBitfieldStruct<u8, Dtif_SPEC>;
777 impl Dtif {
778 #[doc = "A transfer end interrupt has not been generated."]
779 pub const _0: Self = Self::new(0);
780 #[doc = "A transfer end interrupt has been generated."]
781 pub const _1: Self = Self::new(1);
782 }
783 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
784 pub struct Act_SPEC;
785 pub type Act = crate::EnumBitfieldStruct<u8, Act_SPEC>;
786 impl Act {
787 #[doc = "DMAC is in the idle state."]
788 pub const _0: Self = Self::new(0);
789 #[doc = "DMAC is operating."]
790 pub const _1: Self = Self::new(1);
791 }
792}
793#[doc(hidden)]
794#[derive(Copy, Clone, Eq, PartialEq)]
795pub struct Dmsrr_SPEC;
796impl crate::sealed::RegSpec for Dmsrr_SPEC {
797 type DataType = u32;
798}
799#[doc = "DMA Source Reload Address Register"]
800pub type Dmsrr = crate::RegValueT<Dmsrr_SPEC>;
801
802impl NoBitfieldReg<Dmsrr_SPEC> for Dmsrr {}
803impl ::core::default::Default for Dmsrr {
804 #[inline(always)]
805 fn default() -> Dmsrr {
806 <crate::RegValueT<Dmsrr_SPEC> as RegisterValue<_>>::new(0)
807 }
808}
809
810#[doc(hidden)]
811#[derive(Copy, Clone, Eq, PartialEq)]
812pub struct Dmdrr_SPEC;
813impl crate::sealed::RegSpec for Dmdrr_SPEC {
814 type DataType = u32;
815}
816#[doc = "DMA Destination Reload Address Register"]
817pub type Dmdrr = crate::RegValueT<Dmdrr_SPEC>;
818
819impl NoBitfieldReg<Dmdrr_SPEC> for Dmdrr {}
820impl ::core::default::Default for Dmdrr {
821 #[inline(always)]
822 fn default() -> Dmdrr {
823 <crate::RegValueT<Dmdrr_SPEC> as RegisterValue<_>>::new(0)
824 }
825}
826
827#[doc(hidden)]
828#[derive(Copy, Clone, Eq, PartialEq)]
829pub struct Dmsbs_SPEC;
830impl crate::sealed::RegSpec for Dmsbs_SPEC {
831 type DataType = u32;
832}
833#[doc = "DMA Source Buffer Size Register"]
834pub type Dmsbs = crate::RegValueT<Dmsbs_SPEC>;
835
836impl Dmsbs {
837 #[doc = "Functions as data transfer counter in repeat-block transfer mode"]
838 #[inline(always)]
839 pub fn dmsbsl(
840 self,
841 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Dmsbs_SPEC, crate::common::RW> {
842 crate::common::RegisterField::<0,0xffff,1,0,u16, Dmsbs_SPEC,crate::common::RW>::from_register(self,0)
843 }
844 #[doc = "Specifies the repeat-area size in repeat-block transfer mode"]
845 #[inline(always)]
846 pub fn dmsbsh(
847 self,
848 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, Dmsbs_SPEC, crate::common::RW> {
849 crate::common::RegisterField::<16,0xffff,1,0,u16, Dmsbs_SPEC,crate::common::RW>::from_register(self,0)
850 }
851}
852impl ::core::default::Default for Dmsbs {
853 #[inline(always)]
854 fn default() -> Dmsbs {
855 <crate::RegValueT<Dmsbs_SPEC> as RegisterValue<_>>::new(0)
856 }
857}
858
859#[doc(hidden)]
860#[derive(Copy, Clone, Eq, PartialEq)]
861pub struct Dmdbs_SPEC;
862impl crate::sealed::RegSpec for Dmdbs_SPEC {
863 type DataType = u32;
864}
865#[doc = "DMA Destination Buffer Size Register"]
866pub type Dmdbs = crate::RegValueT<Dmdbs_SPEC>;
867
868impl Dmdbs {
869 #[doc = "Functions as data transfer counter in repeat-block transfer mode."]
870 #[inline(always)]
871 pub fn dmdbsl(
872 self,
873 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, Dmdbs_SPEC, crate::common::RW> {
874 crate::common::RegisterField::<0,0xffff,1,0,u16, Dmdbs_SPEC,crate::common::RW>::from_register(self,0)
875 }
876 #[doc = "Specifies the repeat-area size in repeat-block transfer mode."]
877 #[inline(always)]
878 pub fn dmdbsh(
879 self,
880 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, Dmdbs_SPEC, crate::common::RW> {
881 crate::common::RegisterField::<16,0xffff,1,0,u16, Dmdbs_SPEC,crate::common::RW>::from_register(self,0)
882 }
883}
884impl ::core::default::Default for Dmdbs {
885 #[inline(always)]
886 fn default() -> Dmdbs {
887 <crate::RegValueT<Dmdbs_SPEC> as RegisterValue<_>>::new(0)
888 }
889}