ra4e2_pac/
cec.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Consumer Electronics Control"]
28unsafe impl ::core::marker::Send for super::Cec {}
29unsafe impl ::core::marker::Sync for super::Cec {}
30impl super::Cec {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "CEC Local Address Setting Register"]
37    #[inline(always)]
38    pub const fn cadr(&self) -> &'static crate::common::Reg<self::Cadr_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Cadr_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(0usize),
42            )
43        }
44    }
45
46    #[doc = "CEC Control Register 1"]
47    #[inline(always)]
48    pub const fn cecctl1(
49        &self,
50    ) -> &'static crate::common::Reg<self::Cecctl1_SPEC, crate::common::RW> {
51        unsafe {
52            crate::common::Reg::<self::Cecctl1_SPEC, crate::common::RW>::from_ptr(
53                self._svd2pac_as_ptr().add(2usize),
54            )
55        }
56    }
57
58    #[doc = "CEC Transmission Start Bit Width Setting Register"]
59    #[inline(always)]
60    pub const fn statb(&self) -> &'static crate::common::Reg<self::Statb_SPEC, crate::common::RW> {
61        unsafe {
62            crate::common::Reg::<self::Statb_SPEC, crate::common::RW>::from_ptr(
63                self._svd2pac_as_ptr().add(4usize),
64            )
65        }
66    }
67
68    #[doc = "CEC Transmission Start Bit Low Width Setting Register"]
69    #[inline(always)]
70    pub const fn statl(&self) -> &'static crate::common::Reg<self::Statl_SPEC, crate::common::RW> {
71        unsafe {
72            crate::common::Reg::<self::Statl_SPEC, crate::common::RW>::from_ptr(
73                self._svd2pac_as_ptr().add(6usize),
74            )
75        }
76    }
77
78    #[doc = "CEC Transmission Logical 0 Low Width Setting Register"]
79    #[inline(always)]
80    pub const fn lgc0l(&self) -> &'static crate::common::Reg<self::Lgc0L_SPEC, crate::common::RW> {
81        unsafe {
82            crate::common::Reg::<self::Lgc0L_SPEC, crate::common::RW>::from_ptr(
83                self._svd2pac_as_ptr().add(8usize),
84            )
85        }
86    }
87
88    #[doc = "CEC Transmission Logical 1 Low Width Setting Register"]
89    #[inline(always)]
90    pub const fn lgc1l(&self) -> &'static crate::common::Reg<self::Lgc1L_SPEC, crate::common::RW> {
91        unsafe {
92            crate::common::Reg::<self::Lgc1L_SPEC, crate::common::RW>::from_ptr(
93                self._svd2pac_as_ptr().add(10usize),
94            )
95        }
96    }
97
98    #[doc = "CEC Transmission Data Bit Width Setting Register"]
99    #[inline(always)]
100    pub const fn datb(&self) -> &'static crate::common::Reg<self::Datb_SPEC, crate::common::RW> {
101        unsafe {
102            crate::common::Reg::<self::Datb_SPEC, crate::common::RW>::from_ptr(
103                self._svd2pac_as_ptr().add(12usize),
104            )
105        }
106    }
107
108    #[doc = "CEC Reception Data Sampling Time Setting Register"]
109    #[inline(always)]
110    pub const fn nomt(&self) -> &'static crate::common::Reg<self::Nomt_SPEC, crate::common::RW> {
111        unsafe {
112            crate::common::Reg::<self::Nomt_SPEC, crate::common::RW>::from_ptr(
113                self._svd2pac_as_ptr().add(14usize),
114            )
115        }
116    }
117
118    #[doc = "CEC Reception Start Bit Minimum Low Width Setting Register"]
119    #[inline(always)]
120    pub const fn statll(
121        &self,
122    ) -> &'static crate::common::Reg<self::Statll_SPEC, crate::common::RW> {
123        unsafe {
124            crate::common::Reg::<self::Statll_SPEC, crate::common::RW>::from_ptr(
125                self._svd2pac_as_ptr().add(16usize),
126            )
127        }
128    }
129
130    #[doc = "CEC Reception Start Bit Maximum Low Width Setting Register"]
131    #[inline(always)]
132    pub const fn statlh(
133        &self,
134    ) -> &'static crate::common::Reg<self::Statlh_SPEC, crate::common::RW> {
135        unsafe {
136            crate::common::Reg::<self::Statlh_SPEC, crate::common::RW>::from_ptr(
137                self._svd2pac_as_ptr().add(18usize),
138            )
139        }
140    }
141
142    #[doc = "CEC Reception Start Bit Minimum Bit Width Setting Register"]
143    #[inline(always)]
144    pub const fn statbl(
145        &self,
146    ) -> &'static crate::common::Reg<self::Statbl_SPEC, crate::common::RW> {
147        unsafe {
148            crate::common::Reg::<self::Statbl_SPEC, crate::common::RW>::from_ptr(
149                self._svd2pac_as_ptr().add(20usize),
150            )
151        }
152    }
153
154    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting Register"]
155    #[inline(always)]
156    pub const fn statbh(
157        &self,
158    ) -> &'static crate::common::Reg<self::Statbh_SPEC, crate::common::RW> {
159        unsafe {
160            crate::common::Reg::<self::Statbh_SPEC, crate::common::RW>::from_ptr(
161                self._svd2pac_as_ptr().add(22usize),
162            )
163        }
164    }
165
166    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting Register"]
167    #[inline(always)]
168    pub const fn lgc0ll(
169        &self,
170    ) -> &'static crate::common::Reg<self::Lgc0Ll_SPEC, crate::common::RW> {
171        unsafe {
172            crate::common::Reg::<self::Lgc0Ll_SPEC, crate::common::RW>::from_ptr(
173                self._svd2pac_as_ptr().add(24usize),
174            )
175        }
176    }
177
178    #[doc = "CEC Reception Logical 0 Maximum Low Width Setting Register"]
179    #[inline(always)]
180    pub const fn lgc0lh(
181        &self,
182    ) -> &'static crate::common::Reg<self::Lgc0Lh_SPEC, crate::common::RW> {
183        unsafe {
184            crate::common::Reg::<self::Lgc0Lh_SPEC, crate::common::RW>::from_ptr(
185                self._svd2pac_as_ptr().add(26usize),
186            )
187        }
188    }
189
190    #[doc = "CEC Reception Logical 1 Minimum Low Width Setting Register"]
191    #[inline(always)]
192    pub const fn lgc1ll(
193        &self,
194    ) -> &'static crate::common::Reg<self::Lgc1Ll_SPEC, crate::common::RW> {
195        unsafe {
196            crate::common::Reg::<self::Lgc1Ll_SPEC, crate::common::RW>::from_ptr(
197                self._svd2pac_as_ptr().add(28usize),
198            )
199        }
200    }
201
202    #[doc = "CEC Reception Logical 1 Maximum Low Width Setting Register"]
203    #[inline(always)]
204    pub const fn lgc1lh(
205        &self,
206    ) -> &'static crate::common::Reg<self::Lgc1Lh_SPEC, crate::common::RW> {
207        unsafe {
208            crate::common::Reg::<self::Lgc1Lh_SPEC, crate::common::RW>::from_ptr(
209                self._svd2pac_as_ptr().add(30usize),
210            )
211        }
212    }
213
214    #[doc = "CEC Reception Data Bit Minimum Bit Width Setting Register"]
215    #[inline(always)]
216    pub const fn datbl(&self) -> &'static crate::common::Reg<self::Datbl_SPEC, crate::common::RW> {
217        unsafe {
218            crate::common::Reg::<self::Datbl_SPEC, crate::common::RW>::from_ptr(
219                self._svd2pac_as_ptr().add(32usize),
220            )
221        }
222    }
223
224    #[doc = "CEC Reception Data Bit Maximum Bit Width Setting Register"]
225    #[inline(always)]
226    pub const fn datbh(&self) -> &'static crate::common::Reg<self::Datbh_SPEC, crate::common::RW> {
227        unsafe {
228            crate::common::Reg::<self::Datbh_SPEC, crate::common::RW>::from_ptr(
229                self._svd2pac_as_ptr().add(34usize),
230            )
231        }
232    }
233
234    #[doc = "CEC Data Bit Reference Width Setting Register"]
235    #[inline(always)]
236    pub const fn nomp(&self) -> &'static crate::common::Reg<self::Nomp_SPEC, crate::common::RW> {
237        unsafe {
238            crate::common::Reg::<self::Nomp_SPEC, crate::common::RW>::from_ptr(
239                self._svd2pac_as_ptr().add(36usize),
240            )
241        }
242    }
243
244    #[doc = "CEC Extension Mode Register"]
245    #[inline(always)]
246    pub const fn cecexmd(
247        &self,
248    ) -> &'static crate::common::Reg<self::Cecexmd_SPEC, crate::common::RW> {
249        unsafe {
250            crate::common::Reg::<self::Cecexmd_SPEC, crate::common::RW>::from_ptr(
251                self._svd2pac_as_ptr().add(40usize),
252            )
253        }
254    }
255
256    #[doc = "CEC Extension Monitor Register"]
257    #[inline(always)]
258    pub const fn cecexmon(
259        &self,
260    ) -> &'static crate::common::Reg<self::Cecexmon_SPEC, crate::common::RW> {
261        unsafe {
262            crate::common::Reg::<self::Cecexmon_SPEC, crate::common::RW>::from_ptr(
263                self._svd2pac_as_ptr().add(42usize),
264            )
265        }
266    }
267
268    #[doc = "CEC Transmission Buffer Register"]
269    #[inline(always)]
270    pub const fn ctxd(&self) -> &'static crate::common::Reg<self::Ctxd_SPEC, crate::common::RW> {
271        unsafe {
272            crate::common::Reg::<self::Ctxd_SPEC, crate::common::RW>::from_ptr(
273                self._svd2pac_as_ptr().add(64usize),
274            )
275        }
276    }
277
278    #[doc = "CEC Reception Buffer Register"]
279    #[inline(always)]
280    pub const fn crxd(&self) -> &'static crate::common::Reg<self::Crxd_SPEC, crate::common::RW> {
281        unsafe {
282            crate::common::Reg::<self::Crxd_SPEC, crate::common::RW>::from_ptr(
283                self._svd2pac_as_ptr().add(65usize),
284            )
285        }
286    }
287
288    #[doc = "CEC Communication Error Status Register"]
289    #[inline(always)]
290    pub const fn ceces(&self) -> &'static crate::common::Reg<self::Ceces_SPEC, crate::common::RW> {
291        unsafe {
292            crate::common::Reg::<self::Ceces_SPEC, crate::common::RW>::from_ptr(
293                self._svd2pac_as_ptr().add(66usize),
294            )
295        }
296    }
297
298    #[doc = "CEC Communication Status Register"]
299    #[inline(always)]
300    pub const fn cecs(&self) -> &'static crate::common::Reg<self::Cecs_SPEC, crate::common::RW> {
301        unsafe {
302            crate::common::Reg::<self::Cecs_SPEC, crate::common::RW>::from_ptr(
303                self._svd2pac_as_ptr().add(67usize),
304            )
305        }
306    }
307
308    #[doc = "CEC Communication Error Flag Clear Trigger Register"]
309    #[inline(always)]
310    pub const fn cecfc(&self) -> &'static crate::common::Reg<self::Cecfc_SPEC, crate::common::RW> {
311        unsafe {
312            crate::common::Reg::<self::Cecfc_SPEC, crate::common::RW>::from_ptr(
313                self._svd2pac_as_ptr().add(68usize),
314            )
315        }
316    }
317
318    #[doc = "CEC Control Register 0"]
319    #[inline(always)]
320    pub const fn cecctl0(
321        &self,
322    ) -> &'static crate::common::Reg<self::Cecctl0_SPEC, crate::common::RW> {
323        unsafe {
324            crate::common::Reg::<self::Cecctl0_SPEC, crate::common::RW>::from_ptr(
325                self._svd2pac_as_ptr().add(69usize),
326            )
327        }
328    }
329}
330#[doc(hidden)]
331#[derive(Copy, Clone, Eq, PartialEq)]
332pub struct Cadr_SPEC;
333impl crate::sealed::RegSpec for Cadr_SPEC {
334    type DataType = u16;
335}
336#[doc = "CEC Local Address Setting Register"]
337pub type Cadr = crate::RegValueT<Cadr_SPEC>;
338
339impl Cadr {
340    #[doc = "Local Address at Address 0 (TV)"]
341    #[inline(always)]
342    pub fn adr00(
343        self,
344    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cadr::Adr00, Cadr_SPEC, crate::common::RW> {
345        crate::common::RegisterField::<0,0x1,1,0,cadr::Adr00, Cadr_SPEC,crate::common::RW>::from_register(self,0)
346    }
347    #[doc = "Local Address Setting at Address 1 (recording device 1)"]
348    #[inline(always)]
349    pub fn adr01(
350        self,
351    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cadr::Adr01, Cadr_SPEC, crate::common::RW> {
352        crate::common::RegisterField::<1,0x1,1,0,cadr::Adr01, Cadr_SPEC,crate::common::RW>::from_register(self,0)
353    }
354    #[doc = "Local Address Setting at Address 2 (recording device 2)"]
355    #[inline(always)]
356    pub fn adr02(
357        self,
358    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cadr::Adr02, Cadr_SPEC, crate::common::RW> {
359        crate::common::RegisterField::<2,0x1,1,0,cadr::Adr02, Cadr_SPEC,crate::common::RW>::from_register(self,0)
360    }
361    #[doc = "Local Address Setting at Address 3 (tuner 1)"]
362    #[inline(always)]
363    pub fn adr03(
364        self,
365    ) -> crate::common::RegisterField<3, 0x1, 1, 0, cadr::Adr03, Cadr_SPEC, crate::common::RW> {
366        crate::common::RegisterField::<3,0x1,1,0,cadr::Adr03, Cadr_SPEC,crate::common::RW>::from_register(self,0)
367    }
368    #[doc = "Local Address Setting at Address 4 (playback device 1)"]
369    #[inline(always)]
370    pub fn adr04(
371        self,
372    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cadr::Adr04, Cadr_SPEC, crate::common::RW> {
373        crate::common::RegisterField::<4,0x1,1,0,cadr::Adr04, Cadr_SPEC,crate::common::RW>::from_register(self,0)
374    }
375    #[doc = "Local Address Setting at Address 5 (audio system)"]
376    #[inline(always)]
377    pub fn adr05(
378        self,
379    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cadr::Adr05, Cadr_SPEC, crate::common::RW> {
380        crate::common::RegisterField::<5,0x1,1,0,cadr::Adr05, Cadr_SPEC,crate::common::RW>::from_register(self,0)
381    }
382    #[doc = "Local Address Setting at Address 6 (tuner 2)"]
383    #[inline(always)]
384    pub fn adr06(
385        self,
386    ) -> crate::common::RegisterField<6, 0x1, 1, 0, cadr::Adr06, Cadr_SPEC, crate::common::RW> {
387        crate::common::RegisterField::<6,0x1,1,0,cadr::Adr06, Cadr_SPEC,crate::common::RW>::from_register(self,0)
388    }
389    #[doc = "Local Address Setting at Address 7 (tuner 3)"]
390    #[inline(always)]
391    pub fn adr07(
392        self,
393    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cadr::Adr07, Cadr_SPEC, crate::common::RW> {
394        crate::common::RegisterField::<7,0x1,1,0,cadr::Adr07, Cadr_SPEC,crate::common::RW>::from_register(self,0)
395    }
396    #[doc = "Local Address Setting at Address 8 (playback device 2)"]
397    #[inline(always)]
398    pub fn adr08(
399        self,
400    ) -> crate::common::RegisterField<8, 0x1, 1, 0, cadr::Adr08, Cadr_SPEC, crate::common::RW> {
401        crate::common::RegisterField::<8,0x1,1,0,cadr::Adr08, Cadr_SPEC,crate::common::RW>::from_register(self,0)
402    }
403    #[doc = "Local Address Setting at Address 9 (recording device 3)"]
404    #[inline(always)]
405    pub fn adr09(
406        self,
407    ) -> crate::common::RegisterField<9, 0x1, 1, 0, cadr::Adr09, Cadr_SPEC, crate::common::RW> {
408        crate::common::RegisterField::<9,0x1,1,0,cadr::Adr09, Cadr_SPEC,crate::common::RW>::from_register(self,0)
409    }
410    #[doc = "Local Address Setting at Address 10 (tuner 4)"]
411    #[inline(always)]
412    pub fn adr10(
413        self,
414    ) -> crate::common::RegisterField<10, 0x1, 1, 0, cadr::Adr10, Cadr_SPEC, crate::common::RW>
415    {
416        crate::common::RegisterField::<10,0x1,1,0,cadr::Adr10, Cadr_SPEC,crate::common::RW>::from_register(self,0)
417    }
418    #[doc = "Local Address Setting at Address 11 (playback device 3)"]
419    #[inline(always)]
420    pub fn adr11(
421        self,
422    ) -> crate::common::RegisterField<11, 0x1, 1, 0, cadr::Adr11, Cadr_SPEC, crate::common::RW>
423    {
424        crate::common::RegisterField::<11,0x1,1,0,cadr::Adr11, Cadr_SPEC,crate::common::RW>::from_register(self,0)
425    }
426    #[doc = "Local Address Setting at Address 12 (reserved)"]
427    #[inline(always)]
428    pub fn adr12(
429        self,
430    ) -> crate::common::RegisterField<12, 0x1, 1, 0, cadr::Adr12, Cadr_SPEC, crate::common::RW>
431    {
432        crate::common::RegisterField::<12,0x1,1,0,cadr::Adr12, Cadr_SPEC,crate::common::RW>::from_register(self,0)
433    }
434    #[doc = "Local Address Setting at Address 13 (reserved)"]
435    #[inline(always)]
436    pub fn adr13(
437        self,
438    ) -> crate::common::RegisterField<13, 0x1, 1, 0, cadr::Adr13, Cadr_SPEC, crate::common::RW>
439    {
440        crate::common::RegisterField::<13,0x1,1,0,cadr::Adr13, Cadr_SPEC,crate::common::RW>::from_register(self,0)
441    }
442    #[doc = "Local Address Setting at Address 14 (specific use)"]
443    #[inline(always)]
444    pub fn adr14(
445        self,
446    ) -> crate::common::RegisterField<14, 0x1, 1, 0, cadr::Adr14, Cadr_SPEC, crate::common::RW>
447    {
448        crate::common::RegisterField::<14,0x1,1,0,cadr::Adr14, Cadr_SPEC,crate::common::RW>::from_register(self,0)
449    }
450}
451impl ::core::default::Default for Cadr {
452    #[inline(always)]
453    fn default() -> Cadr {
454        <crate::RegValueT<Cadr_SPEC> as RegisterValue<_>>::new(0)
455    }
456}
457pub mod cadr {
458
459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
460    pub struct Adr00_SPEC;
461    pub type Adr00 = crate::EnumBitfieldStruct<u8, Adr00_SPEC>;
462    impl Adr00 {
463        #[doc = "Does not set as local address."]
464        pub const _0: Self = Self::new(0);
465        #[doc = "Sets as local address."]
466        pub const _1: Self = Self::new(1);
467    }
468    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
469    pub struct Adr01_SPEC;
470    pub type Adr01 = crate::EnumBitfieldStruct<u8, Adr01_SPEC>;
471    impl Adr01 {
472        #[doc = "Does not set as local address."]
473        pub const _0: Self = Self::new(0);
474        #[doc = "Sets as local address."]
475        pub const _1: Self = Self::new(1);
476    }
477    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
478    pub struct Adr02_SPEC;
479    pub type Adr02 = crate::EnumBitfieldStruct<u8, Adr02_SPEC>;
480    impl Adr02 {
481        #[doc = "Does not set as local address."]
482        pub const _0: Self = Self::new(0);
483        #[doc = "Sets as local address."]
484        pub const _1: Self = Self::new(1);
485    }
486    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
487    pub struct Adr03_SPEC;
488    pub type Adr03 = crate::EnumBitfieldStruct<u8, Adr03_SPEC>;
489    impl Adr03 {
490        #[doc = "Does not set as local address."]
491        pub const _0: Self = Self::new(0);
492        #[doc = "Sets as local address."]
493        pub const _1: Self = Self::new(1);
494    }
495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
496    pub struct Adr04_SPEC;
497    pub type Adr04 = crate::EnumBitfieldStruct<u8, Adr04_SPEC>;
498    impl Adr04 {
499        #[doc = "Does not set as local address."]
500        pub const _0: Self = Self::new(0);
501        #[doc = "Sets as local address."]
502        pub const _1: Self = Self::new(1);
503    }
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Adr05_SPEC;
506    pub type Adr05 = crate::EnumBitfieldStruct<u8, Adr05_SPEC>;
507    impl Adr05 {
508        #[doc = "Does not set as local address."]
509        pub const _0: Self = Self::new(0);
510        #[doc = "Sets as local address."]
511        pub const _1: Self = Self::new(1);
512    }
513    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
514    pub struct Adr06_SPEC;
515    pub type Adr06 = crate::EnumBitfieldStruct<u8, Adr06_SPEC>;
516    impl Adr06 {
517        #[doc = "Does not set as local address."]
518        pub const _0: Self = Self::new(0);
519        #[doc = "Sets as local address."]
520        pub const _1: Self = Self::new(1);
521    }
522    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
523    pub struct Adr07_SPEC;
524    pub type Adr07 = crate::EnumBitfieldStruct<u8, Adr07_SPEC>;
525    impl Adr07 {
526        #[doc = "Does not set as local address."]
527        pub const _0: Self = Self::new(0);
528        #[doc = "Sets as local address."]
529        pub const _1: Self = Self::new(1);
530    }
531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
532    pub struct Adr08_SPEC;
533    pub type Adr08 = crate::EnumBitfieldStruct<u8, Adr08_SPEC>;
534    impl Adr08 {
535        #[doc = "Does not set as local address."]
536        pub const _0: Self = Self::new(0);
537        #[doc = "Sets as local address."]
538        pub const _1: Self = Self::new(1);
539    }
540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
541    pub struct Adr09_SPEC;
542    pub type Adr09 = crate::EnumBitfieldStruct<u8, Adr09_SPEC>;
543    impl Adr09 {
544        #[doc = "Does not set as local address."]
545        pub const _0: Self = Self::new(0);
546        #[doc = "Sets as local address."]
547        pub const _1: Self = Self::new(1);
548    }
549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
550    pub struct Adr10_SPEC;
551    pub type Adr10 = crate::EnumBitfieldStruct<u8, Adr10_SPEC>;
552    impl Adr10 {
553        #[doc = "Does not set as local address."]
554        pub const _0: Self = Self::new(0);
555        #[doc = "Sets as local address."]
556        pub const _1: Self = Self::new(1);
557    }
558    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
559    pub struct Adr11_SPEC;
560    pub type Adr11 = crate::EnumBitfieldStruct<u8, Adr11_SPEC>;
561    impl Adr11 {
562        #[doc = "Does not set as local address."]
563        pub const _0: Self = Self::new(0);
564        #[doc = "Sets as local address."]
565        pub const _1: Self = Self::new(1);
566    }
567    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
568    pub struct Adr12_SPEC;
569    pub type Adr12 = crate::EnumBitfieldStruct<u8, Adr12_SPEC>;
570    impl Adr12 {
571        #[doc = "Does not set as local address."]
572        pub const _0: Self = Self::new(0);
573        #[doc = "Sets as local address."]
574        pub const _1: Self = Self::new(1);
575    }
576    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
577    pub struct Adr13_SPEC;
578    pub type Adr13 = crate::EnumBitfieldStruct<u8, Adr13_SPEC>;
579    impl Adr13 {
580        #[doc = "Does not set as local address."]
581        pub const _0: Self = Self::new(0);
582        #[doc = "Sets as local address."]
583        pub const _1: Self = Self::new(1);
584    }
585    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
586    pub struct Adr14_SPEC;
587    pub type Adr14 = crate::EnumBitfieldStruct<u8, Adr14_SPEC>;
588    impl Adr14 {
589        #[doc = "Does not set as local address."]
590        pub const _0: Self = Self::new(0);
591        #[doc = "Sets as local address."]
592        pub const _1: Self = Self::new(1);
593    }
594}
595#[doc(hidden)]
596#[derive(Copy, Clone, Eq, PartialEq)]
597pub struct Cecctl1_SPEC;
598impl crate::sealed::RegSpec for Cecctl1_SPEC {
599    type DataType = u8;
600}
601#[doc = "CEC Control Register 1"]
602pub type Cecctl1 = crate::RegValueT<Cecctl1_SPEC>;
603
604impl Cecctl1 {
605    #[doc = "Signal-Free Time Data Bit Width Select"]
606    #[inline(always)]
607    pub fn sft(
608        self,
609    ) -> crate::common::RegisterField<0, 0x3, 1, 0, cecctl1::Sft, Cecctl1_SPEC, crate::common::RW>
610    {
611        crate::common::RegisterField::<0,0x3,1,0,cecctl1::Sft, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
612    }
613    #[doc = "Communication Complete Interrupt (INTCE) Generation Timing Select"]
614    #[inline(always)]
615    pub fn cesel(
616        self,
617    ) -> crate::common::RegisterField<2, 0x3, 1, 0, cecctl1::Cesel, Cecctl1_SPEC, crate::common::RW>
618    {
619        crate::common::RegisterField::<2,0x3,1,0,cecctl1::Cesel, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
620    }
621    #[doc = "Start Bit Error Detection Select"]
622    #[inline(always)]
623    pub fn sterrd(
624        self,
625    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cecctl1::Sterrd, Cecctl1_SPEC, crate::common::RW>
626    {
627        crate::common::RegisterField::<4,0x1,1,0,cecctl1::Sterrd, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
628    }
629    #[doc = "Bus Lock Detection Select"]
630    #[inline(always)]
631    pub fn blerrd(
632        self,
633    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cecctl1::Blerrd, Cecctl1_SPEC, crate::common::RW>
634    {
635        crate::common::RegisterField::<5,0x1,1,0,cecctl1::Blerrd, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
636    }
637    #[doc = "CEC Data Interrupt (INTDA) Generation Select"]
638    #[inline(always)]
639    pub fn cintmk(
640        self,
641    ) -> crate::common::RegisterField<6, 0x1, 1, 0, cecctl1::Cintmk, Cecctl1_SPEC, crate::common::RW>
642    {
643        crate::common::RegisterField::<6,0x1,1,0,cecctl1::Cintmk, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
644    }
645    #[doc = "Digital Filter Select"]
646    #[inline(always)]
647    pub fn cdfc(
648        self,
649    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cecctl1::Cdfc, Cecctl1_SPEC, crate::common::RW>
650    {
651        crate::common::RegisterField::<7,0x1,1,0,cecctl1::Cdfc, Cecctl1_SPEC,crate::common::RW>::from_register(self,0)
652    }
653}
654impl ::core::default::Default for Cecctl1 {
655    #[inline(always)]
656    fn default() -> Cecctl1 {
657        <crate::RegValueT<Cecctl1_SPEC> as RegisterValue<_>>::new(0)
658    }
659}
660pub mod cecctl1 {
661
662    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
663    pub struct Sft_SPEC;
664    pub type Sft = crate::EnumBitfieldStruct<u8, Sft_SPEC>;
665    impl Sft {
666        #[doc = "3-data bit width"]
667        pub const _00: Self = Self::new(0);
668        #[doc = "5-data bit width"]
669        pub const _01: Self = Self::new(1);
670        #[doc = "7-data bit width"]
671        pub const _10: Self = Self::new(2);
672        #[doc = "Does not detect signal-free time."]
673        pub const _11: Self = Self::new(3);
674    }
675    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
676    pub struct Cesel_SPEC;
677    pub type Cesel = crate::EnumBitfieldStruct<u8, Cesel_SPEC>;
678    impl Cesel {
679        #[doc = "Generates communication complete interrupt once after ACK transmission (reception) of the last frame (EOM = 1) is complete and another time after signal-free time is detected."]
680        pub const _00: Self = Self::new(0);
681        #[doc = "Generates communication complete interrupt after ACK transmission (reception) of the last frame (EOM = 1) is completed."]
682        pub const _01: Self = Self::new(1);
683        #[doc = "Generates communication complete interrupt after signal-free time is detected."]
684        pub const _10: Self = Self::new(2);
685        #[doc = "Setting prohibited"]
686        pub const _11: Self = Self::new(3);
687    }
688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689    pub struct Sterrd_SPEC;
690    pub type Sterrd = crate::EnumBitfieldStruct<u8, Sterrd_SPEC>;
691    impl Sterrd {
692        #[doc = "Does not detect timing errors during start bit reception."]
693        pub const _0: Self = Self::new(0);
694        #[doc = "Detects timing errors during start bit reception."]
695        pub const _1: Self = Self::new(1);
696    }
697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
698    pub struct Blerrd_SPEC;
699    pub type Blerrd = crate::EnumBitfieldStruct<u8, Blerrd_SPEC>;
700    impl Blerrd {
701        #[doc = "Does not detect sticking of receive data to high or low"]
702        pub const _0: Self = Self::new(0);
703        #[doc = "Detects sticking of receive data to high or low."]
704        pub const _1: Self = Self::new(1);
705    }
706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
707    pub struct Cintmk_SPEC;
708    pub type Cintmk = crate::EnumBitfieldStruct<u8, Cintmk_SPEC>;
709    impl Cintmk {
710        #[doc = "Does not generate an interrupt when the addresses do not match."]
711        pub const _0: Self = Self::new(0);
712        #[doc = "Generates an interrupt when the addresses do not match."]
713        pub const _1: Self = Self::new(1);
714    }
715    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
716    pub struct Cdfc_SPEC;
717    pub type Cdfc = crate::EnumBitfieldStruct<u8, Cdfc_SPEC>;
718    impl Cdfc {
719        #[doc = "Does not use a digital filter."]
720        pub const _0: Self = Self::new(0);
721        #[doc = "Uses a digital filter."]
722        pub const _1: Self = Self::new(1);
723    }
724}
725#[doc(hidden)]
726#[derive(Copy, Clone, Eq, PartialEq)]
727pub struct Statb_SPEC;
728impl crate::sealed::RegSpec for Statb_SPEC {
729    type DataType = u16;
730}
731#[doc = "CEC Transmission Start Bit Width Setting Register"]
732pub type Statb = crate::RegValueT<Statb_SPEC>;
733
734impl Statb {
735    #[doc = "CEC Transmission Start Bit Width Setting"]
736    #[inline(always)]
737    pub fn statb(
738        self,
739    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statb_SPEC, crate::common::RW> {
740        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statb_SPEC,crate::common::RW>::from_register(self,0)
741    }
742}
743impl ::core::default::Default for Statb {
744    #[inline(always)]
745    fn default() -> Statb {
746        <crate::RegValueT<Statb_SPEC> as RegisterValue<_>>::new(0)
747    }
748}
749
750#[doc(hidden)]
751#[derive(Copy, Clone, Eq, PartialEq)]
752pub struct Statl_SPEC;
753impl crate::sealed::RegSpec for Statl_SPEC {
754    type DataType = u16;
755}
756#[doc = "CEC Transmission Start Bit Low Width Setting Register"]
757pub type Statl = crate::RegValueT<Statl_SPEC>;
758
759impl Statl {
760    #[doc = "CEC Transmission Start Bit Low Width Setting"]
761    #[inline(always)]
762    pub fn statl(
763        self,
764    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statl_SPEC, crate::common::RW> {
765        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statl_SPEC,crate::common::RW>::from_register(self,0)
766    }
767}
768impl ::core::default::Default for Statl {
769    #[inline(always)]
770    fn default() -> Statl {
771        <crate::RegValueT<Statl_SPEC> as RegisterValue<_>>::new(0)
772    }
773}
774
775#[doc(hidden)]
776#[derive(Copy, Clone, Eq, PartialEq)]
777pub struct Lgc0L_SPEC;
778impl crate::sealed::RegSpec for Lgc0L_SPEC {
779    type DataType = u16;
780}
781#[doc = "CEC Transmission Logical 0 Low Width Setting Register"]
782pub type Lgc0L = crate::RegValueT<Lgc0L_SPEC>;
783
784impl Lgc0L {
785    #[doc = "CEC Transmission Logical 0 Low Width Setting"]
786    #[inline(always)]
787    pub fn lgc0l(
788        self,
789    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc0L_SPEC, crate::common::RW> {
790        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc0L_SPEC,crate::common::RW>::from_register(self,0)
791    }
792}
793impl ::core::default::Default for Lgc0L {
794    #[inline(always)]
795    fn default() -> Lgc0L {
796        <crate::RegValueT<Lgc0L_SPEC> as RegisterValue<_>>::new(0)
797    }
798}
799
800#[doc(hidden)]
801#[derive(Copy, Clone, Eq, PartialEq)]
802pub struct Lgc1L_SPEC;
803impl crate::sealed::RegSpec for Lgc1L_SPEC {
804    type DataType = u16;
805}
806#[doc = "CEC Transmission Logical 1 Low Width Setting Register"]
807pub type Lgc1L = crate::RegValueT<Lgc1L_SPEC>;
808
809impl Lgc1L {
810    #[doc = "CEC Transmission Logical 1 Low Width Setting"]
811    #[inline(always)]
812    pub fn lgc1l(
813        self,
814    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc1L_SPEC, crate::common::RW> {
815        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc1L_SPEC,crate::common::RW>::from_register(self,0)
816    }
817}
818impl ::core::default::Default for Lgc1L {
819    #[inline(always)]
820    fn default() -> Lgc1L {
821        <crate::RegValueT<Lgc1L_SPEC> as RegisterValue<_>>::new(0)
822    }
823}
824
825#[doc(hidden)]
826#[derive(Copy, Clone, Eq, PartialEq)]
827pub struct Datb_SPEC;
828impl crate::sealed::RegSpec for Datb_SPEC {
829    type DataType = u16;
830}
831#[doc = "CEC Transmission Data Bit Width Setting Register"]
832pub type Datb = crate::RegValueT<Datb_SPEC>;
833
834impl Datb {
835    #[doc = "CEC Transmission Data Bit Width Setting"]
836    #[inline(always)]
837    pub fn datb(
838        self,
839    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Datb_SPEC, crate::common::RW> {
840        crate::common::RegisterField::<0,0x1ff,1,0,u16, Datb_SPEC,crate::common::RW>::from_register(self,0)
841    }
842}
843impl ::core::default::Default for Datb {
844    #[inline(always)]
845    fn default() -> Datb {
846        <crate::RegValueT<Datb_SPEC> as RegisterValue<_>>::new(0)
847    }
848}
849
850#[doc(hidden)]
851#[derive(Copy, Clone, Eq, PartialEq)]
852pub struct Nomt_SPEC;
853impl crate::sealed::RegSpec for Nomt_SPEC {
854    type DataType = u16;
855}
856#[doc = "CEC Reception Data Sampling Time Setting Register"]
857pub type Nomt = crate::RegValueT<Nomt_SPEC>;
858
859impl Nomt {
860    #[doc = "CEC Reception Data Sampling Time Setting,"]
861    #[inline(always)]
862    pub fn nomt(
863        self,
864    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Nomt_SPEC, crate::common::RW> {
865        crate::common::RegisterField::<0,0x1ff,1,0,u16, Nomt_SPEC,crate::common::RW>::from_register(self,0)
866    }
867}
868impl ::core::default::Default for Nomt {
869    #[inline(always)]
870    fn default() -> Nomt {
871        <crate::RegValueT<Nomt_SPEC> as RegisterValue<_>>::new(0)
872    }
873}
874
875#[doc(hidden)]
876#[derive(Copy, Clone, Eq, PartialEq)]
877pub struct Statll_SPEC;
878impl crate::sealed::RegSpec for Statll_SPEC {
879    type DataType = u16;
880}
881#[doc = "CEC Reception Start Bit Minimum Low Width Setting Register"]
882pub type Statll = crate::RegValueT<Statll_SPEC>;
883
884impl Statll {
885    #[doc = "CEC Reception Start Bit Minimum Low Width Setting"]
886    #[inline(always)]
887    pub fn statll(
888        self,
889    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statll_SPEC, crate::common::RW> {
890        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statll_SPEC,crate::common::RW>::from_register(self,0)
891    }
892}
893impl ::core::default::Default for Statll {
894    #[inline(always)]
895    fn default() -> Statll {
896        <crate::RegValueT<Statll_SPEC> as RegisterValue<_>>::new(0)
897    }
898}
899
900#[doc(hidden)]
901#[derive(Copy, Clone, Eq, PartialEq)]
902pub struct Statlh_SPEC;
903impl crate::sealed::RegSpec for Statlh_SPEC {
904    type DataType = u16;
905}
906#[doc = "CEC Reception Start Bit Maximum Low Width Setting Register"]
907pub type Statlh = crate::RegValueT<Statlh_SPEC>;
908
909impl Statlh {
910    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting"]
911    #[inline(always)]
912    pub fn statlh(
913        self,
914    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statlh_SPEC, crate::common::RW> {
915        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statlh_SPEC,crate::common::RW>::from_register(self,0)
916    }
917}
918impl ::core::default::Default for Statlh {
919    #[inline(always)]
920    fn default() -> Statlh {
921        <crate::RegValueT<Statlh_SPEC> as RegisterValue<_>>::new(0)
922    }
923}
924
925#[doc(hidden)]
926#[derive(Copy, Clone, Eq, PartialEq)]
927pub struct Statbl_SPEC;
928impl crate::sealed::RegSpec for Statbl_SPEC {
929    type DataType = u16;
930}
931#[doc = "CEC Reception Start Bit Minimum Bit Width Setting Register"]
932pub type Statbl = crate::RegValueT<Statbl_SPEC>;
933
934impl Statbl {
935    #[doc = "CEC Reception Start Bit Minimum Bit Width Setting"]
936    #[inline(always)]
937    pub fn statbl(
938        self,
939    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statbl_SPEC, crate::common::RW> {
940        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statbl_SPEC,crate::common::RW>::from_register(self,0)
941    }
942}
943impl ::core::default::Default for Statbl {
944    #[inline(always)]
945    fn default() -> Statbl {
946        <crate::RegValueT<Statbl_SPEC> as RegisterValue<_>>::new(0)
947    }
948}
949
950#[doc(hidden)]
951#[derive(Copy, Clone, Eq, PartialEq)]
952pub struct Statbh_SPEC;
953impl crate::sealed::RegSpec for Statbh_SPEC {
954    type DataType = u16;
955}
956#[doc = "CEC Reception Start Bit Maximum Bit Width Setting Register"]
957pub type Statbh = crate::RegValueT<Statbh_SPEC>;
958
959impl Statbh {
960    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting"]
961    #[inline(always)]
962    pub fn statbh(
963        self,
964    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Statbh_SPEC, crate::common::RW> {
965        crate::common::RegisterField::<0,0x1ff,1,0,u16, Statbh_SPEC,crate::common::RW>::from_register(self,0)
966    }
967}
968impl ::core::default::Default for Statbh {
969    #[inline(always)]
970    fn default() -> Statbh {
971        <crate::RegValueT<Statbh_SPEC> as RegisterValue<_>>::new(0)
972    }
973}
974
975#[doc(hidden)]
976#[derive(Copy, Clone, Eq, PartialEq)]
977pub struct Lgc0Ll_SPEC;
978impl crate::sealed::RegSpec for Lgc0Ll_SPEC {
979    type DataType = u16;
980}
981#[doc = "CEC Reception Logical 0 Minimum Low Width Setting Register"]
982pub type Lgc0Ll = crate::RegValueT<Lgc0Ll_SPEC>;
983
984impl Lgc0Ll {
985    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting"]
986    #[inline(always)]
987    pub fn lgc0ll(
988        self,
989    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc0Ll_SPEC, crate::common::RW> {
990        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc0Ll_SPEC,crate::common::RW>::from_register(self,0)
991    }
992}
993impl ::core::default::Default for Lgc0Ll {
994    #[inline(always)]
995    fn default() -> Lgc0Ll {
996        <crate::RegValueT<Lgc0Ll_SPEC> as RegisterValue<_>>::new(0)
997    }
998}
999
1000#[doc(hidden)]
1001#[derive(Copy, Clone, Eq, PartialEq)]
1002pub struct Lgc0Lh_SPEC;
1003impl crate::sealed::RegSpec for Lgc0Lh_SPEC {
1004    type DataType = u16;
1005}
1006#[doc = "CEC Reception Logical 0 Maximum Low Width Setting Register"]
1007pub type Lgc0Lh = crate::RegValueT<Lgc0Lh_SPEC>;
1008
1009impl Lgc0Lh {
1010    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting"]
1011    #[inline(always)]
1012    pub fn lgc0lh(
1013        self,
1014    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc0Lh_SPEC, crate::common::RW> {
1015        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc0Lh_SPEC,crate::common::RW>::from_register(self,0)
1016    }
1017}
1018impl ::core::default::Default for Lgc0Lh {
1019    #[inline(always)]
1020    fn default() -> Lgc0Lh {
1021        <crate::RegValueT<Lgc0Lh_SPEC> as RegisterValue<_>>::new(0)
1022    }
1023}
1024
1025#[doc(hidden)]
1026#[derive(Copy, Clone, Eq, PartialEq)]
1027pub struct Lgc1Ll_SPEC;
1028impl crate::sealed::RegSpec for Lgc1Ll_SPEC {
1029    type DataType = u16;
1030}
1031#[doc = "CEC Reception Logical 1 Minimum Low Width Setting Register"]
1032pub type Lgc1Ll = crate::RegValueT<Lgc1Ll_SPEC>;
1033
1034impl Lgc1Ll {
1035    #[doc = "CEC Reception Logical 1 Minimum Low Width Setting"]
1036    #[inline(always)]
1037    pub fn lgc1ll(
1038        self,
1039    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc1Ll_SPEC, crate::common::RW> {
1040        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc1Ll_SPEC,crate::common::RW>::from_register(self,0)
1041    }
1042}
1043impl ::core::default::Default for Lgc1Ll {
1044    #[inline(always)]
1045    fn default() -> Lgc1Ll {
1046        <crate::RegValueT<Lgc1Ll_SPEC> as RegisterValue<_>>::new(0)
1047    }
1048}
1049
1050#[doc(hidden)]
1051#[derive(Copy, Clone, Eq, PartialEq)]
1052pub struct Lgc1Lh_SPEC;
1053impl crate::sealed::RegSpec for Lgc1Lh_SPEC {
1054    type DataType = u16;
1055}
1056#[doc = "CEC Reception Logical 1 Maximum Low Width Setting Register"]
1057pub type Lgc1Lh = crate::RegValueT<Lgc1Lh_SPEC>;
1058
1059impl Lgc1Lh {
1060    #[doc = "CEC Reception Logical 1 Maximum Low Width Setting"]
1061    #[inline(always)]
1062    pub fn lgc1lh(
1063        self,
1064    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Lgc1Lh_SPEC, crate::common::RW> {
1065        crate::common::RegisterField::<0,0x1ff,1,0,u16, Lgc1Lh_SPEC,crate::common::RW>::from_register(self,0)
1066    }
1067}
1068impl ::core::default::Default for Lgc1Lh {
1069    #[inline(always)]
1070    fn default() -> Lgc1Lh {
1071        <crate::RegValueT<Lgc1Lh_SPEC> as RegisterValue<_>>::new(0)
1072    }
1073}
1074
1075#[doc(hidden)]
1076#[derive(Copy, Clone, Eq, PartialEq)]
1077pub struct Datbl_SPEC;
1078impl crate::sealed::RegSpec for Datbl_SPEC {
1079    type DataType = u16;
1080}
1081#[doc = "CEC Reception Data Bit Minimum Bit Width Setting Register"]
1082pub type Datbl = crate::RegValueT<Datbl_SPEC>;
1083
1084impl Datbl {
1085    #[doc = "CEC Reception Data Bit Minimum Bit Width Setting"]
1086    #[inline(always)]
1087    pub fn datbl(
1088        self,
1089    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Datbl_SPEC, crate::common::RW> {
1090        crate::common::RegisterField::<0,0x1ff,1,0,u16, Datbl_SPEC,crate::common::RW>::from_register(self,0)
1091    }
1092}
1093impl ::core::default::Default for Datbl {
1094    #[inline(always)]
1095    fn default() -> Datbl {
1096        <crate::RegValueT<Datbl_SPEC> as RegisterValue<_>>::new(0)
1097    }
1098}
1099
1100#[doc(hidden)]
1101#[derive(Copy, Clone, Eq, PartialEq)]
1102pub struct Datbh_SPEC;
1103impl crate::sealed::RegSpec for Datbh_SPEC {
1104    type DataType = u16;
1105}
1106#[doc = "CEC Reception Data Bit Maximum Bit Width Setting Register"]
1107pub type Datbh = crate::RegValueT<Datbh_SPEC>;
1108
1109impl Datbh {
1110    #[doc = "CEC Reception Data Bit Maximum Bit Width Setting"]
1111    #[inline(always)]
1112    pub fn datbh(
1113        self,
1114    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Datbh_SPEC, crate::common::RW> {
1115        crate::common::RegisterField::<0,0x1ff,1,0,u16, Datbh_SPEC,crate::common::RW>::from_register(self,0)
1116    }
1117}
1118impl ::core::default::Default for Datbh {
1119    #[inline(always)]
1120    fn default() -> Datbh {
1121        <crate::RegValueT<Datbh_SPEC> as RegisterValue<_>>::new(0)
1122    }
1123}
1124
1125#[doc(hidden)]
1126#[derive(Copy, Clone, Eq, PartialEq)]
1127pub struct Nomp_SPEC;
1128impl crate::sealed::RegSpec for Nomp_SPEC {
1129    type DataType = u16;
1130}
1131#[doc = "CEC Data Bit Reference Width Setting Register"]
1132pub type Nomp = crate::RegValueT<Nomp_SPEC>;
1133
1134impl Nomp {
1135    #[doc = "CEC Data Bit Reference Width Setting"]
1136    #[inline(always)]
1137    pub fn nomp(
1138        self,
1139    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, Nomp_SPEC, crate::common::RW> {
1140        crate::common::RegisterField::<0,0x1ff,1,0,u16, Nomp_SPEC,crate::common::RW>::from_register(self,0)
1141    }
1142}
1143impl ::core::default::Default for Nomp {
1144    #[inline(always)]
1145    fn default() -> Nomp {
1146        <crate::RegValueT<Nomp_SPEC> as RegisterValue<_>>::new(0)
1147    }
1148}
1149
1150#[doc(hidden)]
1151#[derive(Copy, Clone, Eq, PartialEq)]
1152pub struct Cecexmd_SPEC;
1153impl crate::sealed::RegSpec for Cecexmd_SPEC {
1154    type DataType = u8;
1155}
1156#[doc = "CEC Extension Mode Register"]
1157pub type Cecexmd = crate::RegValueT<Cecexmd_SPEC>;
1158
1159impl Cecexmd {
1160    #[doc = "Pulse Output Function Enable by Long Bit Width Error"]
1161    #[inline(always)]
1162    pub fn lerplen(
1163        self,
1164    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cecexmd::Lerplen, Cecexmd_SPEC, crate::common::RW>
1165    {
1166        crate::common::RegisterField::<
1167            4,
1168            0x1,
1169            1,
1170            0,
1171            cecexmd::Lerplen,
1172            Cecexmd_SPEC,
1173            crate::common::RW,
1174        >::from_register(self, 0)
1175    }
1176    #[doc = "Start Detection Reception Restart Enable"]
1177    #[inline(always)]
1178    pub fn rercven(
1179        self,
1180    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cecexmd::Rercven, Cecexmd_SPEC, crate::common::RW>
1181    {
1182        crate::common::RegisterField::<
1183            5,
1184            0x1,
1185            1,
1186            0,
1187            cecexmd::Rercven,
1188            Cecexmd_SPEC,
1189            crate::common::RW,
1190        >::from_register(self, 0)
1191    }
1192    #[doc = "INTDA Reception Interrupt Timing Change"]
1193    #[inline(always)]
1194    pub fn rcvintdsel(
1195        self,
1196    ) -> crate::common::RegisterField<
1197        7,
1198        0x1,
1199        1,
1200        0,
1201        cecexmd::Rcvintdsel,
1202        Cecexmd_SPEC,
1203        crate::common::RW,
1204    > {
1205        crate::common::RegisterField::<
1206            7,
1207            0x1,
1208            1,
1209            0,
1210            cecexmd::Rcvintdsel,
1211            Cecexmd_SPEC,
1212            crate::common::RW,
1213        >::from_register(self, 0)
1214    }
1215}
1216impl ::core::default::Default for Cecexmd {
1217    #[inline(always)]
1218    fn default() -> Cecexmd {
1219        <crate::RegValueT<Cecexmd_SPEC> as RegisterValue<_>>::new(0)
1220    }
1221}
1222pub mod cecexmd {
1223
1224    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1225    pub struct Lerplen_SPEC;
1226    pub type Lerplen = crate::EnumBitfieldStruct<u8, Lerplen_SPEC>;
1227    impl Lerplen {
1228        #[doc = "Detects only a long bit width error."]
1229        pub const _0: Self = Self::new(0);
1230        #[doc = "Detects a long bit width error and outputs an error handling pulse."]
1231        pub const _1: Self = Self::new(1);
1232    }
1233    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1234    pub struct Rercven_SPEC;
1235    pub type Rercven = crate::EnumBitfieldStruct<u8, Rercven_SPEC>;
1236    impl Rercven {
1237        #[doc = "Does not restart reception when the start bit is detected during reception."]
1238        pub const _0: Self = Self::new(0);
1239        #[doc = "Restarts reception when the start bit is detected during reception."]
1240        pub const _1: Self = Self::new(1);
1241    }
1242    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1243    pub struct Rcvintdsel_SPEC;
1244    pub type Rcvintdsel = crate::EnumBitfieldStruct<u8, Rcvintdsel_SPEC>;
1245    impl Rcvintdsel {
1246        #[doc = "EOM timing (9th bit of data)"]
1247        pub const _0: Self = Self::new(0);
1248        #[doc = "ACK timing (10th bit of data)"]
1249        pub const _1: Self = Self::new(1);
1250    }
1251}
1252#[doc(hidden)]
1253#[derive(Copy, Clone, Eq, PartialEq)]
1254pub struct Cecexmon_SPEC;
1255impl crate::sealed::RegSpec for Cecexmon_SPEC {
1256    type DataType = u8;
1257}
1258#[doc = "CEC Extension Monitor Register"]
1259pub type Cecexmon = crate::RegValueT<Cecexmon_SPEC>;
1260
1261impl Cecexmon {
1262    #[doc = "CEC Line Monitor"]
1263    #[inline(always)]
1264    pub fn ceclnmon(
1265        self,
1266    ) -> crate::common::RegisterField<
1267        0,
1268        0x1,
1269        1,
1270        0,
1271        cecexmon::Ceclnmon,
1272        Cecexmon_SPEC,
1273        crate::common::R,
1274    > {
1275        crate::common::RegisterField::<
1276            0,
1277            0x1,
1278            1,
1279            0,
1280            cecexmon::Ceclnmon,
1281            Cecexmon_SPEC,
1282            crate::common::R,
1283        >::from_register(self, 0)
1284    }
1285    #[doc = "ACK Flag"]
1286    #[inline(always)]
1287    pub fn ackf(
1288        self,
1289    ) -> crate::common::RegisterFieldBool<1, 1, 0, Cecexmon_SPEC, crate::common::R> {
1290        crate::common::RegisterFieldBool::<1, 1, 0, Cecexmon_SPEC, crate::common::R>::from_register(
1291            self, 0,
1292        )
1293    }
1294}
1295impl ::core::default::Default for Cecexmon {
1296    #[inline(always)]
1297    fn default() -> Cecexmon {
1298        <crate::RegValueT<Cecexmon_SPEC> as RegisterValue<_>>::new(0)
1299    }
1300}
1301pub mod cecexmon {
1302
1303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1304    pub struct Ceclnmon_SPEC;
1305    pub type Ceclnmon = crate::EnumBitfieldStruct<u8, Ceclnmon_SPEC>;
1306    impl Ceclnmon {
1307        #[doc = "Low level"]
1308        pub const _0: Self = Self::new(0);
1309        #[doc = "High level"]
1310        pub const _1: Self = Self::new(1);
1311    }
1312}
1313#[doc(hidden)]
1314#[derive(Copy, Clone, Eq, PartialEq)]
1315pub struct Ctxd_SPEC;
1316impl crate::sealed::RegSpec for Ctxd_SPEC {
1317    type DataType = u8;
1318}
1319#[doc = "CEC Transmission Buffer Register"]
1320pub type Ctxd = crate::RegValueT<Ctxd_SPEC>;
1321
1322impl NoBitfieldReg<Ctxd_SPEC> for Ctxd {}
1323impl ::core::default::Default for Ctxd {
1324    #[inline(always)]
1325    fn default() -> Ctxd {
1326        <crate::RegValueT<Ctxd_SPEC> as RegisterValue<_>>::new(0)
1327    }
1328}
1329
1330#[doc(hidden)]
1331#[derive(Copy, Clone, Eq, PartialEq)]
1332pub struct Crxd_SPEC;
1333impl crate::sealed::RegSpec for Crxd_SPEC {
1334    type DataType = u8;
1335}
1336#[doc = "CEC Reception Buffer Register"]
1337pub type Crxd = crate::RegValueT<Crxd_SPEC>;
1338
1339impl NoBitfieldReg<Crxd_SPEC> for Crxd {}
1340impl ::core::default::Default for Crxd {
1341    #[inline(always)]
1342    fn default() -> Crxd {
1343        <crate::RegValueT<Crxd_SPEC> as RegisterValue<_>>::new(0)
1344    }
1345}
1346
1347#[doc(hidden)]
1348#[derive(Copy, Clone, Eq, PartialEq)]
1349pub struct Ceces_SPEC;
1350impl crate::sealed::RegSpec for Ceces_SPEC {
1351    type DataType = u8;
1352}
1353#[doc = "CEC Communication Error Status Register"]
1354pub type Ceces = crate::RegValueT<Ceces_SPEC>;
1355
1356impl Ceces {
1357    #[doc = "Overrun Error Detection Flag"]
1358    #[inline(always)]
1359    pub fn oerr(
1360        self,
1361    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ceces::Oerr, Ceces_SPEC, crate::common::R> {
1362        crate::common::RegisterField::<0,0x1,1,0,ceces::Oerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1363    }
1364    #[doc = "Underrun Error Detection Flag"]
1365    #[inline(always)]
1366    pub fn uerr(
1367        self,
1368    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ceces::Uerr, Ceces_SPEC, crate::common::R> {
1369        crate::common::RegisterField::<1,0x1,1,0,ceces::Uerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1370    }
1371    #[doc = "ACK Error Detection Flag"]
1372    #[inline(always)]
1373    pub fn ackerr(
1374        self,
1375    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ceces::Ackerr, Ceces_SPEC, crate::common::R>
1376    {
1377        crate::common::RegisterField::<2,0x1,1,0,ceces::Ackerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1378    }
1379    #[doc = "Timing Error Detection Flag"]
1380    #[inline(always)]
1381    pub fn terr(
1382        self,
1383    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ceces::Terr, Ceces_SPEC, crate::common::R> {
1384        crate::common::RegisterField::<3,0x1,1,0,ceces::Terr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1385    }
1386    #[doc = "Transmission Error Detection Flag"]
1387    #[inline(always)]
1388    pub fn txerr(
1389        self,
1390    ) -> crate::common::RegisterField<4, 0x1, 1, 0, ceces::Txerr, Ceces_SPEC, crate::common::R>
1391    {
1392        crate::common::RegisterField::<4,0x1,1,0,ceces::Txerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1393    }
1394    #[doc = "Arbitration Loss Detection Flag"]
1395    #[inline(always)]
1396    pub fn aerr(
1397        self,
1398    ) -> crate::common::RegisterField<5, 0x1, 1, 0, ceces::Aerr, Ceces_SPEC, crate::common::R> {
1399        crate::common::RegisterField::<5,0x1,1,0,ceces::Aerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1400    }
1401    #[doc = "Bus Lock Error Detection Flag"]
1402    #[inline(always)]
1403    pub fn blerr(
1404        self,
1405    ) -> crate::common::RegisterField<6, 0x1, 1, 0, ceces::Blerr, Ceces_SPEC, crate::common::R>
1406    {
1407        crate::common::RegisterField::<6,0x1,1,0,ceces::Blerr, Ceces_SPEC,crate::common::R>::from_register(self,0)
1408    }
1409}
1410impl ::core::default::Default for Ceces {
1411    #[inline(always)]
1412    fn default() -> Ceces {
1413        <crate::RegValueT<Ceces_SPEC> as RegisterValue<_>>::new(0)
1414    }
1415}
1416pub mod ceces {
1417
1418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1419    pub struct Oerr_SPEC;
1420    pub type Oerr = crate::EnumBitfieldStruct<u8, Oerr_SPEC>;
1421    impl Oerr {
1422        #[doc = "No overrun error has occurred."]
1423        pub const _0: Self = Self::new(0);
1424        #[doc = "An overrun error has occurred."]
1425        pub const _1: Self = Self::new(1);
1426    }
1427    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1428    pub struct Uerr_SPEC;
1429    pub type Uerr = crate::EnumBitfieldStruct<u8, Uerr_SPEC>;
1430    impl Uerr {
1431        #[doc = "No underrun error has occurred."]
1432        pub const _0: Self = Self::new(0);
1433        #[doc = "An underrun error has occurred."]
1434        pub const _1: Self = Self::new(1);
1435    }
1436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1437    pub struct Ackerr_SPEC;
1438    pub type Ackerr = crate::EnumBitfieldStruct<u8, Ackerr_SPEC>;
1439    impl Ackerr {
1440        #[doc = "No ACK error has occurred."]
1441        pub const _0: Self = Self::new(0);
1442        #[doc = "An ACK error has occurred."]
1443        pub const _1: Self = Self::new(1);
1444    }
1445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1446    pub struct Terr_SPEC;
1447    pub type Terr = crate::EnumBitfieldStruct<u8, Terr_SPEC>;
1448    impl Terr {
1449        #[doc = "No timing error has occurred."]
1450        pub const _0: Self = Self::new(0);
1451        #[doc = "A timing error has occurred."]
1452        pub const _1: Self = Self::new(1);
1453    }
1454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1455    pub struct Txerr_SPEC;
1456    pub type Txerr = crate::EnumBitfieldStruct<u8, Txerr_SPEC>;
1457    impl Txerr {
1458        #[doc = "No transmission error has occurred."]
1459        pub const _0: Self = Self::new(0);
1460        #[doc = "A transmission error has occurred."]
1461        pub const _1: Self = Self::new(1);
1462    }
1463    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1464    pub struct Aerr_SPEC;
1465    pub type Aerr = crate::EnumBitfieldStruct<u8, Aerr_SPEC>;
1466    impl Aerr {
1467        #[doc = "No arbitration loss has occurred."]
1468        pub const _0: Self = Self::new(0);
1469        #[doc = "An arbitration loss has occurred."]
1470        pub const _1: Self = Self::new(1);
1471    }
1472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1473    pub struct Blerr_SPEC;
1474    pub type Blerr = crate::EnumBitfieldStruct<u8, Blerr_SPEC>;
1475    impl Blerr {
1476        #[doc = "No bus lock error has occurred."]
1477        pub const _0: Self = Self::new(0);
1478        #[doc = "A bus lock error has occurred."]
1479        pub const _1: Self = Self::new(1);
1480    }
1481}
1482#[doc(hidden)]
1483#[derive(Copy, Clone, Eq, PartialEq)]
1484pub struct Cecs_SPEC;
1485impl crate::sealed::RegSpec for Cecs_SPEC {
1486    type DataType = u8;
1487}
1488#[doc = "CEC Communication Status Register"]
1489pub type Cecs = crate::RegValueT<Cecs_SPEC>;
1490
1491impl Cecs {
1492    #[doc = "Address Match Detection Flag"]
1493    #[inline(always)]
1494    pub fn adrf(
1495        self,
1496    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cecs::Adrf, Cecs_SPEC, crate::common::R> {
1497        crate::common::RegisterField::<0,0x1,1,0,cecs::Adrf, Cecs_SPEC,crate::common::R>::from_register(self,0)
1498    }
1499    #[doc = "Bus Busy Detection Flag"]
1500    #[inline(always)]
1501    pub fn busst(
1502        self,
1503    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cecs::Busst, Cecs_SPEC, crate::common::R> {
1504        crate::common::RegisterField::<1,0x1,1,0,cecs::Busst, Cecs_SPEC,crate::common::R>::from_register(self,0)
1505    }
1506    #[doc = "Transmission Status Flag"]
1507    #[inline(always)]
1508    pub fn txst(
1509        self,
1510    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cecs::Txst, Cecs_SPEC, crate::common::R> {
1511        crate::common::RegisterField::<2,0x1,1,0,cecs::Txst, Cecs_SPEC,crate::common::R>::from_register(self,0)
1512    }
1513    #[doc = "EOM Flag"]
1514    #[inline(always)]
1515    pub fn eomf(
1516        self,
1517    ) -> crate::common::RegisterField<3, 0x1, 1, 0, cecs::Eomf, Cecs_SPEC, crate::common::R> {
1518        crate::common::RegisterField::<3,0x1,1,0,cecs::Eomf, Cecs_SPEC,crate::common::R>::from_register(self,0)
1519    }
1520    #[doc = "INTCE Generation Source Flag"]
1521    #[inline(always)]
1522    pub fn itcef(
1523        self,
1524    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cecs::Itcef, Cecs_SPEC, crate::common::R> {
1525        crate::common::RegisterField::<4,0x1,1,0,cecs::Itcef, Cecs_SPEC,crate::common::R>::from_register(self,0)
1526    }
1527    #[doc = "Signal-Free Time Rewrite Disable Report Flag"]
1528    #[inline(always)]
1529    pub fn sftst(
1530        self,
1531    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cecs::Sftst, Cecs_SPEC, crate::common::R> {
1532        crate::common::RegisterField::<7,0x1,1,0,cecs::Sftst, Cecs_SPEC,crate::common::R>::from_register(self,0)
1533    }
1534}
1535impl ::core::default::Default for Cecs {
1536    #[inline(always)]
1537    fn default() -> Cecs {
1538        <crate::RegValueT<Cecs_SPEC> as RegisterValue<_>>::new(0)
1539    }
1540}
1541pub mod cecs {
1542
1543    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1544    pub struct Adrf_SPEC;
1545    pub type Adrf = crate::EnumBitfieldStruct<u8, Adrf_SPEC>;
1546    impl Adrf {
1547        #[doc = "During communication between other stations, while communication is stopped, or while the local station is transmitting"]
1548        pub const _0: Self = Self::new(0);
1549        #[doc = "During local reception"]
1550        pub const _1: Self = Self::new(1);
1551    }
1552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1553    pub struct Busst_SPEC;
1554    pub type Busst = crate::EnumBitfieldStruct<u8, Busst_SPEC>;
1555    impl Busst {
1556        #[doc = "Bus-free state"]
1557        pub const _0: Self = Self::new(0);
1558        #[doc = "Bus-busy state"]
1559        pub const _1: Self = Self::new(1);
1560    }
1561    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1562    pub struct Txst_SPEC;
1563    pub type Txst = crate::EnumBitfieldStruct<u8, Txst_SPEC>;
1564    impl Txst {
1565        #[doc = "During communication standby state or reception (a follower is operating.)"]
1566        pub const _0: Self = Self::new(0);
1567        #[doc = "During transmission (an initiator is operating.)"]
1568        pub const _1: Self = Self::new(1);
1569    }
1570    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1571    pub struct Eomf_SPEC;
1572    pub type Eomf = crate::EnumBitfieldStruct<u8, Eomf_SPEC>;
1573    impl Eomf {
1574        #[doc = "The EOM flag received immediately before is logically 0."]
1575        pub const _0: Self = Self::new(0);
1576        #[doc = "The EOM flag received immediately before is logically 1."]
1577        pub const _1: Self = Self::new(1);
1578    }
1579    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1580    pub struct Itcef_SPEC;
1581    pub type Itcef = crate::EnumBitfieldStruct<u8, Itcef_SPEC>;
1582    impl Itcef {
1583        #[doc = "Generates a communication complete interrupt (INTCE) if the signal-free time is counted."]
1584        pub const _0: Self = Self::new(0);
1585        #[doc = "Generates INTCE if communication is complete or an error is detected."]
1586        pub const _1: Self = Self::new(1);
1587    }
1588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1589    pub struct Sftst_SPEC;
1590    pub type Sftst = crate::EnumBitfieldStruct<u8, Sftst_SPEC>;
1591    impl Sftst {
1592        #[doc = "Enables rewriting CECCTL1.SFT\\[1:0\\]."]
1593        pub const _0: Self = Self::new(0);
1594        #[doc = "Disables rewriting CECCTL1.SFT\\[1:0\\]."]
1595        pub const _1: Self = Self::new(1);
1596    }
1597}
1598#[doc(hidden)]
1599#[derive(Copy, Clone, Eq, PartialEq)]
1600pub struct Cecfc_SPEC;
1601impl crate::sealed::RegSpec for Cecfc_SPEC {
1602    type DataType = u8;
1603}
1604#[doc = "CEC Communication Error Flag Clear Trigger Register"]
1605pub type Cecfc = crate::RegValueT<Cecfc_SPEC>;
1606
1607impl Cecfc {
1608    #[doc = "Overrun Error Detection Flag Clear Trigger"]
1609    #[inline(always)]
1610    pub fn octrg(
1611        self,
1612    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cecfc::Octrg, Cecfc_SPEC, crate::common::W>
1613    {
1614        crate::common::RegisterField::<0,0x1,1,0,cecfc::Octrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1615    }
1616    #[doc = "Underrun Error Detection Flag Clear Trigger"]
1617    #[inline(always)]
1618    pub fn uctrg(
1619        self,
1620    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cecfc::Uctrg, Cecfc_SPEC, crate::common::W>
1621    {
1622        crate::common::RegisterField::<1,0x1,1,0,cecfc::Uctrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1623    }
1624    #[doc = "ACK Error Detection Flag Clear Trigger"]
1625    #[inline(always)]
1626    pub fn ackctrg(
1627        self,
1628    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cecfc::Ackctrg, Cecfc_SPEC, crate::common::W>
1629    {
1630        crate::common::RegisterField::<2,0x1,1,0,cecfc::Ackctrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1631    }
1632    #[doc = "Timing Error Detection Flag Clear Trigger"]
1633    #[inline(always)]
1634    pub fn tctrg(
1635        self,
1636    ) -> crate::common::RegisterField<3, 0x1, 1, 0, cecfc::Tctrg, Cecfc_SPEC, crate::common::W>
1637    {
1638        crate::common::RegisterField::<3,0x1,1,0,cecfc::Tctrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1639    }
1640    #[doc = "Transmission Error Detection Flag Clear Trigger"]
1641    #[inline(always)]
1642    pub fn txctrg(
1643        self,
1644    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cecfc::Txctrg, Cecfc_SPEC, crate::common::W>
1645    {
1646        crate::common::RegisterField::<4,0x1,1,0,cecfc::Txctrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1647    }
1648    #[doc = "Arbitration Loss Detection Flag Clear Trigger"]
1649    #[inline(always)]
1650    pub fn actrg(
1651        self,
1652    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cecfc::Actrg, Cecfc_SPEC, crate::common::W>
1653    {
1654        crate::common::RegisterField::<5,0x1,1,0,cecfc::Actrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1655    }
1656    #[doc = "Bus Lock Error Detection Flag Clear Trigger"]
1657    #[inline(always)]
1658    pub fn blctrg(
1659        self,
1660    ) -> crate::common::RegisterField<6, 0x1, 1, 0, cecfc::Blctrg, Cecfc_SPEC, crate::common::W>
1661    {
1662        crate::common::RegisterField::<6,0x1,1,0,cecfc::Blctrg, Cecfc_SPEC,crate::common::W>::from_register(self,0)
1663    }
1664}
1665impl ::core::default::Default for Cecfc {
1666    #[inline(always)]
1667    fn default() -> Cecfc {
1668        <crate::RegValueT<Cecfc_SPEC> as RegisterValue<_>>::new(0)
1669    }
1670}
1671pub mod cecfc {
1672
1673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1674    pub struct Octrg_SPEC;
1675    pub type Octrg = crate::EnumBitfieldStruct<u8, Octrg_SPEC>;
1676    impl Octrg {
1677        #[doc = "Does not clear overrun error detection flag."]
1678        pub const _0: Self = Self::new(0);
1679        #[doc = "Clears overrun error detection flag."]
1680        pub const _1: Self = Self::new(1);
1681    }
1682    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1683    pub struct Uctrg_SPEC;
1684    pub type Uctrg = crate::EnumBitfieldStruct<u8, Uctrg_SPEC>;
1685    impl Uctrg {
1686        #[doc = "Does not clear underrun error detection flag."]
1687        pub const _0: Self = Self::new(0);
1688        #[doc = "Clears underrun error detection flag."]
1689        pub const _1: Self = Self::new(1);
1690    }
1691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1692    pub struct Ackctrg_SPEC;
1693    pub type Ackctrg = crate::EnumBitfieldStruct<u8, Ackctrg_SPEC>;
1694    impl Ackctrg {
1695        #[doc = "Does not clear ACK error detection flag."]
1696        pub const _0: Self = Self::new(0);
1697        #[doc = "Clears ACK error detection flag."]
1698        pub const _1: Self = Self::new(1);
1699    }
1700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1701    pub struct Tctrg_SPEC;
1702    pub type Tctrg = crate::EnumBitfieldStruct<u8, Tctrg_SPEC>;
1703    impl Tctrg {
1704        #[doc = "Does not clear timing error detection flag."]
1705        pub const _0: Self = Self::new(0);
1706        #[doc = "Clears timing error detection flag."]
1707        pub const _1: Self = Self::new(1);
1708    }
1709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1710    pub struct Txctrg_SPEC;
1711    pub type Txctrg = crate::EnumBitfieldStruct<u8, Txctrg_SPEC>;
1712    impl Txctrg {
1713        #[doc = "Does not clear transmission error detection flag."]
1714        pub const _0: Self = Self::new(0);
1715        #[doc = "Clears transmission error detection flag."]
1716        pub const _1: Self = Self::new(1);
1717    }
1718    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1719    pub struct Actrg_SPEC;
1720    pub type Actrg = crate::EnumBitfieldStruct<u8, Actrg_SPEC>;
1721    impl Actrg {
1722        #[doc = "Does not clear arbitration loss detection flag."]
1723        pub const _0: Self = Self::new(0);
1724        #[doc = "Clears arbitration loss detection flag."]
1725        pub const _1: Self = Self::new(1);
1726    }
1727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1728    pub struct Blctrg_SPEC;
1729    pub type Blctrg = crate::EnumBitfieldStruct<u8, Blctrg_SPEC>;
1730    impl Blctrg {
1731        #[doc = "Does not clear bus lock error detection flag."]
1732        pub const _0: Self = Self::new(0);
1733        #[doc = "Clears bus lock error detection flag."]
1734        pub const _1: Self = Self::new(1);
1735    }
1736}
1737#[doc(hidden)]
1738#[derive(Copy, Clone, Eq, PartialEq)]
1739pub struct Cecctl0_SPEC;
1740impl crate::sealed::RegSpec for Cecctl0_SPEC {
1741    type DataType = u8;
1742}
1743#[doc = "CEC Control Register 0"]
1744pub type Cecctl0 = crate::RegValueT<Cecctl0_SPEC>;
1745
1746impl Cecctl0 {
1747    #[doc = "EOM Setting"]
1748    #[inline(always)]
1749    pub fn eom(
1750        self,
1751    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cecctl0::Eom, Cecctl0_SPEC, crate::common::RW>
1752    {
1753        crate::common::RegisterField::<0,0x1,1,0,cecctl0::Eom, Cecctl0_SPEC,crate::common::RW>::from_register(self,0)
1754    }
1755    #[doc = "Reception Enable Control"]
1756    #[inline(always)]
1757    pub fn cecrxen(
1758        self,
1759    ) -> crate::common::RegisterField<1, 0x1, 1, 0, cecctl0::Cecrxen, Cecctl0_SPEC, crate::common::RW>
1760    {
1761        crate::common::RegisterField::<
1762            1,
1763            0x1,
1764            1,
1765            0,
1766            cecctl0::Cecrxen,
1767            Cecctl0_SPEC,
1768            crate::common::RW,
1769        >::from_register(self, 0)
1770    }
1771    #[doc = "Transmission Start Trigger"]
1772    #[inline(always)]
1773    pub fn txtrg(
1774        self,
1775    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cecctl0::Txtrg, Cecctl0_SPEC, crate::common::W>
1776    {
1777        crate::common::RegisterField::<2,0x1,1,0,cecctl0::Txtrg, Cecctl0_SPEC,crate::common::W>::from_register(self,0)
1778    }
1779    #[doc = "CEC Clock Select"]
1780    #[inline(always)]
1781    pub fn ccl(
1782        self,
1783    ) -> crate::common::RegisterField<3, 0x7, 1, 0, cecctl0::Ccl, Cecctl0_SPEC, crate::common::RW>
1784    {
1785        crate::common::RegisterField::<3,0x7,1,0,cecctl0::Ccl, Cecctl0_SPEC,crate::common::RW>::from_register(self,0)
1786    }
1787    #[doc = "ACK Bit Timing Error (Bit Width) Check Enable"]
1788    #[inline(always)]
1789    pub fn ackten(
1790        self,
1791    ) -> crate::common::RegisterField<6, 0x1, 1, 0, cecctl0::Ackten, Cecctl0_SPEC, crate::common::RW>
1792    {
1793        crate::common::RegisterField::<6,0x1,1,0,cecctl0::Ackten, Cecctl0_SPEC,crate::common::RW>::from_register(self,0)
1794    }
1795    #[doc = "CEC Operation Enable Flag"]
1796    #[inline(always)]
1797    pub fn cece(
1798        self,
1799    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cecctl0::Cece, Cecctl0_SPEC, crate::common::RW>
1800    {
1801        crate::common::RegisterField::<7,0x1,1,0,cecctl0::Cece, Cecctl0_SPEC,crate::common::RW>::from_register(self,0)
1802    }
1803}
1804impl ::core::default::Default for Cecctl0 {
1805    #[inline(always)]
1806    fn default() -> Cecctl0 {
1807        <crate::RegValueT<Cecctl0_SPEC> as RegisterValue<_>>::new(0)
1808    }
1809}
1810pub mod cecctl0 {
1811
1812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1813    pub struct Eom_SPEC;
1814    pub type Eom = crate::EnumBitfieldStruct<u8, Eom_SPEC>;
1815    impl Eom {
1816        #[doc = "Continues transmission."]
1817        pub const _0: Self = Self::new(0);
1818        #[doc = "Last frame"]
1819        pub const _1: Self = Self::new(1);
1820    }
1821    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1822    pub struct Cecrxen_SPEC;
1823    pub type Cecrxen = crate::EnumBitfieldStruct<u8, Cecrxen_SPEC>;
1824    impl Cecrxen {
1825        #[doc = "Disables continuing reception or reports abnormal reception."]
1826        pub const _0: Self = Self::new(0);
1827        #[doc = "Enables continuing reception or reports normal reception. lists the reception status and ACK/NACK timing output."]
1828        pub const _1: Self = Self::new(1);
1829    }
1830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1831    pub struct Txtrg_SPEC;
1832    pub type Txtrg = crate::EnumBitfieldStruct<u8, Txtrg_SPEC>;
1833    impl Txtrg {
1834        #[doc = "No effect"]
1835        pub const _0: Self = Self::new(0);
1836        #[doc = "Starts CEC transmission."]
1837        pub const _1: Self = Self::new(1);
1838    }
1839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1840    pub struct Ccl_SPEC;
1841    pub type Ccl = crate::EnumBitfieldStruct<u8, Ccl_SPEC>;
1842    impl Ccl {
1843        #[doc = "PCLKB/25"]
1844        pub const _000: Self = Self::new(0);
1845        #[doc = "PCLKB/26"]
1846        pub const _001: Self = Self::new(1);
1847        #[doc = "PCLKB/27"]
1848        pub const _010: Self = Self::new(2);
1849        #[doc = "PCLKB/28"]
1850        pub const _011: Self = Self::new(3);
1851        #[doc = "PCLKB/29"]
1852        pub const _100: Self = Self::new(4);
1853        #[doc = "PCLKB/210"]
1854        pub const _101: Self = Self::new(5);
1855        #[doc = "CECCLK (when using SOSC)"]
1856        pub const _110: Self = Self::new(6);
1857        #[doc = "CECCLK/28 (when using MOSC)"]
1858        pub const _111: Self = Self::new(7);
1859    }
1860    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1861    pub struct Ackten_SPEC;
1862    pub type Ackten = crate::EnumBitfieldStruct<u8, Ackten_SPEC>;
1863    impl Ackten {
1864        #[doc = "Does not detect ACK bit timing errors."]
1865        pub const _0: Self = Self::new(0);
1866        #[doc = "Detects ACK bit timing errors."]
1867        pub const _1: Self = Self::new(1);
1868    }
1869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1870    pub struct Cece_SPEC;
1871    pub type Cece = crate::EnumBitfieldStruct<u8, Cece_SPEC>;
1872    impl Cece {
1873        #[doc = "Disables CEC operation."]
1874        pub const _0: Self = Self::new(0);
1875        #[doc = "Enables CEC operation."]
1876        pub const _1: Self = Self::new(1);
1877    }
1878}
ra4e2_pac/cec.rs

ra4e2_pac/
cec.rs
