1#![doc = "Peripheral access API for R7FA4E10D microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
3#![deny(dead_code)]
4#![deny(improper_ctypes)]
5#![deny(missing_docs)]
6#![deny(no_mangle_generic_items)]
7#![deny(non_shorthand_field_patterns)]
8#![deny(overflowing_literals)]
9#![deny(path_statements)]
10#![deny(patterns_in_fns_without_body)]
11#![deny(private_in_public)]
12#![deny(unconditional_recursion)]
13#![deny(unused_allocation)]
14#![deny(unused_comparisons)]
15#![deny(unused_parens)]
16#![deny(while_true)]
17#![allow(non_camel_case_types)]
18#![allow(non_snake_case)]
19#![no_std]
20use core::marker::PhantomData;
21use core::ops::Deref;
22#[doc = r"Number available in the NVIC for configuring priority"]
23pub const NVIC_PRIO_BITS: u8 = 4;
24#[cfg(feature = "rt")]
25pub use self::Interrupt as interrupt;
26pub use cortex_m::peripheral::Peripherals as CorePeripherals;
27pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
28#[cfg(feature = "rt")]
29pub use cortex_m_rt::interrupt;
30#[allow(unused_imports)]
31use generic::*;
32#[doc = r"Common register and bit access and modify traits"]
33pub mod generic;
34#[cfg(feature = "rt")]
35extern "C" {
36 fn IEL0();
37 fn IEL1();
38 fn IEL2();
39 fn IEL3();
40 fn IEL4();
41 fn IEL5();
42 fn IEL6();
43 fn IEL7();
44 fn IEL8();
45 fn IEL9();
46 fn IEL10();
47 fn IEL11();
48 fn IEL12();
49 fn IEL13();
50 fn IEL14();
51 fn IEL15();
52 fn IEL16();
53 fn IEL17();
54 fn IEL18();
55 fn IEL19();
56 fn IEL20();
57 fn IEL21();
58 fn IEL22();
59 fn IEL23();
60 fn IEL24();
61 fn IEL25();
62 fn IEL26();
63 fn IEL27();
64 fn IEL28();
65 fn IEL29();
66 fn IEL30();
67 fn IEL31();
68 fn IEL32();
69 fn IEL33();
70 fn IEL34();
71 fn IEL35();
72 fn IEL36();
73 fn IEL37();
74 fn IEL38();
75 fn IEL39();
76 fn IEL40();
77 fn IEL41();
78 fn IEL42();
79 fn IEL43();
80 fn IEL44();
81 fn IEL45();
82 fn IEL46();
83 fn IEL47();
84 fn IEL48();
85 fn IEL49();
86 fn IEL50();
87 fn IEL51();
88 fn IEL52();
89 fn IEL53();
90 fn IEL54();
91 fn IEL55();
92 fn IEL56();
93 fn IEL57();
94 fn IEL58();
95 fn IEL59();
96 fn IEL60();
97 fn IEL61();
98 fn IEL62();
99 fn IEL63();
100 fn IEL64();
101 fn IEL65();
102 fn IEL66();
103 fn IEL67();
104 fn IEL68();
105 fn IEL69();
106 fn IEL70();
107 fn IEL71();
108 fn IEL72();
109 fn IEL73();
110 fn IEL74();
111 fn IEL75();
112 fn IEL76();
113 fn IEL77();
114 fn IEL78();
115 fn IEL79();
116 fn IEL80();
117 fn IEL81();
118 fn IEL82();
119 fn IEL83();
120 fn IEL84();
121 fn IEL85();
122 fn IEL86();
123 fn IEL87();
124 fn IEL88();
125 fn IEL89();
126 fn IEL90();
127 fn IEL91();
128 fn IEL92();
129 fn IEL93();
130 fn IEL94();
131 fn IEL95();
132}
133#[doc(hidden)]
134pub union Vector {
135 _handler: unsafe extern "C" fn(),
136 _reserved: u32,
137}
138#[cfg(feature = "rt")]
139#[doc(hidden)]
140#[link_section = ".vector_table.interrupts"]
141#[no_mangle]
142pub static __INTERRUPTS: [Vector; 96] = [
143 Vector { _handler: IEL0 },
144 Vector { _handler: IEL1 },
145 Vector { _handler: IEL2 },
146 Vector { _handler: IEL3 },
147 Vector { _handler: IEL4 },
148 Vector { _handler: IEL5 },
149 Vector { _handler: IEL6 },
150 Vector { _handler: IEL7 },
151 Vector { _handler: IEL8 },
152 Vector { _handler: IEL9 },
153 Vector { _handler: IEL10 },
154 Vector { _handler: IEL11 },
155 Vector { _handler: IEL12 },
156 Vector { _handler: IEL13 },
157 Vector { _handler: IEL14 },
158 Vector { _handler: IEL15 },
159 Vector { _handler: IEL16 },
160 Vector { _handler: IEL17 },
161 Vector { _handler: IEL18 },
162 Vector { _handler: IEL19 },
163 Vector { _handler: IEL20 },
164 Vector { _handler: IEL21 },
165 Vector { _handler: IEL22 },
166 Vector { _handler: IEL23 },
167 Vector { _handler: IEL24 },
168 Vector { _handler: IEL25 },
169 Vector { _handler: IEL26 },
170 Vector { _handler: IEL27 },
171 Vector { _handler: IEL28 },
172 Vector { _handler: IEL29 },
173 Vector { _handler: IEL30 },
174 Vector { _handler: IEL31 },
175 Vector { _handler: IEL32 },
176 Vector { _handler: IEL33 },
177 Vector { _handler: IEL34 },
178 Vector { _handler: IEL35 },
179 Vector { _handler: IEL36 },
180 Vector { _handler: IEL37 },
181 Vector { _handler: IEL38 },
182 Vector { _handler: IEL39 },
183 Vector { _handler: IEL40 },
184 Vector { _handler: IEL41 },
185 Vector { _handler: IEL42 },
186 Vector { _handler: IEL43 },
187 Vector { _handler: IEL44 },
188 Vector { _handler: IEL45 },
189 Vector { _handler: IEL46 },
190 Vector { _handler: IEL47 },
191 Vector { _handler: IEL48 },
192 Vector { _handler: IEL49 },
193 Vector { _handler: IEL50 },
194 Vector { _handler: IEL51 },
195 Vector { _handler: IEL52 },
196 Vector { _handler: IEL53 },
197 Vector { _handler: IEL54 },
198 Vector { _handler: IEL55 },
199 Vector { _handler: IEL56 },
200 Vector { _handler: IEL57 },
201 Vector { _handler: IEL58 },
202 Vector { _handler: IEL59 },
203 Vector { _handler: IEL60 },
204 Vector { _handler: IEL61 },
205 Vector { _handler: IEL62 },
206 Vector { _handler: IEL63 },
207 Vector { _handler: IEL64 },
208 Vector { _handler: IEL65 },
209 Vector { _handler: IEL66 },
210 Vector { _handler: IEL67 },
211 Vector { _handler: IEL68 },
212 Vector { _handler: IEL69 },
213 Vector { _handler: IEL70 },
214 Vector { _handler: IEL71 },
215 Vector { _handler: IEL72 },
216 Vector { _handler: IEL73 },
217 Vector { _handler: IEL74 },
218 Vector { _handler: IEL75 },
219 Vector { _handler: IEL76 },
220 Vector { _handler: IEL77 },
221 Vector { _handler: IEL78 },
222 Vector { _handler: IEL79 },
223 Vector { _handler: IEL80 },
224 Vector { _handler: IEL81 },
225 Vector { _handler: IEL82 },
226 Vector { _handler: IEL83 },
227 Vector { _handler: IEL84 },
228 Vector { _handler: IEL85 },
229 Vector { _handler: IEL86 },
230 Vector { _handler: IEL87 },
231 Vector { _handler: IEL88 },
232 Vector { _handler: IEL89 },
233 Vector { _handler: IEL90 },
234 Vector { _handler: IEL91 },
235 Vector { _handler: IEL92 },
236 Vector { _handler: IEL93 },
237 Vector { _handler: IEL94 },
238 Vector { _handler: IEL95 },
239];
240#[doc = r"Enumeration of all the interrupts."]
241#[derive(Copy, Clone, Debug, PartialEq, Eq)]
242#[repr(u16)]
243pub enum Interrupt {
244 #[doc = "0 - ICU Interrupt 0"]
245 IEL0 = 0,
246 #[doc = "1 - ICU Interrupt 1"]
247 IEL1 = 1,
248 #[doc = "2 - ICU Interrupt 2"]
249 IEL2 = 2,
250 #[doc = "3 - ICU Interrupt 3"]
251 IEL3 = 3,
252 #[doc = "4 - ICU Interrupt 4"]
253 IEL4 = 4,
254 #[doc = "5 - ICU Interrupt 5"]
255 IEL5 = 5,
256 #[doc = "6 - ICU Interrupt 6"]
257 IEL6 = 6,
258 #[doc = "7 - ICU Interrupt 7"]
259 IEL7 = 7,
260 #[doc = "8 - ICU Interrupt 8"]
261 IEL8 = 8,
262 #[doc = "9 - ICU Interrupt 9"]
263 IEL9 = 9,
264 #[doc = "10 - ICU Interrupt 10"]
265 IEL10 = 10,
266 #[doc = "11 - ICU Interrupt 11"]
267 IEL11 = 11,
268 #[doc = "12 - ICU Interrupt 12"]
269 IEL12 = 12,
270 #[doc = "13 - ICU Interrupt 13"]
271 IEL13 = 13,
272 #[doc = "14 - ICU Interrupt 14"]
273 IEL14 = 14,
274 #[doc = "15 - ICU Interrupt 15"]
275 IEL15 = 15,
276 #[doc = "16 - ICU Interrupt 16"]
277 IEL16 = 16,
278 #[doc = "17 - ICU Interrupt 17"]
279 IEL17 = 17,
280 #[doc = "18 - ICU Interrupt 18"]
281 IEL18 = 18,
282 #[doc = "19 - ICU Interrupt 19"]
283 IEL19 = 19,
284 #[doc = "20 - ICU Interrupt 20"]
285 IEL20 = 20,
286 #[doc = "21 - ICU Interrupt 21"]
287 IEL21 = 21,
288 #[doc = "22 - ICU Interrupt 22"]
289 IEL22 = 22,
290 #[doc = "23 - ICU Interrupt 23"]
291 IEL23 = 23,
292 #[doc = "24 - ICU Interrupt 24"]
293 IEL24 = 24,
294 #[doc = "25 - ICU Interrupt 25"]
295 IEL25 = 25,
296 #[doc = "26 - ICU Interrupt 26"]
297 IEL26 = 26,
298 #[doc = "27 - ICU Interrupt 27"]
299 IEL27 = 27,
300 #[doc = "28 - ICU Interrupt 28"]
301 IEL28 = 28,
302 #[doc = "29 - ICU Interrupt 29"]
303 IEL29 = 29,
304 #[doc = "30 - ICU Interrupt 30"]
305 IEL30 = 30,
306 #[doc = "31 - ICU Interrupt 31"]
307 IEL31 = 31,
308 #[doc = "32 - ICU Interrupt 32"]
309 IEL32 = 32,
310 #[doc = "33 - ICU Interrupt 33"]
311 IEL33 = 33,
312 #[doc = "34 - ICU Interrupt 34"]
313 IEL34 = 34,
314 #[doc = "35 - ICU Interrupt 35"]
315 IEL35 = 35,
316 #[doc = "36 - ICU Interrupt 36"]
317 IEL36 = 36,
318 #[doc = "37 - ICU Interrupt 37"]
319 IEL37 = 37,
320 #[doc = "38 - ICU Interrupt 38"]
321 IEL38 = 38,
322 #[doc = "39 - ICU Interrupt 39"]
323 IEL39 = 39,
324 #[doc = "40 - ICU Interrupt 40"]
325 IEL40 = 40,
326 #[doc = "41 - ICU Interrupt 41"]
327 IEL41 = 41,
328 #[doc = "42 - ICU Interrupt 42"]
329 IEL42 = 42,
330 #[doc = "43 - ICU Interrupt 43"]
331 IEL43 = 43,
332 #[doc = "44 - ICU Interrupt 44"]
333 IEL44 = 44,
334 #[doc = "45 - ICU Interrupt 45"]
335 IEL45 = 45,
336 #[doc = "46 - ICU Interrupt 46"]
337 IEL46 = 46,
338 #[doc = "47 - ICU Interrupt 47"]
339 IEL47 = 47,
340 #[doc = "48 - ICU Interrupt 48"]
341 IEL48 = 48,
342 #[doc = "49 - ICU Interrupt 49"]
343 IEL49 = 49,
344 #[doc = "50 - ICU Interrupt 50"]
345 IEL50 = 50,
346 #[doc = "51 - ICU Interrupt 51"]
347 IEL51 = 51,
348 #[doc = "52 - ICU Interrupt 52"]
349 IEL52 = 52,
350 #[doc = "53 - ICU Interrupt 53"]
351 IEL53 = 53,
352 #[doc = "54 - ICU Interrupt 54"]
353 IEL54 = 54,
354 #[doc = "55 - ICU Interrupt 55"]
355 IEL55 = 55,
356 #[doc = "56 - ICU Interrupt 56"]
357 IEL56 = 56,
358 #[doc = "57 - ICU Interrupt 57"]
359 IEL57 = 57,
360 #[doc = "58 - ICU Interrupt 58"]
361 IEL58 = 58,
362 #[doc = "59 - ICU Interrupt 59"]
363 IEL59 = 59,
364 #[doc = "60 - ICU Interrupt 60"]
365 IEL60 = 60,
366 #[doc = "61 - ICU Interrupt 61"]
367 IEL61 = 61,
368 #[doc = "62 - ICU Interrupt 62"]
369 IEL62 = 62,
370 #[doc = "63 - ICU Interrupt 63"]
371 IEL63 = 63,
372 #[doc = "64 - ICU Interrupt 64"]
373 IEL64 = 64,
374 #[doc = "65 - ICU Interrupt 65"]
375 IEL65 = 65,
376 #[doc = "66 - ICU Interrupt 66"]
377 IEL66 = 66,
378 #[doc = "67 - ICU Interrupt 67"]
379 IEL67 = 67,
380 #[doc = "68 - ICU Interrupt 68"]
381 IEL68 = 68,
382 #[doc = "69 - ICU Interrupt 69"]
383 IEL69 = 69,
384 #[doc = "70 - ICU Interrupt 70"]
385 IEL70 = 70,
386 #[doc = "71 - ICU Interrupt 71"]
387 IEL71 = 71,
388 #[doc = "72 - ICU Interrupt 72"]
389 IEL72 = 72,
390 #[doc = "73 - ICU Interrupt 73"]
391 IEL73 = 73,
392 #[doc = "74 - ICU Interrupt 74"]
393 IEL74 = 74,
394 #[doc = "75 - ICU Interrupt 75"]
395 IEL75 = 75,
396 #[doc = "76 - ICU Interrupt 76"]
397 IEL76 = 76,
398 #[doc = "77 - ICU Interrupt 77"]
399 IEL77 = 77,
400 #[doc = "78 - ICU Interrupt 78"]
401 IEL78 = 78,
402 #[doc = "79 - ICU Interrupt 79"]
403 IEL79 = 79,
404 #[doc = "80 - ICU Interrupt 80"]
405 IEL80 = 80,
406 #[doc = "81 - ICU Interrupt 81"]
407 IEL81 = 81,
408 #[doc = "82 - ICU Interrupt 82"]
409 IEL82 = 82,
410 #[doc = "83 - ICU Interrupt 83"]
411 IEL83 = 83,
412 #[doc = "84 - ICU Interrupt 84"]
413 IEL84 = 84,
414 #[doc = "85 - ICU Interrupt 85"]
415 IEL85 = 85,
416 #[doc = "86 - ICU Interrupt 86"]
417 IEL86 = 86,
418 #[doc = "87 - ICU Interrupt 87"]
419 IEL87 = 87,
420 #[doc = "88 - ICU Interrupt 88"]
421 IEL88 = 88,
422 #[doc = "89 - ICU Interrupt 89"]
423 IEL89 = 89,
424 #[doc = "90 - ICU Interrupt 90"]
425 IEL90 = 90,
426 #[doc = "91 - ICU Interrupt 91"]
427 IEL91 = 91,
428 #[doc = "92 - ICU Interrupt 92"]
429 IEL92 = 92,
430 #[doc = "93 - ICU Interrupt 93"]
431 IEL93 = 93,
432 #[doc = "94 - ICU Interrupt 94"]
433 IEL94 = 94,
434 #[doc = "95 - ICU Interrupt 95"]
435 IEL95 = 95,
436}
437unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
438 #[inline(always)]
439 fn number(self) -> u16 {
440 self as u16
441 }
442}
443#[doc = "Renesas Memory Protection Unit"]
444pub struct RMPU {
445 _marker: PhantomData<*const ()>,
446}
447unsafe impl Send for RMPU {}
448impl RMPU {
449 #[doc = r"Pointer to the register block"]
450 pub const PTR: *const rmpu::RegisterBlock = 0x4000_0000 as *const _;
451 #[doc = r"Return the pointer to the register block"]
452 #[inline(always)]
453 pub const fn ptr() -> *const rmpu::RegisterBlock {
454 Self::PTR
455 }
456}
457impl Deref for RMPU {
458 type Target = rmpu::RegisterBlock;
459 #[inline(always)]
460 fn deref(&self) -> &Self::Target {
461 unsafe { &*Self::PTR }
462 }
463}
464impl core::fmt::Debug for RMPU {
465 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
466 f.debug_struct("RMPU").finish()
467 }
468}
469#[doc = "Renesas Memory Protection Unit"]
470pub mod rmpu;
471#[doc = "TrustZone Filter"]
472pub struct TZF {
473 _marker: PhantomData<*const ()>,
474}
475unsafe impl Send for TZF {}
476impl TZF {
477 #[doc = r"Pointer to the register block"]
478 pub const PTR: *const tzf::RegisterBlock = 0x4000_0e00 as *const _;
479 #[doc = r"Return the pointer to the register block"]
480 #[inline(always)]
481 pub const fn ptr() -> *const tzf::RegisterBlock {
482 Self::PTR
483 }
484}
485impl Deref for TZF {
486 type Target = tzf::RegisterBlock;
487 #[inline(always)]
488 fn deref(&self) -> &Self::Target {
489 unsafe { &*Self::PTR }
490 }
491}
492impl core::fmt::Debug for TZF {
493 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
494 f.debug_struct("TZF").finish()
495 }
496}
497#[doc = "TrustZone Filter"]
498pub mod tzf;
499#[doc = "SRAM Control"]
500pub struct SRAM {
501 _marker: PhantomData<*const ()>,
502}
503unsafe impl Send for SRAM {}
504impl SRAM {
505 #[doc = r"Pointer to the register block"]
506 pub const PTR: *const sram::RegisterBlock = 0x4000_2000 as *const _;
507 #[doc = r"Return the pointer to the register block"]
508 #[inline(always)]
509 pub const fn ptr() -> *const sram::RegisterBlock {
510 Self::PTR
511 }
512}
513impl Deref for SRAM {
514 type Target = sram::RegisterBlock;
515 #[inline(always)]
516 fn deref(&self) -> &Self::Target {
517 unsafe { &*Self::PTR }
518 }
519}
520impl core::fmt::Debug for SRAM {
521 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
522 f.debug_struct("SRAM").finish()
523 }
524}
525#[doc = "SRAM Control"]
526pub mod sram;
527#[doc = "Bus Control"]
528pub struct BUS {
529 _marker: PhantomData<*const ()>,
530}
531unsafe impl Send for BUS {}
532impl BUS {
533 #[doc = r"Pointer to the register block"]
534 pub const PTR: *const bus::RegisterBlock = 0x4000_3000 as *const _;
535 #[doc = r"Return the pointer to the register block"]
536 #[inline(always)]
537 pub const fn ptr() -> *const bus::RegisterBlock {
538 Self::PTR
539 }
540}
541impl Deref for BUS {
542 type Target = bus::RegisterBlock;
543 #[inline(always)]
544 fn deref(&self) -> &Self::Target {
545 unsafe { &*Self::PTR }
546 }
547}
548impl core::fmt::Debug for BUS {
549 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
550 f.debug_struct("BUS").finish()
551 }
552}
553#[doc = "Bus Control"]
554pub mod bus;
555#[doc = "Direct memory access controller 0"]
556pub struct DMAC0 {
557 _marker: PhantomData<*const ()>,
558}
559unsafe impl Send for DMAC0 {}
560impl DMAC0 {
561 #[doc = r"Pointer to the register block"]
562 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5000 as *const _;
563 #[doc = r"Return the pointer to the register block"]
564 #[inline(always)]
565 pub const fn ptr() -> *const dmac0::RegisterBlock {
566 Self::PTR
567 }
568}
569impl Deref for DMAC0 {
570 type Target = dmac0::RegisterBlock;
571 #[inline(always)]
572 fn deref(&self) -> &Self::Target {
573 unsafe { &*Self::PTR }
574 }
575}
576impl core::fmt::Debug for DMAC0 {
577 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
578 f.debug_struct("DMAC0").finish()
579 }
580}
581#[doc = "Direct memory access controller 0"]
582pub mod dmac0;
583#[doc = "Direct memory access controller 1"]
584pub struct DMAC1 {
585 _marker: PhantomData<*const ()>,
586}
587unsafe impl Send for DMAC1 {}
588impl DMAC1 {
589 #[doc = r"Pointer to the register block"]
590 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5040 as *const _;
591 #[doc = r"Return the pointer to the register block"]
592 #[inline(always)]
593 pub const fn ptr() -> *const dmac0::RegisterBlock {
594 Self::PTR
595 }
596}
597impl Deref for DMAC1 {
598 type Target = dmac0::RegisterBlock;
599 #[inline(always)]
600 fn deref(&self) -> &Self::Target {
601 unsafe { &*Self::PTR }
602 }
603}
604impl core::fmt::Debug for DMAC1 {
605 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
606 f.debug_struct("DMAC1").finish()
607 }
608}
609#[doc = "Direct memory access controller 1"]
610pub use self::dmac0 as dmac1;
611#[doc = "Direct memory access controller 2"]
612pub struct DMAC2 {
613 _marker: PhantomData<*const ()>,
614}
615unsafe impl Send for DMAC2 {}
616impl DMAC2 {
617 #[doc = r"Pointer to the register block"]
618 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5080 as *const _;
619 #[doc = r"Return the pointer to the register block"]
620 #[inline(always)]
621 pub const fn ptr() -> *const dmac0::RegisterBlock {
622 Self::PTR
623 }
624}
625impl Deref for DMAC2 {
626 type Target = dmac0::RegisterBlock;
627 #[inline(always)]
628 fn deref(&self) -> &Self::Target {
629 unsafe { &*Self::PTR }
630 }
631}
632impl core::fmt::Debug for DMAC2 {
633 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
634 f.debug_struct("DMAC2").finish()
635 }
636}
637#[doc = "Direct memory access controller 2"]
638pub use self::dmac0 as dmac2;
639#[doc = "Direct memory access controller 3"]
640pub struct DMAC3 {
641 _marker: PhantomData<*const ()>,
642}
643unsafe impl Send for DMAC3 {}
644impl DMAC3 {
645 #[doc = r"Pointer to the register block"]
646 pub const PTR: *const dmac0::RegisterBlock = 0x4000_50c0 as *const _;
647 #[doc = r"Return the pointer to the register block"]
648 #[inline(always)]
649 pub const fn ptr() -> *const dmac0::RegisterBlock {
650 Self::PTR
651 }
652}
653impl Deref for DMAC3 {
654 type Target = dmac0::RegisterBlock;
655 #[inline(always)]
656 fn deref(&self) -> &Self::Target {
657 unsafe { &*Self::PTR }
658 }
659}
660impl core::fmt::Debug for DMAC3 {
661 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
662 f.debug_struct("DMAC3").finish()
663 }
664}
665#[doc = "Direct memory access controller 3"]
666pub use self::dmac0 as dmac3;
667#[doc = "Direct memory access controller 4"]
668pub struct DMAC4 {
669 _marker: PhantomData<*const ()>,
670}
671unsafe impl Send for DMAC4 {}
672impl DMAC4 {
673 #[doc = r"Pointer to the register block"]
674 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5100 as *const _;
675 #[doc = r"Return the pointer to the register block"]
676 #[inline(always)]
677 pub const fn ptr() -> *const dmac0::RegisterBlock {
678 Self::PTR
679 }
680}
681impl Deref for DMAC4 {
682 type Target = dmac0::RegisterBlock;
683 #[inline(always)]
684 fn deref(&self) -> &Self::Target {
685 unsafe { &*Self::PTR }
686 }
687}
688impl core::fmt::Debug for DMAC4 {
689 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
690 f.debug_struct("DMAC4").finish()
691 }
692}
693#[doc = "Direct memory access controller 4"]
694pub use self::dmac0 as dmac4;
695#[doc = "Direct memory access controller 5"]
696pub struct DMAC5 {
697 _marker: PhantomData<*const ()>,
698}
699unsafe impl Send for DMAC5 {}
700impl DMAC5 {
701 #[doc = r"Pointer to the register block"]
702 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5140 as *const _;
703 #[doc = r"Return the pointer to the register block"]
704 #[inline(always)]
705 pub const fn ptr() -> *const dmac0::RegisterBlock {
706 Self::PTR
707 }
708}
709impl Deref for DMAC5 {
710 type Target = dmac0::RegisterBlock;
711 #[inline(always)]
712 fn deref(&self) -> &Self::Target {
713 unsafe { &*Self::PTR }
714 }
715}
716impl core::fmt::Debug for DMAC5 {
717 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
718 f.debug_struct("DMAC5").finish()
719 }
720}
721#[doc = "Direct memory access controller 5"]
722pub use self::dmac0 as dmac5;
723#[doc = "Direct memory access controller 6"]
724pub struct DMAC6 {
725 _marker: PhantomData<*const ()>,
726}
727unsafe impl Send for DMAC6 {}
728impl DMAC6 {
729 #[doc = r"Pointer to the register block"]
730 pub const PTR: *const dmac0::RegisterBlock = 0x4000_5180 as *const _;
731 #[doc = r"Return the pointer to the register block"]
732 #[inline(always)]
733 pub const fn ptr() -> *const dmac0::RegisterBlock {
734 Self::PTR
735 }
736}
737impl Deref for DMAC6 {
738 type Target = dmac0::RegisterBlock;
739 #[inline(always)]
740 fn deref(&self) -> &Self::Target {
741 unsafe { &*Self::PTR }
742 }
743}
744impl core::fmt::Debug for DMAC6 {
745 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
746 f.debug_struct("DMAC6").finish()
747 }
748}
749#[doc = "Direct memory access controller 6"]
750pub use self::dmac0 as dmac6;
751#[doc = "Direct memory access controller 7"]
752pub struct DMAC7 {
753 _marker: PhantomData<*const ()>,
754}
755unsafe impl Send for DMAC7 {}
756impl DMAC7 {
757 #[doc = r"Pointer to the register block"]
758 pub const PTR: *const dmac0::RegisterBlock = 0x4000_51c0 as *const _;
759 #[doc = r"Return the pointer to the register block"]
760 #[inline(always)]
761 pub const fn ptr() -> *const dmac0::RegisterBlock {
762 Self::PTR
763 }
764}
765impl Deref for DMAC7 {
766 type Target = dmac0::RegisterBlock;
767 #[inline(always)]
768 fn deref(&self) -> &Self::Target {
769 unsafe { &*Self::PTR }
770 }
771}
772impl core::fmt::Debug for DMAC7 {
773 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
774 f.debug_struct("DMAC7").finish()
775 }
776}
777#[doc = "Direct memory access controller 7"]
778pub use self::dmac0 as dmac7;
779#[doc = "DMAC Module Activation"]
780pub struct DMA {
781 _marker: PhantomData<*const ()>,
782}
783unsafe impl Send for DMA {}
784impl DMA {
785 #[doc = r"Pointer to the register block"]
786 pub const PTR: *const dma::RegisterBlock = 0x4000_5200 as *const _;
787 #[doc = r"Return the pointer to the register block"]
788 #[inline(always)]
789 pub const fn ptr() -> *const dma::RegisterBlock {
790 Self::PTR
791 }
792}
793impl Deref for DMA {
794 type Target = dma::RegisterBlock;
795 #[inline(always)]
796 fn deref(&self) -> &Self::Target {
797 unsafe { &*Self::PTR }
798 }
799}
800impl core::fmt::Debug for DMA {
801 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
802 f.debug_struct("DMA").finish()
803 }
804}
805#[doc = "DMAC Module Activation"]
806pub mod dma;
807#[doc = "Data Transfer Controller"]
808pub struct DTC {
809 _marker: PhantomData<*const ()>,
810}
811unsafe impl Send for DTC {}
812impl DTC {
813 #[doc = r"Pointer to the register block"]
814 pub const PTR: *const dtc::RegisterBlock = 0x4000_5400 as *const _;
815 #[doc = r"Return the pointer to the register block"]
816 #[inline(always)]
817 pub const fn ptr() -> *const dtc::RegisterBlock {
818 Self::PTR
819 }
820}
821impl Deref for DTC {
822 type Target = dtc::RegisterBlock;
823 #[inline(always)]
824 fn deref(&self) -> &Self::Target {
825 unsafe { &*Self::PTR }
826 }
827}
828impl core::fmt::Debug for DTC {
829 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
830 f.debug_struct("DTC").finish()
831 }
832}
833#[doc = "Data Transfer Controller"]
834pub mod dtc;
835#[doc = "Interrupt Controller"]
836pub struct ICU {
837 _marker: PhantomData<*const ()>,
838}
839unsafe impl Send for ICU {}
840impl ICU {
841 #[doc = r"Pointer to the register block"]
842 pub const PTR: *const icu::RegisterBlock = 0x4000_6000 as *const _;
843 #[doc = r"Return the pointer to the register block"]
844 #[inline(always)]
845 pub const fn ptr() -> *const icu::RegisterBlock {
846 Self::PTR
847 }
848}
849impl Deref for ICU {
850 type Target = icu::RegisterBlock;
851 #[inline(always)]
852 fn deref(&self) -> &Self::Target {
853 unsafe { &*Self::PTR }
854 }
855}
856impl core::fmt::Debug for ICU {
857 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
858 f.debug_struct("ICU").finish()
859 }
860}
861#[doc = "Interrupt Controller"]
862pub mod icu;
863#[doc = "CPU System Security Control Unit"]
864pub struct CPSCU {
865 _marker: PhantomData<*const ()>,
866}
867unsafe impl Send for CPSCU {}
868impl CPSCU {
869 #[doc = r"Pointer to the register block"]
870 pub const PTR: *const cpscu::RegisterBlock = 0x4000_8000 as *const _;
871 #[doc = r"Return the pointer to the register block"]
872 #[inline(always)]
873 pub const fn ptr() -> *const cpscu::RegisterBlock {
874 Self::PTR
875 }
876}
877impl Deref for CPSCU {
878 type Target = cpscu::RegisterBlock;
879 #[inline(always)]
880 fn deref(&self) -> &Self::Target {
881 unsafe { &*Self::PTR }
882 }
883}
884impl core::fmt::Debug for CPSCU {
885 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
886 f.debug_struct("CPSCU").finish()
887 }
888}
889#[doc = "CPU System Security Control Unit"]
890pub mod cpscu;
891#[doc = "Debug Function"]
892pub struct DBG {
893 _marker: PhantomData<*const ()>,
894}
895unsafe impl Send for DBG {}
896impl DBG {
897 #[doc = r"Pointer to the register block"]
898 pub const PTR: *const dbg::RegisterBlock = 0x4001_b000 as *const _;
899 #[doc = r"Return the pointer to the register block"]
900 #[inline(always)]
901 pub const fn ptr() -> *const dbg::RegisterBlock {
902 Self::PTR
903 }
904}
905impl Deref for DBG {
906 type Target = dbg::RegisterBlock;
907 #[inline(always)]
908 fn deref(&self) -> &Self::Target {
909 unsafe { &*Self::PTR }
910 }
911}
912impl core::fmt::Debug for DBG {
913 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
914 f.debug_struct("DBG").finish()
915 }
916}
917#[doc = "Debug Function"]
918pub mod dbg;
919#[doc = "SYSTEM/FLASH"]
920pub struct FCACHE {
921 _marker: PhantomData<*const ()>,
922}
923unsafe impl Send for FCACHE {}
924impl FCACHE {
925 #[doc = r"Pointer to the register block"]
926 pub const PTR: *const fcache::RegisterBlock = 0x4001_c100 as *const _;
927 #[doc = r"Return the pointer to the register block"]
928 #[inline(always)]
929 pub const fn ptr() -> *const fcache::RegisterBlock {
930 Self::PTR
931 }
932}
933impl Deref for FCACHE {
934 type Target = fcache::RegisterBlock;
935 #[inline(always)]
936 fn deref(&self) -> &Self::Target {
937 unsafe { &*Self::PTR }
938 }
939}
940impl core::fmt::Debug for FCACHE {
941 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
942 f.debug_struct("FCACHE").finish()
943 }
944}
945#[doc = "SYSTEM/FLASH"]
946pub mod fcache;
947#[doc = "System Control"]
948pub struct SYSC {
949 _marker: PhantomData<*const ()>,
950}
951unsafe impl Send for SYSC {}
952impl SYSC {
953 #[doc = r"Pointer to the register block"]
954 pub const PTR: *const sysc::RegisterBlock = 0x4001_e000 as *const _;
955 #[doc = r"Return the pointer to the register block"]
956 #[inline(always)]
957 pub const fn ptr() -> *const sysc::RegisterBlock {
958 Self::PTR
959 }
960}
961impl Deref for SYSC {
962 type Target = sysc::RegisterBlock;
963 #[inline(always)]
964 fn deref(&self) -> &Self::Target {
965 unsafe { &*Self::PTR }
966 }
967}
968impl core::fmt::Debug for SYSC {
969 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
970 f.debug_struct("SYSC").finish()
971 }
972}
973#[doc = "System Control"]
974pub mod sysc;
975#[doc = "Pmn Pin FunctionPort 0 Control RegistersPmn Pin Function Control Register"]
976pub struct PORT0 {
977 _marker: PhantomData<*const ()>,
978}
979unsafe impl Send for PORT0 {}
980impl PORT0 {
981 #[doc = r"Pointer to the register block"]
982 pub const PTR: *const port0::RegisterBlock = 0x4008_0000 as *const _;
983 #[doc = r"Return the pointer to the register block"]
984 #[inline(always)]
985 pub const fn ptr() -> *const port0::RegisterBlock {
986 Self::PTR
987 }
988}
989impl Deref for PORT0 {
990 type Target = port0::RegisterBlock;
991 #[inline(always)]
992 fn deref(&self) -> &Self::Target {
993 unsafe { &*Self::PTR }
994 }
995}
996impl core::fmt::Debug for PORT0 {
997 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
998 f.debug_struct("PORT0").finish()
999 }
1000}
1001#[doc = "Pmn Pin FunctionPort 0 Control RegistersPmn Pin Function Control Register"]
1002pub mod port0;
1003#[doc = "Pmn Pin FunctionPort 1 Control RegistersPmn Pin Function Control Register"]
1004pub struct PORT1 {
1005 _marker: PhantomData<*const ()>,
1006}
1007unsafe impl Send for PORT1 {}
1008impl PORT1 {
1009 #[doc = r"Pointer to the register block"]
1010 pub const PTR: *const port1::RegisterBlock = 0x4008_0020 as *const _;
1011 #[doc = r"Return the pointer to the register block"]
1012 #[inline(always)]
1013 pub const fn ptr() -> *const port1::RegisterBlock {
1014 Self::PTR
1015 }
1016}
1017impl Deref for PORT1 {
1018 type Target = port1::RegisterBlock;
1019 #[inline(always)]
1020 fn deref(&self) -> &Self::Target {
1021 unsafe { &*Self::PTR }
1022 }
1023}
1024impl core::fmt::Debug for PORT1 {
1025 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1026 f.debug_struct("PORT1").finish()
1027 }
1028}
1029#[doc = "Pmn Pin FunctionPort 1 Control RegistersPmn Pin Function Control Register"]
1030pub mod port1;
1031#[doc = "Pmn Pin FunctionPort 2 Control RegistersPmn Pin Function Control Register"]
1032pub struct PORT2 {
1033 _marker: PhantomData<*const ()>,
1034}
1035unsafe impl Send for PORT2 {}
1036impl PORT2 {
1037 #[doc = r"Pointer to the register block"]
1038 pub const PTR: *const port1::RegisterBlock = 0x4008_0040 as *const _;
1039 #[doc = r"Return the pointer to the register block"]
1040 #[inline(always)]
1041 pub const fn ptr() -> *const port1::RegisterBlock {
1042 Self::PTR
1043 }
1044}
1045impl Deref for PORT2 {
1046 type Target = port1::RegisterBlock;
1047 #[inline(always)]
1048 fn deref(&self) -> &Self::Target {
1049 unsafe { &*Self::PTR }
1050 }
1051}
1052impl core::fmt::Debug for PORT2 {
1053 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1054 f.debug_struct("PORT2").finish()
1055 }
1056}
1057#[doc = "Pmn Pin FunctionPort 2 Control RegistersPmn Pin Function Control Register"]
1058pub use self::port1 as port2;
1059#[doc = "Pmn Pin FunctionPort 3 Control RegistersPmn Pin Function Control Register"]
1060pub struct PORT3 {
1061 _marker: PhantomData<*const ()>,
1062}
1063unsafe impl Send for PORT3 {}
1064impl PORT3 {
1065 #[doc = r"Pointer to the register block"]
1066 pub const PTR: *const port1::RegisterBlock = 0x4008_0060 as *const _;
1067 #[doc = r"Return the pointer to the register block"]
1068 #[inline(always)]
1069 pub const fn ptr() -> *const port1::RegisterBlock {
1070 Self::PTR
1071 }
1072}
1073impl Deref for PORT3 {
1074 type Target = port1::RegisterBlock;
1075 #[inline(always)]
1076 fn deref(&self) -> &Self::Target {
1077 unsafe { &*Self::PTR }
1078 }
1079}
1080impl core::fmt::Debug for PORT3 {
1081 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1082 f.debug_struct("PORT3").finish()
1083 }
1084}
1085#[doc = "Pmn Pin FunctionPort 3 Control RegistersPmn Pin Function Control Register"]
1086pub use self::port1 as port3;
1087#[doc = "Pmn Pin FunctionPort 4 Control RegistersPmn Pin Function Control Register"]
1088pub struct PORT4 {
1089 _marker: PhantomData<*const ()>,
1090}
1091unsafe impl Send for PORT4 {}
1092impl PORT4 {
1093 #[doc = r"Pointer to the register block"]
1094 pub const PTR: *const port1::RegisterBlock = 0x4008_0080 as *const _;
1095 #[doc = r"Return the pointer to the register block"]
1096 #[inline(always)]
1097 pub const fn ptr() -> *const port1::RegisterBlock {
1098 Self::PTR
1099 }
1100}
1101impl Deref for PORT4 {
1102 type Target = port1::RegisterBlock;
1103 #[inline(always)]
1104 fn deref(&self) -> &Self::Target {
1105 unsafe { &*Self::PTR }
1106 }
1107}
1108impl core::fmt::Debug for PORT4 {
1109 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1110 f.debug_struct("PORT4").finish()
1111 }
1112}
1113#[doc = "Pmn Pin FunctionPort 4 Control RegistersPmn Pin Function Control Register"]
1114pub use self::port1 as port4;
1115#[doc = "Pmn Pin FunctionPort 5 Control RegistersPmn Pin Function Control Register"]
1116pub struct PORT5 {
1117 _marker: PhantomData<*const ()>,
1118}
1119unsafe impl Send for PORT5 {}
1120impl PORT5 {
1121 #[doc = r"Pointer to the register block"]
1122 pub const PTR: *const port0::RegisterBlock = 0x4008_00a0 as *const _;
1123 #[doc = r"Return the pointer to the register block"]
1124 #[inline(always)]
1125 pub const fn ptr() -> *const port0::RegisterBlock {
1126 Self::PTR
1127 }
1128}
1129impl Deref for PORT5 {
1130 type Target = port0::RegisterBlock;
1131 #[inline(always)]
1132 fn deref(&self) -> &Self::Target {
1133 unsafe { &*Self::PTR }
1134 }
1135}
1136impl core::fmt::Debug for PORT5 {
1137 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1138 f.debug_struct("PORT5").finish()
1139 }
1140}
1141#[doc = "Pmn Pin FunctionPort 5 Control RegistersPmn Pin Function Control Register"]
1142pub use self::port0 as port5;
1143#[doc = "Control Register"]
1144pub struct PFS {
1145 _marker: PhantomData<*const ()>,
1146}
1147unsafe impl Send for PFS {}
1148impl PFS {
1149 #[doc = r"Pointer to the register block"]
1150 pub const PTR: *const pfs::RegisterBlock = 0x4008_0800 as *const _;
1151 #[doc = r"Return the pointer to the register block"]
1152 #[inline(always)]
1153 pub const fn ptr() -> *const pfs::RegisterBlock {
1154 Self::PTR
1155 }
1156}
1157impl Deref for PFS {
1158 type Target = pfs::RegisterBlock;
1159 #[inline(always)]
1160 fn deref(&self) -> &Self::Target {
1161 unsafe { &*Self::PTR }
1162 }
1163}
1164impl core::fmt::Debug for PFS {
1165 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1166 f.debug_struct("PFS").finish()
1167 }
1168}
1169#[doc = "Control Register"]
1170pub mod pfs;
1171#[doc = "Event Link Controller"]
1172pub struct ELC {
1173 _marker: PhantomData<*const ()>,
1174}
1175unsafe impl Send for ELC {}
1176impl ELC {
1177 #[doc = r"Pointer to the register block"]
1178 pub const PTR: *const elc::RegisterBlock = 0x4008_2000 as *const _;
1179 #[doc = r"Return the pointer to the register block"]
1180 #[inline(always)]
1181 pub const fn ptr() -> *const elc::RegisterBlock {
1182 Self::PTR
1183 }
1184}
1185impl Deref for ELC {
1186 type Target = elc::RegisterBlock;
1187 #[inline(always)]
1188 fn deref(&self) -> &Self::Target {
1189 unsafe { &*Self::PTR }
1190 }
1191}
1192impl core::fmt::Debug for ELC {
1193 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1194 f.debug_struct("ELC").finish()
1195 }
1196}
1197#[doc = "Event Link Controller"]
1198pub mod elc;
1199#[doc = "Realtime Clock"]
1200pub struct RTC {
1201 _marker: PhantomData<*const ()>,
1202}
1203unsafe impl Send for RTC {}
1204impl RTC {
1205 #[doc = r"Pointer to the register block"]
1206 pub const PTR: *const rtc::RegisterBlock = 0x4008_3000 as *const _;
1207 #[doc = r"Return the pointer to the register block"]
1208 #[inline(always)]
1209 pub const fn ptr() -> *const rtc::RegisterBlock {
1210 Self::PTR
1211 }
1212}
1213impl Deref for RTC {
1214 type Target = rtc::RegisterBlock;
1215 #[inline(always)]
1216 fn deref(&self) -> &Self::Target {
1217 unsafe { &*Self::PTR }
1218 }
1219}
1220impl core::fmt::Debug for RTC {
1221 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1222 f.debug_struct("RTC").finish()
1223 }
1224}
1225#[doc = "Realtime Clock"]
1226pub mod rtc;
1227#[doc = "Independent Watchdog Timer"]
1228pub struct IWDT {
1229 _marker: PhantomData<*const ()>,
1230}
1231unsafe impl Send for IWDT {}
1232impl IWDT {
1233 #[doc = r"Pointer to the register block"]
1234 pub const PTR: *const iwdt::RegisterBlock = 0x4008_3200 as *const _;
1235 #[doc = r"Return the pointer to the register block"]
1236 #[inline(always)]
1237 pub const fn ptr() -> *const iwdt::RegisterBlock {
1238 Self::PTR
1239 }
1240}
1241impl Deref for IWDT {
1242 type Target = iwdt::RegisterBlock;
1243 #[inline(always)]
1244 fn deref(&self) -> &Self::Target {
1245 unsafe { &*Self::PTR }
1246 }
1247}
1248impl core::fmt::Debug for IWDT {
1249 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1250 f.debug_struct("IWDT").finish()
1251 }
1252}
1253#[doc = "Independent Watchdog Timer"]
1254pub mod iwdt;
1255#[doc = "Watchdog Timer"]
1256pub struct WDT {
1257 _marker: PhantomData<*const ()>,
1258}
1259unsafe impl Send for WDT {}
1260impl WDT {
1261 #[doc = r"Pointer to the register block"]
1262 pub const PTR: *const wdt::RegisterBlock = 0x4008_3400 as *const _;
1263 #[doc = r"Return the pointer to the register block"]
1264 #[inline(always)]
1265 pub const fn ptr() -> *const wdt::RegisterBlock {
1266 Self::PTR
1267 }
1268}
1269impl Deref for WDT {
1270 type Target = wdt::RegisterBlock;
1271 #[inline(always)]
1272 fn deref(&self) -> &Self::Target {
1273 unsafe { &*Self::PTR }
1274 }
1275}
1276impl core::fmt::Debug for WDT {
1277 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1278 f.debug_struct("WDT").finish()
1279 }
1280}
1281#[doc = "Watchdog Timer"]
1282pub mod wdt;
1283#[doc = "Clock Frequency Accuracy Measurement Circuit"]
1284pub struct CAC {
1285 _marker: PhantomData<*const ()>,
1286}
1287unsafe impl Send for CAC {}
1288impl CAC {
1289 #[doc = r"Pointer to the register block"]
1290 pub const PTR: *const cac::RegisterBlock = 0x4008_3600 as *const _;
1291 #[doc = r"Return the pointer to the register block"]
1292 #[inline(always)]
1293 pub const fn ptr() -> *const cac::RegisterBlock {
1294 Self::PTR
1295 }
1296}
1297impl Deref for CAC {
1298 type Target = cac::RegisterBlock;
1299 #[inline(always)]
1300 fn deref(&self) -> &Self::Target {
1301 unsafe { &*Self::PTR }
1302 }
1303}
1304impl core::fmt::Debug for CAC {
1305 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1306 f.debug_struct("CAC").finish()
1307 }
1308}
1309#[doc = "Clock Frequency Accuracy Measurement Circuit"]
1310pub mod cac;
1311#[doc = "Module Stop Control"]
1312pub struct MSTP {
1313 _marker: PhantomData<*const ()>,
1314}
1315unsafe impl Send for MSTP {}
1316impl MSTP {
1317 #[doc = r"Pointer to the register block"]
1318 pub const PTR: *const mstp::RegisterBlock = 0x4008_4000 as *const _;
1319 #[doc = r"Return the pointer to the register block"]
1320 #[inline(always)]
1321 pub const fn ptr() -> *const mstp::RegisterBlock {
1322 Self::PTR
1323 }
1324}
1325impl Deref for MSTP {
1326 type Target = mstp::RegisterBlock;
1327 #[inline(always)]
1328 fn deref(&self) -> &Self::Target {
1329 unsafe { &*Self::PTR }
1330 }
1331}
1332impl core::fmt::Debug for MSTP {
1333 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1334 f.debug_struct("MSTP").finish()
1335 }
1336}
1337#[doc = "Module Stop Control"]
1338pub mod mstp;
1339#[doc = "Port Output Enable Module for GPT"]
1340pub struct POEG {
1341 _marker: PhantomData<*const ()>,
1342}
1343unsafe impl Send for POEG {}
1344impl POEG {
1345 #[doc = r"Pointer to the register block"]
1346 pub const PTR: *const poeg::RegisterBlock = 0x4008_a000 as *const _;
1347 #[doc = r"Return the pointer to the register block"]
1348 #[inline(always)]
1349 pub const fn ptr() -> *const poeg::RegisterBlock {
1350 Self::PTR
1351 }
1352}
1353impl Deref for POEG {
1354 type Target = poeg::RegisterBlock;
1355 #[inline(always)]
1356 fn deref(&self) -> &Self::Target {
1357 unsafe { &*Self::PTR }
1358 }
1359}
1360impl core::fmt::Debug for POEG {
1361 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1362 f.debug_struct("POEG").finish()
1363 }
1364}
1365#[doc = "Port Output Enable Module for GPT"]
1366pub mod poeg;
1367#[doc = "USB 2.0 Full-Speed Module"]
1368pub struct USBFS {
1369 _marker: PhantomData<*const ()>,
1370}
1371unsafe impl Send for USBFS {}
1372impl USBFS {
1373 #[doc = r"Pointer to the register block"]
1374 pub const PTR: *const usbfs::RegisterBlock = 0x4009_0000 as *const _;
1375 #[doc = r"Return the pointer to the register block"]
1376 #[inline(always)]
1377 pub const fn ptr() -> *const usbfs::RegisterBlock {
1378 Self::PTR
1379 }
1380}
1381impl Deref for USBFS {
1382 type Target = usbfs::RegisterBlock;
1383 #[inline(always)]
1384 fn deref(&self) -> &Self::Target {
1385 unsafe { &*Self::PTR }
1386 }
1387}
1388impl core::fmt::Debug for USBFS {
1389 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1390 f.debug_struct("USBFS").finish()
1391 }
1392}
1393#[doc = "USB 2.0 Full-Speed Module"]
1394pub mod usbfs;
1395#[doc = "Inter-Integrated Circuit 0"]
1396pub struct IIC0 {
1397 _marker: PhantomData<*const ()>,
1398}
1399unsafe impl Send for IIC0 {}
1400impl IIC0 {
1401 #[doc = r"Pointer to the register block"]
1402 pub const PTR: *const iic0::RegisterBlock = 0x4009_f000 as *const _;
1403 #[doc = r"Return the pointer to the register block"]
1404 #[inline(always)]
1405 pub const fn ptr() -> *const iic0::RegisterBlock {
1406 Self::PTR
1407 }
1408}
1409impl Deref for IIC0 {
1410 type Target = iic0::RegisterBlock;
1411 #[inline(always)]
1412 fn deref(&self) -> &Self::Target {
1413 unsafe { &*Self::PTR }
1414 }
1415}
1416impl core::fmt::Debug for IIC0 {
1417 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1418 f.debug_struct("IIC0").finish()
1419 }
1420}
1421#[doc = "Inter-Integrated Circuit 0"]
1422pub mod iic0;
1423#[doc = "Inter-Integrated Circuit 0 Wake-up Unit"]
1424pub struct IIC0WU {
1425 _marker: PhantomData<*const ()>,
1426}
1427unsafe impl Send for IIC0WU {}
1428impl IIC0WU {
1429 #[doc = r"Pointer to the register block"]
1430 pub const PTR: *const iic0wu::RegisterBlock = 0x4009_f014 as *const _;
1431 #[doc = r"Return the pointer to the register block"]
1432 #[inline(always)]
1433 pub const fn ptr() -> *const iic0wu::RegisterBlock {
1434 Self::PTR
1435 }
1436}
1437impl Deref for IIC0WU {
1438 type Target = iic0wu::RegisterBlock;
1439 #[inline(always)]
1440 fn deref(&self) -> &Self::Target {
1441 unsafe { &*Self::PTR }
1442 }
1443}
1444impl core::fmt::Debug for IIC0WU {
1445 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1446 f.debug_struct("IIC0WU").finish()
1447 }
1448}
1449#[doc = "Inter-Integrated Circuit 0 Wake-up Unit"]
1450pub mod iic0wu;
1451#[doc = "Controller Area Network"]
1452pub struct CAN0 {
1453 _marker: PhantomData<*const ()>,
1454}
1455unsafe impl Send for CAN0 {}
1456impl CAN0 {
1457 #[doc = r"Pointer to the register block"]
1458 pub const PTR: *const can0::RegisterBlock = 0x400a_8000 as *const _;
1459 #[doc = r"Return the pointer to the register block"]
1460 #[inline(always)]
1461 pub const fn ptr() -> *const can0::RegisterBlock {
1462 Self::PTR
1463 }
1464}
1465impl Deref for CAN0 {
1466 type Target = can0::RegisterBlock;
1467 #[inline(always)]
1468 fn deref(&self) -> &Self::Target {
1469 unsafe { &*Self::PTR }
1470 }
1471}
1472impl core::fmt::Debug for CAN0 {
1473 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1474 f.debug_struct("CAN0").finish()
1475 }
1476}
1477#[doc = "Controller Area Network"]
1478pub mod can0;
1479#[doc = "Peripheral Security Control Unit"]
1480pub struct PSCU {
1481 _marker: PhantomData<*const ()>,
1482}
1483unsafe impl Send for PSCU {}
1484impl PSCU {
1485 #[doc = r"Pointer to the register block"]
1486 pub const PTR: *const pscu::RegisterBlock = 0x400e_0000 as *const _;
1487 #[doc = r"Return the pointer to the register block"]
1488 #[inline(always)]
1489 pub const fn ptr() -> *const pscu::RegisterBlock {
1490 Self::PTR
1491 }
1492}
1493impl Deref for PSCU {
1494 type Target = pscu::RegisterBlock;
1495 #[inline(always)]
1496 fn deref(&self) -> &Self::Target {
1497 unsafe { &*Self::PTR }
1498 }
1499}
1500impl core::fmt::Debug for PSCU {
1501 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1502 f.debug_struct("PSCU").finish()
1503 }
1504}
1505#[doc = "Peripheral Security Control Unit"]
1506pub mod pscu;
1507#[doc = "Low Power Asynchronous General Purpose Timer 0"]
1508pub struct AGT0 {
1509 _marker: PhantomData<*const ()>,
1510}
1511unsafe impl Send for AGT0 {}
1512impl AGT0 {
1513 #[doc = r"Pointer to the register block"]
1514 pub const PTR: *const agt0::RegisterBlock = 0x400e_8000 as *const _;
1515 #[doc = r"Return the pointer to the register block"]
1516 #[inline(always)]
1517 pub const fn ptr() -> *const agt0::RegisterBlock {
1518 Self::PTR
1519 }
1520}
1521impl Deref for AGT0 {
1522 type Target = agt0::RegisterBlock;
1523 #[inline(always)]
1524 fn deref(&self) -> &Self::Target {
1525 unsafe { &*Self::PTR }
1526 }
1527}
1528impl core::fmt::Debug for AGT0 {
1529 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1530 f.debug_struct("AGT0").finish()
1531 }
1532}
1533#[doc = "Low Power Asynchronous General Purpose Timer 0"]
1534pub mod agt0;
1535#[doc = "Low Power Asynchronous General Purpose Timer 1"]
1536pub struct AGT1 {
1537 _marker: PhantomData<*const ()>,
1538}
1539unsafe impl Send for AGT1 {}
1540impl AGT1 {
1541 #[doc = r"Pointer to the register block"]
1542 pub const PTR: *const agt0::RegisterBlock = 0x400e_8100 as *const _;
1543 #[doc = r"Return the pointer to the register block"]
1544 #[inline(always)]
1545 pub const fn ptr() -> *const agt0::RegisterBlock {
1546 Self::PTR
1547 }
1548}
1549impl Deref for AGT1 {
1550 type Target = agt0::RegisterBlock;
1551 #[inline(always)]
1552 fn deref(&self) -> &Self::Target {
1553 unsafe { &*Self::PTR }
1554 }
1555}
1556impl core::fmt::Debug for AGT1 {
1557 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1558 f.debug_struct("AGT1").finish()
1559 }
1560}
1561#[doc = "Low Power Asynchronous General Purpose Timer 1"]
1562pub use self::agt0 as agt1;
1563#[doc = "Low Power Asynchronous General Purpose Timer 2"]
1564pub struct AGT2 {
1565 _marker: PhantomData<*const ()>,
1566}
1567unsafe impl Send for AGT2 {}
1568impl AGT2 {
1569 #[doc = r"Pointer to the register block"]
1570 pub const PTR: *const agt0::RegisterBlock = 0x400e_8200 as *const _;
1571 #[doc = r"Return the pointer to the register block"]
1572 #[inline(always)]
1573 pub const fn ptr() -> *const agt0::RegisterBlock {
1574 Self::PTR
1575 }
1576}
1577impl Deref for AGT2 {
1578 type Target = agt0::RegisterBlock;
1579 #[inline(always)]
1580 fn deref(&self) -> &Self::Target {
1581 unsafe { &*Self::PTR }
1582 }
1583}
1584impl core::fmt::Debug for AGT2 {
1585 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1586 f.debug_struct("AGT2").finish()
1587 }
1588}
1589#[doc = "Low Power Asynchronous General Purpose Timer 2"]
1590pub use self::agt0 as agt2;
1591#[doc = "Low Power Asynchronous General Purpose Timer 3"]
1592pub struct AGT3 {
1593 _marker: PhantomData<*const ()>,
1594}
1595unsafe impl Send for AGT3 {}
1596impl AGT3 {
1597 #[doc = r"Pointer to the register block"]
1598 pub const PTR: *const agt0::RegisterBlock = 0x400e_8300 as *const _;
1599 #[doc = r"Return the pointer to the register block"]
1600 #[inline(always)]
1601 pub const fn ptr() -> *const agt0::RegisterBlock {
1602 Self::PTR
1603 }
1604}
1605impl Deref for AGT3 {
1606 type Target = agt0::RegisterBlock;
1607 #[inline(always)]
1608 fn deref(&self) -> &Self::Target {
1609 unsafe { &*Self::PTR }
1610 }
1611}
1612impl core::fmt::Debug for AGT3 {
1613 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1614 f.debug_struct("AGT3").finish()
1615 }
1616}
1617#[doc = "Low Power Asynchronous General Purpose Timer 3"]
1618pub use self::agt0 as agt3;
1619#[doc = "Low Power Asynchronous General Purpose Timer 5"]
1620pub struct AGT5 {
1621 _marker: PhantomData<*const ()>,
1622}
1623unsafe impl Send for AGT5 {}
1624impl AGT5 {
1625 #[doc = r"Pointer to the register block"]
1626 pub const PTR: *const agt0::RegisterBlock = 0x400e_8500 as *const _;
1627 #[doc = r"Return the pointer to the register block"]
1628 #[inline(always)]
1629 pub const fn ptr() -> *const agt0::RegisterBlock {
1630 Self::PTR
1631 }
1632}
1633impl Deref for AGT5 {
1634 type Target = agt0::RegisterBlock;
1635 #[inline(always)]
1636 fn deref(&self) -> &Self::Target {
1637 unsafe { &*Self::PTR }
1638 }
1639}
1640impl core::fmt::Debug for AGT5 {
1641 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1642 f.debug_struct("AGT5").finish()
1643 }
1644}
1645#[doc = "Low Power Asynchronous General Purpose Timer 5"]
1646pub use self::agt0 as agt5;
1647#[doc = "Cyclic Redundancy Check Calculator"]
1648pub struct CRC {
1649 _marker: PhantomData<*const ()>,
1650}
1651unsafe impl Send for CRC {}
1652impl CRC {
1653 #[doc = r"Pointer to the register block"]
1654 pub const PTR: *const crc::RegisterBlock = 0x4010_8000 as *const _;
1655 #[doc = r"Return the pointer to the register block"]
1656 #[inline(always)]
1657 pub const fn ptr() -> *const crc::RegisterBlock {
1658 Self::PTR
1659 }
1660}
1661impl Deref for CRC {
1662 type Target = crc::RegisterBlock;
1663 #[inline(always)]
1664 fn deref(&self) -> &Self::Target {
1665 unsafe { &*Self::PTR }
1666 }
1667}
1668impl core::fmt::Debug for CRC {
1669 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1670 f.debug_struct("CRC").finish()
1671 }
1672}
1673#[doc = "Cyclic Redundancy Check Calculator"]
1674pub mod crc;
1675#[doc = "Data Operation Circuit"]
1676pub struct DOC {
1677 _marker: PhantomData<*const ()>,
1678}
1679unsafe impl Send for DOC {}
1680impl DOC {
1681 #[doc = r"Pointer to the register block"]
1682 pub const PTR: *const doc::RegisterBlock = 0x4010_9000 as *const _;
1683 #[doc = r"Return the pointer to the register block"]
1684 #[inline(always)]
1685 pub const fn ptr() -> *const doc::RegisterBlock {
1686 Self::PTR
1687 }
1688}
1689impl Deref for DOC {
1690 type Target = doc::RegisterBlock;
1691 #[inline(always)]
1692 fn deref(&self) -> &Self::Target {
1693 unsafe { &*Self::PTR }
1694 }
1695}
1696impl core::fmt::Debug for DOC {
1697 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1698 f.debug_struct("DOC").finish()
1699 }
1700}
1701#[doc = "Data Operation Circuit"]
1702pub mod doc;
1703#[doc = "Serial Communication Interface"]
1704pub struct SCI0 {
1705 _marker: PhantomData<*const ()>,
1706}
1707unsafe impl Send for SCI0 {}
1708impl SCI0 {
1709 #[doc = r"Pointer to the register block"]
1710 pub const PTR: *const sci0::RegisterBlock = 0x4011_8000 as *const _;
1711 #[doc = r"Return the pointer to the register block"]
1712 #[inline(always)]
1713 pub const fn ptr() -> *const sci0::RegisterBlock {
1714 Self::PTR
1715 }
1716}
1717impl Deref for SCI0 {
1718 type Target = sci0::RegisterBlock;
1719 #[inline(always)]
1720 fn deref(&self) -> &Self::Target {
1721 unsafe { &*Self::PTR }
1722 }
1723}
1724impl core::fmt::Debug for SCI0 {
1725 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1726 f.debug_struct("SCI0").finish()
1727 }
1728}
1729#[doc = "Serial Communication Interface"]
1730pub mod sci0;
1731#[doc = "Serial Communication Interface"]
1732pub struct SCI3 {
1733 _marker: PhantomData<*const ()>,
1734}
1735unsafe impl Send for SCI3 {}
1736impl SCI3 {
1737 #[doc = r"Pointer to the register block"]
1738 pub const PTR: *const sci3::RegisterBlock = 0x4011_8300 as *const _;
1739 #[doc = r"Return the pointer to the register block"]
1740 #[inline(always)]
1741 pub const fn ptr() -> *const sci3::RegisterBlock {
1742 Self::PTR
1743 }
1744}
1745impl Deref for SCI3 {
1746 type Target = sci3::RegisterBlock;
1747 #[inline(always)]
1748 fn deref(&self) -> &Self::Target {
1749 unsafe { &*Self::PTR }
1750 }
1751}
1752impl core::fmt::Debug for SCI3 {
1753 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1754 f.debug_struct("SCI3").finish()
1755 }
1756}
1757#[doc = "Serial Communication Interface"]
1758pub mod sci3;
1759#[doc = "Serial Communication Interface"]
1760pub struct SCI4 {
1761 _marker: PhantomData<*const ()>,
1762}
1763unsafe impl Send for SCI4 {}
1764impl SCI4 {
1765 #[doc = r"Pointer to the register block"]
1766 pub const PTR: *const sci3::RegisterBlock = 0x4011_8400 as *const _;
1767 #[doc = r"Return the pointer to the register block"]
1768 #[inline(always)]
1769 pub const fn ptr() -> *const sci3::RegisterBlock {
1770 Self::PTR
1771 }
1772}
1773impl Deref for SCI4 {
1774 type Target = sci3::RegisterBlock;
1775 #[inline(always)]
1776 fn deref(&self) -> &Self::Target {
1777 unsafe { &*Self::PTR }
1778 }
1779}
1780impl core::fmt::Debug for SCI4 {
1781 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1782 f.debug_struct("SCI4").finish()
1783 }
1784}
1785#[doc = "Serial Communication Interface"]
1786pub use self::sci3 as sci4;
1787#[doc = "Serial Communication Interface"]
1788pub struct SCI9 {
1789 _marker: PhantomData<*const ()>,
1790}
1791unsafe impl Send for SCI9 {}
1792impl SCI9 {
1793 #[doc = r"Pointer to the register block"]
1794 pub const PTR: *const sci0::RegisterBlock = 0x4011_8900 as *const _;
1795 #[doc = r"Return the pointer to the register block"]
1796 #[inline(always)]
1797 pub const fn ptr() -> *const sci0::RegisterBlock {
1798 Self::PTR
1799 }
1800}
1801impl Deref for SCI9 {
1802 type Target = sci0::RegisterBlock;
1803 #[inline(always)]
1804 fn deref(&self) -> &Self::Target {
1805 unsafe { &*Self::PTR }
1806 }
1807}
1808impl core::fmt::Debug for SCI9 {
1809 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1810 f.debug_struct("SCI9").finish()
1811 }
1812}
1813#[doc = "Serial Communication Interface"]
1814pub use self::sci0 as sci9;
1815#[doc = "Serial Peripheral Interface"]
1816pub struct SPI0 {
1817 _marker: PhantomData<*const ()>,
1818}
1819unsafe impl Send for SPI0 {}
1820impl SPI0 {
1821 #[doc = r"Pointer to the register block"]
1822 pub const PTR: *const spi0::RegisterBlock = 0x4011_a000 as *const _;
1823 #[doc = r"Return the pointer to the register block"]
1824 #[inline(always)]
1825 pub const fn ptr() -> *const spi0::RegisterBlock {
1826 Self::PTR
1827 }
1828}
1829impl Deref for SPI0 {
1830 type Target = spi0::RegisterBlock;
1831 #[inline(always)]
1832 fn deref(&self) -> &Self::Target {
1833 unsafe { &*Self::PTR }
1834 }
1835}
1836impl core::fmt::Debug for SPI0 {
1837 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1838 f.debug_struct("SPI0").finish()
1839 }
1840}
1841#[doc = "Serial Peripheral Interface"]
1842pub mod spi0;
1843#[doc = "General PWM 32-bit Timer 1"]
1844pub struct GPT321 {
1845 _marker: PhantomData<*const ()>,
1846}
1847unsafe impl Send for GPT321 {}
1848impl GPT321 {
1849 #[doc = r"Pointer to the register block"]
1850 pub const PTR: *const gpt321::RegisterBlock = 0x4016_9100 as *const _;
1851 #[doc = r"Return the pointer to the register block"]
1852 #[inline(always)]
1853 pub const fn ptr() -> *const gpt321::RegisterBlock {
1854 Self::PTR
1855 }
1856}
1857impl Deref for GPT321 {
1858 type Target = gpt321::RegisterBlock;
1859 #[inline(always)]
1860 fn deref(&self) -> &Self::Target {
1861 unsafe { &*Self::PTR }
1862 }
1863}
1864impl core::fmt::Debug for GPT321 {
1865 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1866 f.debug_struct("GPT321").finish()
1867 }
1868}
1869#[doc = "General PWM 32-bit Timer 1"]
1870pub mod gpt321;
1871#[doc = "General PWM 32-bit Timer 2"]
1872pub struct GPT322 {
1873 _marker: PhantomData<*const ()>,
1874}
1875unsafe impl Send for GPT322 {}
1876impl GPT322 {
1877 #[doc = r"Pointer to the register block"]
1878 pub const PTR: *const gpt321::RegisterBlock = 0x4016_9200 as *const _;
1879 #[doc = r"Return the pointer to the register block"]
1880 #[inline(always)]
1881 pub const fn ptr() -> *const gpt321::RegisterBlock {
1882 Self::PTR
1883 }
1884}
1885impl Deref for GPT322 {
1886 type Target = gpt321::RegisterBlock;
1887 #[inline(always)]
1888 fn deref(&self) -> &Self::Target {
1889 unsafe { &*Self::PTR }
1890 }
1891}
1892impl core::fmt::Debug for GPT322 {
1893 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1894 f.debug_struct("GPT322").finish()
1895 }
1896}
1897#[doc = "General PWM 32-bit Timer 2"]
1898pub use self::gpt321 as gpt322;
1899#[doc = "General PWM 16-bit Timer 4"]
1900pub struct GPT164 {
1901 _marker: PhantomData<*const ()>,
1902}
1903unsafe impl Send for GPT164 {}
1904impl GPT164 {
1905 #[doc = r"Pointer to the register block"]
1906 pub const PTR: *const gpt164::RegisterBlock = 0x4016_9400 as *const _;
1907 #[doc = r"Return the pointer to the register block"]
1908 #[inline(always)]
1909 pub const fn ptr() -> *const gpt164::RegisterBlock {
1910 Self::PTR
1911 }
1912}
1913impl Deref for GPT164 {
1914 type Target = gpt164::RegisterBlock;
1915 #[inline(always)]
1916 fn deref(&self) -> &Self::Target {
1917 unsafe { &*Self::PTR }
1918 }
1919}
1920impl core::fmt::Debug for GPT164 {
1921 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1922 f.debug_struct("GPT164").finish()
1923 }
1924}
1925#[doc = "General PWM 16-bit Timer 4"]
1926pub mod gpt164;
1927#[doc = "General PWM 16-bit Timer 5"]
1928pub struct GPT165 {
1929 _marker: PhantomData<*const ()>,
1930}
1931unsafe impl Send for GPT165 {}
1932impl GPT165 {
1933 #[doc = r"Pointer to the register block"]
1934 pub const PTR: *const gpt164::RegisterBlock = 0x4016_9500 as *const _;
1935 #[doc = r"Return the pointer to the register block"]
1936 #[inline(always)]
1937 pub const fn ptr() -> *const gpt164::RegisterBlock {
1938 Self::PTR
1939 }
1940}
1941impl Deref for GPT165 {
1942 type Target = gpt164::RegisterBlock;
1943 #[inline(always)]
1944 fn deref(&self) -> &Self::Target {
1945 unsafe { &*Self::PTR }
1946 }
1947}
1948impl core::fmt::Debug for GPT165 {
1949 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1950 f.debug_struct("GPT165").finish()
1951 }
1952}
1953#[doc = "General PWM 16-bit Timer 5"]
1954pub use self::gpt164 as gpt165;
1955#[doc = "12-bit A/D Converter"]
1956pub struct ADC120 {
1957 _marker: PhantomData<*const ()>,
1958}
1959unsafe impl Send for ADC120 {}
1960impl ADC120 {
1961 #[doc = r"Pointer to the register block"]
1962 pub const PTR: *const adc120::RegisterBlock = 0x4017_0000 as *const _;
1963 #[doc = r"Return the pointer to the register block"]
1964 #[inline(always)]
1965 pub const fn ptr() -> *const adc120::RegisterBlock {
1966 Self::PTR
1967 }
1968}
1969impl Deref for ADC120 {
1970 type Target = adc120::RegisterBlock;
1971 #[inline(always)]
1972 fn deref(&self) -> &Self::Target {
1973 unsafe { &*Self::PTR }
1974 }
1975}
1976impl core::fmt::Debug for ADC120 {
1977 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1978 f.debug_struct("ADC120").finish()
1979 }
1980}
1981#[doc = "12-bit A/D Converter"]
1982pub mod adc120;
1983#[doc = "12-bit D/A converter"]
1984pub struct DAC12 {
1985 _marker: PhantomData<*const ()>,
1986}
1987unsafe impl Send for DAC12 {}
1988impl DAC12 {
1989 #[doc = r"Pointer to the register block"]
1990 pub const PTR: *const dac12::RegisterBlock = 0x4017_1000 as *const _;
1991 #[doc = r"Return the pointer to the register block"]
1992 #[inline(always)]
1993 pub const fn ptr() -> *const dac12::RegisterBlock {
1994 Self::PTR
1995 }
1996}
1997impl Deref for DAC12 {
1998 type Target = dac12::RegisterBlock;
1999 #[inline(always)]
2000 fn deref(&self) -> &Self::Target {
2001 unsafe { &*Self::PTR }
2002 }
2003}
2004impl core::fmt::Debug for DAC12 {
2005 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2006 f.debug_struct("DAC12").finish()
2007 }
2008}
2009#[doc = "12-bit D/A converter"]
2010pub mod dac12;
2011#[doc = "Data Flash"]
2012pub struct FLAD {
2013 _marker: PhantomData<*const ()>,
2014}
2015unsafe impl Send for FLAD {}
2016impl FLAD {
2017 #[doc = r"Pointer to the register block"]
2018 pub const PTR: *const flad::RegisterBlock = 0x407f_c000 as *const _;
2019 #[doc = r"Return the pointer to the register block"]
2020 #[inline(always)]
2021 pub const fn ptr() -> *const flad::RegisterBlock {
2022 Self::PTR
2023 }
2024}
2025impl Deref for FLAD {
2026 type Target = flad::RegisterBlock;
2027 #[inline(always)]
2028 fn deref(&self) -> &Self::Target {
2029 unsafe { &*Self::PTR }
2030 }
2031}
2032impl core::fmt::Debug for FLAD {
2033 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2034 f.debug_struct("FLAD").finish()
2035 }
2036}
2037#[doc = "Data Flash"]
2038pub mod flad;
2039#[doc = "Flash/CPU Interface"]
2040pub struct FACI {
2041 _marker: PhantomData<*const ()>,
2042}
2043unsafe impl Send for FACI {}
2044impl FACI {
2045 #[doc = r"Pointer to the register block"]
2046 pub const PTR: *const faci::RegisterBlock = 0x407f_e000 as *const _;
2047 #[doc = r"Return the pointer to the register block"]
2048 #[inline(always)]
2049 pub const fn ptr() -> *const faci::RegisterBlock {
2050 Self::PTR
2051 }
2052}
2053impl Deref for FACI {
2054 type Target = faci::RegisterBlock;
2055 #[inline(always)]
2056 fn deref(&self) -> &Self::Target {
2057 unsafe { &*Self::PTR }
2058 }
2059}
2060impl core::fmt::Debug for FACI {
2061 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2062 f.debug_struct("FACI").finish()
2063 }
2064}
2065#[doc = "Flash/CPU Interface"]
2066pub mod faci;
2067#[doc = "Quad Serial Peripheral Interface"]
2068pub struct QSPI {
2069 _marker: PhantomData<*const ()>,
2070}
2071unsafe impl Send for QSPI {}
2072impl QSPI {
2073 #[doc = r"Pointer to the register block"]
2074 pub const PTR: *const qspi::RegisterBlock = 0x6400_0000 as *const _;
2075 #[doc = r"Return the pointer to the register block"]
2076 #[inline(always)]
2077 pub const fn ptr() -> *const qspi::RegisterBlock {
2078 Self::PTR
2079 }
2080}
2081impl Deref for QSPI {
2082 type Target = qspi::RegisterBlock;
2083 #[inline(always)]
2084 fn deref(&self) -> &Self::Target {
2085 unsafe { &*Self::PTR }
2086 }
2087}
2088impl core::fmt::Debug for QSPI {
2089 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
2090 f.debug_struct("QSPI").finish()
2091 }
2092}
2093#[doc = "Quad Serial Peripheral Interface"]
2094pub mod qspi;
2095#[no_mangle]
2096static mut DEVICE_PERIPHERALS: bool = false;
2097#[doc = r" All the peripherals."]
2098#[allow(non_snake_case)]
2099pub struct Peripherals {
2100 #[doc = "RMPU"]
2101 pub RMPU: RMPU,
2102 #[doc = "TZF"]
2103 pub TZF: TZF,
2104 #[doc = "SRAM"]
2105 pub SRAM: SRAM,
2106 #[doc = "BUS"]
2107 pub BUS: BUS,
2108 #[doc = "DMAC0"]
2109 pub DMAC0: DMAC0,
2110 #[doc = "DMAC1"]
2111 pub DMAC1: DMAC1,
2112 #[doc = "DMAC2"]
2113 pub DMAC2: DMAC2,
2114 #[doc = "DMAC3"]
2115 pub DMAC3: DMAC3,
2116 #[doc = "DMAC4"]
2117 pub DMAC4: DMAC4,
2118 #[doc = "DMAC5"]
2119 pub DMAC5: DMAC5,
2120 #[doc = "DMAC6"]
2121 pub DMAC6: DMAC6,
2122 #[doc = "DMAC7"]
2123 pub DMAC7: DMAC7,
2124 #[doc = "DMA"]
2125 pub DMA: DMA,
2126 #[doc = "DTC"]
2127 pub DTC: DTC,
2128 #[doc = "ICU"]
2129 pub ICU: ICU,
2130 #[doc = "CPSCU"]
2131 pub CPSCU: CPSCU,
2132 #[doc = "DBG"]
2133 pub DBG: DBG,
2134 #[doc = "FCACHE"]
2135 pub FCACHE: FCACHE,
2136 #[doc = "SYSC"]
2137 pub SYSC: SYSC,
2138 #[doc = "PORT0"]
2139 pub PORT0: PORT0,
2140 #[doc = "PORT1"]
2141 pub PORT1: PORT1,
2142 #[doc = "PORT2"]
2143 pub PORT2: PORT2,
2144 #[doc = "PORT3"]
2145 pub PORT3: PORT3,
2146 #[doc = "PORT4"]
2147 pub PORT4: PORT4,
2148 #[doc = "PORT5"]
2149 pub PORT5: PORT5,
2150 #[doc = "PFS"]
2151 pub PFS: PFS,
2152 #[doc = "ELC"]
2153 pub ELC: ELC,
2154 #[doc = "RTC"]
2155 pub RTC: RTC,
2156 #[doc = "IWDT"]
2157 pub IWDT: IWDT,
2158 #[doc = "WDT"]
2159 pub WDT: WDT,
2160 #[doc = "CAC"]
2161 pub CAC: CAC,
2162 #[doc = "MSTP"]
2163 pub MSTP: MSTP,
2164 #[doc = "POEG"]
2165 pub POEG: POEG,
2166 #[doc = "USBFS"]
2167 pub USBFS: USBFS,
2168 #[doc = "IIC0"]
2169 pub IIC0: IIC0,
2170 #[doc = "IIC0WU"]
2171 pub IIC0WU: IIC0WU,
2172 #[doc = "CAN0"]
2173 pub CAN0: CAN0,
2174 #[doc = "PSCU"]
2175 pub PSCU: PSCU,
2176 #[doc = "AGT0"]
2177 pub AGT0: AGT0,
2178 #[doc = "AGT1"]
2179 pub AGT1: AGT1,
2180 #[doc = "AGT2"]
2181 pub AGT2: AGT2,
2182 #[doc = "AGT3"]
2183 pub AGT3: AGT3,
2184 #[doc = "AGT5"]
2185 pub AGT5: AGT5,
2186 #[doc = "CRC"]
2187 pub CRC: CRC,
2188 #[doc = "DOC"]
2189 pub DOC: DOC,
2190 #[doc = "SCI0"]
2191 pub SCI0: SCI0,
2192 #[doc = "SCI3"]
2193 pub SCI3: SCI3,
2194 #[doc = "SCI4"]
2195 pub SCI4: SCI4,
2196 #[doc = "SCI9"]
2197 pub SCI9: SCI9,
2198 #[doc = "SPI0"]
2199 pub SPI0: SPI0,
2200 #[doc = "GPT321"]
2201 pub GPT321: GPT321,
2202 #[doc = "GPT322"]
2203 pub GPT322: GPT322,
2204 #[doc = "GPT164"]
2205 pub GPT164: GPT164,
2206 #[doc = "GPT165"]
2207 pub GPT165: GPT165,
2208 #[doc = "ADC120"]
2209 pub ADC120: ADC120,
2210 #[doc = "DAC12"]
2211 pub DAC12: DAC12,
2212 #[doc = "FLAD"]
2213 pub FLAD: FLAD,
2214 #[doc = "FACI"]
2215 pub FACI: FACI,
2216 #[doc = "QSPI"]
2217 pub QSPI: QSPI,
2218}
2219impl Peripherals {
2220 #[doc = r" Returns all the peripherals *once*."]
2221 #[cfg(feature = "critical-section")]
2222 #[inline]
2223 pub fn take() -> Option<Self> {
2224 critical_section::with(|_| {
2225 if unsafe { DEVICE_PERIPHERALS } {
2226 return None;
2227 }
2228 Some(unsafe { Peripherals::steal() })
2229 })
2230 }
2231 #[doc = r" Unchecked version of `Peripherals::take`."]
2232 #[doc = r""]
2233 #[doc = r" # Safety"]
2234 #[doc = r""]
2235 #[doc = r" Each of the returned peripherals must be used at most once."]
2236 #[inline]
2237 pub unsafe fn steal() -> Self {
2238 DEVICE_PERIPHERALS = true;
2239 Peripherals {
2240 RMPU: RMPU {
2241 _marker: PhantomData,
2242 },
2243 TZF: TZF {
2244 _marker: PhantomData,
2245 },
2246 SRAM: SRAM {
2247 _marker: PhantomData,
2248 },
2249 BUS: BUS {
2250 _marker: PhantomData,
2251 },
2252 DMAC0: DMAC0 {
2253 _marker: PhantomData,
2254 },
2255 DMAC1: DMAC1 {
2256 _marker: PhantomData,
2257 },
2258 DMAC2: DMAC2 {
2259 _marker: PhantomData,
2260 },
2261 DMAC3: DMAC3 {
2262 _marker: PhantomData,
2263 },
2264 DMAC4: DMAC4 {
2265 _marker: PhantomData,
2266 },
2267 DMAC5: DMAC5 {
2268 _marker: PhantomData,
2269 },
2270 DMAC6: DMAC6 {
2271 _marker: PhantomData,
2272 },
2273 DMAC7: DMAC7 {
2274 _marker: PhantomData,
2275 },
2276 DMA: DMA {
2277 _marker: PhantomData,
2278 },
2279 DTC: DTC {
2280 _marker: PhantomData,
2281 },
2282 ICU: ICU {
2283 _marker: PhantomData,
2284 },
2285 CPSCU: CPSCU {
2286 _marker: PhantomData,
2287 },
2288 DBG: DBG {
2289 _marker: PhantomData,
2290 },
2291 FCACHE: FCACHE {
2292 _marker: PhantomData,
2293 },
2294 SYSC: SYSC {
2295 _marker: PhantomData,
2296 },
2297 PORT0: PORT0 {
2298 _marker: PhantomData,
2299 },
2300 PORT1: PORT1 {
2301 _marker: PhantomData,
2302 },
2303 PORT2: PORT2 {
2304 _marker: PhantomData,
2305 },
2306 PORT3: PORT3 {
2307 _marker: PhantomData,
2308 },
2309 PORT4: PORT4 {
2310 _marker: PhantomData,
2311 },
2312 PORT5: PORT5 {
2313 _marker: PhantomData,
2314 },
2315 PFS: PFS {
2316 _marker: PhantomData,
2317 },
2318 ELC: ELC {
2319 _marker: PhantomData,
2320 },
2321 RTC: RTC {
2322 _marker: PhantomData,
2323 },
2324 IWDT: IWDT {
2325 _marker: PhantomData,
2326 },
2327 WDT: WDT {
2328 _marker: PhantomData,
2329 },
2330 CAC: CAC {
2331 _marker: PhantomData,
2332 },
2333 MSTP: MSTP {
2334 _marker: PhantomData,
2335 },
2336 POEG: POEG {
2337 _marker: PhantomData,
2338 },
2339 USBFS: USBFS {
2340 _marker: PhantomData,
2341 },
2342 IIC0: IIC0 {
2343 _marker: PhantomData,
2344 },
2345 IIC0WU: IIC0WU {
2346 _marker: PhantomData,
2347 },
2348 CAN0: CAN0 {
2349 _marker: PhantomData,
2350 },
2351 PSCU: PSCU {
2352 _marker: PhantomData,
2353 },
2354 AGT0: AGT0 {
2355 _marker: PhantomData,
2356 },
2357 AGT1: AGT1 {
2358 _marker: PhantomData,
2359 },
2360 AGT2: AGT2 {
2361 _marker: PhantomData,
2362 },
2363 AGT3: AGT3 {
2364 _marker: PhantomData,
2365 },
2366 AGT5: AGT5 {
2367 _marker: PhantomData,
2368 },
2369 CRC: CRC {
2370 _marker: PhantomData,
2371 },
2372 DOC: DOC {
2373 _marker: PhantomData,
2374 },
2375 SCI0: SCI0 {
2376 _marker: PhantomData,
2377 },
2378 SCI3: SCI3 {
2379 _marker: PhantomData,
2380 },
2381 SCI4: SCI4 {
2382 _marker: PhantomData,
2383 },
2384 SCI9: SCI9 {
2385 _marker: PhantomData,
2386 },
2387 SPI0: SPI0 {
2388 _marker: PhantomData,
2389 },
2390 GPT321: GPT321 {
2391 _marker: PhantomData,
2392 },
2393 GPT322: GPT322 {
2394 _marker: PhantomData,
2395 },
2396 GPT164: GPT164 {
2397 _marker: PhantomData,
2398 },
2399 GPT165: GPT165 {
2400 _marker: PhantomData,
2401 },
2402 ADC120: ADC120 {
2403 _marker: PhantomData,
2404 },
2405 DAC12: DAC12 {
2406 _marker: PhantomData,
2407 },
2408 FLAD: FLAD {
2409 _marker: PhantomData,
2410 },
2411 FACI: FACI {
2412 _marker: PhantomData,
2413 },
2414 QSPI: QSPI {
2415 _marker: PhantomData,
2416 },
2417 }
2418 }
2419}