1#[doc = "Register `P10%sPFS` reader"]
2pub struct R(crate::R<P10PFS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<P10PFS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<P10PFS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<P10PFS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `P10%sPFS` writer"]
17pub struct W(crate::W<P10PFS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<P10PFS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<P10PFS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<P10PFS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PODR` reader - Port Output Data"]
38pub type PODR_R = crate::BitReader<PODR_A>;
39#[doc = "Port Output Data\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum PODR_A {
42 #[doc = "0: Output low"]
43 _0 = 0,
44 #[doc = "1: Output high"]
45 _1 = 1,
46}
47impl From<PODR_A> for bool {
48 #[inline(always)]
49 fn from(variant: PODR_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl PODR_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> PODR_A {
57 match self.bits {
58 false => PODR_A::_0,
59 true => PODR_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == PODR_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == PODR_A::_1
71 }
72}
73#[doc = "Field `PODR` writer - Port Output Data"]
74pub type PODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, PODR_A, O>;
75impl<'a, const O: u8> PODR_W<'a, O> {
76 #[doc = "Output low"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(PODR_A::_0)
80 }
81 #[doc = "Output high"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(PODR_A::_1)
85 }
86}
87#[doc = "Field `PIDR` reader - Port State"]
88pub type PIDR_R = crate::BitReader<PIDR_A>;
89#[doc = "Port State\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum PIDR_A {
92 #[doc = "0: Low level"]
93 _0 = 0,
94 #[doc = "1: High level"]
95 _1 = 1,
96}
97impl From<PIDR_A> for bool {
98 #[inline(always)]
99 fn from(variant: PIDR_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl PIDR_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> PIDR_A {
107 match self.bits {
108 false => PIDR_A::_0,
109 true => PIDR_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == PIDR_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == PIDR_A::_1
121 }
122}
123#[doc = "Field `PDR` reader - Port Direction"]
124pub type PDR_R = crate::BitReader<PDR_A>;
125#[doc = "Port Direction\n\nValue on reset: 0"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum PDR_A {
128 #[doc = "0: Input (functions as an input pin)"]
129 _0 = 0,
130 #[doc = "1: Output (functions as an output pin)"]
131 _1 = 1,
132}
133impl From<PDR_A> for bool {
134 #[inline(always)]
135 fn from(variant: PDR_A) -> Self {
136 variant as u8 != 0
137 }
138}
139impl PDR_R {
140 #[doc = "Get enumerated values variant"]
141 #[inline(always)]
142 pub fn variant(&self) -> PDR_A {
143 match self.bits {
144 false => PDR_A::_0,
145 true => PDR_A::_1,
146 }
147 }
148 #[doc = "Checks if the value of the field is `_0`"]
149 #[inline(always)]
150 pub fn is_0(&self) -> bool {
151 *self == PDR_A::_0
152 }
153 #[doc = "Checks if the value of the field is `_1`"]
154 #[inline(always)]
155 pub fn is_1(&self) -> bool {
156 *self == PDR_A::_1
157 }
158}
159#[doc = "Field `PDR` writer - Port Direction"]
160pub type PDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, PDR_A, O>;
161impl<'a, const O: u8> PDR_W<'a, O> {
162 #[doc = "Input (functions as an input pin)"]
163 #[inline(always)]
164 pub fn _0(self) -> &'a mut W {
165 self.variant(PDR_A::_0)
166 }
167 #[doc = "Output (functions as an output pin)"]
168 #[inline(always)]
169 pub fn _1(self) -> &'a mut W {
170 self.variant(PDR_A::_1)
171 }
172}
173#[doc = "Field `PCR` reader - Pull-up Control"]
174pub type PCR_R = crate::BitReader<PCR_A>;
175#[doc = "Pull-up Control\n\nValue on reset: 0"]
176#[derive(Clone, Copy, Debug, PartialEq, Eq)]
177pub enum PCR_A {
178 #[doc = "0: Disable input pull-up"]
179 _0 = 0,
180 #[doc = "1: Enable input pull-up"]
181 _1 = 1,
182}
183impl From<PCR_A> for bool {
184 #[inline(always)]
185 fn from(variant: PCR_A) -> Self {
186 variant as u8 != 0
187 }
188}
189impl PCR_R {
190 #[doc = "Get enumerated values variant"]
191 #[inline(always)]
192 pub fn variant(&self) -> PCR_A {
193 match self.bits {
194 false => PCR_A::_0,
195 true => PCR_A::_1,
196 }
197 }
198 #[doc = "Checks if the value of the field is `_0`"]
199 #[inline(always)]
200 pub fn is_0(&self) -> bool {
201 *self == PCR_A::_0
202 }
203 #[doc = "Checks if the value of the field is `_1`"]
204 #[inline(always)]
205 pub fn is_1(&self) -> bool {
206 *self == PCR_A::_1
207 }
208}
209#[doc = "Field `PCR` writer - Pull-up Control"]
210pub type PCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, PCR_A, O>;
211impl<'a, const O: u8> PCR_W<'a, O> {
212 #[doc = "Disable input pull-up"]
213 #[inline(always)]
214 pub fn _0(self) -> &'a mut W {
215 self.variant(PCR_A::_0)
216 }
217 #[doc = "Enable input pull-up"]
218 #[inline(always)]
219 pub fn _1(self) -> &'a mut W {
220 self.variant(PCR_A::_1)
221 }
222}
223#[doc = "Field `NCODR` reader - N-Channel Open-Drain Control"]
224pub type NCODR_R = crate::BitReader<NCODR_A>;
225#[doc = "N-Channel Open-Drain Control\n\nValue on reset: 0"]
226#[derive(Clone, Copy, Debug, PartialEq, Eq)]
227pub enum NCODR_A {
228 #[doc = "0: Output CMOS"]
229 _0 = 0,
230 #[doc = "1: Output NMOS open-drain"]
231 _1 = 1,
232}
233impl From<NCODR_A> for bool {
234 #[inline(always)]
235 fn from(variant: NCODR_A) -> Self {
236 variant as u8 != 0
237 }
238}
239impl NCODR_R {
240 #[doc = "Get enumerated values variant"]
241 #[inline(always)]
242 pub fn variant(&self) -> NCODR_A {
243 match self.bits {
244 false => NCODR_A::_0,
245 true => NCODR_A::_1,
246 }
247 }
248 #[doc = "Checks if the value of the field is `_0`"]
249 #[inline(always)]
250 pub fn is_0(&self) -> bool {
251 *self == NCODR_A::_0
252 }
253 #[doc = "Checks if the value of the field is `_1`"]
254 #[inline(always)]
255 pub fn is_1(&self) -> bool {
256 *self == NCODR_A::_1
257 }
258}
259#[doc = "Field `NCODR` writer - N-Channel Open-Drain Control"]
260pub type NCODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, NCODR_A, O>;
261impl<'a, const O: u8> NCODR_W<'a, O> {
262 #[doc = "Output CMOS"]
263 #[inline(always)]
264 pub fn _0(self) -> &'a mut W {
265 self.variant(NCODR_A::_0)
266 }
267 #[doc = "Output NMOS open-drain"]
268 #[inline(always)]
269 pub fn _1(self) -> &'a mut W {
270 self.variant(NCODR_A::_1)
271 }
272}
273#[doc = "Field `EOFR` reader - Event on Falling/Event on Rising"]
274pub type EOFR_R = crate::FieldReader<u8, EOFR_A>;
275#[doc = "Event on Falling/Event on Rising\n\nValue on reset: 0"]
276#[derive(Clone, Copy, Debug, PartialEq, Eq)]
277#[repr(u8)]
278pub enum EOFR_A {
279 #[doc = "0: Don't care"]
280 _00 = 0,
281 #[doc = "1: Detect rising edge"]
282 _01 = 1,
283 #[doc = "2: Detect falling edge"]
284 _10 = 2,
285 #[doc = "3: Detect both edges"]
286 _11 = 3,
287}
288impl From<EOFR_A> for u8 {
289 #[inline(always)]
290 fn from(variant: EOFR_A) -> Self {
291 variant as _
292 }
293}
294impl EOFR_R {
295 #[doc = "Get enumerated values variant"]
296 #[inline(always)]
297 pub fn variant(&self) -> EOFR_A {
298 match self.bits {
299 0 => EOFR_A::_00,
300 1 => EOFR_A::_01,
301 2 => EOFR_A::_10,
302 3 => EOFR_A::_11,
303 _ => unreachable!(),
304 }
305 }
306 #[doc = "Checks if the value of the field is `_00`"]
307 #[inline(always)]
308 pub fn is_00(&self) -> bool {
309 *self == EOFR_A::_00
310 }
311 #[doc = "Checks if the value of the field is `_01`"]
312 #[inline(always)]
313 pub fn is_01(&self) -> bool {
314 *self == EOFR_A::_01
315 }
316 #[doc = "Checks if the value of the field is `_10`"]
317 #[inline(always)]
318 pub fn is_10(&self) -> bool {
319 *self == EOFR_A::_10
320 }
321 #[doc = "Checks if the value of the field is `_11`"]
322 #[inline(always)]
323 pub fn is_11(&self) -> bool {
324 *self == EOFR_A::_11
325 }
326}
327#[doc = "Field `EOFR` writer - Event on Falling/Event on Rising"]
328pub type EOFR_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, P10PFS_SPEC, u8, EOFR_A, 2, O>;
329impl<'a, const O: u8> EOFR_W<'a, O> {
330 #[doc = "Don't care"]
331 #[inline(always)]
332 pub fn _00(self) -> &'a mut W {
333 self.variant(EOFR_A::_00)
334 }
335 #[doc = "Detect rising edge"]
336 #[inline(always)]
337 pub fn _01(self) -> &'a mut W {
338 self.variant(EOFR_A::_01)
339 }
340 #[doc = "Detect falling edge"]
341 #[inline(always)]
342 pub fn _10(self) -> &'a mut W {
343 self.variant(EOFR_A::_10)
344 }
345 #[doc = "Detect both edges"]
346 #[inline(always)]
347 pub fn _11(self) -> &'a mut W {
348 self.variant(EOFR_A::_11)
349 }
350}
351#[doc = "Field `ISEL` reader - IRQ Input Enable"]
352pub type ISEL_R = crate::BitReader<ISEL_A>;
353#[doc = "IRQ Input Enable\n\nValue on reset: 0"]
354#[derive(Clone, Copy, Debug, PartialEq, Eq)]
355pub enum ISEL_A {
356 #[doc = "0: Do not use as IRQn input pin"]
357 _0 = 0,
358 #[doc = "1: Use as IRQn input pin"]
359 _1 = 1,
360}
361impl From<ISEL_A> for bool {
362 #[inline(always)]
363 fn from(variant: ISEL_A) -> Self {
364 variant as u8 != 0
365 }
366}
367impl ISEL_R {
368 #[doc = "Get enumerated values variant"]
369 #[inline(always)]
370 pub fn variant(&self) -> ISEL_A {
371 match self.bits {
372 false => ISEL_A::_0,
373 true => ISEL_A::_1,
374 }
375 }
376 #[doc = "Checks if the value of the field is `_0`"]
377 #[inline(always)]
378 pub fn is_0(&self) -> bool {
379 *self == ISEL_A::_0
380 }
381 #[doc = "Checks if the value of the field is `_1`"]
382 #[inline(always)]
383 pub fn is_1(&self) -> bool {
384 *self == ISEL_A::_1
385 }
386}
387#[doc = "Field `ISEL` writer - IRQ Input Enable"]
388pub type ISEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, ISEL_A, O>;
389impl<'a, const O: u8> ISEL_W<'a, O> {
390 #[doc = "Do not use as IRQn input pin"]
391 #[inline(always)]
392 pub fn _0(self) -> &'a mut W {
393 self.variant(ISEL_A::_0)
394 }
395 #[doc = "Use as IRQn input pin"]
396 #[inline(always)]
397 pub fn _1(self) -> &'a mut W {
398 self.variant(ISEL_A::_1)
399 }
400}
401#[doc = "Field `ASEL` reader - Analog Input Enable"]
402pub type ASEL_R = crate::BitReader<ASEL_A>;
403#[doc = "Analog Input Enable\n\nValue on reset: 0"]
404#[derive(Clone, Copy, Debug, PartialEq, Eq)]
405pub enum ASEL_A {
406 #[doc = "0: Do not use as analog pin"]
407 _0 = 0,
408 #[doc = "1: Use as analog pin"]
409 _1 = 1,
410}
411impl From<ASEL_A> for bool {
412 #[inline(always)]
413 fn from(variant: ASEL_A) -> Self {
414 variant as u8 != 0
415 }
416}
417impl ASEL_R {
418 #[doc = "Get enumerated values variant"]
419 #[inline(always)]
420 pub fn variant(&self) -> ASEL_A {
421 match self.bits {
422 false => ASEL_A::_0,
423 true => ASEL_A::_1,
424 }
425 }
426 #[doc = "Checks if the value of the field is `_0`"]
427 #[inline(always)]
428 pub fn is_0(&self) -> bool {
429 *self == ASEL_A::_0
430 }
431 #[doc = "Checks if the value of the field is `_1`"]
432 #[inline(always)]
433 pub fn is_1(&self) -> bool {
434 *self == ASEL_A::_1
435 }
436}
437#[doc = "Field `ASEL` writer - Analog Input Enable"]
438pub type ASEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, ASEL_A, O>;
439impl<'a, const O: u8> ASEL_W<'a, O> {
440 #[doc = "Do not use as analog pin"]
441 #[inline(always)]
442 pub fn _0(self) -> &'a mut W {
443 self.variant(ASEL_A::_0)
444 }
445 #[doc = "Use as analog pin"]
446 #[inline(always)]
447 pub fn _1(self) -> &'a mut W {
448 self.variant(ASEL_A::_1)
449 }
450}
451#[doc = "Field `PMR` reader - Port Mode Control"]
452pub type PMR_R = crate::BitReader<PMR_A>;
453#[doc = "Port Mode Control\n\nValue on reset: 0"]
454#[derive(Clone, Copy, Debug, PartialEq, Eq)]
455pub enum PMR_A {
456 #[doc = "0: Use as general I/O pin"]
457 _0 = 0,
458 #[doc = "1: Use as I/O port for peripheral functions"]
459 _1 = 1,
460}
461impl From<PMR_A> for bool {
462 #[inline(always)]
463 fn from(variant: PMR_A) -> Self {
464 variant as u8 != 0
465 }
466}
467impl PMR_R {
468 #[doc = "Get enumerated values variant"]
469 #[inline(always)]
470 pub fn variant(&self) -> PMR_A {
471 match self.bits {
472 false => PMR_A::_0,
473 true => PMR_A::_1,
474 }
475 }
476 #[doc = "Checks if the value of the field is `_0`"]
477 #[inline(always)]
478 pub fn is_0(&self) -> bool {
479 *self == PMR_A::_0
480 }
481 #[doc = "Checks if the value of the field is `_1`"]
482 #[inline(always)]
483 pub fn is_1(&self) -> bool {
484 *self == PMR_A::_1
485 }
486}
487#[doc = "Field `PMR` writer - Port Mode Control"]
488pub type PMR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P10PFS_SPEC, PMR_A, O>;
489impl<'a, const O: u8> PMR_W<'a, O> {
490 #[doc = "Use as general I/O pin"]
491 #[inline(always)]
492 pub fn _0(self) -> &'a mut W {
493 self.variant(PMR_A::_0)
494 }
495 #[doc = "Use as I/O port for peripheral functions"]
496 #[inline(always)]
497 pub fn _1(self) -> &'a mut W {
498 self.variant(PMR_A::_1)
499 }
500}
501#[doc = "Field `PSEL` reader - Peripheral Select"]
502pub type PSEL_R = crate::FieldReader<u8, u8>;
503#[doc = "Field `PSEL` writer - Peripheral Select"]
504pub type PSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, P10PFS_SPEC, u8, u8, 5, O>;
505impl R {
506 #[doc = "Bit 0 - Port Output Data"]
507 #[inline(always)]
508 pub fn podr(&self) -> PODR_R {
509 PODR_R::new((self.bits & 1) != 0)
510 }
511 #[doc = "Bit 1 - Port State"]
512 #[inline(always)]
513 pub fn pidr(&self) -> PIDR_R {
514 PIDR_R::new(((self.bits >> 1) & 1) != 0)
515 }
516 #[doc = "Bit 2 - Port Direction"]
517 #[inline(always)]
518 pub fn pdr(&self) -> PDR_R {
519 PDR_R::new(((self.bits >> 2) & 1) != 0)
520 }
521 #[doc = "Bit 4 - Pull-up Control"]
522 #[inline(always)]
523 pub fn pcr(&self) -> PCR_R {
524 PCR_R::new(((self.bits >> 4) & 1) != 0)
525 }
526 #[doc = "Bit 6 - N-Channel Open-Drain Control"]
527 #[inline(always)]
528 pub fn ncodr(&self) -> NCODR_R {
529 NCODR_R::new(((self.bits >> 6) & 1) != 0)
530 }
531 #[doc = "Bits 12:13 - Event on Falling/Event on Rising"]
532 #[inline(always)]
533 pub fn eofr(&self) -> EOFR_R {
534 EOFR_R::new(((self.bits >> 12) & 3) as u8)
535 }
536 #[doc = "Bit 14 - IRQ Input Enable"]
537 #[inline(always)]
538 pub fn isel(&self) -> ISEL_R {
539 ISEL_R::new(((self.bits >> 14) & 1) != 0)
540 }
541 #[doc = "Bit 15 - Analog Input Enable"]
542 #[inline(always)]
543 pub fn asel(&self) -> ASEL_R {
544 ASEL_R::new(((self.bits >> 15) & 1) != 0)
545 }
546 #[doc = "Bit 16 - Port Mode Control"]
547 #[inline(always)]
548 pub fn pmr(&self) -> PMR_R {
549 PMR_R::new(((self.bits >> 16) & 1) != 0)
550 }
551 #[doc = "Bits 24:28 - Peripheral Select"]
552 #[inline(always)]
553 pub fn psel(&self) -> PSEL_R {
554 PSEL_R::new(((self.bits >> 24) & 0x1f) as u8)
555 }
556}
557impl W {
558 #[doc = "Bit 0 - Port Output Data"]
559 #[inline(always)]
560 #[must_use]
561 pub fn podr(&mut self) -> PODR_W<0> {
562 PODR_W::new(self)
563 }
564 #[doc = "Bit 2 - Port Direction"]
565 #[inline(always)]
566 #[must_use]
567 pub fn pdr(&mut self) -> PDR_W<2> {
568 PDR_W::new(self)
569 }
570 #[doc = "Bit 4 - Pull-up Control"]
571 #[inline(always)]
572 #[must_use]
573 pub fn pcr(&mut self) -> PCR_W<4> {
574 PCR_W::new(self)
575 }
576 #[doc = "Bit 6 - N-Channel Open-Drain Control"]
577 #[inline(always)]
578 #[must_use]
579 pub fn ncodr(&mut self) -> NCODR_W<6> {
580 NCODR_W::new(self)
581 }
582 #[doc = "Bits 12:13 - Event on Falling/Event on Rising"]
583 #[inline(always)]
584 #[must_use]
585 pub fn eofr(&mut self) -> EOFR_W<12> {
586 EOFR_W::new(self)
587 }
588 #[doc = "Bit 14 - IRQ Input Enable"]
589 #[inline(always)]
590 #[must_use]
591 pub fn isel(&mut self) -> ISEL_W<14> {
592 ISEL_W::new(self)
593 }
594 #[doc = "Bit 15 - Analog Input Enable"]
595 #[inline(always)]
596 #[must_use]
597 pub fn asel(&mut self) -> ASEL_W<15> {
598 ASEL_W::new(self)
599 }
600 #[doc = "Bit 16 - Port Mode Control"]
601 #[inline(always)]
602 #[must_use]
603 pub fn pmr(&mut self) -> PMR_W<16> {
604 PMR_W::new(self)
605 }
606 #[doc = "Bits 24:28 - Peripheral Select"]
607 #[inline(always)]
608 #[must_use]
609 pub fn psel(&mut self) -> PSEL_W<24> {
610 PSEL_W::new(self)
611 }
612 #[doc = "Writes raw bits to the register."]
613 #[inline(always)]
614 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
615 self.0.bits(bits);
616 self
617 }
618}
619#[doc = "Port 10%s Pin Function Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [p10pfs](index.html) module"]
620pub struct P10PFS_SPEC;
621impl crate::RegisterSpec for P10PFS_SPEC {
622 type Ux = u32;
623}
624#[doc = "`read()` method returns [p10pfs::R](R) reader structure"]
625impl crate::Readable for P10PFS_SPEC {
626 type Reader = R;
627}
628#[doc = "`write(|w| ..)` method takes [p10pfs::W](W) writer structure"]
629impl crate::Writable for P10PFS_SPEC {
630 type Writer = W;
631 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
632 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
633}
634#[doc = "`reset()` method sets P10%sPFS to value 0"]
635impl crate::Resettable for P10PFS_SPEC {
636 const RESET_VALUE: Self::Ux = 0;
637}