ra4e1/iic0/
icmr3.rs

1#[doc = "Register `ICMR3` reader"]
2pub struct R(crate::R<ICMR3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ICMR3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ICMR3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ICMR3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ICMR3` writer"]
17pub struct W(crate::W<ICMR3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ICMR3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ICMR3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ICMR3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `NF` reader - Noise Filter Stage Select"]
38pub type NF_R = crate::FieldReader<u8, NF_A>;
39#[doc = "Noise Filter Stage Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum NF_A {
43    #[doc = "0: Filter out noise of up to 1 IIC-phi cycle (single-stage filter)"]
44    _00 = 0,
45    #[doc = "1: Filter out noise of up to 2 IIC-phi cycles (2-stage filter)"]
46    _01 = 1,
47    #[doc = "2: Filter out noise of up to 3 IIC-phi cycles (3-stage filter)"]
48    _10 = 2,
49    #[doc = "3: Filter out noise of up to 4 IIC-phi cycles (4-stage filter)"]
50    _11 = 3,
51}
52impl From<NF_A> for u8 {
53    #[inline(always)]
54    fn from(variant: NF_A) -> Self {
55        variant as _
56    }
57}
58impl NF_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> NF_A {
62        match self.bits {
63            0 => NF_A::_00,
64            1 => NF_A::_01,
65            2 => NF_A::_10,
66            3 => NF_A::_11,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_00`"]
71    #[inline(always)]
72    pub fn is_00(&self) -> bool {
73        *self == NF_A::_00
74    }
75    #[doc = "Checks if the value of the field is `_01`"]
76    #[inline(always)]
77    pub fn is_01(&self) -> bool {
78        *self == NF_A::_01
79    }
80    #[doc = "Checks if the value of the field is `_10`"]
81    #[inline(always)]
82    pub fn is_10(&self) -> bool {
83        *self == NF_A::_10
84    }
85    #[doc = "Checks if the value of the field is `_11`"]
86    #[inline(always)]
87    pub fn is_11(&self) -> bool {
88        *self == NF_A::_11
89    }
90}
91#[doc = "Field `NF` writer - Noise Filter Stage Select"]
92pub type NF_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, ICMR3_SPEC, u8, NF_A, 2, O>;
93impl<'a, const O: u8> NF_W<'a, O> {
94    #[doc = "Filter out noise of up to 1 IIC-phi cycle (single-stage filter)"]
95    #[inline(always)]
96    pub fn _00(self) -> &'a mut W {
97        self.variant(NF_A::_00)
98    }
99    #[doc = "Filter out noise of up to 2 IIC-phi cycles (2-stage filter)"]
100    #[inline(always)]
101    pub fn _01(self) -> &'a mut W {
102        self.variant(NF_A::_01)
103    }
104    #[doc = "Filter out noise of up to 3 IIC-phi cycles (3-stage filter)"]
105    #[inline(always)]
106    pub fn _10(self) -> &'a mut W {
107        self.variant(NF_A::_10)
108    }
109    #[doc = "Filter out noise of up to 4 IIC-phi cycles (4-stage filter)"]
110    #[inline(always)]
111    pub fn _11(self) -> &'a mut W {
112        self.variant(NF_A::_11)
113    }
114}
115#[doc = "Field `ACKBR` reader - Receive Acknowledge"]
116pub type ACKBR_R = crate::BitReader<ACKBR_A>;
117#[doc = "Receive Acknowledge\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum ACKBR_A {
120    #[doc = "0: 0 received as the acknowledge bit (ACK reception)"]
121    _0 = 0,
122    #[doc = "1: 1 received as the acknowledge bit (NACK reception)"]
123    _1 = 1,
124}
125impl From<ACKBR_A> for bool {
126    #[inline(always)]
127    fn from(variant: ACKBR_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl ACKBR_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub fn variant(&self) -> ACKBR_A {
135        match self.bits {
136            false => ACKBR_A::_0,
137            true => ACKBR_A::_1,
138        }
139    }
140    #[doc = "Checks if the value of the field is `_0`"]
141    #[inline(always)]
142    pub fn is_0(&self) -> bool {
143        *self == ACKBR_A::_0
144    }
145    #[doc = "Checks if the value of the field is `_1`"]
146    #[inline(always)]
147    pub fn is_1(&self) -> bool {
148        *self == ACKBR_A::_1
149    }
150}
151#[doc = "Field `ACKBT` reader - Transmit Acknowledge"]
152pub type ACKBT_R = crate::BitReader<ACKBT_A>;
153#[doc = "Transmit Acknowledge\n\nValue on reset: 0"]
154#[derive(Clone, Copy, Debug, PartialEq, Eq)]
155pub enum ACKBT_A {
156    #[doc = "0: Send 0 as the acknowledge bit (ACK transmission)"]
157    _0 = 0,
158    #[doc = "1: Send 1 as the acknowledge bit (NACK transmission)"]
159    _1 = 1,
160}
161impl From<ACKBT_A> for bool {
162    #[inline(always)]
163    fn from(variant: ACKBT_A) -> Self {
164        variant as u8 != 0
165    }
166}
167impl ACKBT_R {
168    #[doc = "Get enumerated values variant"]
169    #[inline(always)]
170    pub fn variant(&self) -> ACKBT_A {
171        match self.bits {
172            false => ACKBT_A::_0,
173            true => ACKBT_A::_1,
174        }
175    }
176    #[doc = "Checks if the value of the field is `_0`"]
177    #[inline(always)]
178    pub fn is_0(&self) -> bool {
179        *self == ACKBT_A::_0
180    }
181    #[doc = "Checks if the value of the field is `_1`"]
182    #[inline(always)]
183    pub fn is_1(&self) -> bool {
184        *self == ACKBT_A::_1
185    }
186}
187#[doc = "Field `ACKBT` writer - Transmit Acknowledge"]
188pub type ACKBT_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICMR3_SPEC, ACKBT_A, O>;
189impl<'a, const O: u8> ACKBT_W<'a, O> {
190    #[doc = "Send 0 as the acknowledge bit (ACK transmission)"]
191    #[inline(always)]
192    pub fn _0(self) -> &'a mut W {
193        self.variant(ACKBT_A::_0)
194    }
195    #[doc = "Send 1 as the acknowledge bit (NACK transmission)"]
196    #[inline(always)]
197    pub fn _1(self) -> &'a mut W {
198        self.variant(ACKBT_A::_1)
199    }
200}
201#[doc = "Field `ACKWP` reader - ACKBT Write Protect"]
202pub type ACKWP_R = crate::BitReader<ACKWP_A>;
203#[doc = "ACKBT Write Protect\n\nValue on reset: 0"]
204#[derive(Clone, Copy, Debug, PartialEq, Eq)]
205pub enum ACKWP_A {
206    #[doc = "0: Write protect ACKBT bit"]
207    _0 = 0,
208    #[doc = "1: Write enable ACKBT bit"]
209    _1 = 1,
210}
211impl From<ACKWP_A> for bool {
212    #[inline(always)]
213    fn from(variant: ACKWP_A) -> Self {
214        variant as u8 != 0
215    }
216}
217impl ACKWP_R {
218    #[doc = "Get enumerated values variant"]
219    #[inline(always)]
220    pub fn variant(&self) -> ACKWP_A {
221        match self.bits {
222            false => ACKWP_A::_0,
223            true => ACKWP_A::_1,
224        }
225    }
226    #[doc = "Checks if the value of the field is `_0`"]
227    #[inline(always)]
228    pub fn is_0(&self) -> bool {
229        *self == ACKWP_A::_0
230    }
231    #[doc = "Checks if the value of the field is `_1`"]
232    #[inline(always)]
233    pub fn is_1(&self) -> bool {
234        *self == ACKWP_A::_1
235    }
236}
237#[doc = "Field `ACKWP` writer - ACKBT Write Protect"]
238pub type ACKWP_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICMR3_SPEC, ACKWP_A, O>;
239impl<'a, const O: u8> ACKWP_W<'a, O> {
240    #[doc = "Write protect ACKBT bit"]
241    #[inline(always)]
242    pub fn _0(self) -> &'a mut W {
243        self.variant(ACKWP_A::_0)
244    }
245    #[doc = "Write enable ACKBT bit"]
246    #[inline(always)]
247    pub fn _1(self) -> &'a mut W {
248        self.variant(ACKWP_A::_1)
249    }
250}
251#[doc = "Field `RDRFS` reader - RDRF Flag Set Timing Select"]
252pub type RDRFS_R = crate::BitReader<RDRFS_A>;
253#[doc = "RDRF Flag Set Timing Select\n\nValue on reset: 0"]
254#[derive(Clone, Copy, Debug, PartialEq, Eq)]
255pub enum RDRFS_A {
256    #[doc = "0: Set the RDRF flag on the rising edge of the 9th SCL clock cycle. The SCLn line is not held low on the falling edge of the 8th clock cycle."]
257    _0 = 0,
258    #[doc = "1: Set the RDRF flag on the rising edge of the 8th SCL clock cycle. The SCLn line is held low on the falling edge of the 8th clock cycle."]
259    _1 = 1,
260}
261impl From<RDRFS_A> for bool {
262    #[inline(always)]
263    fn from(variant: RDRFS_A) -> Self {
264        variant as u8 != 0
265    }
266}
267impl RDRFS_R {
268    #[doc = "Get enumerated values variant"]
269    #[inline(always)]
270    pub fn variant(&self) -> RDRFS_A {
271        match self.bits {
272            false => RDRFS_A::_0,
273            true => RDRFS_A::_1,
274        }
275    }
276    #[doc = "Checks if the value of the field is `_0`"]
277    #[inline(always)]
278    pub fn is_0(&self) -> bool {
279        *self == RDRFS_A::_0
280    }
281    #[doc = "Checks if the value of the field is `_1`"]
282    #[inline(always)]
283    pub fn is_1(&self) -> bool {
284        *self == RDRFS_A::_1
285    }
286}
287#[doc = "Field `RDRFS` writer - RDRF Flag Set Timing Select"]
288pub type RDRFS_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICMR3_SPEC, RDRFS_A, O>;
289impl<'a, const O: u8> RDRFS_W<'a, O> {
290    #[doc = "Set the RDRF flag on the rising edge of the 9th SCL clock cycle. The SCLn line is not held low on the falling edge of the 8th clock cycle."]
291    #[inline(always)]
292    pub fn _0(self) -> &'a mut W {
293        self.variant(RDRFS_A::_0)
294    }
295    #[doc = "Set the RDRF flag on the rising edge of the 8th SCL clock cycle. The SCLn line is held low on the falling edge of the 8th clock cycle."]
296    #[inline(always)]
297    pub fn _1(self) -> &'a mut W {
298        self.variant(RDRFS_A::_1)
299    }
300}
301#[doc = "Field `WAIT` reader - Low-hold is released by reading ICDRR."]
302pub type WAIT_R = crate::BitReader<WAIT_A>;
303#[doc = "Low-hold is released by reading ICDRR.\n\nValue on reset: 0"]
304#[derive(Clone, Copy, Debug, PartialEq, Eq)]
305pub enum WAIT_A {
306    #[doc = "0: No wait (The SCLn line is not held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
307    _0 = 0,
308    #[doc = "1: Wait (The SCLn line is held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
309    _1 = 1,
310}
311impl From<WAIT_A> for bool {
312    #[inline(always)]
313    fn from(variant: WAIT_A) -> Self {
314        variant as u8 != 0
315    }
316}
317impl WAIT_R {
318    #[doc = "Get enumerated values variant"]
319    #[inline(always)]
320    pub fn variant(&self) -> WAIT_A {
321        match self.bits {
322            false => WAIT_A::_0,
323            true => WAIT_A::_1,
324        }
325    }
326    #[doc = "Checks if the value of the field is `_0`"]
327    #[inline(always)]
328    pub fn is_0(&self) -> bool {
329        *self == WAIT_A::_0
330    }
331    #[doc = "Checks if the value of the field is `_1`"]
332    #[inline(always)]
333    pub fn is_1(&self) -> bool {
334        *self == WAIT_A::_1
335    }
336}
337#[doc = "Field `WAIT` writer - Low-hold is released by reading ICDRR."]
338pub type WAIT_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICMR3_SPEC, WAIT_A, O>;
339impl<'a, const O: u8> WAIT_W<'a, O> {
340    #[doc = "No wait (The SCLn line is not held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
341    #[inline(always)]
342    pub fn _0(self) -> &'a mut W {
343        self.variant(WAIT_A::_0)
344    }
345    #[doc = "Wait (The SCLn line is held low during the period between the 9th clock cycle and the 1st clock cycle.)"]
346    #[inline(always)]
347    pub fn _1(self) -> &'a mut W {
348        self.variant(WAIT_A::_1)
349    }
350}
351#[doc = "Field `SMBS` reader - SMBus/I2C Bus Select"]
352pub type SMBS_R = crate::BitReader<SMBS_A>;
353#[doc = "SMBus/I2C Bus Select\n\nValue on reset: 0"]
354#[derive(Clone, Copy, Debug, PartialEq, Eq)]
355pub enum SMBS_A {
356    #[doc = "0: Select I2C Bus"]
357    _0 = 0,
358    #[doc = "1: Select SMBus"]
359    _1 = 1,
360}
361impl From<SMBS_A> for bool {
362    #[inline(always)]
363    fn from(variant: SMBS_A) -> Self {
364        variant as u8 != 0
365    }
366}
367impl SMBS_R {
368    #[doc = "Get enumerated values variant"]
369    #[inline(always)]
370    pub fn variant(&self) -> SMBS_A {
371        match self.bits {
372            false => SMBS_A::_0,
373            true => SMBS_A::_1,
374        }
375    }
376    #[doc = "Checks if the value of the field is `_0`"]
377    #[inline(always)]
378    pub fn is_0(&self) -> bool {
379        *self == SMBS_A::_0
380    }
381    #[doc = "Checks if the value of the field is `_1`"]
382    #[inline(always)]
383    pub fn is_1(&self) -> bool {
384        *self == SMBS_A::_1
385    }
386}
387#[doc = "Field `SMBS` writer - SMBus/I2C Bus Select"]
388pub type SMBS_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICMR3_SPEC, SMBS_A, O>;
389impl<'a, const O: u8> SMBS_W<'a, O> {
390    #[doc = "Select I2C Bus"]
391    #[inline(always)]
392    pub fn _0(self) -> &'a mut W {
393        self.variant(SMBS_A::_0)
394    }
395    #[doc = "Select SMBus"]
396    #[inline(always)]
397    pub fn _1(self) -> &'a mut W {
398        self.variant(SMBS_A::_1)
399    }
400}
401impl R {
402    #[doc = "Bits 0:1 - Noise Filter Stage Select"]
403    #[inline(always)]
404    pub fn nf(&self) -> NF_R {
405        NF_R::new(self.bits & 3)
406    }
407    #[doc = "Bit 2 - Receive Acknowledge"]
408    #[inline(always)]
409    pub fn ackbr(&self) -> ACKBR_R {
410        ACKBR_R::new(((self.bits >> 2) & 1) != 0)
411    }
412    #[doc = "Bit 3 - Transmit Acknowledge"]
413    #[inline(always)]
414    pub fn ackbt(&self) -> ACKBT_R {
415        ACKBT_R::new(((self.bits >> 3) & 1) != 0)
416    }
417    #[doc = "Bit 4 - ACKBT Write Protect"]
418    #[inline(always)]
419    pub fn ackwp(&self) -> ACKWP_R {
420        ACKWP_R::new(((self.bits >> 4) & 1) != 0)
421    }
422    #[doc = "Bit 5 - RDRF Flag Set Timing Select"]
423    #[inline(always)]
424    pub fn rdrfs(&self) -> RDRFS_R {
425        RDRFS_R::new(((self.bits >> 5) & 1) != 0)
426    }
427    #[doc = "Bit 6 - Low-hold is released by reading ICDRR."]
428    #[inline(always)]
429    pub fn wait(&self) -> WAIT_R {
430        WAIT_R::new(((self.bits >> 6) & 1) != 0)
431    }
432    #[doc = "Bit 7 - SMBus/I2C Bus Select"]
433    #[inline(always)]
434    pub fn smbs(&self) -> SMBS_R {
435        SMBS_R::new(((self.bits >> 7) & 1) != 0)
436    }
437}
438impl W {
439    #[doc = "Bits 0:1 - Noise Filter Stage Select"]
440    #[inline(always)]
441    #[must_use]
442    pub fn nf(&mut self) -> NF_W<0> {
443        NF_W::new(self)
444    }
445    #[doc = "Bit 3 - Transmit Acknowledge"]
446    #[inline(always)]
447    #[must_use]
448    pub fn ackbt(&mut self) -> ACKBT_W<3> {
449        ACKBT_W::new(self)
450    }
451    #[doc = "Bit 4 - ACKBT Write Protect"]
452    #[inline(always)]
453    #[must_use]
454    pub fn ackwp(&mut self) -> ACKWP_W<4> {
455        ACKWP_W::new(self)
456    }
457    #[doc = "Bit 5 - RDRF Flag Set Timing Select"]
458    #[inline(always)]
459    #[must_use]
460    pub fn rdrfs(&mut self) -> RDRFS_W<5> {
461        RDRFS_W::new(self)
462    }
463    #[doc = "Bit 6 - Low-hold is released by reading ICDRR."]
464    #[inline(always)]
465    #[must_use]
466    pub fn wait(&mut self) -> WAIT_W<6> {
467        WAIT_W::new(self)
468    }
469    #[doc = "Bit 7 - SMBus/I2C Bus Select"]
470    #[inline(always)]
471    #[must_use]
472    pub fn smbs(&mut self) -> SMBS_W<7> {
473        SMBS_W::new(self)
474    }
475    #[doc = "Writes raw bits to the register."]
476    #[inline(always)]
477    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
478        self.0.bits(bits);
479        self
480    }
481}
482#[doc = "I2C Bus Mode Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icmr3](index.html) module"]
483pub struct ICMR3_SPEC;
484impl crate::RegisterSpec for ICMR3_SPEC {
485    type Ux = u8;
486}
487#[doc = "`read()` method returns [icmr3::R](R) reader structure"]
488impl crate::Readable for ICMR3_SPEC {
489    type Reader = R;
490}
491#[doc = "`write(|w| ..)` method takes [icmr3::W](W) writer structure"]
492impl crate::Writable for ICMR3_SPEC {
493    type Writer = W;
494    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
495    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
496}
497#[doc = "`reset()` method sets ICMR3 to value 0"]
498impl crate::Resettable for ICMR3_SPEC {
499    const RESET_VALUE: Self::Ux = 0;
500}