1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash/CPU Interface"]
28unsafe impl ::core::marker::Send for super::Faci {}
29unsafe impl ::core::marker::Sync for super::Faci {}
30impl super::Faci {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Flash Access Status Register"]
38 #[inline(always)]
39 pub const fn fastat(
40 &self,
41 ) -> &'static crate::common::Reg<self::Fastat_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Fastat_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(16usize),
45 )
46 }
47 }
48
49 #[doc = "Flash Access Error Interrupt Enable Register"]
50 #[inline(always)]
51 pub const fn faeint(
52 &self,
53 ) -> &'static crate::common::Reg<self::Faeint_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Faeint_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(20usize),
57 )
58 }
59 }
60
61 #[doc = "Flash Ready Interrupt Enable Register"]
62 #[inline(always)]
63 pub const fn frdyie(
64 &self,
65 ) -> &'static crate::common::Reg<self::Frdyie_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Frdyie_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(24usize),
69 )
70 }
71 }
72
73 #[doc = "FACI Command Start Address Register"]
74 #[inline(always)]
75 pub const fn fsaddr(
76 &self,
77 ) -> &'static crate::common::Reg<self::Fsaddr_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Fsaddr_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(48usize),
81 )
82 }
83 }
84
85 #[doc = "FACI Command End Address Register"]
86 #[inline(always)]
87 pub const fn feaddr(
88 &self,
89 ) -> &'static crate::common::Reg<self::Feaddr_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Feaddr_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(52usize),
93 )
94 }
95 }
96
97 #[doc = "Flash P/E Mode Entry Protection Register"]
98 #[inline(always)]
99 pub const fn fmeprot(
100 &self,
101 ) -> &'static crate::common::Reg<self::Fmeprot_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::Fmeprot_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(68usize),
105 )
106 }
107 }
108
109 #[doc = "Flash Block Protection Register"]
110 #[inline(always)]
111 pub const fn fbprot0(
112 &self,
113 ) -> &'static crate::common::Reg<self::Fbprot0_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Fbprot0_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(120usize),
117 )
118 }
119 }
120
121 #[doc = "Flash Block Protection for Secure Register"]
122 #[inline(always)]
123 pub const fn fbprot1(
124 &self,
125 ) -> &'static crate::common::Reg<self::Fbprot1_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Fbprot1_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(124usize),
129 )
130 }
131 }
132
133 #[doc = "Flash Status Register"]
134 #[inline(always)]
135 pub const fn fstatr(
136 &self,
137 ) -> &'static crate::common::Reg<self::Fstatr_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::Fstatr_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(128usize),
141 )
142 }
143 }
144
145 #[doc = "Flash P/E Mode Entry Register"]
146 #[inline(always)]
147 pub const fn fentryr(
148 &self,
149 ) -> &'static crate::common::Reg<self::Fentryr_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::Fentryr_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(132usize),
153 )
154 }
155 }
156
157 #[doc = "Flash Sequencer Setup Initialization Register"]
158 #[inline(always)]
159 pub const fn fsuinitr(
160 &self,
161 ) -> &'static crate::common::Reg<self::Fsuinitr_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::Fsuinitr_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(140usize),
165 )
166 }
167 }
168
169 #[doc = "FACI Command Register"]
170 #[inline(always)]
171 pub const fn fcmdr(&self) -> &'static crate::common::Reg<self::Fcmdr_SPEC, crate::common::R> {
172 unsafe {
173 crate::common::Reg::<self::Fcmdr_SPEC, crate::common::R>::from_ptr(
174 self._svd2pac_as_ptr().add(160usize),
175 )
176 }
177 }
178
179 #[doc = "Blank Check Control Register"]
180 #[inline(always)]
181 pub const fn fbccnt(
182 &self,
183 ) -> &'static crate::common::Reg<self::Fbccnt_SPEC, crate::common::RW> {
184 unsafe {
185 crate::common::Reg::<self::Fbccnt_SPEC, crate::common::RW>::from_ptr(
186 self._svd2pac_as_ptr().add(208usize),
187 )
188 }
189 }
190
191 #[doc = "Blank Check Status Register"]
192 #[inline(always)]
193 pub const fn fbcstat(
194 &self,
195 ) -> &'static crate::common::Reg<self::Fbcstat_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Fbcstat_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(212usize),
199 )
200 }
201 }
202
203 #[doc = "Data Flash Programming Start Address Register"]
204 #[inline(always)]
205 pub const fn fpsaddr(
206 &self,
207 ) -> &'static crate::common::Reg<self::Fpsaddr_SPEC, crate::common::RW> {
208 unsafe {
209 crate::common::Reg::<self::Fpsaddr_SPEC, crate::common::RW>::from_ptr(
210 self._svd2pac_as_ptr().add(216usize),
211 )
212 }
213 }
214
215 #[doc = "Flash Startup Area Select Monitor Register"]
216 #[inline(always)]
217 pub const fn fsuasmon(
218 &self,
219 ) -> &'static crate::common::Reg<self::Fsuasmon_SPEC, crate::common::R> {
220 unsafe {
221 crate::common::Reg::<self::Fsuasmon_SPEC, crate::common::R>::from_ptr(
222 self._svd2pac_as_ptr().add(220usize),
223 )
224 }
225 }
226
227 #[doc = "Flash Sequencer Processing Switching Register"]
228 #[inline(always)]
229 pub const fn fcpsr(&self) -> &'static crate::common::Reg<self::Fcpsr_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Fcpsr_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(224usize),
233 )
234 }
235 }
236
237 #[doc = "Flash Sequencer Processing Clock Notification Register"]
238 #[inline(always)]
239 pub const fn fpckar(
240 &self,
241 ) -> &'static crate::common::Reg<self::Fpckar_SPEC, crate::common::RW> {
242 unsafe {
243 crate::common::Reg::<self::Fpckar_SPEC, crate::common::RW>::from_ptr(
244 self._svd2pac_as_ptr().add(228usize),
245 )
246 }
247 }
248
249 #[doc = "Flash Startup Area Control Register"]
250 #[inline(always)]
251 pub const fn fsuacr(
252 &self,
253 ) -> &'static crate::common::Reg<self::Fsuacr_SPEC, crate::common::RW> {
254 unsafe {
255 crate::common::Reg::<self::Fsuacr_SPEC, crate::common::RW>::from_ptr(
256 self._svd2pac_as_ptr().add(232usize),
257 )
258 }
259 }
260}
261#[doc(hidden)]
262#[derive(Copy, Clone, Eq, PartialEq)]
263pub struct Fastat_SPEC;
264impl crate::sealed::RegSpec for Fastat_SPEC {
265 type DataType = u8;
266}
267
268#[doc = "Flash Access Status Register"]
269pub type Fastat = crate::RegValueT<Fastat_SPEC>;
270
271impl Fastat {
272 #[doc = "Data Flash Memory Access Violation Flag"]
273 #[inline(always)]
274 pub fn dfae(
275 self,
276 ) -> crate::common::RegisterField<
277 3,
278 0x1,
279 1,
280 0,
281 fastat::Dfae,
282 fastat::Dfae,
283 Fastat_SPEC,
284 crate::common::RW,
285 > {
286 crate::common::RegisterField::<
287 3,
288 0x1,
289 1,
290 0,
291 fastat::Dfae,
292 fastat::Dfae,
293 Fastat_SPEC,
294 crate::common::RW,
295 >::from_register(self, 0)
296 }
297
298 #[doc = "Command Lock Flag"]
299 #[inline(always)]
300 pub fn cmdlk(
301 self,
302 ) -> crate::common::RegisterField<
303 4,
304 0x1,
305 1,
306 0,
307 fastat::Cmdlk,
308 fastat::Cmdlk,
309 Fastat_SPEC,
310 crate::common::R,
311 > {
312 crate::common::RegisterField::<
313 4,
314 0x1,
315 1,
316 0,
317 fastat::Cmdlk,
318 fastat::Cmdlk,
319 Fastat_SPEC,
320 crate::common::R,
321 >::from_register(self, 0)
322 }
323
324 #[doc = "Code Flash Memory Access Violation Flag"]
325 #[inline(always)]
326 pub fn cfae(
327 self,
328 ) -> crate::common::RegisterField<
329 7,
330 0x1,
331 1,
332 0,
333 fastat::Cfae,
334 fastat::Cfae,
335 Fastat_SPEC,
336 crate::common::RW,
337 > {
338 crate::common::RegisterField::<
339 7,
340 0x1,
341 1,
342 0,
343 fastat::Cfae,
344 fastat::Cfae,
345 Fastat_SPEC,
346 crate::common::RW,
347 >::from_register(self, 0)
348 }
349}
350impl ::core::default::Default for Fastat {
351 #[inline(always)]
352 fn default() -> Fastat {
353 <crate::RegValueT<Fastat_SPEC> as RegisterValue<_>>::new(0)
354 }
355}
356pub mod fastat {
357
358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
359 pub struct Dfae_SPEC;
360 pub type Dfae = crate::EnumBitfieldStruct<u8, Dfae_SPEC>;
361 impl Dfae {
362 #[doc = "No data flash memory access violation has occurred"]
363 pub const _0: Self = Self::new(0);
364
365 #[doc = "A data flash memory access violation has occurred."]
366 pub const _1: Self = Self::new(1);
367 }
368 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
369 pub struct Cmdlk_SPEC;
370 pub type Cmdlk = crate::EnumBitfieldStruct<u8, Cmdlk_SPEC>;
371 impl Cmdlk {
372 #[doc = "The flash sequencer is not in the command-locked state"]
373 pub const _0: Self = Self::new(0);
374
375 #[doc = "The flash sequencer is in the command-locked state."]
376 pub const _1: Self = Self::new(1);
377 }
378 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
379 pub struct Cfae_SPEC;
380 pub type Cfae = crate::EnumBitfieldStruct<u8, Cfae_SPEC>;
381 impl Cfae {
382 #[doc = "No code flash memory access violation has occurred"]
383 pub const _0: Self = Self::new(0);
384
385 #[doc = "A code flash memory access violation has occurred."]
386 pub const _1: Self = Self::new(1);
387 }
388}
389#[doc(hidden)]
390#[derive(Copy, Clone, Eq, PartialEq)]
391pub struct Faeint_SPEC;
392impl crate::sealed::RegSpec for Faeint_SPEC {
393 type DataType = u8;
394}
395
396#[doc = "Flash Access Error Interrupt Enable Register"]
397pub type Faeint = crate::RegValueT<Faeint_SPEC>;
398
399impl Faeint {
400 #[doc = "Data Flash Memory Access Violation Interrupt Enable"]
401 #[inline(always)]
402 pub fn dfaeie(
403 self,
404 ) -> crate::common::RegisterField<
405 3,
406 0x1,
407 1,
408 0,
409 faeint::Dfaeie,
410 faeint::Dfaeie,
411 Faeint_SPEC,
412 crate::common::RW,
413 > {
414 crate::common::RegisterField::<
415 3,
416 0x1,
417 1,
418 0,
419 faeint::Dfaeie,
420 faeint::Dfaeie,
421 Faeint_SPEC,
422 crate::common::RW,
423 >::from_register(self, 0)
424 }
425
426 #[doc = "Command Lock Interrupt Enable"]
427 #[inline(always)]
428 pub fn cmdlkie(
429 self,
430 ) -> crate::common::RegisterField<
431 4,
432 0x1,
433 1,
434 0,
435 faeint::Cmdlkie,
436 faeint::Cmdlkie,
437 Faeint_SPEC,
438 crate::common::RW,
439 > {
440 crate::common::RegisterField::<
441 4,
442 0x1,
443 1,
444 0,
445 faeint::Cmdlkie,
446 faeint::Cmdlkie,
447 Faeint_SPEC,
448 crate::common::RW,
449 >::from_register(self, 0)
450 }
451
452 #[doc = "Code Flash Memory Access Violation Interrupt Enable"]
453 #[inline(always)]
454 pub fn cfaeie(
455 self,
456 ) -> crate::common::RegisterField<
457 7,
458 0x1,
459 1,
460 0,
461 faeint::Cfaeie,
462 faeint::Cfaeie,
463 Faeint_SPEC,
464 crate::common::RW,
465 > {
466 crate::common::RegisterField::<
467 7,
468 0x1,
469 1,
470 0,
471 faeint::Cfaeie,
472 faeint::Cfaeie,
473 Faeint_SPEC,
474 crate::common::RW,
475 >::from_register(self, 0)
476 }
477}
478impl ::core::default::Default for Faeint {
479 #[inline(always)]
480 fn default() -> Faeint {
481 <crate::RegValueT<Faeint_SPEC> as RegisterValue<_>>::new(152)
482 }
483}
484pub mod faeint {
485
486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
487 pub struct Dfaeie_SPEC;
488 pub type Dfaeie = crate::EnumBitfieldStruct<u8, Dfaeie_SPEC>;
489 impl Dfaeie {
490 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.DFAE is set to 1"]
491 pub const _0: Self = Self::new(0);
492
493 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.DFAE is set to 1."]
494 pub const _1: Self = Self::new(1);
495 }
496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
497 pub struct Cmdlkie_SPEC;
498 pub type Cmdlkie = crate::EnumBitfieldStruct<u8, Cmdlkie_SPEC>;
499 impl Cmdlkie {
500 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CMDLK is set to 1"]
501 pub const _0: Self = Self::new(0);
502
503 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CMDLK is set to 1."]
504 pub const _1: Self = Self::new(1);
505 }
506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
507 pub struct Cfaeie_SPEC;
508 pub type Cfaeie = crate::EnumBitfieldStruct<u8, Cfaeie_SPEC>;
509 impl Cfaeie {
510 #[doc = "Generation of an FIFERR interrupt request is disabled when FASTAT.CFAE is set to 1"]
511 pub const _0: Self = Self::new(0);
512
513 #[doc = "Generation of an FIFERR interrupt request is enabled when FASTAT.CFAE is set to 1."]
514 pub const _1: Self = Self::new(1);
515 }
516}
517#[doc(hidden)]
518#[derive(Copy, Clone, Eq, PartialEq)]
519pub struct Frdyie_SPEC;
520impl crate::sealed::RegSpec for Frdyie_SPEC {
521 type DataType = u8;
522}
523
524#[doc = "Flash Ready Interrupt Enable Register"]
525pub type Frdyie = crate::RegValueT<Frdyie_SPEC>;
526
527impl Frdyie {
528 #[doc = "Flash Ready Interrupt Enable"]
529 #[inline(always)]
530 pub fn frdyie(
531 self,
532 ) -> crate::common::RegisterField<
533 0,
534 0x1,
535 1,
536 0,
537 frdyie::Frdyie,
538 frdyie::Frdyie,
539 Frdyie_SPEC,
540 crate::common::RW,
541 > {
542 crate::common::RegisterField::<
543 0,
544 0x1,
545 1,
546 0,
547 frdyie::Frdyie,
548 frdyie::Frdyie,
549 Frdyie_SPEC,
550 crate::common::RW,
551 >::from_register(self, 0)
552 }
553}
554impl ::core::default::Default for Frdyie {
555 #[inline(always)]
556 fn default() -> Frdyie {
557 <crate::RegValueT<Frdyie_SPEC> as RegisterValue<_>>::new(0)
558 }
559}
560pub mod frdyie {
561
562 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
563 pub struct Frdyie_SPEC;
564 pub type Frdyie = crate::EnumBitfieldStruct<u8, Frdyie_SPEC>;
565 impl Frdyie {
566 #[doc = "Generation of an FRDY interrupt request is disabled"]
567 pub const _0: Self = Self::new(0);
568
569 #[doc = "Generation of an FRDY interrupt request is enabled."]
570 pub const _1: Self = Self::new(1);
571 }
572}
573#[doc(hidden)]
574#[derive(Copy, Clone, Eq, PartialEq)]
575pub struct Fsaddr_SPEC;
576impl crate::sealed::RegSpec for Fsaddr_SPEC {
577 type DataType = u32;
578}
579
580#[doc = "FACI Command Start Address Register"]
581pub type Fsaddr = crate::RegValueT<Fsaddr_SPEC>;
582
583impl Fsaddr {
584 #[doc = "Start Address for FACI Command Processing"]
585 #[inline(always)]
586 pub fn fsaddr(
587 self,
588 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Fsaddr_SPEC, crate::common::RW>
589 {
590 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Fsaddr_SPEC,crate::common::RW>::from_register(self,0)
591 }
592}
593impl ::core::default::Default for Fsaddr {
594 #[inline(always)]
595 fn default() -> Fsaddr {
596 <crate::RegValueT<Fsaddr_SPEC> as RegisterValue<_>>::new(0)
597 }
598}
599
600#[doc(hidden)]
601#[derive(Copy, Clone, Eq, PartialEq)]
602pub struct Feaddr_SPEC;
603impl crate::sealed::RegSpec for Feaddr_SPEC {
604 type DataType = u32;
605}
606
607#[doc = "FACI Command End Address Register"]
608pub type Feaddr = crate::RegValueT<Feaddr_SPEC>;
609
610impl Feaddr {
611 #[doc = "End Address for FACI Command Processing"]
612 #[inline(always)]
613 pub fn feaddr(
614 self,
615 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Feaddr_SPEC, crate::common::RW>
616 {
617 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Feaddr_SPEC,crate::common::RW>::from_register(self,0)
618 }
619}
620impl ::core::default::Default for Feaddr {
621 #[inline(always)]
622 fn default() -> Feaddr {
623 <crate::RegValueT<Feaddr_SPEC> as RegisterValue<_>>::new(0)
624 }
625}
626
627#[doc(hidden)]
628#[derive(Copy, Clone, Eq, PartialEq)]
629pub struct Fmeprot_SPEC;
630impl crate::sealed::RegSpec for Fmeprot_SPEC {
631 type DataType = u16;
632}
633
634#[doc = "Flash P/E Mode Entry Protection Register"]
635pub type Fmeprot = crate::RegValueT<Fmeprot_SPEC>;
636
637impl Fmeprot {
638 #[doc = "Code Flash P/E Mode Entry Protection"]
639 #[inline(always)]
640 pub fn ceprot(
641 self,
642 ) -> crate::common::RegisterField<
643 0,
644 0x1,
645 1,
646 0,
647 fmeprot::Ceprot,
648 fmeprot::Ceprot,
649 Fmeprot_SPEC,
650 crate::common::RW,
651 > {
652 crate::common::RegisterField::<
653 0,
654 0x1,
655 1,
656 0,
657 fmeprot::Ceprot,
658 fmeprot::Ceprot,
659 Fmeprot_SPEC,
660 crate::common::RW,
661 >::from_register(self, 0)
662 }
663
664 #[doc = "Key Code"]
665 #[inline(always)]
666 pub fn key(
667 self,
668 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fmeprot_SPEC, crate::common::W> {
669 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fmeprot_SPEC,crate::common::W>::from_register(self,0)
670 }
671}
672impl ::core::default::Default for Fmeprot {
673 #[inline(always)]
674 fn default() -> Fmeprot {
675 <crate::RegValueT<Fmeprot_SPEC> as RegisterValue<_>>::new(1)
676 }
677}
678pub mod fmeprot {
679
680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
681 pub struct Ceprot_SPEC;
682 pub type Ceprot = crate::EnumBitfieldStruct<u8, Ceprot_SPEC>;
683 impl Ceprot {
684 #[doc = "FENTRYC bit is not protected"]
685 pub const _0: Self = Self::new(0);
686
687 #[doc = "FENTRYC bit is protected."]
688 pub const _1: Self = Self::new(1);
689 }
690}
691#[doc(hidden)]
692#[derive(Copy, Clone, Eq, PartialEq)]
693pub struct Fbprot0_SPEC;
694impl crate::sealed::RegSpec for Fbprot0_SPEC {
695 type DataType = u16;
696}
697
698#[doc = "Flash Block Protection Register"]
699pub type Fbprot0 = crate::RegValueT<Fbprot0_SPEC>;
700
701impl Fbprot0 {
702 #[doc = "Block Protection for Non-secure Cancel"]
703 #[inline(always)]
704 pub fn bpcn0(
705 self,
706 ) -> crate::common::RegisterField<
707 0,
708 0x1,
709 1,
710 0,
711 fbprot0::Bpcn0,
712 fbprot0::Bpcn0,
713 Fbprot0_SPEC,
714 crate::common::RW,
715 > {
716 crate::common::RegisterField::<
717 0,
718 0x1,
719 1,
720 0,
721 fbprot0::Bpcn0,
722 fbprot0::Bpcn0,
723 Fbprot0_SPEC,
724 crate::common::RW,
725 >::from_register(self, 0)
726 }
727
728 #[doc = "Key Code"]
729 #[inline(always)]
730 pub fn key(
731 self,
732 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fbprot0_SPEC, crate::common::W> {
733 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fbprot0_SPEC,crate::common::W>::from_register(self,0)
734 }
735}
736impl ::core::default::Default for Fbprot0 {
737 #[inline(always)]
738 fn default() -> Fbprot0 {
739 <crate::RegValueT<Fbprot0_SPEC> as RegisterValue<_>>::new(0)
740 }
741}
742pub mod fbprot0 {
743
744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
745 pub struct Bpcn0_SPEC;
746 pub type Bpcn0 = crate::EnumBitfieldStruct<u8, Bpcn0_SPEC>;
747 impl Bpcn0 {
748 #[doc = "Block protection is enabled"]
749 pub const _0: Self = Self::new(0);
750
751 #[doc = "Block protection is disabled."]
752 pub const _1: Self = Self::new(1);
753 }
754}
755#[doc(hidden)]
756#[derive(Copy, Clone, Eq, PartialEq)]
757pub struct Fbprot1_SPEC;
758impl crate::sealed::RegSpec for Fbprot1_SPEC {
759 type DataType = u16;
760}
761
762#[doc = "Flash Block Protection for Secure Register"]
763pub type Fbprot1 = crate::RegValueT<Fbprot1_SPEC>;
764
765impl Fbprot1 {
766 #[doc = "Block Protection for Secure Cancel"]
767 #[inline(always)]
768 pub fn bpcn1(
769 self,
770 ) -> crate::common::RegisterField<
771 0,
772 0x1,
773 1,
774 0,
775 fbprot1::Bpcn1,
776 fbprot1::Bpcn1,
777 Fbprot1_SPEC,
778 crate::common::RW,
779 > {
780 crate::common::RegisterField::<
781 0,
782 0x1,
783 1,
784 0,
785 fbprot1::Bpcn1,
786 fbprot1::Bpcn1,
787 Fbprot1_SPEC,
788 crate::common::RW,
789 >::from_register(self, 0)
790 }
791
792 #[doc = "Key Code"]
793 #[inline(always)]
794 pub fn key(
795 self,
796 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fbprot1_SPEC, crate::common::W> {
797 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fbprot1_SPEC,crate::common::W>::from_register(self,0)
798 }
799}
800impl ::core::default::Default for Fbprot1 {
801 #[inline(always)]
802 fn default() -> Fbprot1 {
803 <crate::RegValueT<Fbprot1_SPEC> as RegisterValue<_>>::new(0)
804 }
805}
806pub mod fbprot1 {
807
808 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
809 pub struct Bpcn1_SPEC;
810 pub type Bpcn1 = crate::EnumBitfieldStruct<u8, Bpcn1_SPEC>;
811 impl Bpcn1 {
812 #[doc = "Block protection is enabled"]
813 pub const _0: Self = Self::new(0);
814
815 #[doc = "Block protection is disabled."]
816 pub const _1: Self = Self::new(1);
817 }
818}
819#[doc(hidden)]
820#[derive(Copy, Clone, Eq, PartialEq)]
821pub struct Fstatr_SPEC;
822impl crate::sealed::RegSpec for Fstatr_SPEC {
823 type DataType = u32;
824}
825
826#[doc = "Flash Status Register"]
827pub type Fstatr = crate::RegValueT<Fstatr_SPEC>;
828
829impl Fstatr {
830 #[doc = "Flash Write/Erase Protect Error Flag"]
831 #[inline(always)]
832 pub fn flweerr(
833 self,
834 ) -> crate::common::RegisterField<
835 6,
836 0x1,
837 1,
838 0,
839 fstatr::Flweerr,
840 fstatr::Flweerr,
841 Fstatr_SPEC,
842 crate::common::R,
843 > {
844 crate::common::RegisterField::<
845 6,
846 0x1,
847 1,
848 0,
849 fstatr::Flweerr,
850 fstatr::Flweerr,
851 Fstatr_SPEC,
852 crate::common::R,
853 >::from_register(self, 0)
854 }
855
856 #[doc = "Programming Suspend Status Flag"]
857 #[inline(always)]
858 pub fn prgspd(
859 self,
860 ) -> crate::common::RegisterField<
861 8,
862 0x1,
863 1,
864 0,
865 fstatr::Prgspd,
866 fstatr::Prgspd,
867 Fstatr_SPEC,
868 crate::common::R,
869 > {
870 crate::common::RegisterField::<
871 8,
872 0x1,
873 1,
874 0,
875 fstatr::Prgspd,
876 fstatr::Prgspd,
877 Fstatr_SPEC,
878 crate::common::R,
879 >::from_register(self, 0)
880 }
881
882 #[doc = "Erasure Suspend Status Flag"]
883 #[inline(always)]
884 pub fn ersspd(
885 self,
886 ) -> crate::common::RegisterField<
887 9,
888 0x1,
889 1,
890 0,
891 fstatr::Ersspd,
892 fstatr::Ersspd,
893 Fstatr_SPEC,
894 crate::common::R,
895 > {
896 crate::common::RegisterField::<
897 9,
898 0x1,
899 1,
900 0,
901 fstatr::Ersspd,
902 fstatr::Ersspd,
903 Fstatr_SPEC,
904 crate::common::R,
905 >::from_register(self, 0)
906 }
907
908 #[doc = "Data Buffer Full Flag"]
909 #[inline(always)]
910 pub fn dbfull(
911 self,
912 ) -> crate::common::RegisterField<
913 10,
914 0x1,
915 1,
916 0,
917 fstatr::Dbfull,
918 fstatr::Dbfull,
919 Fstatr_SPEC,
920 crate::common::R,
921 > {
922 crate::common::RegisterField::<
923 10,
924 0x1,
925 1,
926 0,
927 fstatr::Dbfull,
928 fstatr::Dbfull,
929 Fstatr_SPEC,
930 crate::common::R,
931 >::from_register(self, 0)
932 }
933
934 #[doc = "Suspend Ready Flag"]
935 #[inline(always)]
936 pub fn susrdy(
937 self,
938 ) -> crate::common::RegisterField<
939 11,
940 0x1,
941 1,
942 0,
943 fstatr::Susrdy,
944 fstatr::Susrdy,
945 Fstatr_SPEC,
946 crate::common::R,
947 > {
948 crate::common::RegisterField::<
949 11,
950 0x1,
951 1,
952 0,
953 fstatr::Susrdy,
954 fstatr::Susrdy,
955 Fstatr_SPEC,
956 crate::common::R,
957 >::from_register(self, 0)
958 }
959
960 #[doc = "Programming Error Flag"]
961 #[inline(always)]
962 pub fn prgerr(
963 self,
964 ) -> crate::common::RegisterField<
965 12,
966 0x1,
967 1,
968 0,
969 fstatr::Prgerr,
970 fstatr::Prgerr,
971 Fstatr_SPEC,
972 crate::common::R,
973 > {
974 crate::common::RegisterField::<
975 12,
976 0x1,
977 1,
978 0,
979 fstatr::Prgerr,
980 fstatr::Prgerr,
981 Fstatr_SPEC,
982 crate::common::R,
983 >::from_register(self, 0)
984 }
985
986 #[doc = "Erasure Error Flag"]
987 #[inline(always)]
988 pub fn erserr(
989 self,
990 ) -> crate::common::RegisterField<
991 13,
992 0x1,
993 1,
994 0,
995 fstatr::Erserr,
996 fstatr::Erserr,
997 Fstatr_SPEC,
998 crate::common::R,
999 > {
1000 crate::common::RegisterField::<
1001 13,
1002 0x1,
1003 1,
1004 0,
1005 fstatr::Erserr,
1006 fstatr::Erserr,
1007 Fstatr_SPEC,
1008 crate::common::R,
1009 >::from_register(self, 0)
1010 }
1011
1012 #[doc = "Illegal Command Error Flag"]
1013 #[inline(always)]
1014 pub fn ilglerr(
1015 self,
1016 ) -> crate::common::RegisterField<
1017 14,
1018 0x1,
1019 1,
1020 0,
1021 fstatr::Ilglerr,
1022 fstatr::Ilglerr,
1023 Fstatr_SPEC,
1024 crate::common::R,
1025 > {
1026 crate::common::RegisterField::<
1027 14,
1028 0x1,
1029 1,
1030 0,
1031 fstatr::Ilglerr,
1032 fstatr::Ilglerr,
1033 Fstatr_SPEC,
1034 crate::common::R,
1035 >::from_register(self, 0)
1036 }
1037
1038 #[doc = "Flash Ready Flag"]
1039 #[inline(always)]
1040 pub fn frdy(
1041 self,
1042 ) -> crate::common::RegisterField<
1043 15,
1044 0x1,
1045 1,
1046 0,
1047 fstatr::Frdy,
1048 fstatr::Frdy,
1049 Fstatr_SPEC,
1050 crate::common::R,
1051 > {
1052 crate::common::RegisterField::<
1053 15,
1054 0x1,
1055 1,
1056 0,
1057 fstatr::Frdy,
1058 fstatr::Frdy,
1059 Fstatr_SPEC,
1060 crate::common::R,
1061 >::from_register(self, 0)
1062 }
1063
1064 #[doc = "Other Error"]
1065 #[inline(always)]
1066 pub fn oterr(
1067 self,
1068 ) -> crate::common::RegisterField<
1069 20,
1070 0x1,
1071 1,
1072 0,
1073 fstatr::Oterr,
1074 fstatr::Oterr,
1075 Fstatr_SPEC,
1076 crate::common::R,
1077 > {
1078 crate::common::RegisterField::<
1079 20,
1080 0x1,
1081 1,
1082 0,
1083 fstatr::Oterr,
1084 fstatr::Oterr,
1085 Fstatr_SPEC,
1086 crate::common::R,
1087 >::from_register(self, 0)
1088 }
1089
1090 #[doc = "Security Error"]
1091 #[inline(always)]
1092 pub fn secerr(
1093 self,
1094 ) -> crate::common::RegisterField<
1095 21,
1096 0x1,
1097 1,
1098 0,
1099 fstatr::Secerr,
1100 fstatr::Secerr,
1101 Fstatr_SPEC,
1102 crate::common::R,
1103 > {
1104 crate::common::RegisterField::<
1105 21,
1106 0x1,
1107 1,
1108 0,
1109 fstatr::Secerr,
1110 fstatr::Secerr,
1111 Fstatr_SPEC,
1112 crate::common::R,
1113 >::from_register(self, 0)
1114 }
1115
1116 #[doc = "FENTRY Setting Error"]
1117 #[inline(always)]
1118 pub fn feseterr(
1119 self,
1120 ) -> crate::common::RegisterField<
1121 22,
1122 0x1,
1123 1,
1124 0,
1125 fstatr::Feseterr,
1126 fstatr::Feseterr,
1127 Fstatr_SPEC,
1128 crate::common::R,
1129 > {
1130 crate::common::RegisterField::<
1131 22,
1132 0x1,
1133 1,
1134 0,
1135 fstatr::Feseterr,
1136 fstatr::Feseterr,
1137 Fstatr_SPEC,
1138 crate::common::R,
1139 >::from_register(self, 0)
1140 }
1141
1142 #[doc = "Illegal Command Error"]
1143 #[inline(always)]
1144 pub fn ilgcomerr(
1145 self,
1146 ) -> crate::common::RegisterField<
1147 23,
1148 0x1,
1149 1,
1150 0,
1151 fstatr::Ilgcomerr,
1152 fstatr::Ilgcomerr,
1153 Fstatr_SPEC,
1154 crate::common::R,
1155 > {
1156 crate::common::RegisterField::<
1157 23,
1158 0x1,
1159 1,
1160 0,
1161 fstatr::Ilgcomerr,
1162 fstatr::Ilgcomerr,
1163 Fstatr_SPEC,
1164 crate::common::R,
1165 >::from_register(self, 0)
1166 }
1167}
1168impl ::core::default::Default for Fstatr {
1169 #[inline(always)]
1170 fn default() -> Fstatr {
1171 <crate::RegValueT<Fstatr_SPEC> as RegisterValue<_>>::new(32768)
1172 }
1173}
1174pub mod fstatr {
1175
1176 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1177 pub struct Flweerr_SPEC;
1178 pub type Flweerr = crate::EnumBitfieldStruct<u8, Flweerr_SPEC>;
1179 impl Flweerr {
1180 #[doc = "An error has not occurred"]
1181 pub const _0: Self = Self::new(0);
1182
1183 #[doc = "An error has occurred."]
1184 pub const _1: Self = Self::new(1);
1185 }
1186 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1187 pub struct Prgspd_SPEC;
1188 pub type Prgspd = crate::EnumBitfieldStruct<u8, Prgspd_SPEC>;
1189 impl Prgspd {
1190 #[doc = "The flash sequencer is not in the programming suspension processing state or programming suspended state"]
1191 pub const _0: Self = Self::new(0);
1192
1193 #[doc = "The flash sequencer is in the programming suspension processing state or programming suspended state."]
1194 pub const _1: Self = Self::new(1);
1195 }
1196 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1197 pub struct Ersspd_SPEC;
1198 pub type Ersspd = crate::EnumBitfieldStruct<u8, Ersspd_SPEC>;
1199 impl Ersspd {
1200 #[doc = "The flash sequencer is not in the erasure suspension processing state or the erasure suspended state"]
1201 pub const _0: Self = Self::new(0);
1202
1203 #[doc = "The flash sequencer is in the erasure suspension processing state or the erasure suspended state."]
1204 pub const _1: Self = Self::new(1);
1205 }
1206 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1207 pub struct Dbfull_SPEC;
1208 pub type Dbfull = crate::EnumBitfieldStruct<u8, Dbfull_SPEC>;
1209 impl Dbfull {
1210 #[doc = "The data buffer is empty"]
1211 pub const _0: Self = Self::new(0);
1212
1213 #[doc = "The data buffer is full."]
1214 pub const _1: Self = Self::new(1);
1215 }
1216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1217 pub struct Susrdy_SPEC;
1218 pub type Susrdy = crate::EnumBitfieldStruct<u8, Susrdy_SPEC>;
1219 impl Susrdy {
1220 #[doc = "The flash sequencer cannot receive P/E suspend commands"]
1221 pub const _0: Self = Self::new(0);
1222
1223 #[doc = "The flash sequencer can receive P/E suspend commands."]
1224 pub const _1: Self = Self::new(1);
1225 }
1226 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1227 pub struct Prgerr_SPEC;
1228 pub type Prgerr = crate::EnumBitfieldStruct<u8, Prgerr_SPEC>;
1229 impl Prgerr {
1230 #[doc = "Programming has completed successfully"]
1231 pub const _0: Self = Self::new(0);
1232
1233 #[doc = "An error has occurred during programming."]
1234 pub const _1: Self = Self::new(1);
1235 }
1236 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1237 pub struct Erserr_SPEC;
1238 pub type Erserr = crate::EnumBitfieldStruct<u8, Erserr_SPEC>;
1239 impl Erserr {
1240 #[doc = "Erasure has completed successfully"]
1241 pub const _0: Self = Self::new(0);
1242
1243 #[doc = "An error has occurred during erasure."]
1244 pub const _1: Self = Self::new(1);
1245 }
1246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1247 pub struct Ilglerr_SPEC;
1248 pub type Ilglerr = crate::EnumBitfieldStruct<u8, Ilglerr_SPEC>;
1249 impl Ilglerr {
1250 #[doc = "The flash sequencer has not detected an illegal FACI command or illegal flash memory access"]
1251 pub const _0: Self = Self::new(0);
1252
1253 #[doc = "The flash sequencer has detected an illegal FACI command or illegal flash memory access."]
1254 pub const _1: Self = Self::new(1);
1255 }
1256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1257 pub struct Frdy_SPEC;
1258 pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
1259 impl Frdy {
1260 #[doc = "Program, Block Erase, Multi Block Erase, P/E suspend, P/E resume, Forced Stop, Blank Check, or Configuration set command processing is in progress"]
1261 pub const _0: Self = Self::new(0);
1262
1263 #[doc = "None of the above is in progress."]
1264 pub const _1: Self = Self::new(1);
1265 }
1266 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1267 pub struct Oterr_SPEC;
1268 pub type Oterr = crate::EnumBitfieldStruct<u8, Oterr_SPEC>;
1269 impl Oterr {
1270 #[doc = "A status clear or forced stop command processing is complete"]
1271 pub const _0: Self = Self::new(0);
1272
1273 #[doc = "An error has occurred."]
1274 pub const _1: Self = Self::new(1);
1275 }
1276 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1277 pub struct Secerr_SPEC;
1278 pub type Secerr = crate::EnumBitfieldStruct<u8, Secerr_SPEC>;
1279 impl Secerr {
1280 #[doc = "A status clear or forced stop command processing is complete"]
1281 pub const _0: Self = Self::new(0);
1282
1283 #[doc = "An error has occurred."]
1284 pub const _1: Self = Self::new(1);
1285 }
1286 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1287 pub struct Feseterr_SPEC;
1288 pub type Feseterr = crate::EnumBitfieldStruct<u8, Feseterr_SPEC>;
1289 impl Feseterr {
1290 #[doc = "A status clear or forced stop command processing is complete"]
1291 pub const _0: Self = Self::new(0);
1292
1293 #[doc = "An error has occurred."]
1294 pub const _1: Self = Self::new(1);
1295 }
1296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1297 pub struct Ilgcomerr_SPEC;
1298 pub type Ilgcomerr = crate::EnumBitfieldStruct<u8, Ilgcomerr_SPEC>;
1299 impl Ilgcomerr {
1300 #[doc = "A status clear or forced stop command processing is complete"]
1301 pub const _0: Self = Self::new(0);
1302
1303 #[doc = "An error has occurred."]
1304 pub const _1: Self = Self::new(1);
1305 }
1306}
1307#[doc(hidden)]
1308#[derive(Copy, Clone, Eq, PartialEq)]
1309pub struct Fentryr_SPEC;
1310impl crate::sealed::RegSpec for Fentryr_SPEC {
1311 type DataType = u16;
1312}
1313
1314#[doc = "Flash P/E Mode Entry Register"]
1315pub type Fentryr = crate::RegValueT<Fentryr_SPEC>;
1316
1317impl Fentryr {
1318 #[doc = "Code Flash P/E Mode Entry"]
1319 #[inline(always)]
1320 pub fn fentryc(
1321 self,
1322 ) -> crate::common::RegisterField<
1323 0,
1324 0x1,
1325 1,
1326 0,
1327 fentryr::Fentryc,
1328 fentryr::Fentryc,
1329 Fentryr_SPEC,
1330 crate::common::RW,
1331 > {
1332 crate::common::RegisterField::<
1333 0,
1334 0x1,
1335 1,
1336 0,
1337 fentryr::Fentryc,
1338 fentryr::Fentryc,
1339 Fentryr_SPEC,
1340 crate::common::RW,
1341 >::from_register(self, 0)
1342 }
1343
1344 #[doc = "Data Flash P/E Mode Entry"]
1345 #[inline(always)]
1346 pub fn fentryd(
1347 self,
1348 ) -> crate::common::RegisterField<
1349 7,
1350 0x1,
1351 1,
1352 0,
1353 fentryr::Fentryd,
1354 fentryr::Fentryd,
1355 Fentryr_SPEC,
1356 crate::common::RW,
1357 > {
1358 crate::common::RegisterField::<
1359 7,
1360 0x1,
1361 1,
1362 0,
1363 fentryr::Fentryd,
1364 fentryr::Fentryd,
1365 Fentryr_SPEC,
1366 crate::common::RW,
1367 >::from_register(self, 0)
1368 }
1369
1370 #[doc = "Key Code"]
1371 #[inline(always)]
1372 pub fn key(
1373 self,
1374 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fentryr_SPEC, crate::common::W> {
1375 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fentryr_SPEC,crate::common::W>::from_register(self,0)
1376 }
1377}
1378impl ::core::default::Default for Fentryr {
1379 #[inline(always)]
1380 fn default() -> Fentryr {
1381 <crate::RegValueT<Fentryr_SPEC> as RegisterValue<_>>::new(0)
1382 }
1383}
1384pub mod fentryr {
1385
1386 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1387 pub struct Fentryc_SPEC;
1388 pub type Fentryc = crate::EnumBitfieldStruct<u8, Fentryc_SPEC>;
1389 impl Fentryc {
1390 #[doc = "Code flash is in read mode"]
1391 pub const _0: Self = Self::new(0);
1392
1393 #[doc = "Code flash is in P/E mode."]
1394 pub const _1: Self = Self::new(1);
1395 }
1396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1397 pub struct Fentryd_SPEC;
1398 pub type Fentryd = crate::EnumBitfieldStruct<u8, Fentryd_SPEC>;
1399 impl Fentryd {
1400 #[doc = "Data flash is in read mode"]
1401 pub const _0: Self = Self::new(0);
1402
1403 #[doc = "Data flash is in P/E mode."]
1404 pub const _1: Self = Self::new(1);
1405 }
1406}
1407#[doc(hidden)]
1408#[derive(Copy, Clone, Eq, PartialEq)]
1409pub struct Fsuinitr_SPEC;
1410impl crate::sealed::RegSpec for Fsuinitr_SPEC {
1411 type DataType = u16;
1412}
1413
1414#[doc = "Flash Sequencer Setup Initialization Register"]
1415pub type Fsuinitr = crate::RegValueT<Fsuinitr_SPEC>;
1416
1417impl Fsuinitr {
1418 #[doc = "Set-Up Initialization"]
1419 #[inline(always)]
1420 pub fn suinit(
1421 self,
1422 ) -> crate::common::RegisterField<
1423 0,
1424 0x1,
1425 1,
1426 0,
1427 fsuinitr::Suinit,
1428 fsuinitr::Suinit,
1429 Fsuinitr_SPEC,
1430 crate::common::RW,
1431 > {
1432 crate::common::RegisterField::<
1433 0,
1434 0x1,
1435 1,
1436 0,
1437 fsuinitr::Suinit,
1438 fsuinitr::Suinit,
1439 Fsuinitr_SPEC,
1440 crate::common::RW,
1441 >::from_register(self, 0)
1442 }
1443
1444 #[doc = "Key Code"]
1445 #[inline(always)]
1446 pub fn key(
1447 self,
1448 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fsuinitr_SPEC, crate::common::W> {
1449 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fsuinitr_SPEC,crate::common::W>::from_register(self,0)
1450 }
1451}
1452impl ::core::default::Default for Fsuinitr {
1453 #[inline(always)]
1454 fn default() -> Fsuinitr {
1455 <crate::RegValueT<Fsuinitr_SPEC> as RegisterValue<_>>::new(0)
1456 }
1457}
1458pub mod fsuinitr {
1459
1460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1461 pub struct Suinit_SPEC;
1462 pub type Suinit = crate::EnumBitfieldStruct<u8, Suinit_SPEC>;
1463 impl Suinit {
1464 #[doc = "The FSADDR, FEADDR, FBPROT0, FBPROT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers keep their current values"]
1465 pub const _0: Self = Self::new(0);
1466
1467 #[doc = "The FSADDR, FEADDR, FBPROT0, FBRPOT1, FENTRYR, FBCCNT, and FCPSR flash sequencer setup registers are initialized."]
1468 pub const _1: Self = Self::new(1);
1469 }
1470}
1471#[doc(hidden)]
1472#[derive(Copy, Clone, Eq, PartialEq)]
1473pub struct Fcmdr_SPEC;
1474impl crate::sealed::RegSpec for Fcmdr_SPEC {
1475 type DataType = u16;
1476}
1477
1478#[doc = "FACI Command Register"]
1479pub type Fcmdr = crate::RegValueT<Fcmdr_SPEC>;
1480
1481impl Fcmdr {
1482 #[doc = "Pre-command Flag"]
1483 #[inline(always)]
1484 pub fn pcmdr(
1485 self,
1486 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fcmdr_SPEC, crate::common::R> {
1487 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fcmdr_SPEC,crate::common::R>::from_register(self,0)
1488 }
1489
1490 #[doc = "Command Flag"]
1491 #[inline(always)]
1492 pub fn cmdr(
1493 self,
1494 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fcmdr_SPEC, crate::common::R> {
1495 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fcmdr_SPEC,crate::common::R>::from_register(self,0)
1496 }
1497}
1498impl ::core::default::Default for Fcmdr {
1499 #[inline(always)]
1500 fn default() -> Fcmdr {
1501 <crate::RegValueT<Fcmdr_SPEC> as RegisterValue<_>>::new(0)
1502 }
1503}
1504
1505#[doc(hidden)]
1506#[derive(Copy, Clone, Eq, PartialEq)]
1507pub struct Fbccnt_SPEC;
1508impl crate::sealed::RegSpec for Fbccnt_SPEC {
1509 type DataType = u8;
1510}
1511
1512#[doc = "Blank Check Control Register"]
1513pub type Fbccnt = crate::RegValueT<Fbccnt_SPEC>;
1514
1515impl Fbccnt {
1516 #[doc = "Blank Check Direction"]
1517 #[inline(always)]
1518 pub fn bcdir(
1519 self,
1520 ) -> crate::common::RegisterField<
1521 0,
1522 0x1,
1523 1,
1524 0,
1525 fbccnt::Bcdir,
1526 fbccnt::Bcdir,
1527 Fbccnt_SPEC,
1528 crate::common::RW,
1529 > {
1530 crate::common::RegisterField::<
1531 0,
1532 0x1,
1533 1,
1534 0,
1535 fbccnt::Bcdir,
1536 fbccnt::Bcdir,
1537 Fbccnt_SPEC,
1538 crate::common::RW,
1539 >::from_register(self, 0)
1540 }
1541}
1542impl ::core::default::Default for Fbccnt {
1543 #[inline(always)]
1544 fn default() -> Fbccnt {
1545 <crate::RegValueT<Fbccnt_SPEC> as RegisterValue<_>>::new(0)
1546 }
1547}
1548pub mod fbccnt {
1549
1550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1551 pub struct Bcdir_SPEC;
1552 pub type Bcdir = crate::EnumBitfieldStruct<u8, Bcdir_SPEC>;
1553 impl Bcdir {
1554 #[doc = "Blank checking is executed from the lower addresses to the higher addresses (incremental mode)"]
1555 pub const _0: Self = Self::new(0);
1556
1557 #[doc = "Blank checking is executed from the higher addresses to the lower addresses (decremental mode)."]
1558 pub const _1: Self = Self::new(1);
1559 }
1560}
1561#[doc(hidden)]
1562#[derive(Copy, Clone, Eq, PartialEq)]
1563pub struct Fbcstat_SPEC;
1564impl crate::sealed::RegSpec for Fbcstat_SPEC {
1565 type DataType = u8;
1566}
1567
1568#[doc = "Blank Check Status Register"]
1569pub type Fbcstat = crate::RegValueT<Fbcstat_SPEC>;
1570
1571impl Fbcstat {
1572 #[doc = "Blank Check Status Flag"]
1573 #[inline(always)]
1574 pub fn bcst(
1575 self,
1576 ) -> crate::common::RegisterField<
1577 0,
1578 0x1,
1579 1,
1580 0,
1581 fbcstat::Bcst,
1582 fbcstat::Bcst,
1583 Fbcstat_SPEC,
1584 crate::common::R,
1585 > {
1586 crate::common::RegisterField::<
1587 0,
1588 0x1,
1589 1,
1590 0,
1591 fbcstat::Bcst,
1592 fbcstat::Bcst,
1593 Fbcstat_SPEC,
1594 crate::common::R,
1595 >::from_register(self, 0)
1596 }
1597}
1598impl ::core::default::Default for Fbcstat {
1599 #[inline(always)]
1600 fn default() -> Fbcstat {
1601 <crate::RegValueT<Fbcstat_SPEC> as RegisterValue<_>>::new(0)
1602 }
1603}
1604pub mod fbcstat {
1605
1606 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1607 pub struct Bcst_SPEC;
1608 pub type Bcst = crate::EnumBitfieldStruct<u8, Bcst_SPEC>;
1609 impl Bcst {
1610 #[doc = "The target area is in the non-programmed state, that is, the area has been erased but has not yet been reprogrammed"]
1611 pub const _0: Self = Self::new(0);
1612
1613 #[doc = "The target area has been programmed with 0s or 1s."]
1614 pub const _1: Self = Self::new(1);
1615 }
1616}
1617#[doc(hidden)]
1618#[derive(Copy, Clone, Eq, PartialEq)]
1619pub struct Fpsaddr_SPEC;
1620impl crate::sealed::RegSpec for Fpsaddr_SPEC {
1621 type DataType = u32;
1622}
1623
1624#[doc = "Data Flash Programming Start Address Register"]
1625pub type Fpsaddr = crate::RegValueT<Fpsaddr_SPEC>;
1626
1627impl Fpsaddr {
1628 #[doc = "Programmed Area Start Address"]
1629 #[inline(always)]
1630 pub fn psadr(
1631 self,
1632 ) -> crate::common::RegisterField<0, 0x1ffff, 1, 0, u32, u32, Fpsaddr_SPEC, crate::common::R>
1633 {
1634 crate::common::RegisterField::<0,0x1ffff,1,0,u32,u32,Fpsaddr_SPEC,crate::common::R>::from_register(self,0)
1635 }
1636}
1637impl ::core::default::Default for Fpsaddr {
1638 #[inline(always)]
1639 fn default() -> Fpsaddr {
1640 <crate::RegValueT<Fpsaddr_SPEC> as RegisterValue<_>>::new(0)
1641 }
1642}
1643
1644#[doc(hidden)]
1645#[derive(Copy, Clone, Eq, PartialEq)]
1646pub struct Fsuasmon_SPEC;
1647impl crate::sealed::RegSpec for Fsuasmon_SPEC {
1648 type DataType = u32;
1649}
1650
1651#[doc = "Flash Startup Area Select Monitor Register"]
1652pub type Fsuasmon = crate::RegValueT<Fsuasmon_SPEC>;
1653
1654impl Fsuasmon {
1655 #[doc = "Protection Programming Flag to set Boot Flag and Startup Area Control"]
1656 #[inline(always)]
1657 pub fn fspr(
1658 self,
1659 ) -> crate::common::RegisterField<
1660 15,
1661 0x1,
1662 1,
1663 0,
1664 fsuasmon::Fspr,
1665 fsuasmon::Fspr,
1666 Fsuasmon_SPEC,
1667 crate::common::R,
1668 > {
1669 crate::common::RegisterField::<
1670 15,
1671 0x1,
1672 1,
1673 0,
1674 fsuasmon::Fspr,
1675 fsuasmon::Fspr,
1676 Fsuasmon_SPEC,
1677 crate::common::R,
1678 >::from_register(self, 0)
1679 }
1680
1681 #[doc = "Flag of Startup Area Select for Boot Swap"]
1682 #[inline(always)]
1683 pub fn btflg(
1684 self,
1685 ) -> crate::common::RegisterField<
1686 31,
1687 0x1,
1688 1,
1689 0,
1690 fsuasmon::Btflg,
1691 fsuasmon::Btflg,
1692 Fsuasmon_SPEC,
1693 crate::common::R,
1694 > {
1695 crate::common::RegisterField::<
1696 31,
1697 0x1,
1698 1,
1699 0,
1700 fsuasmon::Btflg,
1701 fsuasmon::Btflg,
1702 Fsuasmon_SPEC,
1703 crate::common::R,
1704 >::from_register(self, 0)
1705 }
1706}
1707impl ::core::default::Default for Fsuasmon {
1708 #[inline(always)]
1709 fn default() -> Fsuasmon {
1710 <crate::RegValueT<Fsuasmon_SPEC> as RegisterValue<_>>::new(0)
1711 }
1712}
1713pub mod fsuasmon {
1714
1715 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1716 pub struct Fspr_SPEC;
1717 pub type Fspr = crate::EnumBitfieldStruct<u8, Fspr_SPEC>;
1718 impl Fspr {
1719 #[doc = "Protected state"]
1720 pub const _0: Self = Self::new(0);
1721
1722 #[doc = "Non-protected state."]
1723 pub const _1: Self = Self::new(1);
1724 }
1725 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1726 pub struct Btflg_SPEC;
1727 pub type Btflg = crate::EnumBitfieldStruct<u8, Btflg_SPEC>;
1728 impl Btflg {
1729 #[doc = "The startup area is the alternate block (block 1)"]
1730 pub const _0: Self = Self::new(0);
1731
1732 #[doc = "The startup area is the default block (block 0)."]
1733 pub const _1: Self = Self::new(1);
1734 }
1735}
1736#[doc(hidden)]
1737#[derive(Copy, Clone, Eq, PartialEq)]
1738pub struct Fcpsr_SPEC;
1739impl crate::sealed::RegSpec for Fcpsr_SPEC {
1740 type DataType = u16;
1741}
1742
1743#[doc = "Flash Sequencer Processing Switching Register"]
1744pub type Fcpsr = crate::RegValueT<Fcpsr_SPEC>;
1745
1746impl Fcpsr {
1747 #[doc = "Erasure Suspend Mode"]
1748 #[inline(always)]
1749 pub fn esuspmd(
1750 self,
1751 ) -> crate::common::RegisterField<
1752 0,
1753 0x1,
1754 1,
1755 0,
1756 fcpsr::Esuspmd,
1757 fcpsr::Esuspmd,
1758 Fcpsr_SPEC,
1759 crate::common::RW,
1760 > {
1761 crate::common::RegisterField::<
1762 0,
1763 0x1,
1764 1,
1765 0,
1766 fcpsr::Esuspmd,
1767 fcpsr::Esuspmd,
1768 Fcpsr_SPEC,
1769 crate::common::RW,
1770 >::from_register(self, 0)
1771 }
1772}
1773impl ::core::default::Default for Fcpsr {
1774 #[inline(always)]
1775 fn default() -> Fcpsr {
1776 <crate::RegValueT<Fcpsr_SPEC> as RegisterValue<_>>::new(0)
1777 }
1778}
1779pub mod fcpsr {
1780
1781 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1782 pub struct Esuspmd_SPEC;
1783 pub type Esuspmd = crate::EnumBitfieldStruct<u8, Esuspmd_SPEC>;
1784 impl Esuspmd {
1785 #[doc = "Suspension priority mode"]
1786 pub const _0: Self = Self::new(0);
1787
1788 #[doc = "Erasure priority mode."]
1789 pub const _1: Self = Self::new(1);
1790 }
1791}
1792#[doc(hidden)]
1793#[derive(Copy, Clone, Eq, PartialEq)]
1794pub struct Fpckar_SPEC;
1795impl crate::sealed::RegSpec for Fpckar_SPEC {
1796 type DataType = u16;
1797}
1798
1799#[doc = "Flash Sequencer Processing Clock Notification Register"]
1800pub type Fpckar = crate::RegValueT<Fpckar_SPEC>;
1801
1802impl Fpckar {
1803 #[doc = "Flash Sequencer Operating Clock Notification"]
1804 #[inline(always)]
1805 pub fn pcka(
1806 self,
1807 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Fpckar_SPEC, crate::common::RW> {
1808 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Fpckar_SPEC,crate::common::RW>::from_register(self,0)
1809 }
1810
1811 #[doc = "Key Code"]
1812 #[inline(always)]
1813 pub fn key(
1814 self,
1815 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fpckar_SPEC, crate::common::W> {
1816 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fpckar_SPEC,crate::common::W>::from_register(self,0)
1817 }
1818}
1819impl ::core::default::Default for Fpckar {
1820 #[inline(always)]
1821 fn default() -> Fpckar {
1822 <crate::RegValueT<Fpckar_SPEC> as RegisterValue<_>>::new(50)
1823 }
1824}
1825
1826#[doc(hidden)]
1827#[derive(Copy, Clone, Eq, PartialEq)]
1828pub struct Fsuacr_SPEC;
1829impl crate::sealed::RegSpec for Fsuacr_SPEC {
1830 type DataType = u16;
1831}
1832
1833#[doc = "Flash Startup Area Control Register"]
1834pub type Fsuacr = crate::RegValueT<Fsuacr_SPEC>;
1835
1836impl Fsuacr {
1837 #[doc = "Startup Area Select"]
1838 #[inline(always)]
1839 pub fn sas(
1840 self,
1841 ) -> crate::common::RegisterField<
1842 0,
1843 0x3,
1844 1,
1845 0,
1846 fsuacr::Sas,
1847 fsuacr::Sas,
1848 Fsuacr_SPEC,
1849 crate::common::RW,
1850 > {
1851 crate::common::RegisterField::<
1852 0,
1853 0x3,
1854 1,
1855 0,
1856 fsuacr::Sas,
1857 fsuacr::Sas,
1858 Fsuacr_SPEC,
1859 crate::common::RW,
1860 >::from_register(self, 0)
1861 }
1862
1863 #[doc = "Key Code"]
1864 #[inline(always)]
1865 pub fn key(
1866 self,
1867 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Fsuacr_SPEC, crate::common::W> {
1868 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Fsuacr_SPEC,crate::common::W>::from_register(self,0)
1869 }
1870}
1871impl ::core::default::Default for Fsuacr {
1872 #[inline(always)]
1873 fn default() -> Fsuacr {
1874 <crate::RegValueT<Fsuacr_SPEC> as RegisterValue<_>>::new(0)
1875 }
1876}
1877pub mod fsuacr {
1878
1879 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1880 pub struct Sas_SPEC;
1881 pub type Sas = crate::EnumBitfieldStruct<u8, Sas_SPEC>;
1882 impl Sas {
1883 #[doc = "Startup area is selected by BTFLG bit"]
1884 pub const _00: Self = Self::new(0);
1885
1886 #[doc = "Startup area is selected by BTFLG bit"]
1887 pub const _01: Self = Self::new(1);
1888
1889 #[doc = "Startup area is temporarily switched to the default area (block 0)"]
1890 pub const _10: Self = Self::new(2);
1891
1892 #[doc = "Startup area is temporarily switched to the alternate area (block 1)."]
1893 pub const _11: Self = Self::new(3);
1894 }
1895}