ra4e1_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:04:18 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Slave Bus Control Register"]
38    #[inline(always)]
39    pub const fn busscntfhbiu(
40        &self,
41    ) -> &'static crate::common::Reg<self::Busscntfhbiu_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Busscntfhbiu_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4352usize),
45            )
46        }
47    }
48
49    #[doc = "Slave Bus Control Register"]
50    #[inline(always)]
51    pub const fn busscntflbiu(
52        &self,
53    ) -> &'static crate::common::Reg<self::Busscntflbiu_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Busscntflbiu_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4356usize),
57            )
58        }
59    }
60
61    #[doc = "Slave Bus Control Register"]
62    #[inline(always)]
63    pub const fn busscnts0biu(
64        &self,
65    ) -> &'static crate::common::Reg<self::Busscnts0Biu_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Busscnts0Biu_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(4368usize),
69            )
70        }
71    }
72
73    #[doc = "Slave Bus Control Register"]
74    #[inline(always)]
75    pub const fn busscntpsbiu(
76        &self,
77    ) -> &'static crate::common::Reg<self::Busscntpsbiu_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Busscntpsbiu_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4384usize),
81            )
82        }
83    }
84
85    #[doc = "Slave Bus Control Register"]
86    #[inline(always)]
87    pub const fn busscntplbiu(
88        &self,
89    ) -> &'static crate::common::Reg<self::Busscntplbiu_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Busscntplbiu_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(4400usize),
93            )
94        }
95    }
96
97    #[doc = "Slave Bus Control Register"]
98    #[inline(always)]
99    pub const fn busscntphbiu(
100        &self,
101    ) -> &'static crate::common::Reg<self::Busscntphbiu_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Busscntphbiu_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(4404usize),
105            )
106        }
107    }
108
109    #[doc = "Slave Bus Control Register"]
110    #[inline(always)]
111    pub const fn busscnteqbiu(
112        &self,
113    ) -> &'static crate::common::Reg<self::Busscnteqbiu_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Busscnteqbiu_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(4416usize),
117            )
118        }
119    }
120
121    #[doc = "BUS Error Address Register"]
122    #[inline(always)]
123    pub const fn buserradd(
124        &self,
125    ) -> &'static crate::common::ClusterRegisterArray<
126        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
127        3,
128        0x10,
129    > {
130        unsafe {
131            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1800usize))
132        }
133    }
134    #[inline(always)]
135    pub const fn bus1erradd(
136        &self,
137    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
138        unsafe {
139            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
140                self._svd2pac_as_ptr().add(0x1800usize),
141            )
142        }
143    }
144    #[inline(always)]
145    pub const fn bus2erradd(
146        &self,
147    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
148        unsafe {
149            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
150                self._svd2pac_as_ptr().add(0x1810usize),
151            )
152        }
153    }
154    #[inline(always)]
155    pub const fn bus3erradd(
156        &self,
157    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
158        unsafe {
159            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
160                self._svd2pac_as_ptr().add(0x1820usize),
161            )
162        }
163    }
164
165    #[doc = "BUS Error Read Write Register"]
166    #[inline(always)]
167    pub const fn buserrrw(
168        &self,
169    ) -> &'static crate::common::ClusterRegisterArray<
170        crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW>,
171        3,
172        0x10,
173    > {
174        unsafe {
175            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1804usize))
176        }
177    }
178    #[inline(always)]
179    pub const fn bus1errrw(
180        &self,
181    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
182        unsafe {
183            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
184                self._svd2pac_as_ptr().add(0x1804usize),
185            )
186        }
187    }
188    #[inline(always)]
189    pub const fn bus2errrw(
190        &self,
191    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(0x1814usize),
195            )
196        }
197    }
198    #[inline(always)]
199    pub const fn bus3errrw(
200        &self,
201    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(0x1824usize),
205            )
206        }
207    }
208
209    #[doc = "BUS TZF Error Address Register"]
210    #[inline(always)]
211    pub const fn btzferradd(
212        &self,
213    ) -> &'static crate::common::ClusterRegisterArray<
214        crate::common::Reg<self::Btzferradd_SPEC, crate::common::R>,
215        3,
216        0x10,
217    > {
218        unsafe {
219            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1900usize))
220        }
221    }
222    #[inline(always)]
223    pub const fn btzf1erradd(
224        &self,
225    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
226        unsafe {
227            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
228                self._svd2pac_as_ptr().add(0x1900usize),
229            )
230        }
231    }
232    #[inline(always)]
233    pub const fn btzf2erradd(
234        &self,
235    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
236        unsafe {
237            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
238                self._svd2pac_as_ptr().add(0x1910usize),
239            )
240        }
241    }
242    #[inline(always)]
243    pub const fn btzf3erradd(
244        &self,
245    ) -> &'static crate::common::Reg<self::Btzferradd_SPEC, crate::common::R> {
246        unsafe {
247            crate::common::Reg::<self::Btzferradd_SPEC, crate::common::R>::from_ptr(
248                self._svd2pac_as_ptr().add(0x1920usize),
249            )
250        }
251    }
252
253    #[doc = "BUS TZF Error Read Write Register"]
254    #[inline(always)]
255    pub const fn btzferrrw(
256        &self,
257    ) -> &'static crate::common::ClusterRegisterArray<
258        crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW>,
259        3,
260        0x10,
261    > {
262        unsafe {
263            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1904usize))
264        }
265    }
266    #[inline(always)]
267    pub const fn btzf1errrw(
268        &self,
269    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(0x1904usize),
273            )
274        }
275    }
276    #[inline(always)]
277    pub const fn btzf2errrw(
278        &self,
279    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(0x1914usize),
283            )
284        }
285    }
286    #[inline(always)]
287    pub const fn btzf3errrw(
288        &self,
289    ) -> &'static crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Btzferrrw_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(0x1924usize),
293            )
294        }
295    }
296
297    #[doc = "BUS Error Status Register %s"]
298    #[inline(always)]
299    pub const fn buserrstat(
300        &self,
301    ) -> &'static crate::common::ClusterRegisterArray<
302        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
303        3,
304        0x10,
305    > {
306        unsafe {
307            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a00usize))
308        }
309    }
310    #[inline(always)]
311    pub const fn bus1errstat(
312        &self,
313    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
314        unsafe {
315            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
316                self._svd2pac_as_ptr().add(0x1a00usize),
317            )
318        }
319    }
320    #[inline(always)]
321    pub const fn bus2errstat(
322        &self,
323    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
324        unsafe {
325            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
326                self._svd2pac_as_ptr().add(0x1a10usize),
327            )
328        }
329    }
330    #[inline(always)]
331    pub const fn bus3errstat(
332        &self,
333    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
334        unsafe {
335            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
336                self._svd2pac_as_ptr().add(0x1a20usize),
337            )
338        }
339    }
340
341    #[doc = "BUS Error Clear Register %s"]
342    #[inline(always)]
343    pub const fn buserrclr(
344        &self,
345    ) -> &'static crate::common::ClusterRegisterArray<
346        crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW>,
347        3,
348        0x10,
349    > {
350        unsafe {
351            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a08usize))
352        }
353    }
354    #[inline(always)]
355    pub const fn bus1errclr(
356        &self,
357    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
358        unsafe {
359            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
360                self._svd2pac_as_ptr().add(0x1a08usize),
361            )
362        }
363    }
364    #[inline(always)]
365    pub const fn bus2errclr(
366        &self,
367    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(0x1a18usize),
371            )
372        }
373    }
374    #[inline(always)]
375    pub const fn bus3errclr(
376        &self,
377    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(0x1a28usize),
381            )
382        }
383    }
384
385    #[doc = "DMAC/DTC Error Status Register"]
386    #[inline(always)]
387    pub const fn dmacdtcerrstat(
388        &self,
389    ) -> &'static crate::common::Reg<self::Dmacdtcerrstat_SPEC, crate::common::R> {
390        unsafe {
391            crate::common::Reg::<self::Dmacdtcerrstat_SPEC, crate::common::R>::from_ptr(
392                self._svd2pac_as_ptr().add(6692usize),
393            )
394        }
395    }
396
397    #[doc = "DMAC/DTC Error Clear Register"]
398    #[inline(always)]
399    pub const fn dmacdtcerrclr(
400        &self,
401    ) -> &'static crate::common::Reg<self::Dmacdtcerrclr_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Dmacdtcerrclr_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(6700usize),
405            )
406        }
407    }
408}
409#[doc(hidden)]
410#[derive(Copy, Clone, Eq, PartialEq)]
411pub struct Busscntfhbiu_SPEC;
412impl crate::sealed::RegSpec for Busscntfhbiu_SPEC {
413    type DataType = u16;
414}
415
416#[doc = "Slave Bus Control Register"]
417pub type Busscntfhbiu = crate::RegValueT<Busscntfhbiu_SPEC>;
418
419impl Busscntfhbiu {
420    #[doc = "Arbitration Select for two masters"]
421    #[inline(always)]
422    pub fn arbs(
423        self,
424    ) -> crate::common::RegisterField<
425        0,
426        0x3,
427        1,
428        0,
429        busscntfhbiu::Arbs,
430        busscntfhbiu::Arbs,
431        Busscntfhbiu_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            0,
436            0x3,
437            1,
438            0,
439            busscntfhbiu::Arbs,
440            busscntfhbiu::Arbs,
441            Busscntfhbiu_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445}
446impl ::core::default::Default for Busscntfhbiu {
447    #[inline(always)]
448    fn default() -> Busscntfhbiu {
449        <crate::RegValueT<Busscntfhbiu_SPEC> as RegisterValue<_>>::new(0)
450    }
451}
452pub mod busscntfhbiu {
453
454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
455    pub struct Arbs_SPEC;
456    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
457    impl Arbs {
458        #[doc = "DMAC/DTC > CPU"]
459        pub const _00: Self = Self::new(0);
460
461        #[doc = "DMAC/DTC ↔ CPU"]
462        pub const _01: Self = Self::new(1);
463
464        #[doc = "Setting prohibited"]
465        pub const _10: Self = Self::new(2);
466
467        #[doc = "Setting prohibited"]
468        pub const _11: Self = Self::new(3);
469    }
470}
471#[doc(hidden)]
472#[derive(Copy, Clone, Eq, PartialEq)]
473pub struct Busscntflbiu_SPEC;
474impl crate::sealed::RegSpec for Busscntflbiu_SPEC {
475    type DataType = u16;
476}
477
478#[doc = "Slave Bus Control Register"]
479pub type Busscntflbiu = crate::RegValueT<Busscntflbiu_SPEC>;
480
481impl Busscntflbiu {
482    #[doc = "Arbitration Select for two masters"]
483    #[inline(always)]
484    pub fn arbs(
485        self,
486    ) -> crate::common::RegisterField<
487        0,
488        0x3,
489        1,
490        0,
491        busscntflbiu::Arbs,
492        busscntflbiu::Arbs,
493        Busscntflbiu_SPEC,
494        crate::common::RW,
495    > {
496        crate::common::RegisterField::<
497            0,
498            0x3,
499            1,
500            0,
501            busscntflbiu::Arbs,
502            busscntflbiu::Arbs,
503            Busscntflbiu_SPEC,
504            crate::common::RW,
505        >::from_register(self, 0)
506    }
507}
508impl ::core::default::Default for Busscntflbiu {
509    #[inline(always)]
510    fn default() -> Busscntflbiu {
511        <crate::RegValueT<Busscntflbiu_SPEC> as RegisterValue<_>>::new(0)
512    }
513}
514pub mod busscntflbiu {
515
516    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
517    pub struct Arbs_SPEC;
518    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
519    impl Arbs {
520        #[doc = "DMAC/DTC > CPU"]
521        pub const _00: Self = Self::new(0);
522
523        #[doc = "DMAC/DTC ↔ CPU"]
524        pub const _01: Self = Self::new(1);
525
526        #[doc = "Setting prohibited"]
527        pub const _10: Self = Self::new(2);
528
529        #[doc = "Setting prohibited"]
530        pub const _11: Self = Self::new(3);
531    }
532}
533#[doc(hidden)]
534#[derive(Copy, Clone, Eq, PartialEq)]
535pub struct Busscnts0Biu_SPEC;
536impl crate::sealed::RegSpec for Busscnts0Biu_SPEC {
537    type DataType = u16;
538}
539
540#[doc = "Slave Bus Control Register"]
541pub type Busscnts0Biu = crate::RegValueT<Busscnts0Biu_SPEC>;
542
543impl Busscnts0Biu {
544    #[doc = "Arbitration Select for two masters"]
545    #[inline(always)]
546    pub fn arbs(
547        self,
548    ) -> crate::common::RegisterField<
549        0,
550        0x3,
551        1,
552        0,
553        busscnts0biu::Arbs,
554        busscnts0biu::Arbs,
555        Busscnts0Biu_SPEC,
556        crate::common::RW,
557    > {
558        crate::common::RegisterField::<
559            0,
560            0x3,
561            1,
562            0,
563            busscnts0biu::Arbs,
564            busscnts0biu::Arbs,
565            Busscnts0Biu_SPEC,
566            crate::common::RW,
567        >::from_register(self, 0)
568    }
569}
570impl ::core::default::Default for Busscnts0Biu {
571    #[inline(always)]
572    fn default() -> Busscnts0Biu {
573        <crate::RegValueT<Busscnts0Biu_SPEC> as RegisterValue<_>>::new(0)
574    }
575}
576pub mod busscnts0biu {
577
578    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
579    pub struct Arbs_SPEC;
580    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
581    impl Arbs {
582        #[doc = "DMAC/DTC > CPU"]
583        pub const _00: Self = Self::new(0);
584
585        #[doc = "DMAC/DTC ↔ CPU"]
586        pub const _01: Self = Self::new(1);
587
588        #[doc = "Setting prohibited"]
589        pub const _10: Self = Self::new(2);
590
591        #[doc = "Setting prohibited"]
592        pub const _11: Self = Self::new(3);
593    }
594}
595#[doc(hidden)]
596#[derive(Copy, Clone, Eq, PartialEq)]
597pub struct Busscntpsbiu_SPEC;
598impl crate::sealed::RegSpec for Busscntpsbiu_SPEC {
599    type DataType = u16;
600}
601
602#[doc = "Slave Bus Control Register"]
603pub type Busscntpsbiu = crate::RegValueT<Busscntpsbiu_SPEC>;
604
605impl Busscntpsbiu {
606    #[doc = "Arbitration Select for two masters"]
607    #[inline(always)]
608    pub fn arbs(
609        self,
610    ) -> crate::common::RegisterField<
611        0,
612        0x1,
613        1,
614        0,
615        busscntpsbiu::Arbs,
616        busscntpsbiu::Arbs,
617        Busscntpsbiu_SPEC,
618        crate::common::RW,
619    > {
620        crate::common::RegisterField::<
621            0,
622            0x1,
623            1,
624            0,
625            busscntpsbiu::Arbs,
626            busscntpsbiu::Arbs,
627            Busscntpsbiu_SPEC,
628            crate::common::RW,
629        >::from_register(self, 0)
630    }
631}
632impl ::core::default::Default for Busscntpsbiu {
633    #[inline(always)]
634    fn default() -> Busscntpsbiu {
635        <crate::RegValueT<Busscntpsbiu_SPEC> as RegisterValue<_>>::new(0)
636    }
637}
638pub mod busscntpsbiu {
639
640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
641    pub struct Arbs_SPEC;
642    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
643    impl Arbs {
644        #[doc = "DMAC/DTC > CPU"]
645        pub const _0: Self = Self::new(0);
646
647        #[doc = "DMAC/DTC ↔ CPU"]
648        pub const _1: Self = Self::new(1);
649    }
650}
651#[doc(hidden)]
652#[derive(Copy, Clone, Eq, PartialEq)]
653pub struct Busscntplbiu_SPEC;
654impl crate::sealed::RegSpec for Busscntplbiu_SPEC {
655    type DataType = u16;
656}
657
658#[doc = "Slave Bus Control Register"]
659pub type Busscntplbiu = crate::RegValueT<Busscntplbiu_SPEC>;
660
661impl Busscntplbiu {
662    #[doc = "Arbitration Select for two masters"]
663    #[inline(always)]
664    pub fn arbs(
665        self,
666    ) -> crate::common::RegisterField<
667        0,
668        0x1,
669        1,
670        0,
671        busscntplbiu::Arbs,
672        busscntplbiu::Arbs,
673        Busscntplbiu_SPEC,
674        crate::common::RW,
675    > {
676        crate::common::RegisterField::<
677            0,
678            0x1,
679            1,
680            0,
681            busscntplbiu::Arbs,
682            busscntplbiu::Arbs,
683            Busscntplbiu_SPEC,
684            crate::common::RW,
685        >::from_register(self, 0)
686    }
687}
688impl ::core::default::Default for Busscntplbiu {
689    #[inline(always)]
690    fn default() -> Busscntplbiu {
691        <crate::RegValueT<Busscntplbiu_SPEC> as RegisterValue<_>>::new(0)
692    }
693}
694pub mod busscntplbiu {
695
696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
697    pub struct Arbs_SPEC;
698    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
699    impl Arbs {
700        #[doc = "DMAC/DTC > CPU"]
701        pub const _0: Self = Self::new(0);
702
703        #[doc = "DMAC/DTC ↔ CPU"]
704        pub const _1: Self = Self::new(1);
705    }
706}
707#[doc(hidden)]
708#[derive(Copy, Clone, Eq, PartialEq)]
709pub struct Busscntphbiu_SPEC;
710impl crate::sealed::RegSpec for Busscntphbiu_SPEC {
711    type DataType = u16;
712}
713
714#[doc = "Slave Bus Control Register"]
715pub type Busscntphbiu = crate::RegValueT<Busscntphbiu_SPEC>;
716
717impl Busscntphbiu {
718    #[doc = "Arbitration Select for two masters"]
719    #[inline(always)]
720    pub fn arbs(
721        self,
722    ) -> crate::common::RegisterField<
723        0,
724        0x1,
725        1,
726        0,
727        busscntphbiu::Arbs,
728        busscntphbiu::Arbs,
729        Busscntphbiu_SPEC,
730        crate::common::RW,
731    > {
732        crate::common::RegisterField::<
733            0,
734            0x1,
735            1,
736            0,
737            busscntphbiu::Arbs,
738            busscntphbiu::Arbs,
739            Busscntphbiu_SPEC,
740            crate::common::RW,
741        >::from_register(self, 0)
742    }
743}
744impl ::core::default::Default for Busscntphbiu {
745    #[inline(always)]
746    fn default() -> Busscntphbiu {
747        <crate::RegValueT<Busscntphbiu_SPEC> as RegisterValue<_>>::new(0)
748    }
749}
750pub mod busscntphbiu {
751
752    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
753    pub struct Arbs_SPEC;
754    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
755    impl Arbs {
756        #[doc = "DMAC/DTC > CPU"]
757        pub const _0: Self = Self::new(0);
758
759        #[doc = "DMAC/DTC ↔ CPU"]
760        pub const _1: Self = Self::new(1);
761    }
762}
763#[doc(hidden)]
764#[derive(Copy, Clone, Eq, PartialEq)]
765pub struct Busscnteqbiu_SPEC;
766impl crate::sealed::RegSpec for Busscnteqbiu_SPEC {
767    type DataType = u16;
768}
769
770#[doc = "Slave Bus Control Register"]
771pub type Busscnteqbiu = crate::RegValueT<Busscnteqbiu_SPEC>;
772
773impl Busscnteqbiu {
774    #[doc = "Arbitration Select for two masters"]
775    #[inline(always)]
776    pub fn arbs(
777        self,
778    ) -> crate::common::RegisterField<
779        0,
780        0x3,
781        1,
782        0,
783        busscnteqbiu::Arbs,
784        busscnteqbiu::Arbs,
785        Busscnteqbiu_SPEC,
786        crate::common::RW,
787    > {
788        crate::common::RegisterField::<
789            0,
790            0x3,
791            1,
792            0,
793            busscnteqbiu::Arbs,
794            busscnteqbiu::Arbs,
795            Busscnteqbiu_SPEC,
796            crate::common::RW,
797        >::from_register(self, 0)
798    }
799}
800impl ::core::default::Default for Busscnteqbiu {
801    #[inline(always)]
802    fn default() -> Busscnteqbiu {
803        <crate::RegValueT<Busscnteqbiu_SPEC> as RegisterValue<_>>::new(0)
804    }
805}
806pub mod busscnteqbiu {
807
808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
809    pub struct Arbs_SPEC;
810    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
811    impl Arbs {
812        #[doc = "DMAC/DTC > CPU"]
813        pub const _00: Self = Self::new(0);
814
815        #[doc = "DMAC/DTC ↔ CPU"]
816        pub const _01: Self = Self::new(1);
817
818        #[doc = "Setting prohibited"]
819        pub const _10: Self = Self::new(2);
820
821        #[doc = "Setting prohibited"]
822        pub const _11: Self = Self::new(3);
823    }
824}
825#[doc(hidden)]
826#[derive(Copy, Clone, Eq, PartialEq)]
827pub struct Buserradd_SPEC;
828impl crate::sealed::RegSpec for Buserradd_SPEC {
829    type DataType = u32;
830}
831
832#[doc = "BUS Error Address Register"]
833pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
834
835impl Buserradd {
836    #[doc = "Bus Error Address"]
837    #[inline(always)]
838    pub fn berad(
839        self,
840    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
841    {
842        crate::common::RegisterField::<
843            0,
844            0xffffffff,
845            1,
846            0,
847            u32,
848            u32,
849            Buserradd_SPEC,
850            crate::common::R,
851        >::from_register(self, 0)
852    }
853}
854impl ::core::default::Default for Buserradd {
855    #[inline(always)]
856    fn default() -> Buserradd {
857        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
858    }
859}
860
861#[doc(hidden)]
862#[derive(Copy, Clone, Eq, PartialEq)]
863pub struct Buserrrw_SPEC;
864impl crate::sealed::RegSpec for Buserrrw_SPEC {
865    type DataType = u8;
866}
867
868#[doc = "BUS Error Read Write Register"]
869pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
870
871impl Buserrrw {
872    #[doc = "Error Access Read/Write Status"]
873    #[inline(always)]
874    pub fn rwstat(
875        self,
876    ) -> crate::common::RegisterField<
877        0,
878        0x1,
879        1,
880        0,
881        buserrrw::Rwstat,
882        buserrrw::Rwstat,
883        Buserrrw_SPEC,
884        crate::common::R,
885    > {
886        crate::common::RegisterField::<
887            0,
888            0x1,
889            1,
890            0,
891            buserrrw::Rwstat,
892            buserrrw::Rwstat,
893            Buserrrw_SPEC,
894            crate::common::R,
895        >::from_register(self, 0)
896    }
897}
898impl ::core::default::Default for Buserrrw {
899    #[inline(always)]
900    fn default() -> Buserrrw {
901        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
902    }
903}
904pub mod buserrrw {
905
906    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
907    pub struct Rwstat_SPEC;
908    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
909    impl Rwstat {
910        #[doc = "Read access"]
911        pub const _0: Self = Self::new(0);
912
913        #[doc = "Write access"]
914        pub const _1: Self = Self::new(1);
915    }
916}
917#[doc(hidden)]
918#[derive(Copy, Clone, Eq, PartialEq)]
919pub struct Btzferradd_SPEC;
920impl crate::sealed::RegSpec for Btzferradd_SPEC {
921    type DataType = u32;
922}
923
924#[doc = "BUS TZF Error Address Register"]
925pub type Btzferradd = crate::RegValueT<Btzferradd_SPEC>;
926
927impl Btzferradd {
928    #[doc = "Bus TrustZone Filter Error Address"]
929    #[inline(always)]
930    pub fn btzferad(
931        self,
932    ) -> crate::common::RegisterField<
933        0,
934        0xffffffff,
935        1,
936        0,
937        u32,
938        u32,
939        Btzferradd_SPEC,
940        crate::common::R,
941    > {
942        crate::common::RegisterField::<
943            0,
944            0xffffffff,
945            1,
946            0,
947            u32,
948            u32,
949            Btzferradd_SPEC,
950            crate::common::R,
951        >::from_register(self, 0)
952    }
953}
954impl ::core::default::Default for Btzferradd {
955    #[inline(always)]
956    fn default() -> Btzferradd {
957        <crate::RegValueT<Btzferradd_SPEC> as RegisterValue<_>>::new(0)
958    }
959}
960
961#[doc(hidden)]
962#[derive(Copy, Clone, Eq, PartialEq)]
963pub struct Btzferrrw_SPEC;
964impl crate::sealed::RegSpec for Btzferrrw_SPEC {
965    type DataType = u8;
966}
967
968#[doc = "BUS TZF Error Read Write Register"]
969pub type Btzferrrw = crate::RegValueT<Btzferrrw_SPEC>;
970
971impl Btzferrrw {
972    #[doc = "TrustZone filter error access Read/Write Status"]
973    #[inline(always)]
974    pub fn trwstat(
975        self,
976    ) -> crate::common::RegisterField<
977        0,
978        0x1,
979        1,
980        0,
981        btzferrrw::Trwstat,
982        btzferrrw::Trwstat,
983        Btzferrrw_SPEC,
984        crate::common::R,
985    > {
986        crate::common::RegisterField::<
987            0,
988            0x1,
989            1,
990            0,
991            btzferrrw::Trwstat,
992            btzferrrw::Trwstat,
993            Btzferrrw_SPEC,
994            crate::common::R,
995        >::from_register(self, 0)
996    }
997}
998impl ::core::default::Default for Btzferrrw {
999    #[inline(always)]
1000    fn default() -> Btzferrrw {
1001        <crate::RegValueT<Btzferrrw_SPEC> as RegisterValue<_>>::new(0)
1002    }
1003}
1004pub mod btzferrrw {
1005
1006    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1007    pub struct Trwstat_SPEC;
1008    pub type Trwstat = crate::EnumBitfieldStruct<u8, Trwstat_SPEC>;
1009    impl Trwstat {
1010        #[doc = "Read access"]
1011        pub const _0: Self = Self::new(0);
1012
1013        #[doc = "Write access"]
1014        pub const _1: Self = Self::new(1);
1015    }
1016}
1017#[doc(hidden)]
1018#[derive(Copy, Clone, Eq, PartialEq)]
1019pub struct Buserrstat_SPEC;
1020impl crate::sealed::RegSpec for Buserrstat_SPEC {
1021    type DataType = u8;
1022}
1023
1024#[doc = "BUS Error Status Register %s"]
1025pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
1026
1027impl Buserrstat {
1028    #[doc = "Slave bus Error Status"]
1029    #[inline(always)]
1030    pub fn slerrstat(
1031        self,
1032    ) -> crate::common::RegisterField<
1033        0,
1034        0x1,
1035        1,
1036        0,
1037        buserrstat::Slerrstat,
1038        buserrstat::Slerrstat,
1039        Buserrstat_SPEC,
1040        crate::common::R,
1041    > {
1042        crate::common::RegisterField::<
1043            0,
1044            0x1,
1045            1,
1046            0,
1047            buserrstat::Slerrstat,
1048            buserrstat::Slerrstat,
1049            Buserrstat_SPEC,
1050            crate::common::R,
1051        >::from_register(self, 0)
1052    }
1053
1054    #[doc = "Slave TrustZone filter Error Status"]
1055    #[inline(always)]
1056    pub fn sterrstat(
1057        self,
1058    ) -> crate::common::RegisterField<
1059        1,
1060        0x1,
1061        1,
1062        0,
1063        buserrstat::Sterrstat,
1064        buserrstat::Sterrstat,
1065        Buserrstat_SPEC,
1066        crate::common::R,
1067    > {
1068        crate::common::RegisterField::<
1069            1,
1070            0x1,
1071            1,
1072            0,
1073            buserrstat::Sterrstat,
1074            buserrstat::Sterrstat,
1075            Buserrstat_SPEC,
1076            crate::common::R,
1077        >::from_register(self, 0)
1078    }
1079
1080    #[doc = "Master MPU Error Status"]
1081    #[inline(always)]
1082    pub fn mmerrstat(
1083        self,
1084    ) -> crate::common::RegisterField<
1085        3,
1086        0x1,
1087        1,
1088        0,
1089        buserrstat::Mmerrstat,
1090        buserrstat::Mmerrstat,
1091        Buserrstat_SPEC,
1092        crate::common::R,
1093    > {
1094        crate::common::RegisterField::<
1095            3,
1096            0x1,
1097            1,
1098            0,
1099            buserrstat::Mmerrstat,
1100            buserrstat::Mmerrstat,
1101            Buserrstat_SPEC,
1102            crate::common::R,
1103        >::from_register(self, 0)
1104    }
1105
1106    #[doc = "Illegal address access Error Status"]
1107    #[inline(always)]
1108    pub fn ilerrstat(
1109        self,
1110    ) -> crate::common::RegisterField<
1111        4,
1112        0x1,
1113        1,
1114        0,
1115        buserrstat::Ilerrstat,
1116        buserrstat::Ilerrstat,
1117        Buserrstat_SPEC,
1118        crate::common::R,
1119    > {
1120        crate::common::RegisterField::<
1121            4,
1122            0x1,
1123            1,
1124            0,
1125            buserrstat::Ilerrstat,
1126            buserrstat::Ilerrstat,
1127            Buserrstat_SPEC,
1128            crate::common::R,
1129        >::from_register(self, 0)
1130    }
1131}
1132impl ::core::default::Default for Buserrstat {
1133    #[inline(always)]
1134    fn default() -> Buserrstat {
1135        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
1136    }
1137}
1138pub mod buserrstat {
1139
1140    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1141    pub struct Slerrstat_SPEC;
1142    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
1143    impl Slerrstat {
1144        #[doc = "No error occurred"]
1145        pub const _0: Self = Self::new(0);
1146
1147        #[doc = "Error occurred"]
1148        pub const _1: Self = Self::new(1);
1149    }
1150    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1151    pub struct Sterrstat_SPEC;
1152    pub type Sterrstat = crate::EnumBitfieldStruct<u8, Sterrstat_SPEC>;
1153    impl Sterrstat {
1154        #[doc = "No error occurred"]
1155        pub const _0: Self = Self::new(0);
1156
1157        #[doc = "Error occurred"]
1158        pub const _1: Self = Self::new(1);
1159    }
1160    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1161    pub struct Mmerrstat_SPEC;
1162    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
1163    impl Mmerrstat {
1164        #[doc = "No error occurred"]
1165        pub const _0: Self = Self::new(0);
1166
1167        #[doc = "Error occurred"]
1168        pub const _1: Self = Self::new(1);
1169    }
1170    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1171    pub struct Ilerrstat_SPEC;
1172    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
1173    impl Ilerrstat {
1174        #[doc = "No error occurred"]
1175        pub const _0: Self = Self::new(0);
1176
1177        #[doc = "Error occurred"]
1178        pub const _1: Self = Self::new(1);
1179    }
1180}
1181#[doc(hidden)]
1182#[derive(Copy, Clone, Eq, PartialEq)]
1183pub struct Buserrclr_SPEC;
1184impl crate::sealed::RegSpec for Buserrclr_SPEC {
1185    type DataType = u8;
1186}
1187
1188#[doc = "BUS Error Clear Register %s"]
1189pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
1190
1191impl Buserrclr {
1192    #[doc = "Slave bus Error Clear"]
1193    #[inline(always)]
1194    pub fn slerrclr(
1195        self,
1196    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1197        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1198    }
1199
1200    #[doc = "Slave TrustZone filter Error Clear"]
1201    #[inline(always)]
1202    pub fn sterrclr(
1203        self,
1204    ) -> crate::common::RegisterFieldBool<1, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1205        crate::common::RegisterFieldBool::<1,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1206    }
1207
1208    #[doc = "Master MPU Error Clear"]
1209    #[inline(always)]
1210    pub fn mmerrclr(
1211        self,
1212    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1213        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1214    }
1215
1216    #[doc = "Illegal Address Access Error Clear"]
1217    #[inline(always)]
1218    pub fn ilerrclr(
1219        self,
1220    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
1221        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
1222    }
1223}
1224impl ::core::default::Default for Buserrclr {
1225    #[inline(always)]
1226    fn default() -> Buserrclr {
1227        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
1228    }
1229}
1230
1231#[doc(hidden)]
1232#[derive(Copy, Clone, Eq, PartialEq)]
1233pub struct Dmacdtcerrstat_SPEC;
1234impl crate::sealed::RegSpec for Dmacdtcerrstat_SPEC {
1235    type DataType = u8;
1236}
1237
1238#[doc = "DMAC/DTC Error Status Register"]
1239pub type Dmacdtcerrstat = crate::RegValueT<Dmacdtcerrstat_SPEC>;
1240
1241impl Dmacdtcerrstat {
1242    #[doc = "Master TrustZone Filter Error Status"]
1243    #[inline(always)]
1244    pub fn mterrstat(
1245        self,
1246    ) -> crate::common::RegisterField<
1247        0,
1248        0x1,
1249        1,
1250        0,
1251        dmacdtcerrstat::Mterrstat,
1252        dmacdtcerrstat::Mterrstat,
1253        Dmacdtcerrstat_SPEC,
1254        crate::common::R,
1255    > {
1256        crate::common::RegisterField::<
1257            0,
1258            0x1,
1259            1,
1260            0,
1261            dmacdtcerrstat::Mterrstat,
1262            dmacdtcerrstat::Mterrstat,
1263            Dmacdtcerrstat_SPEC,
1264            crate::common::R,
1265        >::from_register(self, 0)
1266    }
1267}
1268impl ::core::default::Default for Dmacdtcerrstat {
1269    #[inline(always)]
1270    fn default() -> Dmacdtcerrstat {
1271        <crate::RegValueT<Dmacdtcerrstat_SPEC> as RegisterValue<_>>::new(0)
1272    }
1273}
1274pub mod dmacdtcerrstat {
1275
1276    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1277    pub struct Mterrstat_SPEC;
1278    pub type Mterrstat = crate::EnumBitfieldStruct<u8, Mterrstat_SPEC>;
1279    impl Mterrstat {
1280        #[doc = "No error occurred"]
1281        pub const _0: Self = Self::new(0);
1282
1283        #[doc = "Error occurred"]
1284        pub const _1: Self = Self::new(1);
1285    }
1286}
1287#[doc(hidden)]
1288#[derive(Copy, Clone, Eq, PartialEq)]
1289pub struct Dmacdtcerrclr_SPEC;
1290impl crate::sealed::RegSpec for Dmacdtcerrclr_SPEC {
1291    type DataType = u8;
1292}
1293
1294#[doc = "DMAC/DTC Error Clear Register"]
1295pub type Dmacdtcerrclr = crate::RegValueT<Dmacdtcerrclr_SPEC>;
1296
1297impl Dmacdtcerrclr {
1298    #[doc = "Master TrustZone filter Error Clear"]
1299    #[inline(always)]
1300    pub fn mterrclr(
1301        self,
1302    ) -> crate::common::RegisterFieldBool<0, 1, 0, Dmacdtcerrclr_SPEC, crate::common::RW> {
1303        crate::common::RegisterFieldBool::<0,1,0,Dmacdtcerrclr_SPEC,crate::common::RW>::from_register(self,0)
1304    }
1305}
1306impl ::core::default::Default for Dmacdtcerrclr {
1307    #[inline(always)]
1308    fn default() -> Dmacdtcerrclr {
1309        <crate::RegValueT<Dmacdtcerrclr_SPEC> as RegisterValue<_>>::new(0)
1310    }
1311}
ra4e1_pac/bus.rs

ra4e1_pac/
bus.rs
