ra2l1/agt0/
agtmr2.rs

1#[doc = "Register `AGTMR2` reader"]
2pub struct R(crate::R<AGTMR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AGTMR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AGTMR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AGTMR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `AGTMR2` writer"]
17pub struct W(crate::W<AGTMR2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AGTMR2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AGTMR2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AGTMR2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CKS` reader - AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio"]
38pub type CKS_R = crate::FieldReader<u8, CKS_A>;
39#[doc = "AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CKS_A {
43    #[doc = "0: 1/1"]
44    _000 = 0,
45    #[doc = "1: 1/2"]
46    _001 = 1,
47    #[doc = "2: 1/4"]
48    _010 = 2,
49    #[doc = "3: 1/8"]
50    _011 = 3,
51    #[doc = "4: 1/16"]
52    _100 = 4,
53    #[doc = "5: 1/32"]
54    _101 = 5,
55    #[doc = "6: 1/64"]
56    _110 = 6,
57    #[doc = "7: 1/128"]
58    _111 = 7,
59}
60impl From<CKS_A> for u8 {
61    #[inline(always)]
62    fn from(variant: CKS_A) -> Self {
63        variant as _
64    }
65}
66impl CKS_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> CKS_A {
70        match self.bits {
71            0 => CKS_A::_000,
72            1 => CKS_A::_001,
73            2 => CKS_A::_010,
74            3 => CKS_A::_011,
75            4 => CKS_A::_100,
76            5 => CKS_A::_101,
77            6 => CKS_A::_110,
78            7 => CKS_A::_111,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `_000`"]
83    #[inline(always)]
84    pub fn is_000(&self) -> bool {
85        *self == CKS_A::_000
86    }
87    #[doc = "Checks if the value of the field is `_001`"]
88    #[inline(always)]
89    pub fn is_001(&self) -> bool {
90        *self == CKS_A::_001
91    }
92    #[doc = "Checks if the value of the field is `_010`"]
93    #[inline(always)]
94    pub fn is_010(&self) -> bool {
95        *self == CKS_A::_010
96    }
97    #[doc = "Checks if the value of the field is `_011`"]
98    #[inline(always)]
99    pub fn is_011(&self) -> bool {
100        *self == CKS_A::_011
101    }
102    #[doc = "Checks if the value of the field is `_100`"]
103    #[inline(always)]
104    pub fn is_100(&self) -> bool {
105        *self == CKS_A::_100
106    }
107    #[doc = "Checks if the value of the field is `_101`"]
108    #[inline(always)]
109    pub fn is_101(&self) -> bool {
110        *self == CKS_A::_101
111    }
112    #[doc = "Checks if the value of the field is `_110`"]
113    #[inline(always)]
114    pub fn is_110(&self) -> bool {
115        *self == CKS_A::_110
116    }
117    #[doc = "Checks if the value of the field is `_111`"]
118    #[inline(always)]
119    pub fn is_111(&self) -> bool {
120        *self == CKS_A::_111
121    }
122}
123#[doc = "Field `CKS` writer - AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio"]
124pub type CKS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, AGTMR2_SPEC, u8, CKS_A, 3, O>;
125impl<'a, const O: u8> CKS_W<'a, O> {
126    #[doc = "1/1"]
127    #[inline(always)]
128    pub fn _000(self) -> &'a mut W {
129        self.variant(CKS_A::_000)
130    }
131    #[doc = "1/2"]
132    #[inline(always)]
133    pub fn _001(self) -> &'a mut W {
134        self.variant(CKS_A::_001)
135    }
136    #[doc = "1/4"]
137    #[inline(always)]
138    pub fn _010(self) -> &'a mut W {
139        self.variant(CKS_A::_010)
140    }
141    #[doc = "1/8"]
142    #[inline(always)]
143    pub fn _011(self) -> &'a mut W {
144        self.variant(CKS_A::_011)
145    }
146    #[doc = "1/16"]
147    #[inline(always)]
148    pub fn _100(self) -> &'a mut W {
149        self.variant(CKS_A::_100)
150    }
151    #[doc = "1/32"]
152    #[inline(always)]
153    pub fn _101(self) -> &'a mut W {
154        self.variant(CKS_A::_101)
155    }
156    #[doc = "1/64"]
157    #[inline(always)]
158    pub fn _110(self) -> &'a mut W {
159        self.variant(CKS_A::_110)
160    }
161    #[doc = "1/128"]
162    #[inline(always)]
163    pub fn _111(self) -> &'a mut W {
164        self.variant(CKS_A::_111)
165    }
166}
167#[doc = "Field `LPM` reader - Low Power Mode"]
168pub type LPM_R = crate::BitReader<LPM_A>;
169#[doc = "Low Power Mode\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171pub enum LPM_A {
172    #[doc = "0: Normal mode"]
173    _0 = 0,
174    #[doc = "1: Low power mode"]
175    _1 = 1,
176}
177impl From<LPM_A> for bool {
178    #[inline(always)]
179    fn from(variant: LPM_A) -> Self {
180        variant as u8 != 0
181    }
182}
183impl LPM_R {
184    #[doc = "Get enumerated values variant"]
185    #[inline(always)]
186    pub fn variant(&self) -> LPM_A {
187        match self.bits {
188            false => LPM_A::_0,
189            true => LPM_A::_1,
190        }
191    }
192    #[doc = "Checks if the value of the field is `_0`"]
193    #[inline(always)]
194    pub fn is_0(&self) -> bool {
195        *self == LPM_A::_0
196    }
197    #[doc = "Checks if the value of the field is `_1`"]
198    #[inline(always)]
199    pub fn is_1(&self) -> bool {
200        *self == LPM_A::_1
201    }
202}
203#[doc = "Field `LPM` writer - Low Power Mode"]
204pub type LPM_W<'a, const O: u8> = crate::BitWriter<'a, u8, AGTMR2_SPEC, LPM_A, O>;
205impl<'a, const O: u8> LPM_W<'a, O> {
206    #[doc = "Normal mode"]
207    #[inline(always)]
208    pub fn _0(self) -> &'a mut W {
209        self.variant(LPM_A::_0)
210    }
211    #[doc = "Low power mode"]
212    #[inline(always)]
213    pub fn _1(self) -> &'a mut W {
214        self.variant(LPM_A::_1)
215    }
216}
217impl R {
218    #[doc = "Bits 0:2 - AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio"]
219    #[inline(always)]
220    pub fn cks(&self) -> CKS_R {
221        CKS_R::new(self.bits & 7)
222    }
223    #[doc = "Bit 7 - Low Power Mode"]
224    #[inline(always)]
225    pub fn lpm(&self) -> LPM_R {
226        LPM_R::new(((self.bits >> 7) & 1) != 0)
227    }
228}
229impl W {
230    #[doc = "Bits 0:2 - AGTLCLK or AGTSCLK Count Source Clock Frequency Division Ratio"]
231    #[inline(always)]
232    #[must_use]
233    pub fn cks(&mut self) -> CKS_W<0> {
234        CKS_W::new(self)
235    }
236    #[doc = "Bit 7 - Low Power Mode"]
237    #[inline(always)]
238    #[must_use]
239    pub fn lpm(&mut self) -> LPM_W<7> {
240        LPM_W::new(self)
241    }
242    #[doc = "Writes raw bits to the register."]
243    #[inline(always)]
244    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
245        self.0.bits(bits);
246        self
247    }
248}
249#[doc = "AGT Mode Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [agtmr2](index.html) module"]
250pub struct AGTMR2_SPEC;
251impl crate::RegisterSpec for AGTMR2_SPEC {
252    type Ux = u8;
253}
254#[doc = "`read()` method returns [agtmr2::R](R) reader structure"]
255impl crate::Readable for AGTMR2_SPEC {
256    type Reader = R;
257}
258#[doc = "`write(|w| ..)` method takes [agtmr2::W](W) writer structure"]
259impl crate::Writable for AGTMR2_SPEC {
260    type Writer = W;
261    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
262    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
263}
264#[doc = "`reset()` method sets AGTMR2 to value 0"]
265impl crate::Resettable for AGTMR2_SPEC {
266    const RESET_VALUE: Self::Ux = 0;
267}
ra2l1/agt0/agtmr2.rs

ra2l1/agt0/
agtmr2.rs
