1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SPI Control Register"]
38 #[inline(always)]
39 pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SPI Slave Select Polarity Register"]
48 #[inline(always)]
49 pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(1usize),
53 )
54 }
55 }
56
57 #[doc = "SPI Pin Control Register"]
58 #[inline(always)]
59 pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(2usize),
63 )
64 }
65 }
66
67 #[doc = "SPI Status Register"]
68 #[inline(always)]
69 pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(3usize),
73 )
74 }
75 }
76
77 #[doc = "SPI Data Register"]
78 #[inline(always)]
79 pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(4usize),
83 )
84 }
85 }
86
87 #[doc = "SPI Data Register"]
88 #[inline(always)]
89 pub const fn spdr_ha(
90 &self,
91 ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(4usize),
95 )
96 }
97 }
98
99 #[doc = "SPI Data Register"]
100 #[inline(always)]
101 pub const fn spdr_by(
102 &self,
103 ) -> &'static crate::common::Reg<self::SpdrBy_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::SpdrBy_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(4usize),
107 )
108 }
109 }
110
111 #[doc = "SPI Bit Rate Register"]
112 #[inline(always)]
113 pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(10usize),
117 )
118 }
119 }
120
121 #[doc = "SPI Data Control Register"]
122 #[inline(always)]
123 pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(11usize),
127 )
128 }
129 }
130
131 #[doc = "SPI Clock Delay Register"]
132 #[inline(always)]
133 pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(12usize),
137 )
138 }
139 }
140
141 #[doc = "SPI Slave Select Negation Delay Register"]
142 #[inline(always)]
143 pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
144 unsafe {
145 crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
146 self._svd2pac_as_ptr().add(13usize),
147 )
148 }
149 }
150
151 #[doc = "SPI Next-Access Delay Register"]
152 #[inline(always)]
153 pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
154 unsafe {
155 crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
156 self._svd2pac_as_ptr().add(14usize),
157 )
158 }
159 }
160
161 #[doc = "SPI Control Register 2"]
162 #[inline(always)]
163 pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
164 unsafe {
165 crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
166 self._svd2pac_as_ptr().add(15usize),
167 )
168 }
169 }
170
171 #[doc = "SPI Command Register 0"]
172 #[inline(always)]
173 pub const fn spcmd0(
174 &self,
175 ) -> &'static crate::common::Reg<self::Spcmd0_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Spcmd0_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(16usize),
179 )
180 }
181 }
182}
183#[doc(hidden)]
184#[derive(Copy, Clone, Eq, PartialEq)]
185pub struct Spcr_SPEC;
186impl crate::sealed::RegSpec for Spcr_SPEC {
187 type DataType = u8;
188}
189
190#[doc = "SPI Control Register"]
191pub type Spcr = crate::RegValueT<Spcr_SPEC>;
192
193impl Spcr {
194 #[doc = "SPI Mode Select"]
195 #[inline(always)]
196 pub fn spms(
197 self,
198 ) -> crate::common::RegisterField<
199 0,
200 0x1,
201 1,
202 0,
203 spcr::Spms,
204 spcr::Spms,
205 Spcr_SPEC,
206 crate::common::RW,
207 > {
208 crate::common::RegisterField::<
209 0,
210 0x1,
211 1,
212 0,
213 spcr::Spms,
214 spcr::Spms,
215 Spcr_SPEC,
216 crate::common::RW,
217 >::from_register(self, 0)
218 }
219
220 #[doc = "Communications Operating Mode Select"]
221 #[inline(always)]
222 pub fn txmd(
223 self,
224 ) -> crate::common::RegisterField<
225 1,
226 0x1,
227 1,
228 0,
229 spcr::Txmd,
230 spcr::Txmd,
231 Spcr_SPEC,
232 crate::common::RW,
233 > {
234 crate::common::RegisterField::<
235 1,
236 0x1,
237 1,
238 0,
239 spcr::Txmd,
240 spcr::Txmd,
241 Spcr_SPEC,
242 crate::common::RW,
243 >::from_register(self, 0)
244 }
245
246 #[doc = "Mode Fault Error Detection Enable"]
247 #[inline(always)]
248 pub fn modfen(
249 self,
250 ) -> crate::common::RegisterField<
251 2,
252 0x1,
253 1,
254 0,
255 spcr::Modfen,
256 spcr::Modfen,
257 Spcr_SPEC,
258 crate::common::RW,
259 > {
260 crate::common::RegisterField::<
261 2,
262 0x1,
263 1,
264 0,
265 spcr::Modfen,
266 spcr::Modfen,
267 Spcr_SPEC,
268 crate::common::RW,
269 >::from_register(self, 0)
270 }
271
272 #[doc = "SPI Master/Slave Mode Select"]
273 #[inline(always)]
274 pub fn mstr(
275 self,
276 ) -> crate::common::RegisterField<
277 3,
278 0x1,
279 1,
280 0,
281 spcr::Mstr,
282 spcr::Mstr,
283 Spcr_SPEC,
284 crate::common::RW,
285 > {
286 crate::common::RegisterField::<
287 3,
288 0x1,
289 1,
290 0,
291 spcr::Mstr,
292 spcr::Mstr,
293 Spcr_SPEC,
294 crate::common::RW,
295 >::from_register(self, 0)
296 }
297
298 #[doc = "SPI Error Interrupt Enable"]
299 #[inline(always)]
300 pub fn speie(
301 self,
302 ) -> crate::common::RegisterField<
303 4,
304 0x1,
305 1,
306 0,
307 spcr::Speie,
308 spcr::Speie,
309 Spcr_SPEC,
310 crate::common::RW,
311 > {
312 crate::common::RegisterField::<
313 4,
314 0x1,
315 1,
316 0,
317 spcr::Speie,
318 spcr::Speie,
319 Spcr_SPEC,
320 crate::common::RW,
321 >::from_register(self, 0)
322 }
323
324 #[doc = "Transmit Buffer Empty Interrupt Enable"]
325 #[inline(always)]
326 pub fn sptie(
327 self,
328 ) -> crate::common::RegisterField<
329 5,
330 0x1,
331 1,
332 0,
333 spcr::Sptie,
334 spcr::Sptie,
335 Spcr_SPEC,
336 crate::common::RW,
337 > {
338 crate::common::RegisterField::<
339 5,
340 0x1,
341 1,
342 0,
343 spcr::Sptie,
344 spcr::Sptie,
345 Spcr_SPEC,
346 crate::common::RW,
347 >::from_register(self, 0)
348 }
349
350 #[doc = "SPI Function Enable"]
351 #[inline(always)]
352 pub fn spe(
353 self,
354 ) -> crate::common::RegisterField<
355 6,
356 0x1,
357 1,
358 0,
359 spcr::Spe,
360 spcr::Spe,
361 Spcr_SPEC,
362 crate::common::RW,
363 > {
364 crate::common::RegisterField::<
365 6,
366 0x1,
367 1,
368 0,
369 spcr::Spe,
370 spcr::Spe,
371 Spcr_SPEC,
372 crate::common::RW,
373 >::from_register(self, 0)
374 }
375
376 #[doc = "SPI Receive Buffer Full Interrupt Enable"]
377 #[inline(always)]
378 pub fn sprie(
379 self,
380 ) -> crate::common::RegisterField<
381 7,
382 0x1,
383 1,
384 0,
385 spcr::Sprie,
386 spcr::Sprie,
387 Spcr_SPEC,
388 crate::common::RW,
389 > {
390 crate::common::RegisterField::<
391 7,
392 0x1,
393 1,
394 0,
395 spcr::Sprie,
396 spcr::Sprie,
397 Spcr_SPEC,
398 crate::common::RW,
399 >::from_register(self, 0)
400 }
401}
402impl ::core::default::Default for Spcr {
403 #[inline(always)]
404 fn default() -> Spcr {
405 <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
406 }
407}
408pub mod spcr {
409
410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
411 pub struct Spms_SPEC;
412 pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
413 impl Spms {
414 #[doc = "Select SPI operation (4-wire method)"]
415 pub const _0: Self = Self::new(0);
416
417 #[doc = "Select clock synchronous operation (3-wire method)"]
418 pub const _1: Self = Self::new(1);
419 }
420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421 pub struct Txmd_SPEC;
422 pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
423 impl Txmd {
424 #[doc = "Select full-duplex synchronous serial communications"]
425 pub const _0: Self = Self::new(0);
426
427 #[doc = "Select serial communications with transmit-only"]
428 pub const _1: Self = Self::new(1);
429 }
430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
431 pub struct Modfen_SPEC;
432 pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
433 impl Modfen {
434 #[doc = "Disable detection of mode fault errors"]
435 pub const _0: Self = Self::new(0);
436
437 #[doc = "Enable detection of mode fault errors"]
438 pub const _1: Self = Self::new(1);
439 }
440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441 pub struct Mstr_SPEC;
442 pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
443 impl Mstr {
444 #[doc = "Select slave mode"]
445 pub const _0: Self = Self::new(0);
446
447 #[doc = "Select master mode"]
448 pub const _1: Self = Self::new(1);
449 }
450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
451 pub struct Speie_SPEC;
452 pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
453 impl Speie {
454 #[doc = "Disable SPI error interrupt requests"]
455 pub const _0: Self = Self::new(0);
456
457 #[doc = "Enable SPI error interrupt requests"]
458 pub const _1: Self = Self::new(1);
459 }
460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
461 pub struct Sptie_SPEC;
462 pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
463 impl Sptie {
464 #[doc = "Disable transmit buffer empty interrupt requests"]
465 pub const _0: Self = Self::new(0);
466
467 #[doc = "Enable transmit buffer empty interrupt requests"]
468 pub const _1: Self = Self::new(1);
469 }
470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
471 pub struct Spe_SPEC;
472 pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
473 impl Spe {
474 #[doc = "Disable SPI function"]
475 pub const _0: Self = Self::new(0);
476
477 #[doc = "Enable SPI function"]
478 pub const _1: Self = Self::new(1);
479 }
480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481 pub struct Sprie_SPEC;
482 pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
483 impl Sprie {
484 #[doc = "Disable SPI receive buffer full interrupt requests"]
485 pub const _0: Self = Self::new(0);
486
487 #[doc = "Enable SPI receive buffer full interrupt requests"]
488 pub const _1: Self = Self::new(1);
489 }
490}
491#[doc(hidden)]
492#[derive(Copy, Clone, Eq, PartialEq)]
493pub struct Sslp_SPEC;
494impl crate::sealed::RegSpec for Sslp_SPEC {
495 type DataType = u8;
496}
497
498#[doc = "SPI Slave Select Polarity Register"]
499pub type Sslp = crate::RegValueT<Sslp_SPEC>;
500
501impl Sslp {
502 #[doc = "SSLn0 Signal Polarity Setting"]
503 #[inline(always)]
504 pub fn ssl0p(
505 self,
506 ) -> crate::common::RegisterField<
507 0,
508 0x1,
509 1,
510 0,
511 sslp::Ssl0P,
512 sslp::Ssl0P,
513 Sslp_SPEC,
514 crate::common::RW,
515 > {
516 crate::common::RegisterField::<
517 0,
518 0x1,
519 1,
520 0,
521 sslp::Ssl0P,
522 sslp::Ssl0P,
523 Sslp_SPEC,
524 crate::common::RW,
525 >::from_register(self, 0)
526 }
527
528 #[doc = "SSLn1 Signal Polarity Setting"]
529 #[inline(always)]
530 pub fn ssl1p(
531 self,
532 ) -> crate::common::RegisterField<
533 1,
534 0x1,
535 1,
536 0,
537 sslp::Ssl1P,
538 sslp::Ssl1P,
539 Sslp_SPEC,
540 crate::common::RW,
541 > {
542 crate::common::RegisterField::<
543 1,
544 0x1,
545 1,
546 0,
547 sslp::Ssl1P,
548 sslp::Ssl1P,
549 Sslp_SPEC,
550 crate::common::RW,
551 >::from_register(self, 0)
552 }
553}
554impl ::core::default::Default for Sslp {
555 #[inline(always)]
556 fn default() -> Sslp {
557 <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
558 }
559}
560pub mod sslp {
561
562 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
563 pub struct Ssl0P_SPEC;
564 pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
565 impl Ssl0P {
566 #[doc = "Set SSLn0 signal to active-low"]
567 pub const _0: Self = Self::new(0);
568
569 #[doc = "Set SSLn0 signal to active-high"]
570 pub const _1: Self = Self::new(1);
571 }
572 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
573 pub struct Ssl1P_SPEC;
574 pub type Ssl1P = crate::EnumBitfieldStruct<u8, Ssl1P_SPEC>;
575 impl Ssl1P {
576 #[doc = "Set SSLn1 signal to active-low"]
577 pub const _0: Self = Self::new(0);
578
579 #[doc = "Set SSLn1 signal to active-high"]
580 pub const _1: Self = Self::new(1);
581 }
582}
583#[doc(hidden)]
584#[derive(Copy, Clone, Eq, PartialEq)]
585pub struct Sppcr_SPEC;
586impl crate::sealed::RegSpec for Sppcr_SPEC {
587 type DataType = u8;
588}
589
590#[doc = "SPI Pin Control Register"]
591pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
592
593impl Sppcr {
594 #[doc = "SPI Loopback"]
595 #[inline(always)]
596 pub fn splp(
597 self,
598 ) -> crate::common::RegisterField<
599 0,
600 0x1,
601 1,
602 0,
603 sppcr::Splp,
604 sppcr::Splp,
605 Sppcr_SPEC,
606 crate::common::RW,
607 > {
608 crate::common::RegisterField::<
609 0,
610 0x1,
611 1,
612 0,
613 sppcr::Splp,
614 sppcr::Splp,
615 Sppcr_SPEC,
616 crate::common::RW,
617 >::from_register(self, 0)
618 }
619
620 #[doc = "SPI Loopback 2"]
621 #[inline(always)]
622 pub fn splp2(
623 self,
624 ) -> crate::common::RegisterField<
625 1,
626 0x1,
627 1,
628 0,
629 sppcr::Splp2,
630 sppcr::Splp2,
631 Sppcr_SPEC,
632 crate::common::RW,
633 > {
634 crate::common::RegisterField::<
635 1,
636 0x1,
637 1,
638 0,
639 sppcr::Splp2,
640 sppcr::Splp2,
641 Sppcr_SPEC,
642 crate::common::RW,
643 >::from_register(self, 0)
644 }
645
646 #[doc = "MOSI Idle Fixed Value"]
647 #[inline(always)]
648 pub fn moifv(
649 self,
650 ) -> crate::common::RegisterField<
651 4,
652 0x1,
653 1,
654 0,
655 sppcr::Moifv,
656 sppcr::Moifv,
657 Sppcr_SPEC,
658 crate::common::RW,
659 > {
660 crate::common::RegisterField::<
661 4,
662 0x1,
663 1,
664 0,
665 sppcr::Moifv,
666 sppcr::Moifv,
667 Sppcr_SPEC,
668 crate::common::RW,
669 >::from_register(self, 0)
670 }
671
672 #[doc = "MOSI Idle Value Fixing Enable"]
673 #[inline(always)]
674 pub fn moife(
675 self,
676 ) -> crate::common::RegisterField<
677 5,
678 0x1,
679 1,
680 0,
681 sppcr::Moife,
682 sppcr::Moife,
683 Sppcr_SPEC,
684 crate::common::RW,
685 > {
686 crate::common::RegisterField::<
687 5,
688 0x1,
689 1,
690 0,
691 sppcr::Moife,
692 sppcr::Moife,
693 Sppcr_SPEC,
694 crate::common::RW,
695 >::from_register(self, 0)
696 }
697}
698impl ::core::default::Default for Sppcr {
699 #[inline(always)]
700 fn default() -> Sppcr {
701 <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
702 }
703}
704pub mod sppcr {
705
706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
707 pub struct Splp_SPEC;
708 pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
709 impl Splp {
710 #[doc = "Normal mode"]
711 pub const _0: Self = Self::new(0);
712
713 #[doc = "Loopback mode (receive data = inverted transmit data)"]
714 pub const _1: Self = Self::new(1);
715 }
716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
717 pub struct Splp2_SPEC;
718 pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
719 impl Splp2 {
720 #[doc = "Normal mode"]
721 pub const _0: Self = Self::new(0);
722
723 #[doc = "Loopback mode (receive data = transmit data)"]
724 pub const _1: Self = Self::new(1);
725 }
726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
727 pub struct Moifv_SPEC;
728 pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
729 impl Moifv {
730 #[doc = "Set level output on MOSIn pin during MOSI idling to low"]
731 pub const _0: Self = Self::new(0);
732
733 #[doc = "Set level output on MOSIn pin during MOSI idling to high"]
734 pub const _1: Self = Self::new(1);
735 }
736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
737 pub struct Moife_SPEC;
738 pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
739 impl Moife {
740 #[doc = "Set MOSI output value to equal final data from previous transfer"]
741 pub const _0: Self = Self::new(0);
742
743 #[doc = "Set MOSI output value to equal value set in the MOIFV bit"]
744 pub const _1: Self = Self::new(1);
745 }
746}
747#[doc(hidden)]
748#[derive(Copy, Clone, Eq, PartialEq)]
749pub struct Spsr_SPEC;
750impl crate::sealed::RegSpec for Spsr_SPEC {
751 type DataType = u8;
752}
753
754#[doc = "SPI Status Register"]
755pub type Spsr = crate::RegValueT<Spsr_SPEC>;
756
757impl Spsr {
758 #[doc = "Overrun Error Flag"]
759 #[inline(always)]
760 pub fn ovrf(
761 self,
762 ) -> crate::common::RegisterField<
763 0,
764 0x1,
765 1,
766 0,
767 spsr::Ovrf,
768 spsr::Ovrf,
769 Spsr_SPEC,
770 crate::common::RW,
771 > {
772 crate::common::RegisterField::<
773 0,
774 0x1,
775 1,
776 0,
777 spsr::Ovrf,
778 spsr::Ovrf,
779 Spsr_SPEC,
780 crate::common::RW,
781 >::from_register(self, 0)
782 }
783
784 #[doc = "SPI Idle Flag"]
785 #[inline(always)]
786 pub fn idlnf(
787 self,
788 ) -> crate::common::RegisterField<
789 1,
790 0x1,
791 1,
792 0,
793 spsr::Idlnf,
794 spsr::Idlnf,
795 Spsr_SPEC,
796 crate::common::R,
797 > {
798 crate::common::RegisterField::<
799 1,
800 0x1,
801 1,
802 0,
803 spsr::Idlnf,
804 spsr::Idlnf,
805 Spsr_SPEC,
806 crate::common::R,
807 >::from_register(self, 0)
808 }
809
810 #[doc = "Mode Fault Error Flag"]
811 #[inline(always)]
812 pub fn modf(
813 self,
814 ) -> crate::common::RegisterField<
815 2,
816 0x1,
817 1,
818 0,
819 spsr::Modf,
820 spsr::Modf,
821 Spsr_SPEC,
822 crate::common::RW,
823 > {
824 crate::common::RegisterField::<
825 2,
826 0x1,
827 1,
828 0,
829 spsr::Modf,
830 spsr::Modf,
831 Spsr_SPEC,
832 crate::common::RW,
833 >::from_register(self, 0)
834 }
835
836 #[doc = "Parity Error Flag"]
837 #[inline(always)]
838 pub fn perf(
839 self,
840 ) -> crate::common::RegisterField<
841 3,
842 0x1,
843 1,
844 0,
845 spsr::Perf,
846 spsr::Perf,
847 Spsr_SPEC,
848 crate::common::RW,
849 > {
850 crate::common::RegisterField::<
851 3,
852 0x1,
853 1,
854 0,
855 spsr::Perf,
856 spsr::Perf,
857 Spsr_SPEC,
858 crate::common::RW,
859 >::from_register(self, 0)
860 }
861
862 #[doc = "Underrun Error Flag"]
863 #[inline(always)]
864 pub fn udrf(
865 self,
866 ) -> crate::common::RegisterField<
867 4,
868 0x1,
869 1,
870 0,
871 spsr::Udrf,
872 spsr::Udrf,
873 Spsr_SPEC,
874 crate::common::RW,
875 > {
876 crate::common::RegisterField::<
877 4,
878 0x1,
879 1,
880 0,
881 spsr::Udrf,
882 spsr::Udrf,
883 Spsr_SPEC,
884 crate::common::RW,
885 >::from_register(self, 0)
886 }
887
888 #[doc = "SPI Transmit Buffer Empty Flag"]
889 #[inline(always)]
890 pub fn sptef(
891 self,
892 ) -> crate::common::RegisterField<
893 5,
894 0x1,
895 1,
896 0,
897 spsr::Sptef,
898 spsr::Sptef,
899 Spsr_SPEC,
900 crate::common::RW,
901 > {
902 crate::common::RegisterField::<
903 5,
904 0x1,
905 1,
906 0,
907 spsr::Sptef,
908 spsr::Sptef,
909 Spsr_SPEC,
910 crate::common::RW,
911 >::from_register(self, 0)
912 }
913
914 #[doc = "SPI Receive Buffer Full Flag"]
915 #[inline(always)]
916 pub fn sprf(
917 self,
918 ) -> crate::common::RegisterField<
919 7,
920 0x1,
921 1,
922 0,
923 spsr::Sprf,
924 spsr::Sprf,
925 Spsr_SPEC,
926 crate::common::RW,
927 > {
928 crate::common::RegisterField::<
929 7,
930 0x1,
931 1,
932 0,
933 spsr::Sprf,
934 spsr::Sprf,
935 Spsr_SPEC,
936 crate::common::RW,
937 >::from_register(self, 0)
938 }
939}
940impl ::core::default::Default for Spsr {
941 #[inline(always)]
942 fn default() -> Spsr {
943 <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
944 }
945}
946pub mod spsr {
947
948 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
949 pub struct Ovrf_SPEC;
950 pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
951 impl Ovrf {
952 #[doc = "No overrun error occurred"]
953 pub const _0: Self = Self::new(0);
954
955 #[doc = "Overrun error occurred"]
956 pub const _1: Self = Self::new(1);
957 }
958 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
959 pub struct Idlnf_SPEC;
960 pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
961 impl Idlnf {
962 #[doc = "SPI is in the idle state"]
963 pub const _0: Self = Self::new(0);
964
965 #[doc = "SPI is in the transfer state"]
966 pub const _1: Self = Self::new(1);
967 }
968 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
969 pub struct Modf_SPEC;
970 pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
971 impl Modf {
972 #[doc = "No mode fault or underrun error occurred"]
973 pub const _0: Self = Self::new(0);
974
975 #[doc = "Mode fault error or underrun error occurred"]
976 pub const _1: Self = Self::new(1);
977 }
978 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
979 pub struct Perf_SPEC;
980 pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
981 impl Perf {
982 #[doc = "No parity error occurred"]
983 pub const _0: Self = Self::new(0);
984
985 #[doc = "Parity error occurred"]
986 pub const _1: Self = Self::new(1);
987 }
988 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
989 pub struct Udrf_SPEC;
990 pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
991 impl Udrf {
992 #[doc = "Mode fault error occurred (MODF = 1)"]
993 pub const _0: Self = Self::new(0);
994
995 #[doc = "Underrun error occurred (MODF = 1)"]
996 pub const _1: Self = Self::new(1);
997 }
998 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
999 pub struct Sptef_SPEC;
1000 pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
1001 impl Sptef {
1002 #[doc = "Data is in the transmit buffer"]
1003 pub const _0: Self = Self::new(0);
1004
1005 #[doc = "No data is in the transmit buffer"]
1006 pub const _1: Self = Self::new(1);
1007 }
1008 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1009 pub struct Sprf_SPEC;
1010 pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
1011 impl Sprf {
1012 #[doc = "No valid data is in SPDR/SPDR_HA"]
1013 pub const _0: Self = Self::new(0);
1014
1015 #[doc = "Valid data is in SPDR/SPDR_HA"]
1016 pub const _1: Self = Self::new(1);
1017 }
1018}
1019#[doc(hidden)]
1020#[derive(Copy, Clone, Eq, PartialEq)]
1021pub struct Spdr_SPEC;
1022impl crate::sealed::RegSpec for Spdr_SPEC {
1023 type DataType = u32;
1024}
1025
1026#[doc = "SPI Data Register"]
1027pub type Spdr = crate::RegValueT<Spdr_SPEC>;
1028
1029impl NoBitfieldReg<Spdr_SPEC> for Spdr {}
1030impl ::core::default::Default for Spdr {
1031 #[inline(always)]
1032 fn default() -> Spdr {
1033 <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
1034 }
1035}
1036
1037#[doc(hidden)]
1038#[derive(Copy, Clone, Eq, PartialEq)]
1039pub struct SpdrHa_SPEC;
1040impl crate::sealed::RegSpec for SpdrHa_SPEC {
1041 type DataType = u16;
1042}
1043
1044#[doc = "SPI Data Register"]
1045pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
1046
1047impl NoBitfieldReg<SpdrHa_SPEC> for SpdrHa {}
1048impl ::core::default::Default for SpdrHa {
1049 #[inline(always)]
1050 fn default() -> SpdrHa {
1051 <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
1052 }
1053}
1054
1055#[doc(hidden)]
1056#[derive(Copy, Clone, Eq, PartialEq)]
1057pub struct SpdrBy_SPEC;
1058impl crate::sealed::RegSpec for SpdrBy_SPEC {
1059 type DataType = u8;
1060}
1061
1062#[doc = "SPI Data Register"]
1063pub type SpdrBy = crate::RegValueT<SpdrBy_SPEC>;
1064
1065impl NoBitfieldReg<SpdrBy_SPEC> for SpdrBy {}
1066impl ::core::default::Default for SpdrBy {
1067 #[inline(always)]
1068 fn default() -> SpdrBy {
1069 <crate::RegValueT<SpdrBy_SPEC> as RegisterValue<_>>::new(0)
1070 }
1071}
1072
1073#[doc(hidden)]
1074#[derive(Copy, Clone, Eq, PartialEq)]
1075pub struct Spbr_SPEC;
1076impl crate::sealed::RegSpec for Spbr_SPEC {
1077 type DataType = u8;
1078}
1079
1080#[doc = "SPI Bit Rate Register"]
1081pub type Spbr = crate::RegValueT<Spbr_SPEC>;
1082
1083impl NoBitfieldReg<Spbr_SPEC> for Spbr {}
1084impl ::core::default::Default for Spbr {
1085 #[inline(always)]
1086 fn default() -> Spbr {
1087 <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
1088 }
1089}
1090
1091#[doc(hidden)]
1092#[derive(Copy, Clone, Eq, PartialEq)]
1093pub struct Spdcr_SPEC;
1094impl crate::sealed::RegSpec for Spdcr_SPEC {
1095 type DataType = u8;
1096}
1097
1098#[doc = "SPI Data Control Register"]
1099pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
1100
1101impl Spdcr {
1102 #[doc = "SPI Receive/Transmit Data Select"]
1103 #[inline(always)]
1104 pub fn sprdtd(
1105 self,
1106 ) -> crate::common::RegisterField<
1107 4,
1108 0x1,
1109 1,
1110 0,
1111 spdcr::Sprdtd,
1112 spdcr::Sprdtd,
1113 Spdcr_SPEC,
1114 crate::common::RW,
1115 > {
1116 crate::common::RegisterField::<
1117 4,
1118 0x1,
1119 1,
1120 0,
1121 spdcr::Sprdtd,
1122 spdcr::Sprdtd,
1123 Spdcr_SPEC,
1124 crate::common::RW,
1125 >::from_register(self, 0)
1126 }
1127
1128 #[doc = "SPI Word Access/Halfword Access Specification"]
1129 #[inline(always)]
1130 pub fn splw(
1131 self,
1132 ) -> crate::common::RegisterField<
1133 5,
1134 0x1,
1135 1,
1136 0,
1137 spdcr::Splw,
1138 spdcr::Splw,
1139 Spdcr_SPEC,
1140 crate::common::RW,
1141 > {
1142 crate::common::RegisterField::<
1143 5,
1144 0x1,
1145 1,
1146 0,
1147 spdcr::Splw,
1148 spdcr::Splw,
1149 Spdcr_SPEC,
1150 crate::common::RW,
1151 >::from_register(self, 0)
1152 }
1153
1154 #[doc = "SPI Byte Access Specification"]
1155 #[inline(always)]
1156 pub fn spbyt(
1157 self,
1158 ) -> crate::common::RegisterField<
1159 6,
1160 0x1,
1161 1,
1162 0,
1163 spdcr::Spbyt,
1164 spdcr::Spbyt,
1165 Spdcr_SPEC,
1166 crate::common::RW,
1167 > {
1168 crate::common::RegisterField::<
1169 6,
1170 0x1,
1171 1,
1172 0,
1173 spdcr::Spbyt,
1174 spdcr::Spbyt,
1175 Spdcr_SPEC,
1176 crate::common::RW,
1177 >::from_register(self, 0)
1178 }
1179}
1180impl ::core::default::Default for Spdcr {
1181 #[inline(always)]
1182 fn default() -> Spdcr {
1183 <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
1184 }
1185}
1186pub mod spdcr {
1187
1188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1189 pub struct Sprdtd_SPEC;
1190 pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
1191 impl Sprdtd {
1192 #[doc = "Read SPDR/SPDR_HA values from receive buffer"]
1193 pub const _0: Self = Self::new(0);
1194
1195 #[doc = "Read SPDR/SPDR_HA values from transmit buffer, but only if the transmit buffer is empty"]
1196 pub const _1: Self = Self::new(1);
1197 }
1198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1199 pub struct Splw_SPEC;
1200 pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
1201 impl Splw {
1202 #[doc = "Set SPDR_HA to valid for halfword access"]
1203 pub const _0: Self = Self::new(0);
1204
1205 #[doc = "Set SPDR to valid for word access"]
1206 pub const _1: Self = Self::new(1);
1207 }
1208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1209 pub struct Spbyt_SPEC;
1210 pub type Spbyt = crate::EnumBitfieldStruct<u8, Spbyt_SPEC>;
1211 impl Spbyt {
1212 #[doc = "SPDR/SPDR_HA is accessed in halfword or word (SPLW is valid)"]
1213 pub const _0: Self = Self::new(0);
1214
1215 #[doc = "SPDR_BY is accessed in byte (SPLW is invalid)"]
1216 pub const _1: Self = Self::new(1);
1217 }
1218}
1219#[doc(hidden)]
1220#[derive(Copy, Clone, Eq, PartialEq)]
1221pub struct Spckd_SPEC;
1222impl crate::sealed::RegSpec for Spckd_SPEC {
1223 type DataType = u8;
1224}
1225
1226#[doc = "SPI Clock Delay Register"]
1227pub type Spckd = crate::RegValueT<Spckd_SPEC>;
1228
1229impl Spckd {
1230 #[doc = "RSPCK Delay Setting"]
1231 #[inline(always)]
1232 pub fn sckdl(
1233 self,
1234 ) -> crate::common::RegisterField<
1235 0,
1236 0x7,
1237 1,
1238 0,
1239 spckd::Sckdl,
1240 spckd::Sckdl,
1241 Spckd_SPEC,
1242 crate::common::RW,
1243 > {
1244 crate::common::RegisterField::<
1245 0,
1246 0x7,
1247 1,
1248 0,
1249 spckd::Sckdl,
1250 spckd::Sckdl,
1251 Spckd_SPEC,
1252 crate::common::RW,
1253 >::from_register(self, 0)
1254 }
1255}
1256impl ::core::default::Default for Spckd {
1257 #[inline(always)]
1258 fn default() -> Spckd {
1259 <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1260 }
1261}
1262pub mod spckd {
1263
1264 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1265 pub struct Sckdl_SPEC;
1266 pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1267 impl Sckdl {
1268 #[doc = "1 RSPCK"]
1269 pub const _000: Self = Self::new(0);
1270
1271 #[doc = "2 RSPCK"]
1272 pub const _001: Self = Self::new(1);
1273
1274 #[doc = "3 RSPCK"]
1275 pub const _010: Self = Self::new(2);
1276
1277 #[doc = "4 RSPCK"]
1278 pub const _011: Self = Self::new(3);
1279
1280 #[doc = "5 RSPCK"]
1281 pub const _100: Self = Self::new(4);
1282
1283 #[doc = "6 RSPCK"]
1284 pub const _101: Self = Self::new(5);
1285
1286 #[doc = "7 RSPCK"]
1287 pub const _110: Self = Self::new(6);
1288
1289 #[doc = "8 RSPCK"]
1290 pub const _111: Self = Self::new(7);
1291 }
1292}
1293#[doc(hidden)]
1294#[derive(Copy, Clone, Eq, PartialEq)]
1295pub struct Sslnd_SPEC;
1296impl crate::sealed::RegSpec for Sslnd_SPEC {
1297 type DataType = u8;
1298}
1299
1300#[doc = "SPI Slave Select Negation Delay Register"]
1301pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1302
1303impl Sslnd {
1304 #[doc = "SSL Negation Delay Setting"]
1305 #[inline(always)]
1306 pub fn slndl(
1307 self,
1308 ) -> crate::common::RegisterField<
1309 0,
1310 0x7,
1311 1,
1312 0,
1313 sslnd::Slndl,
1314 sslnd::Slndl,
1315 Sslnd_SPEC,
1316 crate::common::RW,
1317 > {
1318 crate::common::RegisterField::<
1319 0,
1320 0x7,
1321 1,
1322 0,
1323 sslnd::Slndl,
1324 sslnd::Slndl,
1325 Sslnd_SPEC,
1326 crate::common::RW,
1327 >::from_register(self, 0)
1328 }
1329}
1330impl ::core::default::Default for Sslnd {
1331 #[inline(always)]
1332 fn default() -> Sslnd {
1333 <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1334 }
1335}
1336pub mod sslnd {
1337
1338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1339 pub struct Slndl_SPEC;
1340 pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1341 impl Slndl {
1342 #[doc = "1 RSPCK"]
1343 pub const _000: Self = Self::new(0);
1344
1345 #[doc = "2 RSPCK"]
1346 pub const _001: Self = Self::new(1);
1347
1348 #[doc = "3 RSPCK"]
1349 pub const _010: Self = Self::new(2);
1350
1351 #[doc = "4 RSPCK"]
1352 pub const _011: Self = Self::new(3);
1353
1354 #[doc = "5 RSPCK"]
1355 pub const _100: Self = Self::new(4);
1356
1357 #[doc = "6 RSPCK"]
1358 pub const _101: Self = Self::new(5);
1359
1360 #[doc = "7 RSPCK"]
1361 pub const _110: Self = Self::new(6);
1362
1363 #[doc = "8 RSPCK"]
1364 pub const _111: Self = Self::new(7);
1365 }
1366}
1367#[doc(hidden)]
1368#[derive(Copy, Clone, Eq, PartialEq)]
1369pub struct Spnd_SPEC;
1370impl crate::sealed::RegSpec for Spnd_SPEC {
1371 type DataType = u8;
1372}
1373
1374#[doc = "SPI Next-Access Delay Register"]
1375pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1376
1377impl Spnd {
1378 #[doc = "SPI Next-Access Delay Setting"]
1379 #[inline(always)]
1380 pub fn spndl(
1381 self,
1382 ) -> crate::common::RegisterField<
1383 0,
1384 0x7,
1385 1,
1386 0,
1387 spnd::Spndl,
1388 spnd::Spndl,
1389 Spnd_SPEC,
1390 crate::common::RW,
1391 > {
1392 crate::common::RegisterField::<
1393 0,
1394 0x7,
1395 1,
1396 0,
1397 spnd::Spndl,
1398 spnd::Spndl,
1399 Spnd_SPEC,
1400 crate::common::RW,
1401 >::from_register(self, 0)
1402 }
1403}
1404impl ::core::default::Default for Spnd {
1405 #[inline(always)]
1406 fn default() -> Spnd {
1407 <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1408 }
1409}
1410pub mod spnd {
1411
1412 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1413 pub struct Spndl_SPEC;
1414 pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1415 impl Spndl {
1416 #[doc = "1 RSPCK + 2 PCLKB"]
1417 pub const _000: Self = Self::new(0);
1418
1419 #[doc = "2 RSPCK + 2 PCLKB"]
1420 pub const _001: Self = Self::new(1);
1421
1422 #[doc = "3 RSPCK + 2 PCLKB"]
1423 pub const _010: Self = Self::new(2);
1424
1425 #[doc = "4 RSPCK + 2 PCLKB"]
1426 pub const _011: Self = Self::new(3);
1427
1428 #[doc = "5 RSPCK + 2 PCLKB"]
1429 pub const _100: Self = Self::new(4);
1430
1431 #[doc = "6 RSPCK + 2 PCLKB"]
1432 pub const _101: Self = Self::new(5);
1433
1434 #[doc = "7 RSPCK + 2 PCLKB"]
1435 pub const _110: Self = Self::new(6);
1436
1437 #[doc = "8 RSPCK + 2 PCLKB"]
1438 pub const _111: Self = Self::new(7);
1439 }
1440}
1441#[doc(hidden)]
1442#[derive(Copy, Clone, Eq, PartialEq)]
1443pub struct Spcr2_SPEC;
1444impl crate::sealed::RegSpec for Spcr2_SPEC {
1445 type DataType = u8;
1446}
1447
1448#[doc = "SPI Control Register 2"]
1449pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1450
1451impl Spcr2 {
1452 #[doc = "Parity Enable"]
1453 #[inline(always)]
1454 pub fn sppe(
1455 self,
1456 ) -> crate::common::RegisterField<
1457 0,
1458 0x1,
1459 1,
1460 0,
1461 spcr2::Sppe,
1462 spcr2::Sppe,
1463 Spcr2_SPEC,
1464 crate::common::RW,
1465 > {
1466 crate::common::RegisterField::<
1467 0,
1468 0x1,
1469 1,
1470 0,
1471 spcr2::Sppe,
1472 spcr2::Sppe,
1473 Spcr2_SPEC,
1474 crate::common::RW,
1475 >::from_register(self, 0)
1476 }
1477
1478 #[doc = "Parity Mode"]
1479 #[inline(always)]
1480 pub fn spoe(
1481 self,
1482 ) -> crate::common::RegisterField<
1483 1,
1484 0x1,
1485 1,
1486 0,
1487 spcr2::Spoe,
1488 spcr2::Spoe,
1489 Spcr2_SPEC,
1490 crate::common::RW,
1491 > {
1492 crate::common::RegisterField::<
1493 1,
1494 0x1,
1495 1,
1496 0,
1497 spcr2::Spoe,
1498 spcr2::Spoe,
1499 Spcr2_SPEC,
1500 crate::common::RW,
1501 >::from_register(self, 0)
1502 }
1503
1504 #[doc = "SPI Idle Interrupt Enable"]
1505 #[inline(always)]
1506 pub fn spiie(
1507 self,
1508 ) -> crate::common::RegisterField<
1509 2,
1510 0x1,
1511 1,
1512 0,
1513 spcr2::Spiie,
1514 spcr2::Spiie,
1515 Spcr2_SPEC,
1516 crate::common::RW,
1517 > {
1518 crate::common::RegisterField::<
1519 2,
1520 0x1,
1521 1,
1522 0,
1523 spcr2::Spiie,
1524 spcr2::Spiie,
1525 Spcr2_SPEC,
1526 crate::common::RW,
1527 >::from_register(self, 0)
1528 }
1529
1530 #[doc = "Parity Self-Testing"]
1531 #[inline(always)]
1532 pub fn pte(
1533 self,
1534 ) -> crate::common::RegisterField<
1535 3,
1536 0x1,
1537 1,
1538 0,
1539 spcr2::Pte,
1540 spcr2::Pte,
1541 Spcr2_SPEC,
1542 crate::common::RW,
1543 > {
1544 crate::common::RegisterField::<
1545 3,
1546 0x1,
1547 1,
1548 0,
1549 spcr2::Pte,
1550 spcr2::Pte,
1551 Spcr2_SPEC,
1552 crate::common::RW,
1553 >::from_register(self, 0)
1554 }
1555
1556 #[doc = "RSPCK Auto-Stop Function Enable"]
1557 #[inline(always)]
1558 pub fn sckase(
1559 self,
1560 ) -> crate::common::RegisterField<
1561 4,
1562 0x1,
1563 1,
1564 0,
1565 spcr2::Sckase,
1566 spcr2::Sckase,
1567 Spcr2_SPEC,
1568 crate::common::RW,
1569 > {
1570 crate::common::RegisterField::<
1571 4,
1572 0x1,
1573 1,
1574 0,
1575 spcr2::Sckase,
1576 spcr2::Sckase,
1577 Spcr2_SPEC,
1578 crate::common::RW,
1579 >::from_register(self, 0)
1580 }
1581}
1582impl ::core::default::Default for Spcr2 {
1583 #[inline(always)]
1584 fn default() -> Spcr2 {
1585 <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
1586 }
1587}
1588pub mod spcr2 {
1589
1590 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1591 pub struct Sppe_SPEC;
1592 pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
1593 impl Sppe {
1594 #[doc = "Do not add parity bit to transmit data and do not check parity bit of receive data"]
1595 pub const _0: Self = Self::new(0);
1596
1597 #[doc = "When SPCR.TXMD = 0: Add parity bit to transmit data and check parity bit of receive data When SPCR.TXMD = 1: Add parity bit to transmit data but do not check parity bit of receive data"]
1598 pub const _1: Self = Self::new(1);
1599 }
1600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1601 pub struct Spoe_SPEC;
1602 pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
1603 impl Spoe {
1604 #[doc = "Select even parity for transmission and reception"]
1605 pub const _0: Self = Self::new(0);
1606
1607 #[doc = "Select odd parity for transmission and reception"]
1608 pub const _1: Self = Self::new(1);
1609 }
1610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1611 pub struct Spiie_SPEC;
1612 pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
1613 impl Spiie {
1614 #[doc = "Disable idle interrupt requests"]
1615 pub const _0: Self = Self::new(0);
1616
1617 #[doc = "Enable idle interrupt requests"]
1618 pub const _1: Self = Self::new(1);
1619 }
1620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1621 pub struct Pte_SPEC;
1622 pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
1623 impl Pte {
1624 #[doc = "Disable self-diagnosis function of the parity circuit"]
1625 pub const _0: Self = Self::new(0);
1626
1627 #[doc = "Enable self-diagnosis function of the parity circuit"]
1628 pub const _1: Self = Self::new(1);
1629 }
1630 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1631 pub struct Sckase_SPEC;
1632 pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
1633 impl Sckase {
1634 #[doc = "Disable RSPCK auto-stop function"]
1635 pub const _0: Self = Self::new(0);
1636
1637 #[doc = "Enable RSPCK auto-stop function"]
1638 pub const _1: Self = Self::new(1);
1639 }
1640}
1641#[doc(hidden)]
1642#[derive(Copy, Clone, Eq, PartialEq)]
1643pub struct Spcmd0_SPEC;
1644impl crate::sealed::RegSpec for Spcmd0_SPEC {
1645 type DataType = u16;
1646}
1647
1648#[doc = "SPI Command Register 0"]
1649pub type Spcmd0 = crate::RegValueT<Spcmd0_SPEC>;
1650
1651impl Spcmd0 {
1652 #[doc = "RSPCK Phase Setting"]
1653 #[inline(always)]
1654 pub fn cpha(
1655 self,
1656 ) -> crate::common::RegisterField<
1657 0,
1658 0x1,
1659 1,
1660 0,
1661 spcmd0::Cpha,
1662 spcmd0::Cpha,
1663 Spcmd0_SPEC,
1664 crate::common::RW,
1665 > {
1666 crate::common::RegisterField::<
1667 0,
1668 0x1,
1669 1,
1670 0,
1671 spcmd0::Cpha,
1672 spcmd0::Cpha,
1673 Spcmd0_SPEC,
1674 crate::common::RW,
1675 >::from_register(self, 0)
1676 }
1677
1678 #[doc = "RSPCK Polarity Setting"]
1679 #[inline(always)]
1680 pub fn cpol(
1681 self,
1682 ) -> crate::common::RegisterField<
1683 1,
1684 0x1,
1685 1,
1686 0,
1687 spcmd0::Cpol,
1688 spcmd0::Cpol,
1689 Spcmd0_SPEC,
1690 crate::common::RW,
1691 > {
1692 crate::common::RegisterField::<
1693 1,
1694 0x1,
1695 1,
1696 0,
1697 spcmd0::Cpol,
1698 spcmd0::Cpol,
1699 Spcmd0_SPEC,
1700 crate::common::RW,
1701 >::from_register(self, 0)
1702 }
1703
1704 #[doc = "Bit Rate Division Setting"]
1705 #[inline(always)]
1706 pub fn brdv(
1707 self,
1708 ) -> crate::common::RegisterField<
1709 2,
1710 0x3,
1711 1,
1712 0,
1713 spcmd0::Brdv,
1714 spcmd0::Brdv,
1715 Spcmd0_SPEC,
1716 crate::common::RW,
1717 > {
1718 crate::common::RegisterField::<
1719 2,
1720 0x3,
1721 1,
1722 0,
1723 spcmd0::Brdv,
1724 spcmd0::Brdv,
1725 Spcmd0_SPEC,
1726 crate::common::RW,
1727 >::from_register(self, 0)
1728 }
1729
1730 #[doc = "SSL Signal Assertion Setting"]
1731 #[inline(always)]
1732 pub fn ssla(
1733 self,
1734 ) -> crate::common::RegisterField<
1735 4,
1736 0x7,
1737 1,
1738 0,
1739 spcmd0::Ssla,
1740 spcmd0::Ssla,
1741 Spcmd0_SPEC,
1742 crate::common::RW,
1743 > {
1744 crate::common::RegisterField::<
1745 4,
1746 0x7,
1747 1,
1748 0,
1749 spcmd0::Ssla,
1750 spcmd0::Ssla,
1751 Spcmd0_SPEC,
1752 crate::common::RW,
1753 >::from_register(self, 0)
1754 }
1755
1756 #[doc = "SPI Data Length Setting"]
1757 #[inline(always)]
1758 pub fn spb(
1759 self,
1760 ) -> crate::common::RegisterField<
1761 8,
1762 0xf,
1763 1,
1764 0,
1765 spcmd0::Spb,
1766 spcmd0::Spb,
1767 Spcmd0_SPEC,
1768 crate::common::RW,
1769 > {
1770 crate::common::RegisterField::<
1771 8,
1772 0xf,
1773 1,
1774 0,
1775 spcmd0::Spb,
1776 spcmd0::Spb,
1777 Spcmd0_SPEC,
1778 crate::common::RW,
1779 >::from_register(self, 0)
1780 }
1781
1782 #[doc = "SPI LSB First"]
1783 #[inline(always)]
1784 pub fn lsbf(
1785 self,
1786 ) -> crate::common::RegisterField<
1787 12,
1788 0x1,
1789 1,
1790 0,
1791 spcmd0::Lsbf,
1792 spcmd0::Lsbf,
1793 Spcmd0_SPEC,
1794 crate::common::RW,
1795 > {
1796 crate::common::RegisterField::<
1797 12,
1798 0x1,
1799 1,
1800 0,
1801 spcmd0::Lsbf,
1802 spcmd0::Lsbf,
1803 Spcmd0_SPEC,
1804 crate::common::RW,
1805 >::from_register(self, 0)
1806 }
1807
1808 #[doc = "SPI Next-Access Delay Enable"]
1809 #[inline(always)]
1810 pub fn spnden(
1811 self,
1812 ) -> crate::common::RegisterField<
1813 13,
1814 0x1,
1815 1,
1816 0,
1817 spcmd0::Spnden,
1818 spcmd0::Spnden,
1819 Spcmd0_SPEC,
1820 crate::common::RW,
1821 > {
1822 crate::common::RegisterField::<
1823 13,
1824 0x1,
1825 1,
1826 0,
1827 spcmd0::Spnden,
1828 spcmd0::Spnden,
1829 Spcmd0_SPEC,
1830 crate::common::RW,
1831 >::from_register(self, 0)
1832 }
1833
1834 #[doc = "SSL Negation Delay Setting Enable"]
1835 #[inline(always)]
1836 pub fn slnden(
1837 self,
1838 ) -> crate::common::RegisterField<
1839 14,
1840 0x1,
1841 1,
1842 0,
1843 spcmd0::Slnden,
1844 spcmd0::Slnden,
1845 Spcmd0_SPEC,
1846 crate::common::RW,
1847 > {
1848 crate::common::RegisterField::<
1849 14,
1850 0x1,
1851 1,
1852 0,
1853 spcmd0::Slnden,
1854 spcmd0::Slnden,
1855 Spcmd0_SPEC,
1856 crate::common::RW,
1857 >::from_register(self, 0)
1858 }
1859
1860 #[doc = "RSPCK Delay Setting Enable"]
1861 #[inline(always)]
1862 pub fn sckden(
1863 self,
1864 ) -> crate::common::RegisterField<
1865 15,
1866 0x1,
1867 1,
1868 0,
1869 spcmd0::Sckden,
1870 spcmd0::Sckden,
1871 Spcmd0_SPEC,
1872 crate::common::RW,
1873 > {
1874 crate::common::RegisterField::<
1875 15,
1876 0x1,
1877 1,
1878 0,
1879 spcmd0::Sckden,
1880 spcmd0::Sckden,
1881 Spcmd0_SPEC,
1882 crate::common::RW,
1883 >::from_register(self, 0)
1884 }
1885}
1886impl ::core::default::Default for Spcmd0 {
1887 #[inline(always)]
1888 fn default() -> Spcmd0 {
1889 <crate::RegValueT<Spcmd0_SPEC> as RegisterValue<_>>::new(1805)
1890 }
1891}
1892pub mod spcmd0 {
1893
1894 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1895 pub struct Cpha_SPEC;
1896 pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
1897 impl Cpha {
1898 #[doc = "Select data sampling on leading edge, data change on trailing edge"]
1899 pub const _0: Self = Self::new(0);
1900
1901 #[doc = "Select data change on leading edge, data sampling on trailing edge"]
1902 pub const _1: Self = Self::new(1);
1903 }
1904 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1905 pub struct Cpol_SPEC;
1906 pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
1907 impl Cpol {
1908 #[doc = "Set RSPCK low during idle"]
1909 pub const _0: Self = Self::new(0);
1910
1911 #[doc = "Set RSPCK high during idle"]
1912 pub const _1: Self = Self::new(1);
1913 }
1914 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1915 pub struct Brdv_SPEC;
1916 pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
1917 impl Brdv {
1918 #[doc = "Base bit rate"]
1919 pub const _00: Self = Self::new(0);
1920
1921 #[doc = "Base bit rate divided by 2"]
1922 pub const _01: Self = Self::new(1);
1923
1924 #[doc = "Base bit rate divided by 4"]
1925 pub const _10: Self = Self::new(2);
1926
1927 #[doc = "Base bit rate divided by 8"]
1928 pub const _11: Self = Self::new(3);
1929 }
1930 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1931 pub struct Ssla_SPEC;
1932 pub type Ssla = crate::EnumBitfieldStruct<u8, Ssla_SPEC>;
1933 impl Ssla {
1934 #[doc = "SSL0"]
1935 pub const _000: Self = Self::new(0);
1936
1937 #[doc = "SSL1"]
1938 pub const _001: Self = Self::new(1);
1939 }
1940 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1941 pub struct Spb_SPEC;
1942 pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
1943 impl Spb {
1944 #[doc = "20 bits"]
1945 pub const _0_X_0: Self = Self::new(0);
1946
1947 #[doc = "24 bits"]
1948 pub const _0_X_1: Self = Self::new(1);
1949
1950 #[doc = "32 bits"]
1951 pub const _0_X_2: Self = Self::new(2);
1952
1953 #[doc = "32 bits"]
1954 pub const _0_X_3: Self = Self::new(3);
1955
1956 #[doc = "9 bits"]
1957 pub const _0_X_8: Self = Self::new(8);
1958
1959 #[doc = "10 bits"]
1960 pub const _0_X_9: Self = Self::new(9);
1961
1962 #[doc = "11 bits"]
1963 pub const _0_X_A: Self = Self::new(10);
1964
1965 #[doc = "12 bits"]
1966 pub const _0_X_B: Self = Self::new(11);
1967
1968 #[doc = "13 bits"]
1969 pub const _0_X_C: Self = Self::new(12);
1970
1971 #[doc = "14 bits"]
1972 pub const _0_X_D: Self = Self::new(13);
1973
1974 #[doc = "15 bits"]
1975 pub const _0_X_E: Self = Self::new(14);
1976
1977 #[doc = "16 bits"]
1978 pub const _0_X_F: Self = Self::new(15);
1979 }
1980 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1981 pub struct Lsbf_SPEC;
1982 pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
1983 impl Lsbf {
1984 #[doc = "MSB-first"]
1985 pub const _0: Self = Self::new(0);
1986
1987 #[doc = "LSB-first"]
1988 pub const _1: Self = Self::new(1);
1989 }
1990 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1991 pub struct Spnden_SPEC;
1992 pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
1993 impl Spnden {
1994 #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKB"]
1995 pub const _0: Self = Self::new(0);
1996
1997 #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
1998 pub const _1: Self = Self::new(1);
1999 }
2000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2001 pub struct Slnden_SPEC;
2002 pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
2003 impl Slnden {
2004 #[doc = "Select SSL negation delay of 1 RSPCK"]
2005 pub const _0: Self = Self::new(0);
2006
2007 #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
2008 pub const _1: Self = Self::new(1);
2009 }
2010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2011 pub struct Sckden_SPEC;
2012 pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
2013 impl Sckden {
2014 #[doc = "Select RSPCK delay of 1 RSPCK"]
2015 pub const _0: Self = Self::new(0);
2016
2017 #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
2018 pub const _1: Self = Self::new(1);
2019 }
2020}