ra2e3_pac/
gpt164.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:02:40 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM 16-bit Timer 4"]
28unsafe impl ::core::marker::Send for super::Gpt164 {}
29unsafe impl ::core::marker::Sync for super::Gpt164 {}
30impl super::Gpt164 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "General PWM Timer Write-Protection Register"]
38    #[inline(always)]
39    pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "General PWM Timer Software Start Register"]
48    #[inline(always)]
49    pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "General PWM Timer Software Stop Register"]
58    #[inline(always)]
59    pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(8usize),
63            )
64        }
65    }
66
67    #[doc = "General PWM Timer Software Clear Register"]
68    #[inline(always)]
69    pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70        unsafe {
71            crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72                self._svd2pac_as_ptr().add(12usize),
73            )
74        }
75    }
76
77    #[doc = "General PWM Timer Start Source Select Register"]
78    #[inline(always)]
79    pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(16usize),
83            )
84        }
85    }
86
87    #[doc = "General PWM Timer Stop Source Select Register"]
88    #[inline(always)]
89    pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "General PWM Timer Clear Source Select Register"]
98    #[inline(always)]
99    pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(24usize),
103            )
104        }
105    }
106
107    #[doc = "General PWM Timer Up Count Source Select Register"]
108    #[inline(always)]
109    pub const fn gtupsr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(28usize),
115            )
116        }
117    }
118
119    #[doc = "General PWM Timer Down Count Source Select Register"]
120    #[inline(always)]
121    pub const fn gtdnsr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(32usize),
127            )
128        }
129    }
130
131    #[doc = "General PWM Timer Input Capture Source Select Register A"]
132    #[inline(always)]
133    pub const fn gticasr(
134        &self,
135    ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(36usize),
139            )
140        }
141    }
142
143    #[doc = "General PWM Timer Input Capture Source Select Register B"]
144    #[inline(always)]
145    pub const fn gticbsr(
146        &self,
147    ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(40usize),
151            )
152        }
153    }
154
155    #[doc = "General PWM Timer Control Register"]
156    #[inline(always)]
157    pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(44usize),
161            )
162        }
163    }
164
165    #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166    #[inline(always)]
167    pub const fn gtuddtyc(
168        &self,
169    ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(48usize),
173            )
174        }
175    }
176
177    #[doc = "General PWM Timer I/O Control Register"]
178    #[inline(always)]
179    pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(52usize),
183            )
184        }
185    }
186
187    #[doc = "General PWM Timer Interrupt Output Setting Register"]
188    #[inline(always)]
189    pub const fn gtintad(
190        &self,
191    ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(56usize),
195            )
196        }
197    }
198
199    #[doc = "General PWM Timer Status Register"]
200    #[inline(always)]
201    pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(60usize),
205            )
206        }
207    }
208
209    #[doc = "General PWM Timer Buffer Enable Register"]
210    #[inline(always)]
211    pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(64usize),
215            )
216        }
217    }
218
219    #[doc = "General PWM Timer Counter"]
220    #[inline(always)]
221    pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(72usize),
225            )
226        }
227    }
228
229    #[doc = "General PWM Timer Compare Capture Register A"]
230    #[inline(always)]
231    pub const fn gtccra(
232        &self,
233    ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(76usize),
237            )
238        }
239    }
240
241    #[doc = "General PWM Timer Compare Capture Register B"]
242    #[inline(always)]
243    pub const fn gtccrb(
244        &self,
245    ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(80usize),
249            )
250        }
251    }
252
253    #[doc = "General PWM Timer Compare Capture Register C"]
254    #[inline(always)]
255    pub const fn gtccrc(
256        &self,
257    ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(84usize),
261            )
262        }
263    }
264
265    #[doc = "General PWM Timer Compare Capture Register E"]
266    #[inline(always)]
267    pub const fn gtccre(
268        &self,
269    ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(88usize),
273            )
274        }
275    }
276
277    #[doc = "General PWM Timer Compare Capture Register D"]
278    #[inline(always)]
279    pub const fn gtccrd(
280        &self,
281    ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(92usize),
285            )
286        }
287    }
288
289    #[doc = "General PWM Timer Compare Capture Register F"]
290    #[inline(always)]
291    pub const fn gtccrf(
292        &self,
293    ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(96usize),
297            )
298        }
299    }
300
301    #[doc = "General PWM Timer Cycle Setting Register"]
302    #[inline(always)]
303    pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(100usize),
307            )
308        }
309    }
310
311    #[doc = "General PWM Timer Cycle Setting Buffer Register"]
312    #[inline(always)]
313    pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(104usize),
317            )
318        }
319    }
320
321    #[doc = "General PWM Timer Dead Time Control Register"]
322    #[inline(always)]
323    pub const fn gtdtcr(
324        &self,
325    ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(136usize),
329            )
330        }
331    }
332
333    #[doc = "General PWM Timer Dead Time Value Register U"]
334    #[inline(always)]
335    pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(140usize),
339            )
340        }
341    }
342}
343#[doc(hidden)]
344#[derive(Copy, Clone, Eq, PartialEq)]
345pub struct Gtwp_SPEC;
346impl crate::sealed::RegSpec for Gtwp_SPEC {
347    type DataType = u32;
348}
349
350#[doc = "General PWM Timer Write-Protection Register"]
351pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
352
353impl Gtwp {
354    #[doc = "Register Write Disable"]
355    #[inline(always)]
356    pub fn wp(
357        self,
358    ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
359    {
360        crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
361    }
362
363    #[doc = "GTWP Key Code"]
364    #[inline(always)]
365    pub fn prkey(
366        self,
367    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Gtwp_SPEC, crate::common::W> {
368        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Gtwp_SPEC,crate::common::W>::from_register(self,0)
369    }
370}
371impl ::core::default::Default for Gtwp {
372    #[inline(always)]
373    fn default() -> Gtwp {
374        <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
375    }
376}
377pub mod gtwp {
378
379    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
380    pub struct Wp_SPEC;
381    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
382    impl Wp {
383        #[doc = "Write to the register enabled"]
384        pub const _0: Self = Self::new(0);
385
386        #[doc = "Write to the register disabled"]
387        pub const _1: Self = Self::new(1);
388    }
389}
390#[doc(hidden)]
391#[derive(Copy, Clone, Eq, PartialEq)]
392pub struct Gtstr_SPEC;
393impl crate::sealed::RegSpec for Gtstr_SPEC {
394    type DataType = u32;
395}
396
397#[doc = "General PWM Timer Software Start Register"]
398pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
399
400impl Gtstr {
401    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
402    #[inline(always)]
403    pub fn cstrt0(
404        self,
405    ) -> crate::common::RegisterField<
406        0,
407        0x1,
408        1,
409        0,
410        gtstr::Cstrt0,
411        gtstr::Cstrt0,
412        Gtstr_SPEC,
413        crate::common::RW,
414    > {
415        crate::common::RegisterField::<
416            0,
417            0x1,
418            1,
419            0,
420            gtstr::Cstrt0,
421            gtstr::Cstrt0,
422            Gtstr_SPEC,
423            crate::common::RW,
424        >::from_register(self, 0)
425    }
426
427    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
428    #[inline(always)]
429    pub fn cstrt1(
430        self,
431    ) -> crate::common::RegisterField<
432        1,
433        0x1,
434        1,
435        0,
436        gtstr::Cstrt1,
437        gtstr::Cstrt1,
438        Gtstr_SPEC,
439        crate::common::RW,
440    > {
441        crate::common::RegisterField::<
442            1,
443            0x1,
444            1,
445            0,
446            gtstr::Cstrt1,
447            gtstr::Cstrt1,
448            Gtstr_SPEC,
449            crate::common::RW,
450        >::from_register(self, 0)
451    }
452
453    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
454    #[inline(always)]
455    pub fn cstrt2(
456        self,
457    ) -> crate::common::RegisterField<
458        2,
459        0x1,
460        1,
461        0,
462        gtstr::Cstrt2,
463        gtstr::Cstrt2,
464        Gtstr_SPEC,
465        crate::common::RW,
466    > {
467        crate::common::RegisterField::<
468            2,
469            0x1,
470            1,
471            0,
472            gtstr::Cstrt2,
473            gtstr::Cstrt2,
474            Gtstr_SPEC,
475            crate::common::RW,
476        >::from_register(self, 0)
477    }
478
479    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
480    #[inline(always)]
481    pub fn cstrt3(
482        self,
483    ) -> crate::common::RegisterField<
484        3,
485        0x1,
486        1,
487        0,
488        gtstr::Cstrt3,
489        gtstr::Cstrt3,
490        Gtstr_SPEC,
491        crate::common::RW,
492    > {
493        crate::common::RegisterField::<
494            3,
495            0x1,
496            1,
497            0,
498            gtstr::Cstrt3,
499            gtstr::Cstrt3,
500            Gtstr_SPEC,
501            crate::common::RW,
502        >::from_register(self, 0)
503    }
504
505    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
506    #[inline(always)]
507    pub fn cstrt4(
508        self,
509    ) -> crate::common::RegisterField<
510        4,
511        0x1,
512        1,
513        0,
514        gtstr::Cstrt4,
515        gtstr::Cstrt4,
516        Gtstr_SPEC,
517        crate::common::RW,
518    > {
519        crate::common::RegisterField::<
520            4,
521            0x1,
522            1,
523            0,
524            gtstr::Cstrt4,
525            gtstr::Cstrt4,
526            Gtstr_SPEC,
527            crate::common::RW,
528        >::from_register(self, 0)
529    }
530
531    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
532    #[inline(always)]
533    pub fn cstrt5(
534        self,
535    ) -> crate::common::RegisterField<
536        5,
537        0x1,
538        1,
539        0,
540        gtstr::Cstrt5,
541        gtstr::Cstrt5,
542        Gtstr_SPEC,
543        crate::common::RW,
544    > {
545        crate::common::RegisterField::<
546            5,
547            0x1,
548            1,
549            0,
550            gtstr::Cstrt5,
551            gtstr::Cstrt5,
552            Gtstr_SPEC,
553            crate::common::RW,
554        >::from_register(self, 0)
555    }
556
557    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
558    #[inline(always)]
559    pub fn cstrt6(
560        self,
561    ) -> crate::common::RegisterField<
562        6,
563        0x1,
564        1,
565        0,
566        gtstr::Cstrt6,
567        gtstr::Cstrt6,
568        Gtstr_SPEC,
569        crate::common::RW,
570    > {
571        crate::common::RegisterField::<
572            6,
573            0x1,
574            1,
575            0,
576            gtstr::Cstrt6,
577            gtstr::Cstrt6,
578            Gtstr_SPEC,
579            crate::common::RW,
580        >::from_register(self, 0)
581    }
582
583    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
584    #[inline(always)]
585    pub fn cstrt7(
586        self,
587    ) -> crate::common::RegisterField<
588        7,
589        0x1,
590        1,
591        0,
592        gtstr::Cstrt7,
593        gtstr::Cstrt7,
594        Gtstr_SPEC,
595        crate::common::RW,
596    > {
597        crate::common::RegisterField::<
598            7,
599            0x1,
600            1,
601            0,
602            gtstr::Cstrt7,
603            gtstr::Cstrt7,
604            Gtstr_SPEC,
605            crate::common::RW,
606        >::from_register(self, 0)
607    }
608
609    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
610    #[inline(always)]
611    pub fn cstrt8(
612        self,
613    ) -> crate::common::RegisterField<
614        8,
615        0x1,
616        1,
617        0,
618        gtstr::Cstrt8,
619        gtstr::Cstrt8,
620        Gtstr_SPEC,
621        crate::common::RW,
622    > {
623        crate::common::RegisterField::<
624            8,
625            0x1,
626            1,
627            0,
628            gtstr::Cstrt8,
629            gtstr::Cstrt8,
630            Gtstr_SPEC,
631            crate::common::RW,
632        >::from_register(self, 0)
633    }
634
635    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
636    #[inline(always)]
637    pub fn cstrt9(
638        self,
639    ) -> crate::common::RegisterField<
640        9,
641        0x1,
642        1,
643        0,
644        gtstr::Cstrt9,
645        gtstr::Cstrt9,
646        Gtstr_SPEC,
647        crate::common::RW,
648    > {
649        crate::common::RegisterField::<
650            9,
651            0x1,
652            1,
653            0,
654            gtstr::Cstrt9,
655            gtstr::Cstrt9,
656            Gtstr_SPEC,
657            crate::common::RW,
658        >::from_register(self, 0)
659    }
660}
661impl ::core::default::Default for Gtstr {
662    #[inline(always)]
663    fn default() -> Gtstr {
664        <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
665    }
666}
667pub mod gtstr {
668
669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
670    pub struct Cstrt0_SPEC;
671    pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
672    impl Cstrt0 {
673        #[doc = "GTCNT counter not start"]
674        pub const _0: Self = Self::new(0);
675
676        #[doc = "GTCNT counter start"]
677        pub const _1: Self = Self::new(1);
678    }
679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
680    pub struct Cstrt1_SPEC;
681    pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
682    impl Cstrt1 {
683        #[doc = "GTCNT counter not start"]
684        pub const _0: Self = Self::new(0);
685
686        #[doc = "GTCNT counter start"]
687        pub const _1: Self = Self::new(1);
688    }
689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
690    pub struct Cstrt2_SPEC;
691    pub type Cstrt2 = crate::EnumBitfieldStruct<u8, Cstrt2_SPEC>;
692    impl Cstrt2 {
693        #[doc = "GTCNT counter not start"]
694        pub const _0: Self = Self::new(0);
695
696        #[doc = "GTCNT counter start"]
697        pub const _1: Self = Self::new(1);
698    }
699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
700    pub struct Cstrt3_SPEC;
701    pub type Cstrt3 = crate::EnumBitfieldStruct<u8, Cstrt3_SPEC>;
702    impl Cstrt3 {
703        #[doc = "GTCNT counter not start"]
704        pub const _0: Self = Self::new(0);
705
706        #[doc = "GTCNT counter start"]
707        pub const _1: Self = Self::new(1);
708    }
709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
710    pub struct Cstrt4_SPEC;
711    pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
712    impl Cstrt4 {
713        #[doc = "GTCNT counter not start"]
714        pub const _0: Self = Self::new(0);
715
716        #[doc = "GTCNT counter start"]
717        pub const _1: Self = Self::new(1);
718    }
719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
720    pub struct Cstrt5_SPEC;
721    pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
722    impl Cstrt5 {
723        #[doc = "GTCNT counter not start"]
724        pub const _0: Self = Self::new(0);
725
726        #[doc = "GTCNT counter start"]
727        pub const _1: Self = Self::new(1);
728    }
729    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
730    pub struct Cstrt6_SPEC;
731    pub type Cstrt6 = crate::EnumBitfieldStruct<u8, Cstrt6_SPEC>;
732    impl Cstrt6 {
733        #[doc = "GTCNT counter not start"]
734        pub const _0: Self = Self::new(0);
735
736        #[doc = "GTCNT counter start"]
737        pub const _1: Self = Self::new(1);
738    }
739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
740    pub struct Cstrt7_SPEC;
741    pub type Cstrt7 = crate::EnumBitfieldStruct<u8, Cstrt7_SPEC>;
742    impl Cstrt7 {
743        #[doc = "GTCNT counter not start"]
744        pub const _0: Self = Self::new(0);
745
746        #[doc = "GTCNT counter start"]
747        pub const _1: Self = Self::new(1);
748    }
749    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
750    pub struct Cstrt8_SPEC;
751    pub type Cstrt8 = crate::EnumBitfieldStruct<u8, Cstrt8_SPEC>;
752    impl Cstrt8 {
753        #[doc = "GTCNT counter not start"]
754        pub const _0: Self = Self::new(0);
755
756        #[doc = "GTCNT counter start"]
757        pub const _1: Self = Self::new(1);
758    }
759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
760    pub struct Cstrt9_SPEC;
761    pub type Cstrt9 = crate::EnumBitfieldStruct<u8, Cstrt9_SPEC>;
762    impl Cstrt9 {
763        #[doc = "GTCNT counter not start"]
764        pub const _0: Self = Self::new(0);
765
766        #[doc = "GTCNT counter start"]
767        pub const _1: Self = Self::new(1);
768    }
769}
770#[doc(hidden)]
771#[derive(Copy, Clone, Eq, PartialEq)]
772pub struct Gtstp_SPEC;
773impl crate::sealed::RegSpec for Gtstp_SPEC {
774    type DataType = u32;
775}
776
777#[doc = "General PWM Timer Software Stop Register"]
778pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
779
780impl Gtstp {
781    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
782    #[inline(always)]
783    pub fn cstop0(
784        self,
785    ) -> crate::common::RegisterField<
786        0,
787        0x1,
788        1,
789        0,
790        gtstp::Cstop0,
791        gtstp::Cstop0,
792        Gtstp_SPEC,
793        crate::common::RW,
794    > {
795        crate::common::RegisterField::<
796            0,
797            0x1,
798            1,
799            0,
800            gtstp::Cstop0,
801            gtstp::Cstop0,
802            Gtstp_SPEC,
803            crate::common::RW,
804        >::from_register(self, 0)
805    }
806
807    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
808    #[inline(always)]
809    pub fn cstop1(
810        self,
811    ) -> crate::common::RegisterField<
812        1,
813        0x1,
814        1,
815        0,
816        gtstp::Cstop1,
817        gtstp::Cstop1,
818        Gtstp_SPEC,
819        crate::common::RW,
820    > {
821        crate::common::RegisterField::<
822            1,
823            0x1,
824            1,
825            0,
826            gtstp::Cstop1,
827            gtstp::Cstop1,
828            Gtstp_SPEC,
829            crate::common::RW,
830        >::from_register(self, 0)
831    }
832
833    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
834    #[inline(always)]
835    pub fn cstop2(
836        self,
837    ) -> crate::common::RegisterField<
838        2,
839        0x1,
840        1,
841        0,
842        gtstp::Cstop2,
843        gtstp::Cstop2,
844        Gtstp_SPEC,
845        crate::common::RW,
846    > {
847        crate::common::RegisterField::<
848            2,
849            0x1,
850            1,
851            0,
852            gtstp::Cstop2,
853            gtstp::Cstop2,
854            Gtstp_SPEC,
855            crate::common::RW,
856        >::from_register(self, 0)
857    }
858
859    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
860    #[inline(always)]
861    pub fn cstop3(
862        self,
863    ) -> crate::common::RegisterField<
864        3,
865        0x1,
866        1,
867        0,
868        gtstp::Cstop3,
869        gtstp::Cstop3,
870        Gtstp_SPEC,
871        crate::common::RW,
872    > {
873        crate::common::RegisterField::<
874            3,
875            0x1,
876            1,
877            0,
878            gtstp::Cstop3,
879            gtstp::Cstop3,
880            Gtstp_SPEC,
881            crate::common::RW,
882        >::from_register(self, 0)
883    }
884
885    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
886    #[inline(always)]
887    pub fn cstop4(
888        self,
889    ) -> crate::common::RegisterField<
890        4,
891        0x1,
892        1,
893        0,
894        gtstp::Cstop4,
895        gtstp::Cstop4,
896        Gtstp_SPEC,
897        crate::common::RW,
898    > {
899        crate::common::RegisterField::<
900            4,
901            0x1,
902            1,
903            0,
904            gtstp::Cstop4,
905            gtstp::Cstop4,
906            Gtstp_SPEC,
907            crate::common::RW,
908        >::from_register(self, 0)
909    }
910
911    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
912    #[inline(always)]
913    pub fn cstop5(
914        self,
915    ) -> crate::common::RegisterField<
916        5,
917        0x1,
918        1,
919        0,
920        gtstp::Cstop5,
921        gtstp::Cstop5,
922        Gtstp_SPEC,
923        crate::common::RW,
924    > {
925        crate::common::RegisterField::<
926            5,
927            0x1,
928            1,
929            0,
930            gtstp::Cstop5,
931            gtstp::Cstop5,
932            Gtstp_SPEC,
933            crate::common::RW,
934        >::from_register(self, 0)
935    }
936
937    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
938    #[inline(always)]
939    pub fn cstop6(
940        self,
941    ) -> crate::common::RegisterField<
942        6,
943        0x1,
944        1,
945        0,
946        gtstp::Cstop6,
947        gtstp::Cstop6,
948        Gtstp_SPEC,
949        crate::common::RW,
950    > {
951        crate::common::RegisterField::<
952            6,
953            0x1,
954            1,
955            0,
956            gtstp::Cstop6,
957            gtstp::Cstop6,
958            Gtstp_SPEC,
959            crate::common::RW,
960        >::from_register(self, 0)
961    }
962
963    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
964    #[inline(always)]
965    pub fn cstop7(
966        self,
967    ) -> crate::common::RegisterField<
968        7,
969        0x1,
970        1,
971        0,
972        gtstp::Cstop7,
973        gtstp::Cstop7,
974        Gtstp_SPEC,
975        crate::common::RW,
976    > {
977        crate::common::RegisterField::<
978            7,
979            0x1,
980            1,
981            0,
982            gtstp::Cstop7,
983            gtstp::Cstop7,
984            Gtstp_SPEC,
985            crate::common::RW,
986        >::from_register(self, 0)
987    }
988
989    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
990    #[inline(always)]
991    pub fn cstop8(
992        self,
993    ) -> crate::common::RegisterField<
994        8,
995        0x1,
996        1,
997        0,
998        gtstp::Cstop8,
999        gtstp::Cstop8,
1000        Gtstp_SPEC,
1001        crate::common::RW,
1002    > {
1003        crate::common::RegisterField::<
1004            8,
1005            0x1,
1006            1,
1007            0,
1008            gtstp::Cstop8,
1009            gtstp::Cstop8,
1010            Gtstp_SPEC,
1011            crate::common::RW,
1012        >::from_register(self, 0)
1013    }
1014
1015    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1016    #[inline(always)]
1017    pub fn cstop9(
1018        self,
1019    ) -> crate::common::RegisterField<
1020        9,
1021        0x1,
1022        1,
1023        0,
1024        gtstp::Cstop9,
1025        gtstp::Cstop9,
1026        Gtstp_SPEC,
1027        crate::common::RW,
1028    > {
1029        crate::common::RegisterField::<
1030            9,
1031            0x1,
1032            1,
1033            0,
1034            gtstp::Cstop9,
1035            gtstp::Cstop9,
1036            Gtstp_SPEC,
1037            crate::common::RW,
1038        >::from_register(self, 0)
1039    }
1040}
1041impl ::core::default::Default for Gtstp {
1042    #[inline(always)]
1043    fn default() -> Gtstp {
1044        <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1045    }
1046}
1047pub mod gtstp {
1048
1049    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1050    pub struct Cstop0_SPEC;
1051    pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1052    impl Cstop0 {
1053        #[doc = "GTCNT counter not stop"]
1054        pub const _0: Self = Self::new(0);
1055
1056        #[doc = "GTCNT counter stop"]
1057        pub const _1: Self = Self::new(1);
1058    }
1059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1060    pub struct Cstop1_SPEC;
1061    pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1062    impl Cstop1 {
1063        #[doc = "GTCNT counter not stop"]
1064        pub const _0: Self = Self::new(0);
1065
1066        #[doc = "GTCNT counter stop"]
1067        pub const _1: Self = Self::new(1);
1068    }
1069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1070    pub struct Cstop2_SPEC;
1071    pub type Cstop2 = crate::EnumBitfieldStruct<u8, Cstop2_SPEC>;
1072    impl Cstop2 {
1073        #[doc = "GTCNT counter not stop"]
1074        pub const _0: Self = Self::new(0);
1075
1076        #[doc = "GTCNT counter stop"]
1077        pub const _1: Self = Self::new(1);
1078    }
1079    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1080    pub struct Cstop3_SPEC;
1081    pub type Cstop3 = crate::EnumBitfieldStruct<u8, Cstop3_SPEC>;
1082    impl Cstop3 {
1083        #[doc = "GTCNT counter not stop"]
1084        pub const _0: Self = Self::new(0);
1085
1086        #[doc = "GTCNT counter stop"]
1087        pub const _1: Self = Self::new(1);
1088    }
1089    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1090    pub struct Cstop4_SPEC;
1091    pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1092    impl Cstop4 {
1093        #[doc = "GTCNT counter not stop"]
1094        pub const _0: Self = Self::new(0);
1095
1096        #[doc = "GTCNT counter stop"]
1097        pub const _1: Self = Self::new(1);
1098    }
1099    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1100    pub struct Cstop5_SPEC;
1101    pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1102    impl Cstop5 {
1103        #[doc = "GTCNT counter not stop"]
1104        pub const _0: Self = Self::new(0);
1105
1106        #[doc = "GTCNT counter stop"]
1107        pub const _1: Self = Self::new(1);
1108    }
1109    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1110    pub struct Cstop6_SPEC;
1111    pub type Cstop6 = crate::EnumBitfieldStruct<u8, Cstop6_SPEC>;
1112    impl Cstop6 {
1113        #[doc = "GTCNT counter not stop"]
1114        pub const _0: Self = Self::new(0);
1115
1116        #[doc = "GTCNT counter stop"]
1117        pub const _1: Self = Self::new(1);
1118    }
1119    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1120    pub struct Cstop7_SPEC;
1121    pub type Cstop7 = crate::EnumBitfieldStruct<u8, Cstop7_SPEC>;
1122    impl Cstop7 {
1123        #[doc = "GTCNT counter not stop"]
1124        pub const _0: Self = Self::new(0);
1125
1126        #[doc = "GTCNT counter stop"]
1127        pub const _1: Self = Self::new(1);
1128    }
1129    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1130    pub struct Cstop8_SPEC;
1131    pub type Cstop8 = crate::EnumBitfieldStruct<u8, Cstop8_SPEC>;
1132    impl Cstop8 {
1133        #[doc = "GTCNT counter not stop"]
1134        pub const _0: Self = Self::new(0);
1135
1136        #[doc = "GTCNT counter stop"]
1137        pub const _1: Self = Self::new(1);
1138    }
1139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1140    pub struct Cstop9_SPEC;
1141    pub type Cstop9 = crate::EnumBitfieldStruct<u8, Cstop9_SPEC>;
1142    impl Cstop9 {
1143        #[doc = "GTCNT counter not stop"]
1144        pub const _0: Self = Self::new(0);
1145
1146        #[doc = "GTCNT counter stop"]
1147        pub const _1: Self = Self::new(1);
1148    }
1149}
1150#[doc(hidden)]
1151#[derive(Copy, Clone, Eq, PartialEq)]
1152pub struct Gtclr_SPEC;
1153impl crate::sealed::RegSpec for Gtclr_SPEC {
1154    type DataType = u32;
1155}
1156
1157#[doc = "General PWM Timer Software Clear Register"]
1158pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1159
1160impl Gtclr {
1161    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1162    #[inline(always)]
1163    pub fn cclr0(
1164        self,
1165    ) -> crate::common::RegisterField<
1166        0,
1167        0x1,
1168        1,
1169        0,
1170        gtclr::Cclr0,
1171        gtclr::Cclr0,
1172        Gtclr_SPEC,
1173        crate::common::W,
1174    > {
1175        crate::common::RegisterField::<
1176            0,
1177            0x1,
1178            1,
1179            0,
1180            gtclr::Cclr0,
1181            gtclr::Cclr0,
1182            Gtclr_SPEC,
1183            crate::common::W,
1184        >::from_register(self, 0)
1185    }
1186
1187    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1188    #[inline(always)]
1189    pub fn cclr1(
1190        self,
1191    ) -> crate::common::RegisterField<
1192        1,
1193        0x1,
1194        1,
1195        0,
1196        gtclr::Cclr1,
1197        gtclr::Cclr1,
1198        Gtclr_SPEC,
1199        crate::common::W,
1200    > {
1201        crate::common::RegisterField::<
1202            1,
1203            0x1,
1204            1,
1205            0,
1206            gtclr::Cclr1,
1207            gtclr::Cclr1,
1208            Gtclr_SPEC,
1209            crate::common::W,
1210        >::from_register(self, 0)
1211    }
1212
1213    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1214    #[inline(always)]
1215    pub fn cclr2(
1216        self,
1217    ) -> crate::common::RegisterField<
1218        2,
1219        0x1,
1220        1,
1221        0,
1222        gtclr::Cclr2,
1223        gtclr::Cclr2,
1224        Gtclr_SPEC,
1225        crate::common::W,
1226    > {
1227        crate::common::RegisterField::<
1228            2,
1229            0x1,
1230            1,
1231            0,
1232            gtclr::Cclr2,
1233            gtclr::Cclr2,
1234            Gtclr_SPEC,
1235            crate::common::W,
1236        >::from_register(self, 0)
1237    }
1238
1239    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1240    #[inline(always)]
1241    pub fn cclr3(
1242        self,
1243    ) -> crate::common::RegisterField<
1244        3,
1245        0x1,
1246        1,
1247        0,
1248        gtclr::Cclr3,
1249        gtclr::Cclr3,
1250        Gtclr_SPEC,
1251        crate::common::W,
1252    > {
1253        crate::common::RegisterField::<
1254            3,
1255            0x1,
1256            1,
1257            0,
1258            gtclr::Cclr3,
1259            gtclr::Cclr3,
1260            Gtclr_SPEC,
1261            crate::common::W,
1262        >::from_register(self, 0)
1263    }
1264
1265    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1266    #[inline(always)]
1267    pub fn cclr4(
1268        self,
1269    ) -> crate::common::RegisterField<
1270        4,
1271        0x1,
1272        1,
1273        0,
1274        gtclr::Cclr4,
1275        gtclr::Cclr4,
1276        Gtclr_SPEC,
1277        crate::common::W,
1278    > {
1279        crate::common::RegisterField::<
1280            4,
1281            0x1,
1282            1,
1283            0,
1284            gtclr::Cclr4,
1285            gtclr::Cclr4,
1286            Gtclr_SPEC,
1287            crate::common::W,
1288        >::from_register(self, 0)
1289    }
1290
1291    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1292    #[inline(always)]
1293    pub fn cclr5(
1294        self,
1295    ) -> crate::common::RegisterField<
1296        5,
1297        0x1,
1298        1,
1299        0,
1300        gtclr::Cclr5,
1301        gtclr::Cclr5,
1302        Gtclr_SPEC,
1303        crate::common::W,
1304    > {
1305        crate::common::RegisterField::<
1306            5,
1307            0x1,
1308            1,
1309            0,
1310            gtclr::Cclr5,
1311            gtclr::Cclr5,
1312            Gtclr_SPEC,
1313            crate::common::W,
1314        >::from_register(self, 0)
1315    }
1316
1317    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1318    #[inline(always)]
1319    pub fn cclr6(
1320        self,
1321    ) -> crate::common::RegisterField<
1322        6,
1323        0x1,
1324        1,
1325        0,
1326        gtclr::Cclr6,
1327        gtclr::Cclr6,
1328        Gtclr_SPEC,
1329        crate::common::W,
1330    > {
1331        crate::common::RegisterField::<
1332            6,
1333            0x1,
1334            1,
1335            0,
1336            gtclr::Cclr6,
1337            gtclr::Cclr6,
1338            Gtclr_SPEC,
1339            crate::common::W,
1340        >::from_register(self, 0)
1341    }
1342
1343    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1344    #[inline(always)]
1345    pub fn cclr7(
1346        self,
1347    ) -> crate::common::RegisterField<
1348        7,
1349        0x1,
1350        1,
1351        0,
1352        gtclr::Cclr7,
1353        gtclr::Cclr7,
1354        Gtclr_SPEC,
1355        crate::common::W,
1356    > {
1357        crate::common::RegisterField::<
1358            7,
1359            0x1,
1360            1,
1361            0,
1362            gtclr::Cclr7,
1363            gtclr::Cclr7,
1364            Gtclr_SPEC,
1365            crate::common::W,
1366        >::from_register(self, 0)
1367    }
1368
1369    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1370    #[inline(always)]
1371    pub fn cclr8(
1372        self,
1373    ) -> crate::common::RegisterField<
1374        8,
1375        0x1,
1376        1,
1377        0,
1378        gtclr::Cclr8,
1379        gtclr::Cclr8,
1380        Gtclr_SPEC,
1381        crate::common::W,
1382    > {
1383        crate::common::RegisterField::<
1384            8,
1385            0x1,
1386            1,
1387            0,
1388            gtclr::Cclr8,
1389            gtclr::Cclr8,
1390            Gtclr_SPEC,
1391            crate::common::W,
1392        >::from_register(self, 0)
1393    }
1394
1395    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1396    #[inline(always)]
1397    pub fn cclr9(
1398        self,
1399    ) -> crate::common::RegisterField<
1400        9,
1401        0x1,
1402        1,
1403        0,
1404        gtclr::Cclr9,
1405        gtclr::Cclr9,
1406        Gtclr_SPEC,
1407        crate::common::W,
1408    > {
1409        crate::common::RegisterField::<
1410            9,
1411            0x1,
1412            1,
1413            0,
1414            gtclr::Cclr9,
1415            gtclr::Cclr9,
1416            Gtclr_SPEC,
1417            crate::common::W,
1418        >::from_register(self, 0)
1419    }
1420}
1421impl ::core::default::Default for Gtclr {
1422    #[inline(always)]
1423    fn default() -> Gtclr {
1424        <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1425    }
1426}
1427pub mod gtclr {
1428
1429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1430    pub struct Cclr0_SPEC;
1431    pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
1432    impl Cclr0 {
1433        #[doc = "GTCNT counter is not cleared"]
1434        pub const _0: Self = Self::new(0);
1435
1436        #[doc = "GTCNT counter is cleared"]
1437        pub const _1: Self = Self::new(1);
1438    }
1439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1440    pub struct Cclr1_SPEC;
1441    pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
1442    impl Cclr1 {
1443        #[doc = "GTCNT counter is not cleared"]
1444        pub const _0: Self = Self::new(0);
1445
1446        #[doc = "GTCNT counter is cleared"]
1447        pub const _1: Self = Self::new(1);
1448    }
1449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1450    pub struct Cclr2_SPEC;
1451    pub type Cclr2 = crate::EnumBitfieldStruct<u8, Cclr2_SPEC>;
1452    impl Cclr2 {
1453        #[doc = "GTCNT counter is not cleared"]
1454        pub const _0: Self = Self::new(0);
1455
1456        #[doc = "GTCNT counter is cleared"]
1457        pub const _1: Self = Self::new(1);
1458    }
1459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1460    pub struct Cclr3_SPEC;
1461    pub type Cclr3 = crate::EnumBitfieldStruct<u8, Cclr3_SPEC>;
1462    impl Cclr3 {
1463        #[doc = "GTCNT counter is not cleared"]
1464        pub const _0: Self = Self::new(0);
1465
1466        #[doc = "GTCNT counter is cleared"]
1467        pub const _1: Self = Self::new(1);
1468    }
1469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1470    pub struct Cclr4_SPEC;
1471    pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
1472    impl Cclr4 {
1473        #[doc = "GTCNT counter is not cleared"]
1474        pub const _0: Self = Self::new(0);
1475
1476        #[doc = "GTCNT counter is cleared"]
1477        pub const _1: Self = Self::new(1);
1478    }
1479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1480    pub struct Cclr5_SPEC;
1481    pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
1482    impl Cclr5 {
1483        #[doc = "GTCNT counter is not cleared"]
1484        pub const _0: Self = Self::new(0);
1485
1486        #[doc = "GTCNT counter is cleared"]
1487        pub const _1: Self = Self::new(1);
1488    }
1489    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1490    pub struct Cclr6_SPEC;
1491    pub type Cclr6 = crate::EnumBitfieldStruct<u8, Cclr6_SPEC>;
1492    impl Cclr6 {
1493        #[doc = "GTCNT counter is not cleared"]
1494        pub const _0: Self = Self::new(0);
1495
1496        #[doc = "GTCNT counter is cleared"]
1497        pub const _1: Self = Self::new(1);
1498    }
1499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1500    pub struct Cclr7_SPEC;
1501    pub type Cclr7 = crate::EnumBitfieldStruct<u8, Cclr7_SPEC>;
1502    impl Cclr7 {
1503        #[doc = "GTCNT counter is not cleared"]
1504        pub const _0: Self = Self::new(0);
1505
1506        #[doc = "GTCNT counter is cleared"]
1507        pub const _1: Self = Self::new(1);
1508    }
1509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1510    pub struct Cclr8_SPEC;
1511    pub type Cclr8 = crate::EnumBitfieldStruct<u8, Cclr8_SPEC>;
1512    impl Cclr8 {
1513        #[doc = "GTCNT counter is not cleared"]
1514        pub const _0: Self = Self::new(0);
1515
1516        #[doc = "GTCNT counter is cleared"]
1517        pub const _1: Self = Self::new(1);
1518    }
1519    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1520    pub struct Cclr9_SPEC;
1521    pub type Cclr9 = crate::EnumBitfieldStruct<u8, Cclr9_SPEC>;
1522    impl Cclr9 {
1523        #[doc = "GTCNT counter is not cleared"]
1524        pub const _0: Self = Self::new(0);
1525
1526        #[doc = "GTCNT counter is cleared"]
1527        pub const _1: Self = Self::new(1);
1528    }
1529}
1530#[doc(hidden)]
1531#[derive(Copy, Clone, Eq, PartialEq)]
1532pub struct Gtssr_SPEC;
1533impl crate::sealed::RegSpec for Gtssr_SPEC {
1534    type DataType = u32;
1535}
1536
1537#[doc = "General PWM Timer Start Source Select Register"]
1538pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
1539
1540impl Gtssr {
1541    #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
1542    #[inline(always)]
1543    pub fn ssgtrgar(
1544        self,
1545    ) -> crate::common::RegisterField<
1546        0,
1547        0x1,
1548        1,
1549        0,
1550        gtssr::Ssgtrgar,
1551        gtssr::Ssgtrgar,
1552        Gtssr_SPEC,
1553        crate::common::RW,
1554    > {
1555        crate::common::RegisterField::<
1556            0,
1557            0x1,
1558            1,
1559            0,
1560            gtssr::Ssgtrgar,
1561            gtssr::Ssgtrgar,
1562            Gtssr_SPEC,
1563            crate::common::RW,
1564        >::from_register(self, 0)
1565    }
1566
1567    #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
1568    #[inline(always)]
1569    pub fn ssgtrgaf(
1570        self,
1571    ) -> crate::common::RegisterField<
1572        1,
1573        0x1,
1574        1,
1575        0,
1576        gtssr::Ssgtrgaf,
1577        gtssr::Ssgtrgaf,
1578        Gtssr_SPEC,
1579        crate::common::RW,
1580    > {
1581        crate::common::RegisterField::<
1582            1,
1583            0x1,
1584            1,
1585            0,
1586            gtssr::Ssgtrgaf,
1587            gtssr::Ssgtrgaf,
1588            Gtssr_SPEC,
1589            crate::common::RW,
1590        >::from_register(self, 0)
1591    }
1592
1593    #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
1594    #[inline(always)]
1595    pub fn ssgtrgbr(
1596        self,
1597    ) -> crate::common::RegisterField<
1598        2,
1599        0x1,
1600        1,
1601        0,
1602        gtssr::Ssgtrgbr,
1603        gtssr::Ssgtrgbr,
1604        Gtssr_SPEC,
1605        crate::common::RW,
1606    > {
1607        crate::common::RegisterField::<
1608            2,
1609            0x1,
1610            1,
1611            0,
1612            gtssr::Ssgtrgbr,
1613            gtssr::Ssgtrgbr,
1614            Gtssr_SPEC,
1615            crate::common::RW,
1616        >::from_register(self, 0)
1617    }
1618
1619    #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
1620    #[inline(always)]
1621    pub fn ssgtrgbf(
1622        self,
1623    ) -> crate::common::RegisterField<
1624        3,
1625        0x1,
1626        1,
1627        0,
1628        gtssr::Ssgtrgbf,
1629        gtssr::Ssgtrgbf,
1630        Gtssr_SPEC,
1631        crate::common::RW,
1632    > {
1633        crate::common::RegisterField::<
1634            3,
1635            0x1,
1636            1,
1637            0,
1638            gtssr::Ssgtrgbf,
1639            gtssr::Ssgtrgbf,
1640            Gtssr_SPEC,
1641            crate::common::RW,
1642        >::from_register(self, 0)
1643    }
1644
1645    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable"]
1646    #[inline(always)]
1647    pub fn sscarbl(
1648        self,
1649    ) -> crate::common::RegisterField<
1650        8,
1651        0x1,
1652        1,
1653        0,
1654        gtssr::Sscarbl,
1655        gtssr::Sscarbl,
1656        Gtssr_SPEC,
1657        crate::common::RW,
1658    > {
1659        crate::common::RegisterField::<
1660            8,
1661            0x1,
1662            1,
1663            0,
1664            gtssr::Sscarbl,
1665            gtssr::Sscarbl,
1666            Gtssr_SPEC,
1667            crate::common::RW,
1668        >::from_register(self, 0)
1669    }
1670
1671    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable"]
1672    #[inline(always)]
1673    pub fn sscarbh(
1674        self,
1675    ) -> crate::common::RegisterField<
1676        9,
1677        0x1,
1678        1,
1679        0,
1680        gtssr::Sscarbh,
1681        gtssr::Sscarbh,
1682        Gtssr_SPEC,
1683        crate::common::RW,
1684    > {
1685        crate::common::RegisterField::<
1686            9,
1687            0x1,
1688            1,
1689            0,
1690            gtssr::Sscarbh,
1691            gtssr::Sscarbh,
1692            Gtssr_SPEC,
1693            crate::common::RW,
1694        >::from_register(self, 0)
1695    }
1696
1697    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable"]
1698    #[inline(always)]
1699    pub fn sscafbl(
1700        self,
1701    ) -> crate::common::RegisterField<
1702        10,
1703        0x1,
1704        1,
1705        0,
1706        gtssr::Sscafbl,
1707        gtssr::Sscafbl,
1708        Gtssr_SPEC,
1709        crate::common::RW,
1710    > {
1711        crate::common::RegisterField::<
1712            10,
1713            0x1,
1714            1,
1715            0,
1716            gtssr::Sscafbl,
1717            gtssr::Sscafbl,
1718            Gtssr_SPEC,
1719            crate::common::RW,
1720        >::from_register(self, 0)
1721    }
1722
1723    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable"]
1724    #[inline(always)]
1725    pub fn sscafbh(
1726        self,
1727    ) -> crate::common::RegisterField<
1728        11,
1729        0x1,
1730        1,
1731        0,
1732        gtssr::Sscafbh,
1733        gtssr::Sscafbh,
1734        Gtssr_SPEC,
1735        crate::common::RW,
1736    > {
1737        crate::common::RegisterField::<
1738            11,
1739            0x1,
1740            1,
1741            0,
1742            gtssr::Sscafbh,
1743            gtssr::Sscafbh,
1744            Gtssr_SPEC,
1745            crate::common::RW,
1746        >::from_register(self, 0)
1747    }
1748
1749    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable"]
1750    #[inline(always)]
1751    pub fn sscbral(
1752        self,
1753    ) -> crate::common::RegisterField<
1754        12,
1755        0x1,
1756        1,
1757        0,
1758        gtssr::Sscbral,
1759        gtssr::Sscbral,
1760        Gtssr_SPEC,
1761        crate::common::RW,
1762    > {
1763        crate::common::RegisterField::<
1764            12,
1765            0x1,
1766            1,
1767            0,
1768            gtssr::Sscbral,
1769            gtssr::Sscbral,
1770            Gtssr_SPEC,
1771            crate::common::RW,
1772        >::from_register(self, 0)
1773    }
1774
1775    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable"]
1776    #[inline(always)]
1777    pub fn sscbrah(
1778        self,
1779    ) -> crate::common::RegisterField<
1780        13,
1781        0x1,
1782        1,
1783        0,
1784        gtssr::Sscbrah,
1785        gtssr::Sscbrah,
1786        Gtssr_SPEC,
1787        crate::common::RW,
1788    > {
1789        crate::common::RegisterField::<
1790            13,
1791            0x1,
1792            1,
1793            0,
1794            gtssr::Sscbrah,
1795            gtssr::Sscbrah,
1796            Gtssr_SPEC,
1797            crate::common::RW,
1798        >::from_register(self, 0)
1799    }
1800
1801    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable"]
1802    #[inline(always)]
1803    pub fn sscbfal(
1804        self,
1805    ) -> crate::common::RegisterField<
1806        14,
1807        0x1,
1808        1,
1809        0,
1810        gtssr::Sscbfal,
1811        gtssr::Sscbfal,
1812        Gtssr_SPEC,
1813        crate::common::RW,
1814    > {
1815        crate::common::RegisterField::<
1816            14,
1817            0x1,
1818            1,
1819            0,
1820            gtssr::Sscbfal,
1821            gtssr::Sscbfal,
1822            Gtssr_SPEC,
1823            crate::common::RW,
1824        >::from_register(self, 0)
1825    }
1826
1827    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable"]
1828    #[inline(always)]
1829    pub fn sscbfah(
1830        self,
1831    ) -> crate::common::RegisterField<
1832        15,
1833        0x1,
1834        1,
1835        0,
1836        gtssr::Sscbfah,
1837        gtssr::Sscbfah,
1838        Gtssr_SPEC,
1839        crate::common::RW,
1840    > {
1841        crate::common::RegisterField::<
1842            15,
1843            0x1,
1844            1,
1845            0,
1846            gtssr::Sscbfah,
1847            gtssr::Sscbfah,
1848            Gtssr_SPEC,
1849            crate::common::RW,
1850        >::from_register(self, 0)
1851    }
1852
1853    #[doc = "ELC_GPTA Event Source Counter Start Enable"]
1854    #[inline(always)]
1855    pub fn sselca(
1856        self,
1857    ) -> crate::common::RegisterField<
1858        16,
1859        0x1,
1860        1,
1861        0,
1862        gtssr::Sselca,
1863        gtssr::Sselca,
1864        Gtssr_SPEC,
1865        crate::common::RW,
1866    > {
1867        crate::common::RegisterField::<
1868            16,
1869            0x1,
1870            1,
1871            0,
1872            gtssr::Sselca,
1873            gtssr::Sselca,
1874            Gtssr_SPEC,
1875            crate::common::RW,
1876        >::from_register(self, 0)
1877    }
1878
1879    #[doc = "ELC_GPTB Event Source Counter Start Enable"]
1880    #[inline(always)]
1881    pub fn sselcb(
1882        self,
1883    ) -> crate::common::RegisterField<
1884        17,
1885        0x1,
1886        1,
1887        0,
1888        gtssr::Sselcb,
1889        gtssr::Sselcb,
1890        Gtssr_SPEC,
1891        crate::common::RW,
1892    > {
1893        crate::common::RegisterField::<
1894            17,
1895            0x1,
1896            1,
1897            0,
1898            gtssr::Sselcb,
1899            gtssr::Sselcb,
1900            Gtssr_SPEC,
1901            crate::common::RW,
1902        >::from_register(self, 0)
1903    }
1904
1905    #[doc = "ELC_GPTC Event Source Counter Start Enable"]
1906    #[inline(always)]
1907    pub fn sselcc(
1908        self,
1909    ) -> crate::common::RegisterField<
1910        18,
1911        0x1,
1912        1,
1913        0,
1914        gtssr::Sselcc,
1915        gtssr::Sselcc,
1916        Gtssr_SPEC,
1917        crate::common::RW,
1918    > {
1919        crate::common::RegisterField::<
1920            18,
1921            0x1,
1922            1,
1923            0,
1924            gtssr::Sselcc,
1925            gtssr::Sselcc,
1926            Gtssr_SPEC,
1927            crate::common::RW,
1928        >::from_register(self, 0)
1929    }
1930
1931    #[doc = "ELC_GPTD Event Source Counter Start Enable"]
1932    #[inline(always)]
1933    pub fn sselcd(
1934        self,
1935    ) -> crate::common::RegisterField<
1936        19,
1937        0x1,
1938        1,
1939        0,
1940        gtssr::Sselcd,
1941        gtssr::Sselcd,
1942        Gtssr_SPEC,
1943        crate::common::RW,
1944    > {
1945        crate::common::RegisterField::<
1946            19,
1947            0x1,
1948            1,
1949            0,
1950            gtssr::Sselcd,
1951            gtssr::Sselcd,
1952            Gtssr_SPEC,
1953            crate::common::RW,
1954        >::from_register(self, 0)
1955    }
1956
1957    #[doc = "Software Source Counter Start Enable"]
1958    #[inline(always)]
1959    pub fn cstrt(
1960        self,
1961    ) -> crate::common::RegisterField<
1962        31,
1963        0x1,
1964        1,
1965        0,
1966        gtssr::Cstrt,
1967        gtssr::Cstrt,
1968        Gtssr_SPEC,
1969        crate::common::RW,
1970    > {
1971        crate::common::RegisterField::<
1972            31,
1973            0x1,
1974            1,
1975            0,
1976            gtssr::Cstrt,
1977            gtssr::Cstrt,
1978            Gtssr_SPEC,
1979            crate::common::RW,
1980        >::from_register(self, 0)
1981    }
1982}
1983impl ::core::default::Default for Gtssr {
1984    #[inline(always)]
1985    fn default() -> Gtssr {
1986        <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
1987    }
1988}
1989pub mod gtssr {
1990
1991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1992    pub struct Ssgtrgar_SPEC;
1993    pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
1994    impl Ssgtrgar {
1995        #[doc = "Counter start disabled on the rising edge of GTETRGA input"]
1996        pub const _0: Self = Self::new(0);
1997
1998        #[doc = "Counter start enabled on the rising edge of GTETRGA input"]
1999        pub const _1: Self = Self::new(1);
2000    }
2001    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2002    pub struct Ssgtrgaf_SPEC;
2003    pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
2004    impl Ssgtrgaf {
2005        #[doc = "Counter start disabled on the falling edge of GTETRGA input"]
2006        pub const _0: Self = Self::new(0);
2007
2008        #[doc = "Counter start enabled on the falling edge of GTETRGA input"]
2009        pub const _1: Self = Self::new(1);
2010    }
2011    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2012    pub struct Ssgtrgbr_SPEC;
2013    pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
2014    impl Ssgtrgbr {
2015        #[doc = "Counter start disabled on the rising edge of GTETRGB input"]
2016        pub const _0: Self = Self::new(0);
2017
2018        #[doc = "Counter start enabled on the rising edge of GTETRGB input"]
2019        pub const _1: Self = Self::new(1);
2020    }
2021    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2022    pub struct Ssgtrgbf_SPEC;
2023    pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
2024    impl Ssgtrgbf {
2025        #[doc = "Counter start disabled on the falling edge of GTETRGB input"]
2026        pub const _0: Self = Self::new(0);
2027
2028        #[doc = "Counter start enabled on the falling edge of GTETRGB input"]
2029        pub const _1: Self = Self::new(1);
2030    }
2031    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2032    pub struct Sscarbl_SPEC;
2033    pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
2034    impl Sscarbl {
2035        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2036        pub const _0: Self = Self::new(0);
2037
2038        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2039        pub const _1: Self = Self::new(1);
2040    }
2041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2042    pub struct Sscarbh_SPEC;
2043    pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
2044    impl Sscarbh {
2045        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2046        pub const _0: Self = Self::new(0);
2047
2048        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2049        pub const _1: Self = Self::new(1);
2050    }
2051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2052    pub struct Sscafbl_SPEC;
2053    pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2054    impl Sscafbl {
2055        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2056        pub const _0: Self = Self::new(0);
2057
2058        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2059        pub const _1: Self = Self::new(1);
2060    }
2061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2062    pub struct Sscafbh_SPEC;
2063    pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2064    impl Sscafbh {
2065        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2066        pub const _0: Self = Self::new(0);
2067
2068        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2069        pub const _1: Self = Self::new(1);
2070    }
2071    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2072    pub struct Sscbral_SPEC;
2073    pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2074    impl Sscbral {
2075        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2076        pub const _0: Self = Self::new(0);
2077
2078        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2079        pub const _1: Self = Self::new(1);
2080    }
2081    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2082    pub struct Sscbrah_SPEC;
2083    pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2084    impl Sscbrah {
2085        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2086        pub const _0: Self = Self::new(0);
2087
2088        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2089        pub const _1: Self = Self::new(1);
2090    }
2091    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2092    pub struct Sscbfal_SPEC;
2093    pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2094    impl Sscbfal {
2095        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2096        pub const _0: Self = Self::new(0);
2097
2098        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2099        pub const _1: Self = Self::new(1);
2100    }
2101    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2102    pub struct Sscbfah_SPEC;
2103    pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2104    impl Sscbfah {
2105        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2106        pub const _0: Self = Self::new(0);
2107
2108        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2109        pub const _1: Self = Self::new(1);
2110    }
2111    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2112    pub struct Sselca_SPEC;
2113    pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2114    impl Sselca {
2115        #[doc = "Counter start disabled at the ELC_GPTA input"]
2116        pub const _0: Self = Self::new(0);
2117
2118        #[doc = "Counter start enabled at the ELC_GPTA input"]
2119        pub const _1: Self = Self::new(1);
2120    }
2121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2122    pub struct Sselcb_SPEC;
2123    pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2124    impl Sselcb {
2125        #[doc = "Counter start disabled at the ELC_GPTB input"]
2126        pub const _0: Self = Self::new(0);
2127
2128        #[doc = "Counter start enabled at the ELC_GPTB input"]
2129        pub const _1: Self = Self::new(1);
2130    }
2131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2132    pub struct Sselcc_SPEC;
2133    pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2134    impl Sselcc {
2135        #[doc = "Counter start disabled at the ELC_GPTC input"]
2136        pub const _0: Self = Self::new(0);
2137
2138        #[doc = "Counter start enabled at the ELC_GPTC input"]
2139        pub const _1: Self = Self::new(1);
2140    }
2141    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2142    pub struct Sselcd_SPEC;
2143    pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2144    impl Sselcd {
2145        #[doc = "Counter start disabled at the ELC_GPTD input"]
2146        pub const _0: Self = Self::new(0);
2147
2148        #[doc = "Counter start enabled at the ELC_GPTD input"]
2149        pub const _1: Self = Self::new(1);
2150    }
2151    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2152    pub struct Cstrt_SPEC;
2153    pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2154    impl Cstrt {
2155        #[doc = "Counter start disabled by the GTSTR register"]
2156        pub const _0: Self = Self::new(0);
2157
2158        #[doc = "Counter start enabled by the GTSTR register"]
2159        pub const _1: Self = Self::new(1);
2160    }
2161}
2162#[doc(hidden)]
2163#[derive(Copy, Clone, Eq, PartialEq)]
2164pub struct Gtpsr_SPEC;
2165impl crate::sealed::RegSpec for Gtpsr_SPEC {
2166    type DataType = u32;
2167}
2168
2169#[doc = "General PWM Timer Stop Source Select Register"]
2170pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
2171
2172impl Gtpsr {
2173    #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
2174    #[inline(always)]
2175    pub fn psgtrgar(
2176        self,
2177    ) -> crate::common::RegisterField<
2178        0,
2179        0x1,
2180        1,
2181        0,
2182        gtpsr::Psgtrgar,
2183        gtpsr::Psgtrgar,
2184        Gtpsr_SPEC,
2185        crate::common::RW,
2186    > {
2187        crate::common::RegisterField::<
2188            0,
2189            0x1,
2190            1,
2191            0,
2192            gtpsr::Psgtrgar,
2193            gtpsr::Psgtrgar,
2194            Gtpsr_SPEC,
2195            crate::common::RW,
2196        >::from_register(self, 0)
2197    }
2198
2199    #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
2200    #[inline(always)]
2201    pub fn psgtrgaf(
2202        self,
2203    ) -> crate::common::RegisterField<
2204        1,
2205        0x1,
2206        1,
2207        0,
2208        gtpsr::Psgtrgaf,
2209        gtpsr::Psgtrgaf,
2210        Gtpsr_SPEC,
2211        crate::common::RW,
2212    > {
2213        crate::common::RegisterField::<
2214            1,
2215            0x1,
2216            1,
2217            0,
2218            gtpsr::Psgtrgaf,
2219            gtpsr::Psgtrgaf,
2220            Gtpsr_SPEC,
2221            crate::common::RW,
2222        >::from_register(self, 0)
2223    }
2224
2225    #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
2226    #[inline(always)]
2227    pub fn psgtrgbr(
2228        self,
2229    ) -> crate::common::RegisterField<
2230        2,
2231        0x1,
2232        1,
2233        0,
2234        gtpsr::Psgtrgbr,
2235        gtpsr::Psgtrgbr,
2236        Gtpsr_SPEC,
2237        crate::common::RW,
2238    > {
2239        crate::common::RegisterField::<
2240            2,
2241            0x1,
2242            1,
2243            0,
2244            gtpsr::Psgtrgbr,
2245            gtpsr::Psgtrgbr,
2246            Gtpsr_SPEC,
2247            crate::common::RW,
2248        >::from_register(self, 0)
2249    }
2250
2251    #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
2252    #[inline(always)]
2253    pub fn psgtrgbf(
2254        self,
2255    ) -> crate::common::RegisterField<
2256        3,
2257        0x1,
2258        1,
2259        0,
2260        gtpsr::Psgtrgbf,
2261        gtpsr::Psgtrgbf,
2262        Gtpsr_SPEC,
2263        crate::common::RW,
2264    > {
2265        crate::common::RegisterField::<
2266            3,
2267            0x1,
2268            1,
2269            0,
2270            gtpsr::Psgtrgbf,
2271            gtpsr::Psgtrgbf,
2272            Gtpsr_SPEC,
2273            crate::common::RW,
2274        >::from_register(self, 0)
2275    }
2276
2277    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable"]
2278    #[inline(always)]
2279    pub fn pscarbl(
2280        self,
2281    ) -> crate::common::RegisterField<
2282        8,
2283        0x1,
2284        1,
2285        0,
2286        gtpsr::Pscarbl,
2287        gtpsr::Pscarbl,
2288        Gtpsr_SPEC,
2289        crate::common::RW,
2290    > {
2291        crate::common::RegisterField::<
2292            8,
2293            0x1,
2294            1,
2295            0,
2296            gtpsr::Pscarbl,
2297            gtpsr::Pscarbl,
2298            Gtpsr_SPEC,
2299            crate::common::RW,
2300        >::from_register(self, 0)
2301    }
2302
2303    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable"]
2304    #[inline(always)]
2305    pub fn pscarbh(
2306        self,
2307    ) -> crate::common::RegisterField<
2308        9,
2309        0x1,
2310        1,
2311        0,
2312        gtpsr::Pscarbh,
2313        gtpsr::Pscarbh,
2314        Gtpsr_SPEC,
2315        crate::common::RW,
2316    > {
2317        crate::common::RegisterField::<
2318            9,
2319            0x1,
2320            1,
2321            0,
2322            gtpsr::Pscarbh,
2323            gtpsr::Pscarbh,
2324            Gtpsr_SPEC,
2325            crate::common::RW,
2326        >::from_register(self, 0)
2327    }
2328
2329    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable"]
2330    #[inline(always)]
2331    pub fn pscafbl(
2332        self,
2333    ) -> crate::common::RegisterField<
2334        10,
2335        0x1,
2336        1,
2337        0,
2338        gtpsr::Pscafbl,
2339        gtpsr::Pscafbl,
2340        Gtpsr_SPEC,
2341        crate::common::RW,
2342    > {
2343        crate::common::RegisterField::<
2344            10,
2345            0x1,
2346            1,
2347            0,
2348            gtpsr::Pscafbl,
2349            gtpsr::Pscafbl,
2350            Gtpsr_SPEC,
2351            crate::common::RW,
2352        >::from_register(self, 0)
2353    }
2354
2355    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable"]
2356    #[inline(always)]
2357    pub fn pscafbh(
2358        self,
2359    ) -> crate::common::RegisterField<
2360        11,
2361        0x1,
2362        1,
2363        0,
2364        gtpsr::Pscafbh,
2365        gtpsr::Pscafbh,
2366        Gtpsr_SPEC,
2367        crate::common::RW,
2368    > {
2369        crate::common::RegisterField::<
2370            11,
2371            0x1,
2372            1,
2373            0,
2374            gtpsr::Pscafbh,
2375            gtpsr::Pscafbh,
2376            Gtpsr_SPEC,
2377            crate::common::RW,
2378        >::from_register(self, 0)
2379    }
2380
2381    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable"]
2382    #[inline(always)]
2383    pub fn pscbral(
2384        self,
2385    ) -> crate::common::RegisterField<
2386        12,
2387        0x1,
2388        1,
2389        0,
2390        gtpsr::Pscbral,
2391        gtpsr::Pscbral,
2392        Gtpsr_SPEC,
2393        crate::common::RW,
2394    > {
2395        crate::common::RegisterField::<
2396            12,
2397            0x1,
2398            1,
2399            0,
2400            gtpsr::Pscbral,
2401            gtpsr::Pscbral,
2402            Gtpsr_SPEC,
2403            crate::common::RW,
2404        >::from_register(self, 0)
2405    }
2406
2407    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable"]
2408    #[inline(always)]
2409    pub fn pscbrah(
2410        self,
2411    ) -> crate::common::RegisterField<
2412        13,
2413        0x1,
2414        1,
2415        0,
2416        gtpsr::Pscbrah,
2417        gtpsr::Pscbrah,
2418        Gtpsr_SPEC,
2419        crate::common::RW,
2420    > {
2421        crate::common::RegisterField::<
2422            13,
2423            0x1,
2424            1,
2425            0,
2426            gtpsr::Pscbrah,
2427            gtpsr::Pscbrah,
2428            Gtpsr_SPEC,
2429            crate::common::RW,
2430        >::from_register(self, 0)
2431    }
2432
2433    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable"]
2434    #[inline(always)]
2435    pub fn pscbfal(
2436        self,
2437    ) -> crate::common::RegisterField<
2438        14,
2439        0x1,
2440        1,
2441        0,
2442        gtpsr::Pscbfal,
2443        gtpsr::Pscbfal,
2444        Gtpsr_SPEC,
2445        crate::common::RW,
2446    > {
2447        crate::common::RegisterField::<
2448            14,
2449            0x1,
2450            1,
2451            0,
2452            gtpsr::Pscbfal,
2453            gtpsr::Pscbfal,
2454            Gtpsr_SPEC,
2455            crate::common::RW,
2456        >::from_register(self, 0)
2457    }
2458
2459    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable"]
2460    #[inline(always)]
2461    pub fn pscbfah(
2462        self,
2463    ) -> crate::common::RegisterField<
2464        15,
2465        0x1,
2466        1,
2467        0,
2468        gtpsr::Pscbfah,
2469        gtpsr::Pscbfah,
2470        Gtpsr_SPEC,
2471        crate::common::RW,
2472    > {
2473        crate::common::RegisterField::<
2474            15,
2475            0x1,
2476            1,
2477            0,
2478            gtpsr::Pscbfah,
2479            gtpsr::Pscbfah,
2480            Gtpsr_SPEC,
2481            crate::common::RW,
2482        >::from_register(self, 0)
2483    }
2484
2485    #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
2486    #[inline(always)]
2487    pub fn pselca(
2488        self,
2489    ) -> crate::common::RegisterField<
2490        16,
2491        0x1,
2492        1,
2493        0,
2494        gtpsr::Pselca,
2495        gtpsr::Pselca,
2496        Gtpsr_SPEC,
2497        crate::common::RW,
2498    > {
2499        crate::common::RegisterField::<
2500            16,
2501            0x1,
2502            1,
2503            0,
2504            gtpsr::Pselca,
2505            gtpsr::Pselca,
2506            Gtpsr_SPEC,
2507            crate::common::RW,
2508        >::from_register(self, 0)
2509    }
2510
2511    #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
2512    #[inline(always)]
2513    pub fn pselcb(
2514        self,
2515    ) -> crate::common::RegisterField<
2516        17,
2517        0x1,
2518        1,
2519        0,
2520        gtpsr::Pselcb,
2521        gtpsr::Pselcb,
2522        Gtpsr_SPEC,
2523        crate::common::RW,
2524    > {
2525        crate::common::RegisterField::<
2526            17,
2527            0x1,
2528            1,
2529            0,
2530            gtpsr::Pselcb,
2531            gtpsr::Pselcb,
2532            Gtpsr_SPEC,
2533            crate::common::RW,
2534        >::from_register(self, 0)
2535    }
2536
2537    #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
2538    #[inline(always)]
2539    pub fn pselcc(
2540        self,
2541    ) -> crate::common::RegisterField<
2542        18,
2543        0x1,
2544        1,
2545        0,
2546        gtpsr::Pselcc,
2547        gtpsr::Pselcc,
2548        Gtpsr_SPEC,
2549        crate::common::RW,
2550    > {
2551        crate::common::RegisterField::<
2552            18,
2553            0x1,
2554            1,
2555            0,
2556            gtpsr::Pselcc,
2557            gtpsr::Pselcc,
2558            Gtpsr_SPEC,
2559            crate::common::RW,
2560        >::from_register(self, 0)
2561    }
2562
2563    #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
2564    #[inline(always)]
2565    pub fn pselcd(
2566        self,
2567    ) -> crate::common::RegisterField<
2568        19,
2569        0x1,
2570        1,
2571        0,
2572        gtpsr::Pselcd,
2573        gtpsr::Pselcd,
2574        Gtpsr_SPEC,
2575        crate::common::RW,
2576    > {
2577        crate::common::RegisterField::<
2578            19,
2579            0x1,
2580            1,
2581            0,
2582            gtpsr::Pselcd,
2583            gtpsr::Pselcd,
2584            Gtpsr_SPEC,
2585            crate::common::RW,
2586        >::from_register(self, 0)
2587    }
2588
2589    #[doc = "Software Source Counter Stop Enable"]
2590    #[inline(always)]
2591    pub fn cstop(
2592        self,
2593    ) -> crate::common::RegisterField<
2594        31,
2595        0x1,
2596        1,
2597        0,
2598        gtpsr::Cstop,
2599        gtpsr::Cstop,
2600        Gtpsr_SPEC,
2601        crate::common::RW,
2602    > {
2603        crate::common::RegisterField::<
2604            31,
2605            0x1,
2606            1,
2607            0,
2608            gtpsr::Cstop,
2609            gtpsr::Cstop,
2610            Gtpsr_SPEC,
2611            crate::common::RW,
2612        >::from_register(self, 0)
2613    }
2614}
2615impl ::core::default::Default for Gtpsr {
2616    #[inline(always)]
2617    fn default() -> Gtpsr {
2618        <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
2619    }
2620}
2621pub mod gtpsr {
2622
2623    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2624    pub struct Psgtrgar_SPEC;
2625    pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
2626    impl Psgtrgar {
2627        #[doc = "Counter stop disabled on the rising edge of GTETRGA input"]
2628        pub const _0: Self = Self::new(0);
2629
2630        #[doc = "Counter stop enabled on the rising edge of GTETRGA input"]
2631        pub const _1: Self = Self::new(1);
2632    }
2633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2634    pub struct Psgtrgaf_SPEC;
2635    pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
2636    impl Psgtrgaf {
2637        #[doc = "Counter stop disabled on the falling edge of GTETRGA input"]
2638        pub const _0: Self = Self::new(0);
2639
2640        #[doc = "Counter stop enabled on the falling edge of GTETRGA input"]
2641        pub const _1: Self = Self::new(1);
2642    }
2643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2644    pub struct Psgtrgbr_SPEC;
2645    pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
2646    impl Psgtrgbr {
2647        #[doc = "Counter stop disabled on the rising edge of GTETRGB input"]
2648        pub const _0: Self = Self::new(0);
2649
2650        #[doc = "Counter stop enabled on the rising edge of GTETRGB input"]
2651        pub const _1: Self = Self::new(1);
2652    }
2653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2654    pub struct Psgtrgbf_SPEC;
2655    pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
2656    impl Psgtrgbf {
2657        #[doc = "Counter stop disabled on the falling edge of GTETRGB input"]
2658        pub const _0: Self = Self::new(0);
2659
2660        #[doc = "Counter stop enabled on the falling edge of GTETRGB input"]
2661        pub const _1: Self = Self::new(1);
2662    }
2663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2664    pub struct Pscarbl_SPEC;
2665    pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
2666    impl Pscarbl {
2667        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2668        pub const _0: Self = Self::new(0);
2669
2670        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2671        pub const _1: Self = Self::new(1);
2672    }
2673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2674    pub struct Pscarbh_SPEC;
2675    pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
2676    impl Pscarbh {
2677        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2678        pub const _0: Self = Self::new(0);
2679
2680        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2681        pub const _1: Self = Self::new(1);
2682    }
2683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2684    pub struct Pscafbl_SPEC;
2685    pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
2686    impl Pscafbl {
2687        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2688        pub const _0: Self = Self::new(0);
2689
2690        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2691        pub const _1: Self = Self::new(1);
2692    }
2693    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2694    pub struct Pscafbh_SPEC;
2695    pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
2696    impl Pscafbh {
2697        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2698        pub const _0: Self = Self::new(0);
2699
2700        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2701        pub const _1: Self = Self::new(1);
2702    }
2703    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2704    pub struct Pscbral_SPEC;
2705    pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
2706    impl Pscbral {
2707        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2708        pub const _0: Self = Self::new(0);
2709
2710        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2711        pub const _1: Self = Self::new(1);
2712    }
2713    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2714    pub struct Pscbrah_SPEC;
2715    pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
2716    impl Pscbrah {
2717        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2718        pub const _0: Self = Self::new(0);
2719
2720        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2721        pub const _1: Self = Self::new(1);
2722    }
2723    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2724    pub struct Pscbfal_SPEC;
2725    pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
2726    impl Pscbfal {
2727        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2728        pub const _0: Self = Self::new(0);
2729
2730        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2731        pub const _1: Self = Self::new(1);
2732    }
2733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2734    pub struct Pscbfah_SPEC;
2735    pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
2736    impl Pscbfah {
2737        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2738        pub const _0: Self = Self::new(0);
2739
2740        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2741        pub const _1: Self = Self::new(1);
2742    }
2743    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2744    pub struct Pselca_SPEC;
2745    pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
2746    impl Pselca {
2747        #[doc = "Counter stop disabled at the ELC_GPTA input"]
2748        pub const _0: Self = Self::new(0);
2749
2750        #[doc = "Counter stop enabled at the ELC_GPTA input"]
2751        pub const _1: Self = Self::new(1);
2752    }
2753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2754    pub struct Pselcb_SPEC;
2755    pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
2756    impl Pselcb {
2757        #[doc = "Counter stop disabled at the ELC_GPTB input"]
2758        pub const _0: Self = Self::new(0);
2759
2760        #[doc = "Counter stop enabled at the ELC_GPTB input"]
2761        pub const _1: Self = Self::new(1);
2762    }
2763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2764    pub struct Pselcc_SPEC;
2765    pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
2766    impl Pselcc {
2767        #[doc = "Counter stop disabled at the ELC_GPTC input"]
2768        pub const _0: Self = Self::new(0);
2769
2770        #[doc = "Counter stop enabled at the ELC_GPTC input"]
2771        pub const _1: Self = Self::new(1);
2772    }
2773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2774    pub struct Pselcd_SPEC;
2775    pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
2776    impl Pselcd {
2777        #[doc = "Counter stop disabled at the ELC_GPTD input"]
2778        pub const _0: Self = Self::new(0);
2779
2780        #[doc = "Counter stop enabled at the ELC_GPTD input"]
2781        pub const _1: Self = Self::new(1);
2782    }
2783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2784    pub struct Cstop_SPEC;
2785    pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
2786    impl Cstop {
2787        #[doc = "Counter stop disabled by the GTSTP register"]
2788        pub const _0: Self = Self::new(0);
2789
2790        #[doc = "Counter stop enabled by the GTSTP register"]
2791        pub const _1: Self = Self::new(1);
2792    }
2793}
2794#[doc(hidden)]
2795#[derive(Copy, Clone, Eq, PartialEq)]
2796pub struct Gtcsr_SPEC;
2797impl crate::sealed::RegSpec for Gtcsr_SPEC {
2798    type DataType = u32;
2799}
2800
2801#[doc = "General PWM Timer Clear Source Select Register"]
2802pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
2803
2804impl Gtcsr {
2805    #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
2806    #[inline(always)]
2807    pub fn csgtrgar(
2808        self,
2809    ) -> crate::common::RegisterField<
2810        0,
2811        0x1,
2812        1,
2813        0,
2814        gtcsr::Csgtrgar,
2815        gtcsr::Csgtrgar,
2816        Gtcsr_SPEC,
2817        crate::common::RW,
2818    > {
2819        crate::common::RegisterField::<
2820            0,
2821            0x1,
2822            1,
2823            0,
2824            gtcsr::Csgtrgar,
2825            gtcsr::Csgtrgar,
2826            Gtcsr_SPEC,
2827            crate::common::RW,
2828        >::from_register(self, 0)
2829    }
2830
2831    #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
2832    #[inline(always)]
2833    pub fn csgtrgaf(
2834        self,
2835    ) -> crate::common::RegisterField<
2836        1,
2837        0x1,
2838        1,
2839        0,
2840        gtcsr::Csgtrgaf,
2841        gtcsr::Csgtrgaf,
2842        Gtcsr_SPEC,
2843        crate::common::RW,
2844    > {
2845        crate::common::RegisterField::<
2846            1,
2847            0x1,
2848            1,
2849            0,
2850            gtcsr::Csgtrgaf,
2851            gtcsr::Csgtrgaf,
2852            Gtcsr_SPEC,
2853            crate::common::RW,
2854        >::from_register(self, 0)
2855    }
2856
2857    #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
2858    #[inline(always)]
2859    pub fn csgtrgbr(
2860        self,
2861    ) -> crate::common::RegisterField<
2862        2,
2863        0x1,
2864        1,
2865        0,
2866        gtcsr::Csgtrgbr,
2867        gtcsr::Csgtrgbr,
2868        Gtcsr_SPEC,
2869        crate::common::RW,
2870    > {
2871        crate::common::RegisterField::<
2872            2,
2873            0x1,
2874            1,
2875            0,
2876            gtcsr::Csgtrgbr,
2877            gtcsr::Csgtrgbr,
2878            Gtcsr_SPEC,
2879            crate::common::RW,
2880        >::from_register(self, 0)
2881    }
2882
2883    #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
2884    #[inline(always)]
2885    pub fn csgtrgbf(
2886        self,
2887    ) -> crate::common::RegisterField<
2888        3,
2889        0x1,
2890        1,
2891        0,
2892        gtcsr::Csgtrgbf,
2893        gtcsr::Csgtrgbf,
2894        Gtcsr_SPEC,
2895        crate::common::RW,
2896    > {
2897        crate::common::RegisterField::<
2898            3,
2899            0x1,
2900            1,
2901            0,
2902            gtcsr::Csgtrgbf,
2903            gtcsr::Csgtrgbf,
2904            Gtcsr_SPEC,
2905            crate::common::RW,
2906        >::from_register(self, 0)
2907    }
2908
2909    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable"]
2910    #[inline(always)]
2911    pub fn cscarbl(
2912        self,
2913    ) -> crate::common::RegisterField<
2914        8,
2915        0x1,
2916        1,
2917        0,
2918        gtcsr::Cscarbl,
2919        gtcsr::Cscarbl,
2920        Gtcsr_SPEC,
2921        crate::common::RW,
2922    > {
2923        crate::common::RegisterField::<
2924            8,
2925            0x1,
2926            1,
2927            0,
2928            gtcsr::Cscarbl,
2929            gtcsr::Cscarbl,
2930            Gtcsr_SPEC,
2931            crate::common::RW,
2932        >::from_register(self, 0)
2933    }
2934
2935    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable"]
2936    #[inline(always)]
2937    pub fn cscarbh(
2938        self,
2939    ) -> crate::common::RegisterField<
2940        9,
2941        0x1,
2942        1,
2943        0,
2944        gtcsr::Cscarbh,
2945        gtcsr::Cscarbh,
2946        Gtcsr_SPEC,
2947        crate::common::RW,
2948    > {
2949        crate::common::RegisterField::<
2950            9,
2951            0x1,
2952            1,
2953            0,
2954            gtcsr::Cscarbh,
2955            gtcsr::Cscarbh,
2956            Gtcsr_SPEC,
2957            crate::common::RW,
2958        >::from_register(self, 0)
2959    }
2960
2961    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable"]
2962    #[inline(always)]
2963    pub fn cscafbl(
2964        self,
2965    ) -> crate::common::RegisterField<
2966        10,
2967        0x1,
2968        1,
2969        0,
2970        gtcsr::Cscafbl,
2971        gtcsr::Cscafbl,
2972        Gtcsr_SPEC,
2973        crate::common::RW,
2974    > {
2975        crate::common::RegisterField::<
2976            10,
2977            0x1,
2978            1,
2979            0,
2980            gtcsr::Cscafbl,
2981            gtcsr::Cscafbl,
2982            Gtcsr_SPEC,
2983            crate::common::RW,
2984        >::from_register(self, 0)
2985    }
2986
2987    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable"]
2988    #[inline(always)]
2989    pub fn cscafbh(
2990        self,
2991    ) -> crate::common::RegisterField<
2992        11,
2993        0x1,
2994        1,
2995        0,
2996        gtcsr::Cscafbh,
2997        gtcsr::Cscafbh,
2998        Gtcsr_SPEC,
2999        crate::common::RW,
3000    > {
3001        crate::common::RegisterField::<
3002            11,
3003            0x1,
3004            1,
3005            0,
3006            gtcsr::Cscafbh,
3007            gtcsr::Cscafbh,
3008            Gtcsr_SPEC,
3009            crate::common::RW,
3010        >::from_register(self, 0)
3011    }
3012
3013    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable"]
3014    #[inline(always)]
3015    pub fn cscbral(
3016        self,
3017    ) -> crate::common::RegisterField<
3018        12,
3019        0x1,
3020        1,
3021        0,
3022        gtcsr::Cscbral,
3023        gtcsr::Cscbral,
3024        Gtcsr_SPEC,
3025        crate::common::RW,
3026    > {
3027        crate::common::RegisterField::<
3028            12,
3029            0x1,
3030            1,
3031            0,
3032            gtcsr::Cscbral,
3033            gtcsr::Cscbral,
3034            Gtcsr_SPEC,
3035            crate::common::RW,
3036        >::from_register(self, 0)
3037    }
3038
3039    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable"]
3040    #[inline(always)]
3041    pub fn cscbrah(
3042        self,
3043    ) -> crate::common::RegisterField<
3044        13,
3045        0x1,
3046        1,
3047        0,
3048        gtcsr::Cscbrah,
3049        gtcsr::Cscbrah,
3050        Gtcsr_SPEC,
3051        crate::common::RW,
3052    > {
3053        crate::common::RegisterField::<
3054            13,
3055            0x1,
3056            1,
3057            0,
3058            gtcsr::Cscbrah,
3059            gtcsr::Cscbrah,
3060            Gtcsr_SPEC,
3061            crate::common::RW,
3062        >::from_register(self, 0)
3063    }
3064
3065    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable"]
3066    #[inline(always)]
3067    pub fn cscbfal(
3068        self,
3069    ) -> crate::common::RegisterField<
3070        14,
3071        0x1,
3072        1,
3073        0,
3074        gtcsr::Cscbfal,
3075        gtcsr::Cscbfal,
3076        Gtcsr_SPEC,
3077        crate::common::RW,
3078    > {
3079        crate::common::RegisterField::<
3080            14,
3081            0x1,
3082            1,
3083            0,
3084            gtcsr::Cscbfal,
3085            gtcsr::Cscbfal,
3086            Gtcsr_SPEC,
3087            crate::common::RW,
3088        >::from_register(self, 0)
3089    }
3090
3091    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable"]
3092    #[inline(always)]
3093    pub fn cscbfah(
3094        self,
3095    ) -> crate::common::RegisterField<
3096        15,
3097        0x1,
3098        1,
3099        0,
3100        gtcsr::Cscbfah,
3101        gtcsr::Cscbfah,
3102        Gtcsr_SPEC,
3103        crate::common::RW,
3104    > {
3105        crate::common::RegisterField::<
3106            15,
3107            0x1,
3108            1,
3109            0,
3110            gtcsr::Cscbfah,
3111            gtcsr::Cscbfah,
3112            Gtcsr_SPEC,
3113            crate::common::RW,
3114        >::from_register(self, 0)
3115    }
3116
3117    #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
3118    #[inline(always)]
3119    pub fn cselca(
3120        self,
3121    ) -> crate::common::RegisterField<
3122        16,
3123        0x1,
3124        1,
3125        0,
3126        gtcsr::Cselca,
3127        gtcsr::Cselca,
3128        Gtcsr_SPEC,
3129        crate::common::RW,
3130    > {
3131        crate::common::RegisterField::<
3132            16,
3133            0x1,
3134            1,
3135            0,
3136            gtcsr::Cselca,
3137            gtcsr::Cselca,
3138            Gtcsr_SPEC,
3139            crate::common::RW,
3140        >::from_register(self, 0)
3141    }
3142
3143    #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
3144    #[inline(always)]
3145    pub fn cselcb(
3146        self,
3147    ) -> crate::common::RegisterField<
3148        17,
3149        0x1,
3150        1,
3151        0,
3152        gtcsr::Cselcb,
3153        gtcsr::Cselcb,
3154        Gtcsr_SPEC,
3155        crate::common::RW,
3156    > {
3157        crate::common::RegisterField::<
3158            17,
3159            0x1,
3160            1,
3161            0,
3162            gtcsr::Cselcb,
3163            gtcsr::Cselcb,
3164            Gtcsr_SPEC,
3165            crate::common::RW,
3166        >::from_register(self, 0)
3167    }
3168
3169    #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
3170    #[inline(always)]
3171    pub fn cselcc(
3172        self,
3173    ) -> crate::common::RegisterField<
3174        18,
3175        0x1,
3176        1,
3177        0,
3178        gtcsr::Cselcc,
3179        gtcsr::Cselcc,
3180        Gtcsr_SPEC,
3181        crate::common::RW,
3182    > {
3183        crate::common::RegisterField::<
3184            18,
3185            0x1,
3186            1,
3187            0,
3188            gtcsr::Cselcc,
3189            gtcsr::Cselcc,
3190            Gtcsr_SPEC,
3191            crate::common::RW,
3192        >::from_register(self, 0)
3193    }
3194
3195    #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
3196    #[inline(always)]
3197    pub fn cselcd(
3198        self,
3199    ) -> crate::common::RegisterField<
3200        19,
3201        0x1,
3202        1,
3203        0,
3204        gtcsr::Cselcd,
3205        gtcsr::Cselcd,
3206        Gtcsr_SPEC,
3207        crate::common::RW,
3208    > {
3209        crate::common::RegisterField::<
3210            19,
3211            0x1,
3212            1,
3213            0,
3214            gtcsr::Cselcd,
3215            gtcsr::Cselcd,
3216            Gtcsr_SPEC,
3217            crate::common::RW,
3218        >::from_register(self, 0)
3219    }
3220
3221    #[doc = "Software Source Counter Clear Enable"]
3222    #[inline(always)]
3223    pub fn cclr(
3224        self,
3225    ) -> crate::common::RegisterField<
3226        31,
3227        0x1,
3228        1,
3229        0,
3230        gtcsr::Cclr,
3231        gtcsr::Cclr,
3232        Gtcsr_SPEC,
3233        crate::common::RW,
3234    > {
3235        crate::common::RegisterField::<
3236            31,
3237            0x1,
3238            1,
3239            0,
3240            gtcsr::Cclr,
3241            gtcsr::Cclr,
3242            Gtcsr_SPEC,
3243            crate::common::RW,
3244        >::from_register(self, 0)
3245    }
3246}
3247impl ::core::default::Default for Gtcsr {
3248    #[inline(always)]
3249    fn default() -> Gtcsr {
3250        <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
3251    }
3252}
3253pub mod gtcsr {
3254
3255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3256    pub struct Csgtrgar_SPEC;
3257    pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
3258    impl Csgtrgar {
3259        #[doc = "Counter clear disabled on the rising edge of GTETRGA input"]
3260        pub const _0: Self = Self::new(0);
3261
3262        #[doc = "Counter clear enabled on the rising edge of GTETRGA input"]
3263        pub const _1: Self = Self::new(1);
3264    }
3265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3266    pub struct Csgtrgaf_SPEC;
3267    pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
3268    impl Csgtrgaf {
3269        #[doc = "Counter clear disabled on the falling edge of GTETRGA input"]
3270        pub const _0: Self = Self::new(0);
3271
3272        #[doc = "Counter clear enabled on the falling edge of GTETRGA input"]
3273        pub const _1: Self = Self::new(1);
3274    }
3275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3276    pub struct Csgtrgbr_SPEC;
3277    pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
3278    impl Csgtrgbr {
3279        #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
3280        pub const _0: Self = Self::new(0);
3281
3282        #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
3283        pub const _1: Self = Self::new(1);
3284    }
3285    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3286    pub struct Csgtrgbf_SPEC;
3287    pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
3288    impl Csgtrgbf {
3289        #[doc = "Counter clear disabled on the falling edge of GTETRGB input"]
3290        pub const _0: Self = Self::new(0);
3291
3292        #[doc = "Counter clear enabled on the falling edge of GTETRGB input"]
3293        pub const _1: Self = Self::new(1);
3294    }
3295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3296    pub struct Cscarbl_SPEC;
3297    pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
3298    impl Cscarbl {
3299        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3300        pub const _0: Self = Self::new(0);
3301
3302        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3303        pub const _1: Self = Self::new(1);
3304    }
3305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3306    pub struct Cscarbh_SPEC;
3307    pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
3308    impl Cscarbh {
3309        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3310        pub const _0: Self = Self::new(0);
3311
3312        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3313        pub const _1: Self = Self::new(1);
3314    }
3315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3316    pub struct Cscafbl_SPEC;
3317    pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
3318    impl Cscafbl {
3319        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3320        pub const _0: Self = Self::new(0);
3321
3322        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3323        pub const _1: Self = Self::new(1);
3324    }
3325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3326    pub struct Cscafbh_SPEC;
3327    pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
3328    impl Cscafbh {
3329        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3330        pub const _0: Self = Self::new(0);
3331
3332        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3333        pub const _1: Self = Self::new(1);
3334    }
3335    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3336    pub struct Cscbral_SPEC;
3337    pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
3338    impl Cscbral {
3339        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3340        pub const _0: Self = Self::new(0);
3341
3342        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3343        pub const _1: Self = Self::new(1);
3344    }
3345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3346    pub struct Cscbrah_SPEC;
3347    pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
3348    impl Cscbrah {
3349        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3350        pub const _0: Self = Self::new(0);
3351
3352        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3353        pub const _1: Self = Self::new(1);
3354    }
3355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3356    pub struct Cscbfal_SPEC;
3357    pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
3358    impl Cscbfal {
3359        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3360        pub const _0: Self = Self::new(0);
3361
3362        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3363        pub const _1: Self = Self::new(1);
3364    }
3365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3366    pub struct Cscbfah_SPEC;
3367    pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
3368    impl Cscbfah {
3369        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3370        pub const _0: Self = Self::new(0);
3371
3372        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3373        pub const _1: Self = Self::new(1);
3374    }
3375    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3376    pub struct Cselca_SPEC;
3377    pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
3378    impl Cselca {
3379        #[doc = "Counter clear disabled at the ELC_GPTA input"]
3380        pub const _0: Self = Self::new(0);
3381
3382        #[doc = "Counter clear enabled at the ELC_GPTA input"]
3383        pub const _1: Self = Self::new(1);
3384    }
3385    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3386    pub struct Cselcb_SPEC;
3387    pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
3388    impl Cselcb {
3389        #[doc = "Counter clear disabled at the ELC_GPTB input"]
3390        pub const _0: Self = Self::new(0);
3391
3392        #[doc = "Counter clear enabled at the ELC_GPTB input"]
3393        pub const _1: Self = Self::new(1);
3394    }
3395    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3396    pub struct Cselcc_SPEC;
3397    pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
3398    impl Cselcc {
3399        #[doc = "Counter clear disabled at the ELC_GPTC input"]
3400        pub const _0: Self = Self::new(0);
3401
3402        #[doc = "Counter clear enabled at the ELC_GPTC input"]
3403        pub const _1: Self = Self::new(1);
3404    }
3405    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3406    pub struct Cselcd_SPEC;
3407    pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
3408    impl Cselcd {
3409        #[doc = "Counter clear disabled at the ELC_GPTD input"]
3410        pub const _0: Self = Self::new(0);
3411
3412        #[doc = "Counter clear enabled at the ELC_GPTD input"]
3413        pub const _1: Self = Self::new(1);
3414    }
3415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3416    pub struct Cclr_SPEC;
3417    pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
3418    impl Cclr {
3419        #[doc = "Counter clear disabled by the GTCLR register"]
3420        pub const _0: Self = Self::new(0);
3421
3422        #[doc = "Counter clear enabled by the GTCLR register"]
3423        pub const _1: Self = Self::new(1);
3424    }
3425}
3426#[doc(hidden)]
3427#[derive(Copy, Clone, Eq, PartialEq)]
3428pub struct Gtupsr_SPEC;
3429impl crate::sealed::RegSpec for Gtupsr_SPEC {
3430    type DataType = u32;
3431}
3432
3433#[doc = "General PWM Timer Up Count Source Select Register"]
3434pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
3435
3436impl Gtupsr {
3437    #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
3438    #[inline(always)]
3439    pub fn usgtrgar(
3440        self,
3441    ) -> crate::common::RegisterField<
3442        0,
3443        0x1,
3444        1,
3445        0,
3446        gtupsr::Usgtrgar,
3447        gtupsr::Usgtrgar,
3448        Gtupsr_SPEC,
3449        crate::common::RW,
3450    > {
3451        crate::common::RegisterField::<
3452            0,
3453            0x1,
3454            1,
3455            0,
3456            gtupsr::Usgtrgar,
3457            gtupsr::Usgtrgar,
3458            Gtupsr_SPEC,
3459            crate::common::RW,
3460        >::from_register(self, 0)
3461    }
3462
3463    #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
3464    #[inline(always)]
3465    pub fn usgtrgaf(
3466        self,
3467    ) -> crate::common::RegisterField<
3468        1,
3469        0x1,
3470        1,
3471        0,
3472        gtupsr::Usgtrgaf,
3473        gtupsr::Usgtrgaf,
3474        Gtupsr_SPEC,
3475        crate::common::RW,
3476    > {
3477        crate::common::RegisterField::<
3478            1,
3479            0x1,
3480            1,
3481            0,
3482            gtupsr::Usgtrgaf,
3483            gtupsr::Usgtrgaf,
3484            Gtupsr_SPEC,
3485            crate::common::RW,
3486        >::from_register(self, 0)
3487    }
3488
3489    #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
3490    #[inline(always)]
3491    pub fn usgtrgbr(
3492        self,
3493    ) -> crate::common::RegisterField<
3494        2,
3495        0x1,
3496        1,
3497        0,
3498        gtupsr::Usgtrgbr,
3499        gtupsr::Usgtrgbr,
3500        Gtupsr_SPEC,
3501        crate::common::RW,
3502    > {
3503        crate::common::RegisterField::<
3504            2,
3505            0x1,
3506            1,
3507            0,
3508            gtupsr::Usgtrgbr,
3509            gtupsr::Usgtrgbr,
3510            Gtupsr_SPEC,
3511            crate::common::RW,
3512        >::from_register(self, 0)
3513    }
3514
3515    #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
3516    #[inline(always)]
3517    pub fn usgtrgbf(
3518        self,
3519    ) -> crate::common::RegisterField<
3520        3,
3521        0x1,
3522        1,
3523        0,
3524        gtupsr::Usgtrgbf,
3525        gtupsr::Usgtrgbf,
3526        Gtupsr_SPEC,
3527        crate::common::RW,
3528    > {
3529        crate::common::RegisterField::<
3530            3,
3531            0x1,
3532            1,
3533            0,
3534            gtupsr::Usgtrgbf,
3535            gtupsr::Usgtrgbf,
3536            Gtupsr_SPEC,
3537            crate::common::RW,
3538        >::from_register(self, 0)
3539    }
3540
3541    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable"]
3542    #[inline(always)]
3543    pub fn uscarbl(
3544        self,
3545    ) -> crate::common::RegisterField<
3546        8,
3547        0x1,
3548        1,
3549        0,
3550        gtupsr::Uscarbl,
3551        gtupsr::Uscarbl,
3552        Gtupsr_SPEC,
3553        crate::common::RW,
3554    > {
3555        crate::common::RegisterField::<
3556            8,
3557            0x1,
3558            1,
3559            0,
3560            gtupsr::Uscarbl,
3561            gtupsr::Uscarbl,
3562            Gtupsr_SPEC,
3563            crate::common::RW,
3564        >::from_register(self, 0)
3565    }
3566
3567    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable"]
3568    #[inline(always)]
3569    pub fn uscarbh(
3570        self,
3571    ) -> crate::common::RegisterField<
3572        9,
3573        0x1,
3574        1,
3575        0,
3576        gtupsr::Uscarbh,
3577        gtupsr::Uscarbh,
3578        Gtupsr_SPEC,
3579        crate::common::RW,
3580    > {
3581        crate::common::RegisterField::<
3582            9,
3583            0x1,
3584            1,
3585            0,
3586            gtupsr::Uscarbh,
3587            gtupsr::Uscarbh,
3588            Gtupsr_SPEC,
3589            crate::common::RW,
3590        >::from_register(self, 0)
3591    }
3592
3593    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable"]
3594    #[inline(always)]
3595    pub fn uscafbl(
3596        self,
3597    ) -> crate::common::RegisterField<
3598        10,
3599        0x1,
3600        1,
3601        0,
3602        gtupsr::Uscafbl,
3603        gtupsr::Uscafbl,
3604        Gtupsr_SPEC,
3605        crate::common::RW,
3606    > {
3607        crate::common::RegisterField::<
3608            10,
3609            0x1,
3610            1,
3611            0,
3612            gtupsr::Uscafbl,
3613            gtupsr::Uscafbl,
3614            Gtupsr_SPEC,
3615            crate::common::RW,
3616        >::from_register(self, 0)
3617    }
3618
3619    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable"]
3620    #[inline(always)]
3621    pub fn uscafbh(
3622        self,
3623    ) -> crate::common::RegisterField<
3624        11,
3625        0x1,
3626        1,
3627        0,
3628        gtupsr::Uscafbh,
3629        gtupsr::Uscafbh,
3630        Gtupsr_SPEC,
3631        crate::common::RW,
3632    > {
3633        crate::common::RegisterField::<
3634            11,
3635            0x1,
3636            1,
3637            0,
3638            gtupsr::Uscafbh,
3639            gtupsr::Uscafbh,
3640            Gtupsr_SPEC,
3641            crate::common::RW,
3642        >::from_register(self, 0)
3643    }
3644
3645    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable"]
3646    #[inline(always)]
3647    pub fn uscbral(
3648        self,
3649    ) -> crate::common::RegisterField<
3650        12,
3651        0x1,
3652        1,
3653        0,
3654        gtupsr::Uscbral,
3655        gtupsr::Uscbral,
3656        Gtupsr_SPEC,
3657        crate::common::RW,
3658    > {
3659        crate::common::RegisterField::<
3660            12,
3661            0x1,
3662            1,
3663            0,
3664            gtupsr::Uscbral,
3665            gtupsr::Uscbral,
3666            Gtupsr_SPEC,
3667            crate::common::RW,
3668        >::from_register(self, 0)
3669    }
3670
3671    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable"]
3672    #[inline(always)]
3673    pub fn uscbrah(
3674        self,
3675    ) -> crate::common::RegisterField<
3676        13,
3677        0x1,
3678        1,
3679        0,
3680        gtupsr::Uscbrah,
3681        gtupsr::Uscbrah,
3682        Gtupsr_SPEC,
3683        crate::common::RW,
3684    > {
3685        crate::common::RegisterField::<
3686            13,
3687            0x1,
3688            1,
3689            0,
3690            gtupsr::Uscbrah,
3691            gtupsr::Uscbrah,
3692            Gtupsr_SPEC,
3693            crate::common::RW,
3694        >::from_register(self, 0)
3695    }
3696
3697    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable"]
3698    #[inline(always)]
3699    pub fn uscbfal(
3700        self,
3701    ) -> crate::common::RegisterField<
3702        14,
3703        0x1,
3704        1,
3705        0,
3706        gtupsr::Uscbfal,
3707        gtupsr::Uscbfal,
3708        Gtupsr_SPEC,
3709        crate::common::RW,
3710    > {
3711        crate::common::RegisterField::<
3712            14,
3713            0x1,
3714            1,
3715            0,
3716            gtupsr::Uscbfal,
3717            gtupsr::Uscbfal,
3718            Gtupsr_SPEC,
3719            crate::common::RW,
3720        >::from_register(self, 0)
3721    }
3722
3723    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable"]
3724    #[inline(always)]
3725    pub fn uscbfah(
3726        self,
3727    ) -> crate::common::RegisterField<
3728        15,
3729        0x1,
3730        1,
3731        0,
3732        gtupsr::Uscbfah,
3733        gtupsr::Uscbfah,
3734        Gtupsr_SPEC,
3735        crate::common::RW,
3736    > {
3737        crate::common::RegisterField::<
3738            15,
3739            0x1,
3740            1,
3741            0,
3742            gtupsr::Uscbfah,
3743            gtupsr::Uscbfah,
3744            Gtupsr_SPEC,
3745            crate::common::RW,
3746        >::from_register(self, 0)
3747    }
3748
3749    #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
3750    #[inline(always)]
3751    pub fn uselca(
3752        self,
3753    ) -> crate::common::RegisterField<
3754        16,
3755        0x1,
3756        1,
3757        0,
3758        gtupsr::Uselca,
3759        gtupsr::Uselca,
3760        Gtupsr_SPEC,
3761        crate::common::RW,
3762    > {
3763        crate::common::RegisterField::<
3764            16,
3765            0x1,
3766            1,
3767            0,
3768            gtupsr::Uselca,
3769            gtupsr::Uselca,
3770            Gtupsr_SPEC,
3771            crate::common::RW,
3772        >::from_register(self, 0)
3773    }
3774
3775    #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
3776    #[inline(always)]
3777    pub fn uselcb(
3778        self,
3779    ) -> crate::common::RegisterField<
3780        17,
3781        0x1,
3782        1,
3783        0,
3784        gtupsr::Uselcb,
3785        gtupsr::Uselcb,
3786        Gtupsr_SPEC,
3787        crate::common::RW,
3788    > {
3789        crate::common::RegisterField::<
3790            17,
3791            0x1,
3792            1,
3793            0,
3794            gtupsr::Uselcb,
3795            gtupsr::Uselcb,
3796            Gtupsr_SPEC,
3797            crate::common::RW,
3798        >::from_register(self, 0)
3799    }
3800
3801    #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
3802    #[inline(always)]
3803    pub fn uselcc(
3804        self,
3805    ) -> crate::common::RegisterField<
3806        18,
3807        0x1,
3808        1,
3809        0,
3810        gtupsr::Uselcc,
3811        gtupsr::Uselcc,
3812        Gtupsr_SPEC,
3813        crate::common::RW,
3814    > {
3815        crate::common::RegisterField::<
3816            18,
3817            0x1,
3818            1,
3819            0,
3820            gtupsr::Uselcc,
3821            gtupsr::Uselcc,
3822            Gtupsr_SPEC,
3823            crate::common::RW,
3824        >::from_register(self, 0)
3825    }
3826
3827    #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
3828    #[inline(always)]
3829    pub fn uselcd(
3830        self,
3831    ) -> crate::common::RegisterField<
3832        19,
3833        0x1,
3834        1,
3835        0,
3836        gtupsr::Uselcd,
3837        gtupsr::Uselcd,
3838        Gtupsr_SPEC,
3839        crate::common::RW,
3840    > {
3841        crate::common::RegisterField::<
3842            19,
3843            0x1,
3844            1,
3845            0,
3846            gtupsr::Uselcd,
3847            gtupsr::Uselcd,
3848            Gtupsr_SPEC,
3849            crate::common::RW,
3850        >::from_register(self, 0)
3851    }
3852}
3853impl ::core::default::Default for Gtupsr {
3854    #[inline(always)]
3855    fn default() -> Gtupsr {
3856        <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
3857    }
3858}
3859pub mod gtupsr {
3860
3861    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3862    pub struct Usgtrgar_SPEC;
3863    pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
3864    impl Usgtrgar {
3865        #[doc = "Counter count up disabled on the rising edge of GTETRGA input"]
3866        pub const _0: Self = Self::new(0);
3867
3868        #[doc = "Counter count up enabled on the rising edge of GTETRGA input"]
3869        pub const _1: Self = Self::new(1);
3870    }
3871    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3872    pub struct Usgtrgaf_SPEC;
3873    pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
3874    impl Usgtrgaf {
3875        #[doc = "Counter count up disabled on the falling edge of GTETRGA input"]
3876        pub const _0: Self = Self::new(0);
3877
3878        #[doc = "Counter count up enabled on the falling edge of GTETRGA input"]
3879        pub const _1: Self = Self::new(1);
3880    }
3881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3882    pub struct Usgtrgbr_SPEC;
3883    pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
3884    impl Usgtrgbr {
3885        #[doc = "Counter count up disabled on the rising edge of GTETRGB input"]
3886        pub const _0: Self = Self::new(0);
3887
3888        #[doc = "Counter count up enabled on the rising edge of GTETRGB input"]
3889        pub const _1: Self = Self::new(1);
3890    }
3891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3892    pub struct Usgtrgbf_SPEC;
3893    pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
3894    impl Usgtrgbf {
3895        #[doc = "Counter count up disabled on the falling edge of GTETRGB input"]
3896        pub const _0: Self = Self::new(0);
3897
3898        #[doc = "Counter count up enabled on the falling edge of GTETRGB input"]
3899        pub const _1: Self = Self::new(1);
3900    }
3901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3902    pub struct Uscarbl_SPEC;
3903    pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
3904    impl Uscarbl {
3905        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3906        pub const _0: Self = Self::new(0);
3907
3908        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3909        pub const _1: Self = Self::new(1);
3910    }
3911    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3912    pub struct Uscarbh_SPEC;
3913    pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
3914    impl Uscarbh {
3915        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3916        pub const _0: Self = Self::new(0);
3917
3918        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3919        pub const _1: Self = Self::new(1);
3920    }
3921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3922    pub struct Uscafbl_SPEC;
3923    pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
3924    impl Uscafbl {
3925        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3926        pub const _0: Self = Self::new(0);
3927
3928        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3929        pub const _1: Self = Self::new(1);
3930    }
3931    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3932    pub struct Uscafbh_SPEC;
3933    pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
3934    impl Uscafbh {
3935        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3936        pub const _0: Self = Self::new(0);
3937
3938        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3939        pub const _1: Self = Self::new(1);
3940    }
3941    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3942    pub struct Uscbral_SPEC;
3943    pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
3944    impl Uscbral {
3945        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3946        pub const _0: Self = Self::new(0);
3947
3948        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3949        pub const _1: Self = Self::new(1);
3950    }
3951    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3952    pub struct Uscbrah_SPEC;
3953    pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
3954    impl Uscbrah {
3955        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3956        pub const _0: Self = Self::new(0);
3957
3958        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3959        pub const _1: Self = Self::new(1);
3960    }
3961    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3962    pub struct Uscbfal_SPEC;
3963    pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
3964    impl Uscbfal {
3965        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3966        pub const _0: Self = Self::new(0);
3967
3968        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3969        pub const _1: Self = Self::new(1);
3970    }
3971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3972    pub struct Uscbfah_SPEC;
3973    pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
3974    impl Uscbfah {
3975        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3976        pub const _0: Self = Self::new(0);
3977
3978        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3979        pub const _1: Self = Self::new(1);
3980    }
3981    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3982    pub struct Uselca_SPEC;
3983    pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
3984    impl Uselca {
3985        #[doc = "Counter count up disabled at the ELC_GPTA input"]
3986        pub const _0: Self = Self::new(0);
3987
3988        #[doc = "Counter count up enabled at the ELC_GPTA input"]
3989        pub const _1: Self = Self::new(1);
3990    }
3991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3992    pub struct Uselcb_SPEC;
3993    pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
3994    impl Uselcb {
3995        #[doc = "Counter count up disabled at the ELC_GPTB input"]
3996        pub const _0: Self = Self::new(0);
3997
3998        #[doc = "Counter count up enabled at the ELC_GPTB input"]
3999        pub const _1: Self = Self::new(1);
4000    }
4001    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4002    pub struct Uselcc_SPEC;
4003    pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
4004    impl Uselcc {
4005        #[doc = "Counter count up disabled at the ELC_GPTC input"]
4006        pub const _0: Self = Self::new(0);
4007
4008        #[doc = "Counter count up enabled at the ELC_GPTC input"]
4009        pub const _1: Self = Self::new(1);
4010    }
4011    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4012    pub struct Uselcd_SPEC;
4013    pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
4014    impl Uselcd {
4015        #[doc = "Counter count up disabled at the ELC_GPTD input"]
4016        pub const _0: Self = Self::new(0);
4017
4018        #[doc = "Counter count up enabled at the ELC_GPTD input"]
4019        pub const _1: Self = Self::new(1);
4020    }
4021}
4022#[doc(hidden)]
4023#[derive(Copy, Clone, Eq, PartialEq)]
4024pub struct Gtdnsr_SPEC;
4025impl crate::sealed::RegSpec for Gtdnsr_SPEC {
4026    type DataType = u32;
4027}
4028
4029#[doc = "General PWM Timer Down Count Source Select Register"]
4030pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
4031
4032impl Gtdnsr {
4033    #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
4034    #[inline(always)]
4035    pub fn dsgtrgar(
4036        self,
4037    ) -> crate::common::RegisterField<
4038        0,
4039        0x1,
4040        1,
4041        0,
4042        gtdnsr::Dsgtrgar,
4043        gtdnsr::Dsgtrgar,
4044        Gtdnsr_SPEC,
4045        crate::common::RW,
4046    > {
4047        crate::common::RegisterField::<
4048            0,
4049            0x1,
4050            1,
4051            0,
4052            gtdnsr::Dsgtrgar,
4053            gtdnsr::Dsgtrgar,
4054            Gtdnsr_SPEC,
4055            crate::common::RW,
4056        >::from_register(self, 0)
4057    }
4058
4059    #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
4060    #[inline(always)]
4061    pub fn dsgtrgaf(
4062        self,
4063    ) -> crate::common::RegisterField<
4064        1,
4065        0x1,
4066        1,
4067        0,
4068        gtdnsr::Dsgtrgaf,
4069        gtdnsr::Dsgtrgaf,
4070        Gtdnsr_SPEC,
4071        crate::common::RW,
4072    > {
4073        crate::common::RegisterField::<
4074            1,
4075            0x1,
4076            1,
4077            0,
4078            gtdnsr::Dsgtrgaf,
4079            gtdnsr::Dsgtrgaf,
4080            Gtdnsr_SPEC,
4081            crate::common::RW,
4082        >::from_register(self, 0)
4083    }
4084
4085    #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
4086    #[inline(always)]
4087    pub fn dsgtrgbr(
4088        self,
4089    ) -> crate::common::RegisterField<
4090        2,
4091        0x1,
4092        1,
4093        0,
4094        gtdnsr::Dsgtrgbr,
4095        gtdnsr::Dsgtrgbr,
4096        Gtdnsr_SPEC,
4097        crate::common::RW,
4098    > {
4099        crate::common::RegisterField::<
4100            2,
4101            0x1,
4102            1,
4103            0,
4104            gtdnsr::Dsgtrgbr,
4105            gtdnsr::Dsgtrgbr,
4106            Gtdnsr_SPEC,
4107            crate::common::RW,
4108        >::from_register(self, 0)
4109    }
4110
4111    #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
4112    #[inline(always)]
4113    pub fn dsgtrgbf(
4114        self,
4115    ) -> crate::common::RegisterField<
4116        3,
4117        0x1,
4118        1,
4119        0,
4120        gtdnsr::Dsgtrgbf,
4121        gtdnsr::Dsgtrgbf,
4122        Gtdnsr_SPEC,
4123        crate::common::RW,
4124    > {
4125        crate::common::RegisterField::<
4126            3,
4127            0x1,
4128            1,
4129            0,
4130            gtdnsr::Dsgtrgbf,
4131            gtdnsr::Dsgtrgbf,
4132            Gtdnsr_SPEC,
4133            crate::common::RW,
4134        >::from_register(self, 0)
4135    }
4136
4137    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable"]
4138    #[inline(always)]
4139    pub fn dscarbl(
4140        self,
4141    ) -> crate::common::RegisterField<
4142        8,
4143        0x1,
4144        1,
4145        0,
4146        gtdnsr::Dscarbl,
4147        gtdnsr::Dscarbl,
4148        Gtdnsr_SPEC,
4149        crate::common::RW,
4150    > {
4151        crate::common::RegisterField::<
4152            8,
4153            0x1,
4154            1,
4155            0,
4156            gtdnsr::Dscarbl,
4157            gtdnsr::Dscarbl,
4158            Gtdnsr_SPEC,
4159            crate::common::RW,
4160        >::from_register(self, 0)
4161    }
4162
4163    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable"]
4164    #[inline(always)]
4165    pub fn dscarbh(
4166        self,
4167    ) -> crate::common::RegisterField<
4168        9,
4169        0x1,
4170        1,
4171        0,
4172        gtdnsr::Dscarbh,
4173        gtdnsr::Dscarbh,
4174        Gtdnsr_SPEC,
4175        crate::common::RW,
4176    > {
4177        crate::common::RegisterField::<
4178            9,
4179            0x1,
4180            1,
4181            0,
4182            gtdnsr::Dscarbh,
4183            gtdnsr::Dscarbh,
4184            Gtdnsr_SPEC,
4185            crate::common::RW,
4186        >::from_register(self, 0)
4187    }
4188
4189    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable"]
4190    #[inline(always)]
4191    pub fn dscafbl(
4192        self,
4193    ) -> crate::common::RegisterField<
4194        10,
4195        0x1,
4196        1,
4197        0,
4198        gtdnsr::Dscafbl,
4199        gtdnsr::Dscafbl,
4200        Gtdnsr_SPEC,
4201        crate::common::RW,
4202    > {
4203        crate::common::RegisterField::<
4204            10,
4205            0x1,
4206            1,
4207            0,
4208            gtdnsr::Dscafbl,
4209            gtdnsr::Dscafbl,
4210            Gtdnsr_SPEC,
4211            crate::common::RW,
4212        >::from_register(self, 0)
4213    }
4214
4215    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable"]
4216    #[inline(always)]
4217    pub fn dscafbh(
4218        self,
4219    ) -> crate::common::RegisterField<
4220        11,
4221        0x1,
4222        1,
4223        0,
4224        gtdnsr::Dscafbh,
4225        gtdnsr::Dscafbh,
4226        Gtdnsr_SPEC,
4227        crate::common::RW,
4228    > {
4229        crate::common::RegisterField::<
4230            11,
4231            0x1,
4232            1,
4233            0,
4234            gtdnsr::Dscafbh,
4235            gtdnsr::Dscafbh,
4236            Gtdnsr_SPEC,
4237            crate::common::RW,
4238        >::from_register(self, 0)
4239    }
4240
4241    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable"]
4242    #[inline(always)]
4243    pub fn dscbral(
4244        self,
4245    ) -> crate::common::RegisterField<
4246        12,
4247        0x1,
4248        1,
4249        0,
4250        gtdnsr::Dscbral,
4251        gtdnsr::Dscbral,
4252        Gtdnsr_SPEC,
4253        crate::common::RW,
4254    > {
4255        crate::common::RegisterField::<
4256            12,
4257            0x1,
4258            1,
4259            0,
4260            gtdnsr::Dscbral,
4261            gtdnsr::Dscbral,
4262            Gtdnsr_SPEC,
4263            crate::common::RW,
4264        >::from_register(self, 0)
4265    }
4266
4267    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable"]
4268    #[inline(always)]
4269    pub fn dscbrah(
4270        self,
4271    ) -> crate::common::RegisterField<
4272        13,
4273        0x1,
4274        1,
4275        0,
4276        gtdnsr::Dscbrah,
4277        gtdnsr::Dscbrah,
4278        Gtdnsr_SPEC,
4279        crate::common::RW,
4280    > {
4281        crate::common::RegisterField::<
4282            13,
4283            0x1,
4284            1,
4285            0,
4286            gtdnsr::Dscbrah,
4287            gtdnsr::Dscbrah,
4288            Gtdnsr_SPEC,
4289            crate::common::RW,
4290        >::from_register(self, 0)
4291    }
4292
4293    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable"]
4294    #[inline(always)]
4295    pub fn dscbfal(
4296        self,
4297    ) -> crate::common::RegisterField<
4298        14,
4299        0x1,
4300        1,
4301        0,
4302        gtdnsr::Dscbfal,
4303        gtdnsr::Dscbfal,
4304        Gtdnsr_SPEC,
4305        crate::common::RW,
4306    > {
4307        crate::common::RegisterField::<
4308            14,
4309            0x1,
4310            1,
4311            0,
4312            gtdnsr::Dscbfal,
4313            gtdnsr::Dscbfal,
4314            Gtdnsr_SPEC,
4315            crate::common::RW,
4316        >::from_register(self, 0)
4317    }
4318
4319    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable"]
4320    #[inline(always)]
4321    pub fn dscbfah(
4322        self,
4323    ) -> crate::common::RegisterField<
4324        15,
4325        0x1,
4326        1,
4327        0,
4328        gtdnsr::Dscbfah,
4329        gtdnsr::Dscbfah,
4330        Gtdnsr_SPEC,
4331        crate::common::RW,
4332    > {
4333        crate::common::RegisterField::<
4334            15,
4335            0x1,
4336            1,
4337            0,
4338            gtdnsr::Dscbfah,
4339            gtdnsr::Dscbfah,
4340            Gtdnsr_SPEC,
4341            crate::common::RW,
4342        >::from_register(self, 0)
4343    }
4344
4345    #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
4346    #[inline(always)]
4347    pub fn dselca(
4348        self,
4349    ) -> crate::common::RegisterField<
4350        16,
4351        0x1,
4352        1,
4353        0,
4354        gtdnsr::Dselca,
4355        gtdnsr::Dselca,
4356        Gtdnsr_SPEC,
4357        crate::common::RW,
4358    > {
4359        crate::common::RegisterField::<
4360            16,
4361            0x1,
4362            1,
4363            0,
4364            gtdnsr::Dselca,
4365            gtdnsr::Dselca,
4366            Gtdnsr_SPEC,
4367            crate::common::RW,
4368        >::from_register(self, 0)
4369    }
4370
4371    #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
4372    #[inline(always)]
4373    pub fn dselcb(
4374        self,
4375    ) -> crate::common::RegisterField<
4376        17,
4377        0x1,
4378        1,
4379        0,
4380        gtdnsr::Dselcb,
4381        gtdnsr::Dselcb,
4382        Gtdnsr_SPEC,
4383        crate::common::RW,
4384    > {
4385        crate::common::RegisterField::<
4386            17,
4387            0x1,
4388            1,
4389            0,
4390            gtdnsr::Dselcb,
4391            gtdnsr::Dselcb,
4392            Gtdnsr_SPEC,
4393            crate::common::RW,
4394        >::from_register(self, 0)
4395    }
4396
4397    #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
4398    #[inline(always)]
4399    pub fn dselcc(
4400        self,
4401    ) -> crate::common::RegisterField<
4402        18,
4403        0x1,
4404        1,
4405        0,
4406        gtdnsr::Dselcc,
4407        gtdnsr::Dselcc,
4408        Gtdnsr_SPEC,
4409        crate::common::RW,
4410    > {
4411        crate::common::RegisterField::<
4412            18,
4413            0x1,
4414            1,
4415            0,
4416            gtdnsr::Dselcc,
4417            gtdnsr::Dselcc,
4418            Gtdnsr_SPEC,
4419            crate::common::RW,
4420        >::from_register(self, 0)
4421    }
4422
4423    #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
4424    #[inline(always)]
4425    pub fn dselcd(
4426        self,
4427    ) -> crate::common::RegisterField<
4428        19,
4429        0x1,
4430        1,
4431        0,
4432        gtdnsr::Dselcd,
4433        gtdnsr::Dselcd,
4434        Gtdnsr_SPEC,
4435        crate::common::RW,
4436    > {
4437        crate::common::RegisterField::<
4438            19,
4439            0x1,
4440            1,
4441            0,
4442            gtdnsr::Dselcd,
4443            gtdnsr::Dselcd,
4444            Gtdnsr_SPEC,
4445            crate::common::RW,
4446        >::from_register(self, 0)
4447    }
4448}
4449impl ::core::default::Default for Gtdnsr {
4450    #[inline(always)]
4451    fn default() -> Gtdnsr {
4452        <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
4453    }
4454}
4455pub mod gtdnsr {
4456
4457    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4458    pub struct Dsgtrgar_SPEC;
4459    pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
4460    impl Dsgtrgar {
4461        #[doc = "Counter count down disabled on the rising edge of GTETRGA input"]
4462        pub const _0: Self = Self::new(0);
4463
4464        #[doc = "Counter count down enabled on the rising edge of GTETRGA input"]
4465        pub const _1: Self = Self::new(1);
4466    }
4467    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4468    pub struct Dsgtrgaf_SPEC;
4469    pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
4470    impl Dsgtrgaf {
4471        #[doc = "Counter count down disabled on the falling edge of GTETRGA input"]
4472        pub const _0: Self = Self::new(0);
4473
4474        #[doc = "Counter count down enabled on the falling edge of GTETRGA input"]
4475        pub const _1: Self = Self::new(1);
4476    }
4477    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4478    pub struct Dsgtrgbr_SPEC;
4479    pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
4480    impl Dsgtrgbr {
4481        #[doc = "Counter count down disabled on the rising edge of GTETRGB input"]
4482        pub const _0: Self = Self::new(0);
4483
4484        #[doc = "Counter count down enabled on the rising edge of GTETRGB input"]
4485        pub const _1: Self = Self::new(1);
4486    }
4487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4488    pub struct Dsgtrgbf_SPEC;
4489    pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
4490    impl Dsgtrgbf {
4491        #[doc = "Counter count down disabled on the falling edge of GTETRGB input"]
4492        pub const _0: Self = Self::new(0);
4493
4494        #[doc = "Counter count down enabled on the falling edge of GTETRGB input"]
4495        pub const _1: Self = Self::new(1);
4496    }
4497    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4498    pub struct Dscarbl_SPEC;
4499    pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
4500    impl Dscarbl {
4501        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4502        pub const _0: Self = Self::new(0);
4503
4504        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4505        pub const _1: Self = Self::new(1);
4506    }
4507    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4508    pub struct Dscarbh_SPEC;
4509    pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
4510    impl Dscarbh {
4511        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4512        pub const _0: Self = Self::new(0);
4513
4514        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4515        pub const _1: Self = Self::new(1);
4516    }
4517    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4518    pub struct Dscafbl_SPEC;
4519    pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
4520    impl Dscafbl {
4521        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4522        pub const _0: Self = Self::new(0);
4523
4524        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4525        pub const _1: Self = Self::new(1);
4526    }
4527    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4528    pub struct Dscafbh_SPEC;
4529    pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
4530    impl Dscafbh {
4531        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4532        pub const _0: Self = Self::new(0);
4533
4534        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4535        pub const _1: Self = Self::new(1);
4536    }
4537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4538    pub struct Dscbral_SPEC;
4539    pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
4540    impl Dscbral {
4541        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4542        pub const _0: Self = Self::new(0);
4543
4544        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4545        pub const _1: Self = Self::new(1);
4546    }
4547    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4548    pub struct Dscbrah_SPEC;
4549    pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
4550    impl Dscbrah {
4551        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4552        pub const _0: Self = Self::new(0);
4553
4554        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4555        pub const _1: Self = Self::new(1);
4556    }
4557    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4558    pub struct Dscbfal_SPEC;
4559    pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
4560    impl Dscbfal {
4561        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4562        pub const _0: Self = Self::new(0);
4563
4564        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4565        pub const _1: Self = Self::new(1);
4566    }
4567    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4568    pub struct Dscbfah_SPEC;
4569    pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
4570    impl Dscbfah {
4571        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4572        pub const _0: Self = Self::new(0);
4573
4574        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4575        pub const _1: Self = Self::new(1);
4576    }
4577    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4578    pub struct Dselca_SPEC;
4579    pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
4580    impl Dselca {
4581        #[doc = "Counter count down disabled at the ELC_GPTA input"]
4582        pub const _0: Self = Self::new(0);
4583
4584        #[doc = "Counter count down enabled at the ELC_GPTA input"]
4585        pub const _1: Self = Self::new(1);
4586    }
4587    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4588    pub struct Dselcb_SPEC;
4589    pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
4590    impl Dselcb {
4591        #[doc = "Counter count down disabled at the ELC_GPTB input"]
4592        pub const _0: Self = Self::new(0);
4593
4594        #[doc = "Counter count down enabled at the ELC_GPTB input"]
4595        pub const _1: Self = Self::new(1);
4596    }
4597    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4598    pub struct Dselcc_SPEC;
4599    pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
4600    impl Dselcc {
4601        #[doc = "Counter count down disabled at the ELC_GPTC input"]
4602        pub const _0: Self = Self::new(0);
4603
4604        #[doc = "Counter count down enabled at the ELC_GPTC input"]
4605        pub const _1: Self = Self::new(1);
4606    }
4607    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4608    pub struct Dselcd_SPEC;
4609    pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
4610    impl Dselcd {
4611        #[doc = "Counter count down disabled at the ELC_GPTD input"]
4612        pub const _0: Self = Self::new(0);
4613
4614        #[doc = "Counter count down enabled at the ELC_GPTD input"]
4615        pub const _1: Self = Self::new(1);
4616    }
4617}
4618#[doc(hidden)]
4619#[derive(Copy, Clone, Eq, PartialEq)]
4620pub struct Gticasr_SPEC;
4621impl crate::sealed::RegSpec for Gticasr_SPEC {
4622    type DataType = u32;
4623}
4624
4625#[doc = "General PWM Timer Input Capture Source Select Register A"]
4626pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
4627
4628impl Gticasr {
4629    #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
4630    #[inline(always)]
4631    pub fn asgtrgar(
4632        self,
4633    ) -> crate::common::RegisterField<
4634        0,
4635        0x1,
4636        1,
4637        0,
4638        gticasr::Asgtrgar,
4639        gticasr::Asgtrgar,
4640        Gticasr_SPEC,
4641        crate::common::RW,
4642    > {
4643        crate::common::RegisterField::<
4644            0,
4645            0x1,
4646            1,
4647            0,
4648            gticasr::Asgtrgar,
4649            gticasr::Asgtrgar,
4650            Gticasr_SPEC,
4651            crate::common::RW,
4652        >::from_register(self, 0)
4653    }
4654
4655    #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
4656    #[inline(always)]
4657    pub fn asgtrgaf(
4658        self,
4659    ) -> crate::common::RegisterField<
4660        1,
4661        0x1,
4662        1,
4663        0,
4664        gticasr::Asgtrgaf,
4665        gticasr::Asgtrgaf,
4666        Gticasr_SPEC,
4667        crate::common::RW,
4668    > {
4669        crate::common::RegisterField::<
4670            1,
4671            0x1,
4672            1,
4673            0,
4674            gticasr::Asgtrgaf,
4675            gticasr::Asgtrgaf,
4676            Gticasr_SPEC,
4677            crate::common::RW,
4678        >::from_register(self, 0)
4679    }
4680
4681    #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
4682    #[inline(always)]
4683    pub fn asgtrgbr(
4684        self,
4685    ) -> crate::common::RegisterField<
4686        2,
4687        0x1,
4688        1,
4689        0,
4690        gticasr::Asgtrgbr,
4691        gticasr::Asgtrgbr,
4692        Gticasr_SPEC,
4693        crate::common::RW,
4694    > {
4695        crate::common::RegisterField::<
4696            2,
4697            0x1,
4698            1,
4699            0,
4700            gticasr::Asgtrgbr,
4701            gticasr::Asgtrgbr,
4702            Gticasr_SPEC,
4703            crate::common::RW,
4704        >::from_register(self, 0)
4705    }
4706
4707    #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
4708    #[inline(always)]
4709    pub fn asgtrgbf(
4710        self,
4711    ) -> crate::common::RegisterField<
4712        3,
4713        0x1,
4714        1,
4715        0,
4716        gticasr::Asgtrgbf,
4717        gticasr::Asgtrgbf,
4718        Gticasr_SPEC,
4719        crate::common::RW,
4720    > {
4721        crate::common::RegisterField::<
4722            3,
4723            0x1,
4724            1,
4725            0,
4726            gticasr::Asgtrgbf,
4727            gticasr::Asgtrgbf,
4728            Gticasr_SPEC,
4729            crate::common::RW,
4730        >::from_register(self, 0)
4731    }
4732
4733    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
4734    #[inline(always)]
4735    pub fn ascarbl(
4736        self,
4737    ) -> crate::common::RegisterField<
4738        8,
4739        0x1,
4740        1,
4741        0,
4742        gticasr::Ascarbl,
4743        gticasr::Ascarbl,
4744        Gticasr_SPEC,
4745        crate::common::RW,
4746    > {
4747        crate::common::RegisterField::<
4748            8,
4749            0x1,
4750            1,
4751            0,
4752            gticasr::Ascarbl,
4753            gticasr::Ascarbl,
4754            Gticasr_SPEC,
4755            crate::common::RW,
4756        >::from_register(self, 0)
4757    }
4758
4759    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
4760    #[inline(always)]
4761    pub fn ascarbh(
4762        self,
4763    ) -> crate::common::RegisterField<
4764        9,
4765        0x1,
4766        1,
4767        0,
4768        gticasr::Ascarbh,
4769        gticasr::Ascarbh,
4770        Gticasr_SPEC,
4771        crate::common::RW,
4772    > {
4773        crate::common::RegisterField::<
4774            9,
4775            0x1,
4776            1,
4777            0,
4778            gticasr::Ascarbh,
4779            gticasr::Ascarbh,
4780            Gticasr_SPEC,
4781            crate::common::RW,
4782        >::from_register(self, 0)
4783    }
4784
4785    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
4786    #[inline(always)]
4787    pub fn ascafbl(
4788        self,
4789    ) -> crate::common::RegisterField<
4790        10,
4791        0x1,
4792        1,
4793        0,
4794        gticasr::Ascafbl,
4795        gticasr::Ascafbl,
4796        Gticasr_SPEC,
4797        crate::common::RW,
4798    > {
4799        crate::common::RegisterField::<
4800            10,
4801            0x1,
4802            1,
4803            0,
4804            gticasr::Ascafbl,
4805            gticasr::Ascafbl,
4806            Gticasr_SPEC,
4807            crate::common::RW,
4808        >::from_register(self, 0)
4809    }
4810
4811    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
4812    #[inline(always)]
4813    pub fn ascafbh(
4814        self,
4815    ) -> crate::common::RegisterField<
4816        11,
4817        0x1,
4818        1,
4819        0,
4820        gticasr::Ascafbh,
4821        gticasr::Ascafbh,
4822        Gticasr_SPEC,
4823        crate::common::RW,
4824    > {
4825        crate::common::RegisterField::<
4826            11,
4827            0x1,
4828            1,
4829            0,
4830            gticasr::Ascafbh,
4831            gticasr::Ascafbh,
4832            Gticasr_SPEC,
4833            crate::common::RW,
4834        >::from_register(self, 0)
4835    }
4836
4837    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
4838    #[inline(always)]
4839    pub fn ascbral(
4840        self,
4841    ) -> crate::common::RegisterField<
4842        12,
4843        0x1,
4844        1,
4845        0,
4846        gticasr::Ascbral,
4847        gticasr::Ascbral,
4848        Gticasr_SPEC,
4849        crate::common::RW,
4850    > {
4851        crate::common::RegisterField::<
4852            12,
4853            0x1,
4854            1,
4855            0,
4856            gticasr::Ascbral,
4857            gticasr::Ascbral,
4858            Gticasr_SPEC,
4859            crate::common::RW,
4860        >::from_register(self, 0)
4861    }
4862
4863    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
4864    #[inline(always)]
4865    pub fn ascbrah(
4866        self,
4867    ) -> crate::common::RegisterField<
4868        13,
4869        0x1,
4870        1,
4871        0,
4872        gticasr::Ascbrah,
4873        gticasr::Ascbrah,
4874        Gticasr_SPEC,
4875        crate::common::RW,
4876    > {
4877        crate::common::RegisterField::<
4878            13,
4879            0x1,
4880            1,
4881            0,
4882            gticasr::Ascbrah,
4883            gticasr::Ascbrah,
4884            Gticasr_SPEC,
4885            crate::common::RW,
4886        >::from_register(self, 0)
4887    }
4888
4889    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
4890    #[inline(always)]
4891    pub fn ascbfal(
4892        self,
4893    ) -> crate::common::RegisterField<
4894        14,
4895        0x1,
4896        1,
4897        0,
4898        gticasr::Ascbfal,
4899        gticasr::Ascbfal,
4900        Gticasr_SPEC,
4901        crate::common::RW,
4902    > {
4903        crate::common::RegisterField::<
4904            14,
4905            0x1,
4906            1,
4907            0,
4908            gticasr::Ascbfal,
4909            gticasr::Ascbfal,
4910            Gticasr_SPEC,
4911            crate::common::RW,
4912        >::from_register(self, 0)
4913    }
4914
4915    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
4916    #[inline(always)]
4917    pub fn ascbfah(
4918        self,
4919    ) -> crate::common::RegisterField<
4920        15,
4921        0x1,
4922        1,
4923        0,
4924        gticasr::Ascbfah,
4925        gticasr::Ascbfah,
4926        Gticasr_SPEC,
4927        crate::common::RW,
4928    > {
4929        crate::common::RegisterField::<
4930            15,
4931            0x1,
4932            1,
4933            0,
4934            gticasr::Ascbfah,
4935            gticasr::Ascbfah,
4936            Gticasr_SPEC,
4937            crate::common::RW,
4938        >::from_register(self, 0)
4939    }
4940
4941    #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
4942    #[inline(always)]
4943    pub fn aselca(
4944        self,
4945    ) -> crate::common::RegisterField<
4946        16,
4947        0x1,
4948        1,
4949        0,
4950        gticasr::Aselca,
4951        gticasr::Aselca,
4952        Gticasr_SPEC,
4953        crate::common::RW,
4954    > {
4955        crate::common::RegisterField::<
4956            16,
4957            0x1,
4958            1,
4959            0,
4960            gticasr::Aselca,
4961            gticasr::Aselca,
4962            Gticasr_SPEC,
4963            crate::common::RW,
4964        >::from_register(self, 0)
4965    }
4966
4967    #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
4968    #[inline(always)]
4969    pub fn aselcb(
4970        self,
4971    ) -> crate::common::RegisterField<
4972        17,
4973        0x1,
4974        1,
4975        0,
4976        gticasr::Aselcb,
4977        gticasr::Aselcb,
4978        Gticasr_SPEC,
4979        crate::common::RW,
4980    > {
4981        crate::common::RegisterField::<
4982            17,
4983            0x1,
4984            1,
4985            0,
4986            gticasr::Aselcb,
4987            gticasr::Aselcb,
4988            Gticasr_SPEC,
4989            crate::common::RW,
4990        >::from_register(self, 0)
4991    }
4992
4993    #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
4994    #[inline(always)]
4995    pub fn aselcc(
4996        self,
4997    ) -> crate::common::RegisterField<
4998        18,
4999        0x1,
5000        1,
5001        0,
5002        gticasr::Aselcc,
5003        gticasr::Aselcc,
5004        Gticasr_SPEC,
5005        crate::common::RW,
5006    > {
5007        crate::common::RegisterField::<
5008            18,
5009            0x1,
5010            1,
5011            0,
5012            gticasr::Aselcc,
5013            gticasr::Aselcc,
5014            Gticasr_SPEC,
5015            crate::common::RW,
5016        >::from_register(self, 0)
5017    }
5018
5019    #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
5020    #[inline(always)]
5021    pub fn aselcd(
5022        self,
5023    ) -> crate::common::RegisterField<
5024        19,
5025        0x1,
5026        1,
5027        0,
5028        gticasr::Aselcd,
5029        gticasr::Aselcd,
5030        Gticasr_SPEC,
5031        crate::common::RW,
5032    > {
5033        crate::common::RegisterField::<
5034            19,
5035            0x1,
5036            1,
5037            0,
5038            gticasr::Aselcd,
5039            gticasr::Aselcd,
5040            Gticasr_SPEC,
5041            crate::common::RW,
5042        >::from_register(self, 0)
5043    }
5044}
5045impl ::core::default::Default for Gticasr {
5046    #[inline(always)]
5047    fn default() -> Gticasr {
5048        <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
5049    }
5050}
5051pub mod gticasr {
5052
5053    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5054    pub struct Asgtrgar_SPEC;
5055    pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
5056    impl Asgtrgar {
5057        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGA input"]
5058        pub const _0: Self = Self::new(0);
5059
5060        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGA input"]
5061        pub const _1: Self = Self::new(1);
5062    }
5063    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5064    pub struct Asgtrgaf_SPEC;
5065    pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
5066    impl Asgtrgaf {
5067        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGA input"]
5068        pub const _0: Self = Self::new(0);
5069
5070        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGA input"]
5071        pub const _1: Self = Self::new(1);
5072    }
5073    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5074    pub struct Asgtrgbr_SPEC;
5075    pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
5076    impl Asgtrgbr {
5077        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGB input"]
5078        pub const _0: Self = Self::new(0);
5079
5080        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGB input"]
5081        pub const _1: Self = Self::new(1);
5082    }
5083    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5084    pub struct Asgtrgbf_SPEC;
5085    pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
5086    impl Asgtrgbf {
5087        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGB input"]
5088        pub const _0: Self = Self::new(0);
5089
5090        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGB input"]
5091        pub const _1: Self = Self::new(1);
5092    }
5093    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5094    pub struct Ascarbl_SPEC;
5095    pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
5096    impl Ascarbl {
5097        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5098        pub const _0: Self = Self::new(0);
5099
5100        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5101        pub const _1: Self = Self::new(1);
5102    }
5103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5104    pub struct Ascarbh_SPEC;
5105    pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
5106    impl Ascarbh {
5107        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5108        pub const _0: Self = Self::new(0);
5109
5110        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5111        pub const _1: Self = Self::new(1);
5112    }
5113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5114    pub struct Ascafbl_SPEC;
5115    pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
5116    impl Ascafbl {
5117        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5118        pub const _0: Self = Self::new(0);
5119
5120        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5121        pub const _1: Self = Self::new(1);
5122    }
5123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5124    pub struct Ascafbh_SPEC;
5125    pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
5126    impl Ascafbh {
5127        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5128        pub const _0: Self = Self::new(0);
5129
5130        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5131        pub const _1: Self = Self::new(1);
5132    }
5133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5134    pub struct Ascbral_SPEC;
5135    pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
5136    impl Ascbral {
5137        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5138        pub const _0: Self = Self::new(0);
5139
5140        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5141        pub const _1: Self = Self::new(1);
5142    }
5143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5144    pub struct Ascbrah_SPEC;
5145    pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
5146    impl Ascbrah {
5147        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5148        pub const _0: Self = Self::new(0);
5149
5150        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5151        pub const _1: Self = Self::new(1);
5152    }
5153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5154    pub struct Ascbfal_SPEC;
5155    pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
5156    impl Ascbfal {
5157        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5158        pub const _0: Self = Self::new(0);
5159
5160        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5161        pub const _1: Self = Self::new(1);
5162    }
5163    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5164    pub struct Ascbfah_SPEC;
5165    pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
5166    impl Ascbfah {
5167        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5168        pub const _0: Self = Self::new(0);
5169
5170        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5171        pub const _1: Self = Self::new(1);
5172    }
5173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5174    pub struct Aselca_SPEC;
5175    pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
5176    impl Aselca {
5177        #[doc = "GTCCRA input capture disabled at the ELC_GPTA input"]
5178        pub const _0: Self = Self::new(0);
5179
5180        #[doc = "GTCCRA input capture enabled at the ELC_GPTA input"]
5181        pub const _1: Self = Self::new(1);
5182    }
5183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5184    pub struct Aselcb_SPEC;
5185    pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
5186    impl Aselcb {
5187        #[doc = "GTCCRA input capture disabled at the ELC_GPTB input"]
5188        pub const _0: Self = Self::new(0);
5189
5190        #[doc = "GTCCRA input capture enabled at the ELC_GPTB input"]
5191        pub const _1: Self = Self::new(1);
5192    }
5193    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5194    pub struct Aselcc_SPEC;
5195    pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
5196    impl Aselcc {
5197        #[doc = "GTCCRA input capture disabled at the ELC_GPTC input"]
5198        pub const _0: Self = Self::new(0);
5199
5200        #[doc = "GTCCRA input capture enabled at the ELC_GPTC input"]
5201        pub const _1: Self = Self::new(1);
5202    }
5203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5204    pub struct Aselcd_SPEC;
5205    pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
5206    impl Aselcd {
5207        #[doc = "GTCCRA input capture disabled at the ELC_GPTD input"]
5208        pub const _0: Self = Self::new(0);
5209
5210        #[doc = "GTCCRA input capture enabled at the ELC_GPTD input"]
5211        pub const _1: Self = Self::new(1);
5212    }
5213}
5214#[doc(hidden)]
5215#[derive(Copy, Clone, Eq, PartialEq)]
5216pub struct Gticbsr_SPEC;
5217impl crate::sealed::RegSpec for Gticbsr_SPEC {
5218    type DataType = u32;
5219}
5220
5221#[doc = "General PWM Timer Input Capture Source Select Register B"]
5222pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
5223
5224impl Gticbsr {
5225    #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
5226    #[inline(always)]
5227    pub fn bsgtrgar(
5228        self,
5229    ) -> crate::common::RegisterField<
5230        0,
5231        0x1,
5232        1,
5233        0,
5234        gticbsr::Bsgtrgar,
5235        gticbsr::Bsgtrgar,
5236        Gticbsr_SPEC,
5237        crate::common::RW,
5238    > {
5239        crate::common::RegisterField::<
5240            0,
5241            0x1,
5242            1,
5243            0,
5244            gticbsr::Bsgtrgar,
5245            gticbsr::Bsgtrgar,
5246            Gticbsr_SPEC,
5247            crate::common::RW,
5248        >::from_register(self, 0)
5249    }
5250
5251    #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
5252    #[inline(always)]
5253    pub fn bsgtrgaf(
5254        self,
5255    ) -> crate::common::RegisterField<
5256        1,
5257        0x1,
5258        1,
5259        0,
5260        gticbsr::Bsgtrgaf,
5261        gticbsr::Bsgtrgaf,
5262        Gticbsr_SPEC,
5263        crate::common::RW,
5264    > {
5265        crate::common::RegisterField::<
5266            1,
5267            0x1,
5268            1,
5269            0,
5270            gticbsr::Bsgtrgaf,
5271            gticbsr::Bsgtrgaf,
5272            Gticbsr_SPEC,
5273            crate::common::RW,
5274        >::from_register(self, 0)
5275    }
5276
5277    #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
5278    #[inline(always)]
5279    pub fn bsgtrgbr(
5280        self,
5281    ) -> crate::common::RegisterField<
5282        2,
5283        0x1,
5284        1,
5285        0,
5286        gticbsr::Bsgtrgbr,
5287        gticbsr::Bsgtrgbr,
5288        Gticbsr_SPEC,
5289        crate::common::RW,
5290    > {
5291        crate::common::RegisterField::<
5292            2,
5293            0x1,
5294            1,
5295            0,
5296            gticbsr::Bsgtrgbr,
5297            gticbsr::Bsgtrgbr,
5298            Gticbsr_SPEC,
5299            crate::common::RW,
5300        >::from_register(self, 0)
5301    }
5302
5303    #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
5304    #[inline(always)]
5305    pub fn bsgtrgbf(
5306        self,
5307    ) -> crate::common::RegisterField<
5308        3,
5309        0x1,
5310        1,
5311        0,
5312        gticbsr::Bsgtrgbf,
5313        gticbsr::Bsgtrgbf,
5314        Gticbsr_SPEC,
5315        crate::common::RW,
5316    > {
5317        crate::common::RegisterField::<
5318            3,
5319            0x1,
5320            1,
5321            0,
5322            gticbsr::Bsgtrgbf,
5323            gticbsr::Bsgtrgbf,
5324            Gticbsr_SPEC,
5325            crate::common::RW,
5326        >::from_register(self, 0)
5327    }
5328
5329    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
5330    #[inline(always)]
5331    pub fn bscarbl(
5332        self,
5333    ) -> crate::common::RegisterField<
5334        8,
5335        0x1,
5336        1,
5337        0,
5338        gticbsr::Bscarbl,
5339        gticbsr::Bscarbl,
5340        Gticbsr_SPEC,
5341        crate::common::RW,
5342    > {
5343        crate::common::RegisterField::<
5344            8,
5345            0x1,
5346            1,
5347            0,
5348            gticbsr::Bscarbl,
5349            gticbsr::Bscarbl,
5350            Gticbsr_SPEC,
5351            crate::common::RW,
5352        >::from_register(self, 0)
5353    }
5354
5355    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
5356    #[inline(always)]
5357    pub fn bscarbh(
5358        self,
5359    ) -> crate::common::RegisterField<
5360        9,
5361        0x1,
5362        1,
5363        0,
5364        gticbsr::Bscarbh,
5365        gticbsr::Bscarbh,
5366        Gticbsr_SPEC,
5367        crate::common::RW,
5368    > {
5369        crate::common::RegisterField::<
5370            9,
5371            0x1,
5372            1,
5373            0,
5374            gticbsr::Bscarbh,
5375            gticbsr::Bscarbh,
5376            Gticbsr_SPEC,
5377            crate::common::RW,
5378        >::from_register(self, 0)
5379    }
5380
5381    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
5382    #[inline(always)]
5383    pub fn bscafbl(
5384        self,
5385    ) -> crate::common::RegisterField<
5386        10,
5387        0x1,
5388        1,
5389        0,
5390        gticbsr::Bscafbl,
5391        gticbsr::Bscafbl,
5392        Gticbsr_SPEC,
5393        crate::common::RW,
5394    > {
5395        crate::common::RegisterField::<
5396            10,
5397            0x1,
5398            1,
5399            0,
5400            gticbsr::Bscafbl,
5401            gticbsr::Bscafbl,
5402            Gticbsr_SPEC,
5403            crate::common::RW,
5404        >::from_register(self, 0)
5405    }
5406
5407    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
5408    #[inline(always)]
5409    pub fn bscafbh(
5410        self,
5411    ) -> crate::common::RegisterField<
5412        11,
5413        0x1,
5414        1,
5415        0,
5416        gticbsr::Bscafbh,
5417        gticbsr::Bscafbh,
5418        Gticbsr_SPEC,
5419        crate::common::RW,
5420    > {
5421        crate::common::RegisterField::<
5422            11,
5423            0x1,
5424            1,
5425            0,
5426            gticbsr::Bscafbh,
5427            gticbsr::Bscafbh,
5428            Gticbsr_SPEC,
5429            crate::common::RW,
5430        >::from_register(self, 0)
5431    }
5432
5433    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
5434    #[inline(always)]
5435    pub fn bscbral(
5436        self,
5437    ) -> crate::common::RegisterField<
5438        12,
5439        0x1,
5440        1,
5441        0,
5442        gticbsr::Bscbral,
5443        gticbsr::Bscbral,
5444        Gticbsr_SPEC,
5445        crate::common::RW,
5446    > {
5447        crate::common::RegisterField::<
5448            12,
5449            0x1,
5450            1,
5451            0,
5452            gticbsr::Bscbral,
5453            gticbsr::Bscbral,
5454            Gticbsr_SPEC,
5455            crate::common::RW,
5456        >::from_register(self, 0)
5457    }
5458
5459    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
5460    #[inline(always)]
5461    pub fn bscbrah(
5462        self,
5463    ) -> crate::common::RegisterField<
5464        13,
5465        0x1,
5466        1,
5467        0,
5468        gticbsr::Bscbrah,
5469        gticbsr::Bscbrah,
5470        Gticbsr_SPEC,
5471        crate::common::RW,
5472    > {
5473        crate::common::RegisterField::<
5474            13,
5475            0x1,
5476            1,
5477            0,
5478            gticbsr::Bscbrah,
5479            gticbsr::Bscbrah,
5480            Gticbsr_SPEC,
5481            crate::common::RW,
5482        >::from_register(self, 0)
5483    }
5484
5485    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
5486    #[inline(always)]
5487    pub fn bscbfal(
5488        self,
5489    ) -> crate::common::RegisterField<
5490        14,
5491        0x1,
5492        1,
5493        0,
5494        gticbsr::Bscbfal,
5495        gticbsr::Bscbfal,
5496        Gticbsr_SPEC,
5497        crate::common::RW,
5498    > {
5499        crate::common::RegisterField::<
5500            14,
5501            0x1,
5502            1,
5503            0,
5504            gticbsr::Bscbfal,
5505            gticbsr::Bscbfal,
5506            Gticbsr_SPEC,
5507            crate::common::RW,
5508        >::from_register(self, 0)
5509    }
5510
5511    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
5512    #[inline(always)]
5513    pub fn bscbfah(
5514        self,
5515    ) -> crate::common::RegisterField<
5516        15,
5517        0x1,
5518        1,
5519        0,
5520        gticbsr::Bscbfah,
5521        gticbsr::Bscbfah,
5522        Gticbsr_SPEC,
5523        crate::common::RW,
5524    > {
5525        crate::common::RegisterField::<
5526            15,
5527            0x1,
5528            1,
5529            0,
5530            gticbsr::Bscbfah,
5531            gticbsr::Bscbfah,
5532            Gticbsr_SPEC,
5533            crate::common::RW,
5534        >::from_register(self, 0)
5535    }
5536
5537    #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
5538    #[inline(always)]
5539    pub fn bselca(
5540        self,
5541    ) -> crate::common::RegisterField<
5542        16,
5543        0x1,
5544        1,
5545        0,
5546        gticbsr::Bselca,
5547        gticbsr::Bselca,
5548        Gticbsr_SPEC,
5549        crate::common::RW,
5550    > {
5551        crate::common::RegisterField::<
5552            16,
5553            0x1,
5554            1,
5555            0,
5556            gticbsr::Bselca,
5557            gticbsr::Bselca,
5558            Gticbsr_SPEC,
5559            crate::common::RW,
5560        >::from_register(self, 0)
5561    }
5562
5563    #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
5564    #[inline(always)]
5565    pub fn bselcb(
5566        self,
5567    ) -> crate::common::RegisterField<
5568        17,
5569        0x1,
5570        1,
5571        0,
5572        gticbsr::Bselcb,
5573        gticbsr::Bselcb,
5574        Gticbsr_SPEC,
5575        crate::common::RW,
5576    > {
5577        crate::common::RegisterField::<
5578            17,
5579            0x1,
5580            1,
5581            0,
5582            gticbsr::Bselcb,
5583            gticbsr::Bselcb,
5584            Gticbsr_SPEC,
5585            crate::common::RW,
5586        >::from_register(self, 0)
5587    }
5588
5589    #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
5590    #[inline(always)]
5591    pub fn bselcc(
5592        self,
5593    ) -> crate::common::RegisterField<
5594        18,
5595        0x1,
5596        1,
5597        0,
5598        gticbsr::Bselcc,
5599        gticbsr::Bselcc,
5600        Gticbsr_SPEC,
5601        crate::common::RW,
5602    > {
5603        crate::common::RegisterField::<
5604            18,
5605            0x1,
5606            1,
5607            0,
5608            gticbsr::Bselcc,
5609            gticbsr::Bselcc,
5610            Gticbsr_SPEC,
5611            crate::common::RW,
5612        >::from_register(self, 0)
5613    }
5614
5615    #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
5616    #[inline(always)]
5617    pub fn bselcd(
5618        self,
5619    ) -> crate::common::RegisterField<
5620        19,
5621        0x1,
5622        1,
5623        0,
5624        gticbsr::Bselcd,
5625        gticbsr::Bselcd,
5626        Gticbsr_SPEC,
5627        crate::common::RW,
5628    > {
5629        crate::common::RegisterField::<
5630            19,
5631            0x1,
5632            1,
5633            0,
5634            gticbsr::Bselcd,
5635            gticbsr::Bselcd,
5636            Gticbsr_SPEC,
5637            crate::common::RW,
5638        >::from_register(self, 0)
5639    }
5640}
5641impl ::core::default::Default for Gticbsr {
5642    #[inline(always)]
5643    fn default() -> Gticbsr {
5644        <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
5645    }
5646}
5647pub mod gticbsr {
5648
5649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5650    pub struct Bsgtrgar_SPEC;
5651    pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
5652    impl Bsgtrgar {
5653        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGA input"]
5654        pub const _0: Self = Self::new(0);
5655
5656        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGA input"]
5657        pub const _1: Self = Self::new(1);
5658    }
5659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5660    pub struct Bsgtrgaf_SPEC;
5661    pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
5662    impl Bsgtrgaf {
5663        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGA input"]
5664        pub const _0: Self = Self::new(0);
5665
5666        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGA input"]
5667        pub const _1: Self = Self::new(1);
5668    }
5669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5670    pub struct Bsgtrgbr_SPEC;
5671    pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
5672    impl Bsgtrgbr {
5673        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGB input"]
5674        pub const _0: Self = Self::new(0);
5675
5676        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGB input"]
5677        pub const _1: Self = Self::new(1);
5678    }
5679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5680    pub struct Bsgtrgbf_SPEC;
5681    pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
5682    impl Bsgtrgbf {
5683        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGB input"]
5684        pub const _0: Self = Self::new(0);
5685
5686        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGB input"]
5687        pub const _1: Self = Self::new(1);
5688    }
5689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5690    pub struct Bscarbl_SPEC;
5691    pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
5692    impl Bscarbl {
5693        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5694        pub const _0: Self = Self::new(0);
5695
5696        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5697        pub const _1: Self = Self::new(1);
5698    }
5699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5700    pub struct Bscarbh_SPEC;
5701    pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
5702    impl Bscarbh {
5703        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5704        pub const _0: Self = Self::new(0);
5705
5706        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5707        pub const _1: Self = Self::new(1);
5708    }
5709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5710    pub struct Bscafbl_SPEC;
5711    pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
5712    impl Bscafbl {
5713        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5714        pub const _0: Self = Self::new(0);
5715
5716        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5717        pub const _1: Self = Self::new(1);
5718    }
5719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5720    pub struct Bscafbh_SPEC;
5721    pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
5722    impl Bscafbh {
5723        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5724        pub const _0: Self = Self::new(0);
5725
5726        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5727        pub const _1: Self = Self::new(1);
5728    }
5729    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5730    pub struct Bscbral_SPEC;
5731    pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
5732    impl Bscbral {
5733        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5734        pub const _0: Self = Self::new(0);
5735
5736        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5737        pub const _1: Self = Self::new(1);
5738    }
5739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5740    pub struct Bscbrah_SPEC;
5741    pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
5742    impl Bscbrah {
5743        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5744        pub const _0: Self = Self::new(0);
5745
5746        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5747        pub const _1: Self = Self::new(1);
5748    }
5749    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5750    pub struct Bscbfal_SPEC;
5751    pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
5752    impl Bscbfal {
5753        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5754        pub const _0: Self = Self::new(0);
5755
5756        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5757        pub const _1: Self = Self::new(1);
5758    }
5759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5760    pub struct Bscbfah_SPEC;
5761    pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
5762    impl Bscbfah {
5763        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5764        pub const _0: Self = Self::new(0);
5765
5766        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5767        pub const _1: Self = Self::new(1);
5768    }
5769    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5770    pub struct Bselca_SPEC;
5771    pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
5772    impl Bselca {
5773        #[doc = "GTCCRB input capture disabled at the ELC_GPTA input"]
5774        pub const _0: Self = Self::new(0);
5775
5776        #[doc = "GTCCRB input capture enabled at the ELC_GPTA input"]
5777        pub const _1: Self = Self::new(1);
5778    }
5779    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5780    pub struct Bselcb_SPEC;
5781    pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
5782    impl Bselcb {
5783        #[doc = "GTCCRB input capture disabled at the ELC_GPTB input"]
5784        pub const _0: Self = Self::new(0);
5785
5786        #[doc = "GTCCRB input capture enabled at the ELC_GPTB input"]
5787        pub const _1: Self = Self::new(1);
5788    }
5789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5790    pub struct Bselcc_SPEC;
5791    pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
5792    impl Bselcc {
5793        #[doc = "GTCCRB input capture disabled at the ELC_GPTC input"]
5794        pub const _0: Self = Self::new(0);
5795
5796        #[doc = "GTCCRB input capture enabled at the ELC_GPTC input"]
5797        pub const _1: Self = Self::new(1);
5798    }
5799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5800    pub struct Bselcd_SPEC;
5801    pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
5802    impl Bselcd {
5803        #[doc = "GTCCRB input capture disabled at the ELC_GPTD input"]
5804        pub const _0: Self = Self::new(0);
5805
5806        #[doc = "GTCCRB input capture enabled at the ELC_GPTD input"]
5807        pub const _1: Self = Self::new(1);
5808    }
5809}
5810#[doc(hidden)]
5811#[derive(Copy, Clone, Eq, PartialEq)]
5812pub struct Gtcr_SPEC;
5813impl crate::sealed::RegSpec for Gtcr_SPEC {
5814    type DataType = u32;
5815}
5816
5817#[doc = "General PWM Timer Control Register"]
5818pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
5819
5820impl Gtcr {
5821    #[doc = "Count Start"]
5822    #[inline(always)]
5823    pub fn cst(
5824        self,
5825    ) -> crate::common::RegisterField<
5826        0,
5827        0x1,
5828        1,
5829        0,
5830        gtcr::Cst,
5831        gtcr::Cst,
5832        Gtcr_SPEC,
5833        crate::common::RW,
5834    > {
5835        crate::common::RegisterField::<
5836            0,
5837            0x1,
5838            1,
5839            0,
5840            gtcr::Cst,
5841            gtcr::Cst,
5842            Gtcr_SPEC,
5843            crate::common::RW,
5844        >::from_register(self, 0)
5845    }
5846
5847    #[doc = "Mode Select"]
5848    #[inline(always)]
5849    pub fn md(
5850        self,
5851    ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
5852    {
5853        crate::common::RegisterField::<
5854            16,
5855            0x7,
5856            1,
5857            0,
5858            gtcr::Md,
5859            gtcr::Md,
5860            Gtcr_SPEC,
5861            crate::common::RW,
5862        >::from_register(self, 0)
5863    }
5864
5865    #[doc = "Timer Prescaler Select"]
5866    #[inline(always)]
5867    pub fn tpcs(
5868        self,
5869    ) -> crate::common::RegisterField<
5870        24,
5871        0x7,
5872        1,
5873        0,
5874        gtcr::Tpcs,
5875        gtcr::Tpcs,
5876        Gtcr_SPEC,
5877        crate::common::RW,
5878    > {
5879        crate::common::RegisterField::<
5880            24,
5881            0x7,
5882            1,
5883            0,
5884            gtcr::Tpcs,
5885            gtcr::Tpcs,
5886            Gtcr_SPEC,
5887            crate::common::RW,
5888        >::from_register(self, 0)
5889    }
5890}
5891impl ::core::default::Default for Gtcr {
5892    #[inline(always)]
5893    fn default() -> Gtcr {
5894        <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
5895    }
5896}
5897pub mod gtcr {
5898
5899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5900    pub struct Cst_SPEC;
5901    pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
5902    impl Cst {
5903        #[doc = "Count operation is stopped"]
5904        pub const _0: Self = Self::new(0);
5905
5906        #[doc = "Count operation is performed"]
5907        pub const _1: Self = Self::new(1);
5908    }
5909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5910    pub struct Md_SPEC;
5911    pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
5912    impl Md {
5913        #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
5914        pub const _000: Self = Self::new(0);
5915
5916        #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
5917        pub const _001: Self = Self::new(1);
5918
5919        #[doc = "Setting prohibited"]
5920        pub const _010: Self = Self::new(2);
5921
5922        #[doc = "Setting prohibited"]
5923        pub const _011: Self = Self::new(3);
5924
5925        #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at trough) (single buffer or double buffer is possible)"]
5926        pub const _100: Self = Self::new(4);
5927
5928        #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer is possible)"]
5929        pub const _101: Self = Self::new(5);
5930
5931        #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) (fixed buffer operation)"]
5932        pub const _110: Self = Self::new(6);
5933
5934        #[doc = "Setting prohibited"]
5935        pub const _111: Self = Self::new(7);
5936    }
5937    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5938    pub struct Tpcs_SPEC;
5939    pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
5940    impl Tpcs {
5941        #[doc = "PCLKD/1"]
5942        pub const _0_X_0: Self = Self::new(0);
5943
5944        #[doc = "PCLKD/4"]
5945        pub const _0_X_1: Self = Self::new(1);
5946
5947        #[doc = "PCLKD/16"]
5948        pub const _0_X_2: Self = Self::new(2);
5949
5950        #[doc = "PCLKD/64"]
5951        pub const _0_X_3: Self = Self::new(3);
5952
5953        #[doc = "PCLKD/256"]
5954        pub const _0_X_4: Self = Self::new(4);
5955
5956        #[doc = "PCLKD/1024"]
5957        pub const _0_X_5: Self = Self::new(5);
5958
5959        #[doc = "Setting prohibited"]
5960        pub const _0_X_6: Self = Self::new(6);
5961
5962        #[doc = "Setting prohibited"]
5963        pub const _0_X_7: Self = Self::new(7);
5964    }
5965}
5966#[doc(hidden)]
5967#[derive(Copy, Clone, Eq, PartialEq)]
5968pub struct Gtuddtyc_SPEC;
5969impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
5970    type DataType = u32;
5971}
5972
5973#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
5974pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
5975
5976impl Gtuddtyc {
5977    #[doc = "Count Direction Setting"]
5978    #[inline(always)]
5979    pub fn ud(
5980        self,
5981    ) -> crate::common::RegisterField<
5982        0,
5983        0x1,
5984        1,
5985        0,
5986        gtuddtyc::Ud,
5987        gtuddtyc::Ud,
5988        Gtuddtyc_SPEC,
5989        crate::common::RW,
5990    > {
5991        crate::common::RegisterField::<
5992            0,
5993            0x1,
5994            1,
5995            0,
5996            gtuddtyc::Ud,
5997            gtuddtyc::Ud,
5998            Gtuddtyc_SPEC,
5999            crate::common::RW,
6000        >::from_register(self, 0)
6001    }
6002
6003    #[doc = "Forcible Count Direction Setting"]
6004    #[inline(always)]
6005    pub fn udf(
6006        self,
6007    ) -> crate::common::RegisterField<
6008        1,
6009        0x1,
6010        1,
6011        0,
6012        gtuddtyc::Udf,
6013        gtuddtyc::Udf,
6014        Gtuddtyc_SPEC,
6015        crate::common::RW,
6016    > {
6017        crate::common::RegisterField::<
6018            1,
6019            0x1,
6020            1,
6021            0,
6022            gtuddtyc::Udf,
6023            gtuddtyc::Udf,
6024            Gtuddtyc_SPEC,
6025            crate::common::RW,
6026        >::from_register(self, 0)
6027    }
6028
6029    #[doc = "GTIOCnA Output Duty Setting"]
6030    #[inline(always)]
6031    pub fn oadty(
6032        self,
6033    ) -> crate::common::RegisterField<
6034        16,
6035        0x3,
6036        1,
6037        0,
6038        gtuddtyc::Oadty,
6039        gtuddtyc::Oadty,
6040        Gtuddtyc_SPEC,
6041        crate::common::RW,
6042    > {
6043        crate::common::RegisterField::<
6044            16,
6045            0x3,
6046            1,
6047            0,
6048            gtuddtyc::Oadty,
6049            gtuddtyc::Oadty,
6050            Gtuddtyc_SPEC,
6051            crate::common::RW,
6052        >::from_register(self, 0)
6053    }
6054
6055    #[doc = "Forcible GTIOCnA Output Duty Setting"]
6056    #[inline(always)]
6057    pub fn oadtyf(
6058        self,
6059    ) -> crate::common::RegisterField<
6060        18,
6061        0x1,
6062        1,
6063        0,
6064        gtuddtyc::Oadtyf,
6065        gtuddtyc::Oadtyf,
6066        Gtuddtyc_SPEC,
6067        crate::common::RW,
6068    > {
6069        crate::common::RegisterField::<
6070            18,
6071            0x1,
6072            1,
6073            0,
6074            gtuddtyc::Oadtyf,
6075            gtuddtyc::Oadtyf,
6076            Gtuddtyc_SPEC,
6077            crate::common::RW,
6078        >::from_register(self, 0)
6079    }
6080
6081    #[doc = "GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting"]
6082    #[inline(always)]
6083    pub fn oadtyr(
6084        self,
6085    ) -> crate::common::RegisterField<
6086        19,
6087        0x1,
6088        1,
6089        0,
6090        gtuddtyc::Oadtyr,
6091        gtuddtyc::Oadtyr,
6092        Gtuddtyc_SPEC,
6093        crate::common::RW,
6094    > {
6095        crate::common::RegisterField::<
6096            19,
6097            0x1,
6098            1,
6099            0,
6100            gtuddtyc::Oadtyr,
6101            gtuddtyc::Oadtyr,
6102            Gtuddtyc_SPEC,
6103            crate::common::RW,
6104        >::from_register(self, 0)
6105    }
6106
6107    #[doc = "GTIOCnB Output Duty Setting"]
6108    #[inline(always)]
6109    pub fn obdty(
6110        self,
6111    ) -> crate::common::RegisterField<
6112        24,
6113        0x3,
6114        1,
6115        0,
6116        gtuddtyc::Obdty,
6117        gtuddtyc::Obdty,
6118        Gtuddtyc_SPEC,
6119        crate::common::RW,
6120    > {
6121        crate::common::RegisterField::<
6122            24,
6123            0x3,
6124            1,
6125            0,
6126            gtuddtyc::Obdty,
6127            gtuddtyc::Obdty,
6128            Gtuddtyc_SPEC,
6129            crate::common::RW,
6130        >::from_register(self, 0)
6131    }
6132
6133    #[doc = "Forcible GTIOCnB Output Duty Setting"]
6134    #[inline(always)]
6135    pub fn obdtyf(
6136        self,
6137    ) -> crate::common::RegisterField<
6138        26,
6139        0x1,
6140        1,
6141        0,
6142        gtuddtyc::Obdtyf,
6143        gtuddtyc::Obdtyf,
6144        Gtuddtyc_SPEC,
6145        crate::common::RW,
6146    > {
6147        crate::common::RegisterField::<
6148            26,
6149            0x1,
6150            1,
6151            0,
6152            gtuddtyc::Obdtyf,
6153            gtuddtyc::Obdtyf,
6154            Gtuddtyc_SPEC,
6155            crate::common::RW,
6156        >::from_register(self, 0)
6157    }
6158
6159    #[doc = "GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting"]
6160    #[inline(always)]
6161    pub fn obdtyr(
6162        self,
6163    ) -> crate::common::RegisterField<
6164        27,
6165        0x1,
6166        1,
6167        0,
6168        gtuddtyc::Obdtyr,
6169        gtuddtyc::Obdtyr,
6170        Gtuddtyc_SPEC,
6171        crate::common::RW,
6172    > {
6173        crate::common::RegisterField::<
6174            27,
6175            0x1,
6176            1,
6177            0,
6178            gtuddtyc::Obdtyr,
6179            gtuddtyc::Obdtyr,
6180            Gtuddtyc_SPEC,
6181            crate::common::RW,
6182        >::from_register(self, 0)
6183    }
6184}
6185impl ::core::default::Default for Gtuddtyc {
6186    #[inline(always)]
6187    fn default() -> Gtuddtyc {
6188        <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
6189    }
6190}
6191pub mod gtuddtyc {
6192
6193    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6194    pub struct Ud_SPEC;
6195    pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
6196    impl Ud {
6197        #[doc = "GTCNT counts down"]
6198        pub const _0: Self = Self::new(0);
6199
6200        #[doc = "GTCNT counts up"]
6201        pub const _1: Self = Self::new(1);
6202    }
6203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6204    pub struct Udf_SPEC;
6205    pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
6206    impl Udf {
6207        #[doc = "Not forcibly set"]
6208        pub const _0: Self = Self::new(0);
6209
6210        #[doc = "Forcibly set"]
6211        pub const _1: Self = Self::new(1);
6212    }
6213    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6214    pub struct Oadty_SPEC;
6215    pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
6216    impl Oadty {
6217        #[doc = "GTIOCnA pin duty depends on the compare match"]
6218        pub const _00: Self = Self::new(0);
6219
6220        #[doc = "GTIOCnA pin duty depends on the compare match"]
6221        pub const _01: Self = Self::new(1);
6222
6223        #[doc = "GTIOCnA pin duty 0%"]
6224        pub const _10: Self = Self::new(2);
6225
6226        #[doc = "GTIOCnA pin duty 100%"]
6227        pub const _11: Self = Self::new(3);
6228    }
6229    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6230    pub struct Oadtyf_SPEC;
6231    pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
6232    impl Oadtyf {
6233        #[doc = "Not forcibly set"]
6234        pub const _0: Self = Self::new(0);
6235
6236        #[doc = "Forcibly set"]
6237        pub const _1: Self = Self::new(1);
6238    }
6239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6240    pub struct Oadtyr_SPEC;
6241    pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
6242    impl Oadtyr {
6243        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
6244        pub const _0: Self = Self::new(0);
6245
6246        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
6247        pub const _1: Self = Self::new(1);
6248    }
6249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6250    pub struct Obdty_SPEC;
6251    pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
6252    impl Obdty {
6253        #[doc = "GTIOCnB pin duty depends on the compare match"]
6254        pub const _00: Self = Self::new(0);
6255
6256        #[doc = "GTIOCnB pin duty depends on the compare match"]
6257        pub const _01: Self = Self::new(1);
6258
6259        #[doc = "GTIOCnB pin duty 0%"]
6260        pub const _10: Self = Self::new(2);
6261
6262        #[doc = "GTIOCnB pin duty 100%"]
6263        pub const _11: Self = Self::new(3);
6264    }
6265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6266    pub struct Obdtyf_SPEC;
6267    pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
6268    impl Obdtyf {
6269        #[doc = "Not forcibly set"]
6270        pub const _0: Self = Self::new(0);
6271
6272        #[doc = "Forcibly set"]
6273        pub const _1: Self = Self::new(1);
6274    }
6275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6276    pub struct Obdtyr_SPEC;
6277    pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
6278    impl Obdtyr {
6279        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
6280        pub const _0: Self = Self::new(0);
6281
6282        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
6283        pub const _1: Self = Self::new(1);
6284    }
6285}
6286#[doc(hidden)]
6287#[derive(Copy, Clone, Eq, PartialEq)]
6288pub struct Gtior_SPEC;
6289impl crate::sealed::RegSpec for Gtior_SPEC {
6290    type DataType = u32;
6291}
6292
6293#[doc = "General PWM Timer I/O Control Register"]
6294pub type Gtior = crate::RegValueT<Gtior_SPEC>;
6295
6296impl Gtior {
6297    #[doc = "GTIOCnA Pin Function Select"]
6298    #[inline(always)]
6299    pub fn gtioa(
6300        self,
6301    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
6302        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
6303    }
6304
6305    #[doc = "GTIOCnA Pin Output Value Setting at the Count Stop"]
6306    #[inline(always)]
6307    pub fn oadflt(
6308        self,
6309    ) -> crate::common::RegisterField<
6310        6,
6311        0x1,
6312        1,
6313        0,
6314        gtior::Oadflt,
6315        gtior::Oadflt,
6316        Gtior_SPEC,
6317        crate::common::RW,
6318    > {
6319        crate::common::RegisterField::<
6320            6,
6321            0x1,
6322            1,
6323            0,
6324            gtior::Oadflt,
6325            gtior::Oadflt,
6326            Gtior_SPEC,
6327            crate::common::RW,
6328        >::from_register(self, 0)
6329    }
6330
6331    #[doc = "GTIOCnA Pin Output Setting at the Start/Stop Count"]
6332    #[inline(always)]
6333    pub fn oahld(
6334        self,
6335    ) -> crate::common::RegisterField<
6336        7,
6337        0x1,
6338        1,
6339        0,
6340        gtior::Oahld,
6341        gtior::Oahld,
6342        Gtior_SPEC,
6343        crate::common::RW,
6344    > {
6345        crate::common::RegisterField::<
6346            7,
6347            0x1,
6348            1,
6349            0,
6350            gtior::Oahld,
6351            gtior::Oahld,
6352            Gtior_SPEC,
6353            crate::common::RW,
6354        >::from_register(self, 0)
6355    }
6356
6357    #[doc = "GTIOCnA Pin Output Enable"]
6358    #[inline(always)]
6359    pub fn oae(
6360        self,
6361    ) -> crate::common::RegisterField<
6362        8,
6363        0x1,
6364        1,
6365        0,
6366        gtior::Oae,
6367        gtior::Oae,
6368        Gtior_SPEC,
6369        crate::common::RW,
6370    > {
6371        crate::common::RegisterField::<
6372            8,
6373            0x1,
6374            1,
6375            0,
6376            gtior::Oae,
6377            gtior::Oae,
6378            Gtior_SPEC,
6379            crate::common::RW,
6380        >::from_register(self, 0)
6381    }
6382
6383    #[doc = "GTIOCnA Pin Disable Value Setting"]
6384    #[inline(always)]
6385    pub fn oadf(
6386        self,
6387    ) -> crate::common::RegisterField<
6388        9,
6389        0x3,
6390        1,
6391        0,
6392        gtior::Oadf,
6393        gtior::Oadf,
6394        Gtior_SPEC,
6395        crate::common::RW,
6396    > {
6397        crate::common::RegisterField::<
6398            9,
6399            0x3,
6400            1,
6401            0,
6402            gtior::Oadf,
6403            gtior::Oadf,
6404            Gtior_SPEC,
6405            crate::common::RW,
6406        >::from_register(self, 0)
6407    }
6408
6409    #[doc = "Noise Filter A Enable"]
6410    #[inline(always)]
6411    pub fn nfaen(
6412        self,
6413    ) -> crate::common::RegisterField<
6414        13,
6415        0x1,
6416        1,
6417        0,
6418        gtior::Nfaen,
6419        gtior::Nfaen,
6420        Gtior_SPEC,
6421        crate::common::RW,
6422    > {
6423        crate::common::RegisterField::<
6424            13,
6425            0x1,
6426            1,
6427            0,
6428            gtior::Nfaen,
6429            gtior::Nfaen,
6430            Gtior_SPEC,
6431            crate::common::RW,
6432        >::from_register(self, 0)
6433    }
6434
6435    #[doc = "Noise Filter A Sampling Clock Select"]
6436    #[inline(always)]
6437    pub fn nfcsa(
6438        self,
6439    ) -> crate::common::RegisterField<
6440        14,
6441        0x3,
6442        1,
6443        0,
6444        gtior::Nfcsa,
6445        gtior::Nfcsa,
6446        Gtior_SPEC,
6447        crate::common::RW,
6448    > {
6449        crate::common::RegisterField::<
6450            14,
6451            0x3,
6452            1,
6453            0,
6454            gtior::Nfcsa,
6455            gtior::Nfcsa,
6456            Gtior_SPEC,
6457            crate::common::RW,
6458        >::from_register(self, 0)
6459    }
6460
6461    #[doc = "GTIOCnB Pin Function Select"]
6462    #[inline(always)]
6463    pub fn gtiob(
6464        self,
6465    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
6466        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
6467    }
6468
6469    #[doc = "GTIOCnB Pin Output Value Setting at the Count Stop"]
6470    #[inline(always)]
6471    pub fn obdflt(
6472        self,
6473    ) -> crate::common::RegisterField<
6474        22,
6475        0x1,
6476        1,
6477        0,
6478        gtior::Obdflt,
6479        gtior::Obdflt,
6480        Gtior_SPEC,
6481        crate::common::RW,
6482    > {
6483        crate::common::RegisterField::<
6484            22,
6485            0x1,
6486            1,
6487            0,
6488            gtior::Obdflt,
6489            gtior::Obdflt,
6490            Gtior_SPEC,
6491            crate::common::RW,
6492        >::from_register(self, 0)
6493    }
6494
6495    #[doc = "GTIOCnB Pin Output Setting at the Start/Stop Count"]
6496    #[inline(always)]
6497    pub fn obhld(
6498        self,
6499    ) -> crate::common::RegisterField<
6500        23,
6501        0x1,
6502        1,
6503        0,
6504        gtior::Obhld,
6505        gtior::Obhld,
6506        Gtior_SPEC,
6507        crate::common::RW,
6508    > {
6509        crate::common::RegisterField::<
6510            23,
6511            0x1,
6512            1,
6513            0,
6514            gtior::Obhld,
6515            gtior::Obhld,
6516            Gtior_SPEC,
6517            crate::common::RW,
6518        >::from_register(self, 0)
6519    }
6520
6521    #[doc = "GTIOCnB Pin Output Enable"]
6522    #[inline(always)]
6523    pub fn obe(
6524        self,
6525    ) -> crate::common::RegisterField<
6526        24,
6527        0x1,
6528        1,
6529        0,
6530        gtior::Obe,
6531        gtior::Obe,
6532        Gtior_SPEC,
6533        crate::common::RW,
6534    > {
6535        crate::common::RegisterField::<
6536            24,
6537            0x1,
6538            1,
6539            0,
6540            gtior::Obe,
6541            gtior::Obe,
6542            Gtior_SPEC,
6543            crate::common::RW,
6544        >::from_register(self, 0)
6545    }
6546
6547    #[doc = "GTIOCnB Pin Disable Value Setting"]
6548    #[inline(always)]
6549    pub fn obdf(
6550        self,
6551    ) -> crate::common::RegisterField<
6552        25,
6553        0x3,
6554        1,
6555        0,
6556        gtior::Obdf,
6557        gtior::Obdf,
6558        Gtior_SPEC,
6559        crate::common::RW,
6560    > {
6561        crate::common::RegisterField::<
6562            25,
6563            0x3,
6564            1,
6565            0,
6566            gtior::Obdf,
6567            gtior::Obdf,
6568            Gtior_SPEC,
6569            crate::common::RW,
6570        >::from_register(self, 0)
6571    }
6572
6573    #[doc = "Noise Filter B Enable"]
6574    #[inline(always)]
6575    pub fn nfben(
6576        self,
6577    ) -> crate::common::RegisterField<
6578        29,
6579        0x1,
6580        1,
6581        0,
6582        gtior::Nfben,
6583        gtior::Nfben,
6584        Gtior_SPEC,
6585        crate::common::RW,
6586    > {
6587        crate::common::RegisterField::<
6588            29,
6589            0x1,
6590            1,
6591            0,
6592            gtior::Nfben,
6593            gtior::Nfben,
6594            Gtior_SPEC,
6595            crate::common::RW,
6596        >::from_register(self, 0)
6597    }
6598
6599    #[doc = "Noise Filter B Sampling Clock Select"]
6600    #[inline(always)]
6601    pub fn nfcsb(
6602        self,
6603    ) -> crate::common::RegisterField<
6604        30,
6605        0x3,
6606        1,
6607        0,
6608        gtior::Nfcsb,
6609        gtior::Nfcsb,
6610        Gtior_SPEC,
6611        crate::common::RW,
6612    > {
6613        crate::common::RegisterField::<
6614            30,
6615            0x3,
6616            1,
6617            0,
6618            gtior::Nfcsb,
6619            gtior::Nfcsb,
6620            Gtior_SPEC,
6621            crate::common::RW,
6622        >::from_register(self, 0)
6623    }
6624}
6625impl ::core::default::Default for Gtior {
6626    #[inline(always)]
6627    fn default() -> Gtior {
6628        <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
6629    }
6630}
6631pub mod gtior {
6632
6633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6634    pub struct Oadflt_SPEC;
6635    pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
6636    impl Oadflt {
6637        #[doc = "The GTIOCnA pin outputs low when counting stops"]
6638        pub const _0: Self = Self::new(0);
6639
6640        #[doc = "The GTIOCnA pin outputs high when counting stops"]
6641        pub const _1: Self = Self::new(1);
6642    }
6643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6644    pub struct Oahld_SPEC;
6645    pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
6646    impl Oahld {
6647        #[doc = "The GTIOCnA pin output level at the start or stop of counting depends on the register setting"]
6648        pub const _0: Self = Self::new(0);
6649
6650        #[doc = "The GTIOCnA pin output level is retained at the start or stop of counting"]
6651        pub const _1: Self = Self::new(1);
6652    }
6653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6654    pub struct Oae_SPEC;
6655    pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
6656    impl Oae {
6657        #[doc = "Output is disabled"]
6658        pub const _0: Self = Self::new(0);
6659
6660        #[doc = "Output is enabled"]
6661        pub const _1: Self = Self::new(1);
6662    }
6663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6664    pub struct Oadf_SPEC;
6665    pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
6666    impl Oadf {
6667        #[doc = "None of the below options are specified"]
6668        pub const _00: Self = Self::new(0);
6669
6670        #[doc = "GTIOCnA pin is set to Hi-Z in response to controlling the output negation"]
6671        pub const _01: Self = Self::new(1);
6672
6673        #[doc = "GTIOCnA pin is set to 0 in response to controlling the output negation"]
6674        pub const _10: Self = Self::new(2);
6675
6676        #[doc = "GTIOCnA pin is set to 1 in response to controlling the output negation"]
6677        pub const _11: Self = Self::new(3);
6678    }
6679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6680    pub struct Nfaen_SPEC;
6681    pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
6682    impl Nfaen {
6683        #[doc = "The noise filter for the GTIOCnA pin is disabled"]
6684        pub const _0: Self = Self::new(0);
6685
6686        #[doc = "The noise filter for the GTIOCnA pin is enabled"]
6687        pub const _1: Self = Self::new(1);
6688    }
6689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6690    pub struct Nfcsa_SPEC;
6691    pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
6692    impl Nfcsa {
6693        #[doc = "PCLKD/1"]
6694        pub const _00: Self = Self::new(0);
6695
6696        #[doc = "PCLKD/4"]
6697        pub const _01: Self = Self::new(1);
6698
6699        #[doc = "PCLKD/16"]
6700        pub const _10: Self = Self::new(2);
6701
6702        #[doc = "PCLKD/64"]
6703        pub const _11: Self = Self::new(3);
6704    }
6705    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6706    pub struct Obdflt_SPEC;
6707    pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
6708    impl Obdflt {
6709        #[doc = "The GTIOCnB pin outputs low when counting stops"]
6710        pub const _0: Self = Self::new(0);
6711
6712        #[doc = "The GTIOCnB pin outputs high when counting stops"]
6713        pub const _1: Self = Self::new(1);
6714    }
6715    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6716    pub struct Obhld_SPEC;
6717    pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
6718    impl Obhld {
6719        #[doc = "The GTIOCnB pin output level at the start/stop of counting depends on the register setting"]
6720        pub const _0: Self = Self::new(0);
6721
6722        #[doc = "The GTIOCnB pin output level is retained at the start/stop of counting"]
6723        pub const _1: Self = Self::new(1);
6724    }
6725    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6726    pub struct Obe_SPEC;
6727    pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
6728    impl Obe {
6729        #[doc = "Output is disabled"]
6730        pub const _0: Self = Self::new(0);
6731
6732        #[doc = "Output is enabled"]
6733        pub const _1: Self = Self::new(1);
6734    }
6735    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6736    pub struct Obdf_SPEC;
6737    pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
6738    impl Obdf {
6739        #[doc = "None of the below options are specified"]
6740        pub const _00: Self = Self::new(0);
6741
6742        #[doc = "GTIOCnB pin is set to Hi-Z in response to controlling the output negation"]
6743        pub const _01: Self = Self::new(1);
6744
6745        #[doc = "GTIOCnB pin is set to 0 in response to controlling the output negation"]
6746        pub const _10: Self = Self::new(2);
6747
6748        #[doc = "GTIOCnB pin is set to 1 in response to controlling the output negation"]
6749        pub const _11: Self = Self::new(3);
6750    }
6751    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6752    pub struct Nfben_SPEC;
6753    pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
6754    impl Nfben {
6755        #[doc = "The noise filter for the GTIOCnB pin is disabled"]
6756        pub const _0: Self = Self::new(0);
6757
6758        #[doc = "The noise filter for the GTIOCnB pin is enabled"]
6759        pub const _1: Self = Self::new(1);
6760    }
6761    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6762    pub struct Nfcsb_SPEC;
6763    pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
6764    impl Nfcsb {
6765        #[doc = "PCLKD/1"]
6766        pub const _00: Self = Self::new(0);
6767
6768        #[doc = "PCLKD/4"]
6769        pub const _01: Self = Self::new(1);
6770
6771        #[doc = "PCLKD/16"]
6772        pub const _10: Self = Self::new(2);
6773
6774        #[doc = "PCLKD/64"]
6775        pub const _11: Self = Self::new(3);
6776    }
6777}
6778#[doc(hidden)]
6779#[derive(Copy, Clone, Eq, PartialEq)]
6780pub struct Gtintad_SPEC;
6781impl crate::sealed::RegSpec for Gtintad_SPEC {
6782    type DataType = u32;
6783}
6784
6785#[doc = "General PWM Timer Interrupt Output Setting Register"]
6786pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
6787
6788impl Gtintad {
6789    #[doc = "Output Disable Source Select"]
6790    #[inline(always)]
6791    pub fn grp(
6792        self,
6793    ) -> crate::common::RegisterField<
6794        24,
6795        0x3,
6796        1,
6797        0,
6798        gtintad::Grp,
6799        gtintad::Grp,
6800        Gtintad_SPEC,
6801        crate::common::RW,
6802    > {
6803        crate::common::RegisterField::<
6804            24,
6805            0x3,
6806            1,
6807            0,
6808            gtintad::Grp,
6809            gtintad::Grp,
6810            Gtintad_SPEC,
6811            crate::common::RW,
6812        >::from_register(self, 0)
6813    }
6814
6815    #[doc = "Same Time Output Level High Disable Request Enable"]
6816    #[inline(always)]
6817    pub fn grpabh(
6818        self,
6819    ) -> crate::common::RegisterField<
6820        29,
6821        0x1,
6822        1,
6823        0,
6824        gtintad::Grpabh,
6825        gtintad::Grpabh,
6826        Gtintad_SPEC,
6827        crate::common::RW,
6828    > {
6829        crate::common::RegisterField::<
6830            29,
6831            0x1,
6832            1,
6833            0,
6834            gtintad::Grpabh,
6835            gtintad::Grpabh,
6836            Gtintad_SPEC,
6837            crate::common::RW,
6838        >::from_register(self, 0)
6839    }
6840
6841    #[doc = "Same Time Output Level Low Disable Request Enable"]
6842    #[inline(always)]
6843    pub fn grpabl(
6844        self,
6845    ) -> crate::common::RegisterField<
6846        30,
6847        0x1,
6848        1,
6849        0,
6850        gtintad::Grpabl,
6851        gtintad::Grpabl,
6852        Gtintad_SPEC,
6853        crate::common::RW,
6854    > {
6855        crate::common::RegisterField::<
6856            30,
6857            0x1,
6858            1,
6859            0,
6860            gtintad::Grpabl,
6861            gtintad::Grpabl,
6862            Gtintad_SPEC,
6863            crate::common::RW,
6864        >::from_register(self, 0)
6865    }
6866}
6867impl ::core::default::Default for Gtintad {
6868    #[inline(always)]
6869    fn default() -> Gtintad {
6870        <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
6871    }
6872}
6873pub mod gtintad {
6874
6875    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6876    pub struct Grp_SPEC;
6877    pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
6878    impl Grp {
6879        #[doc = "Group A output disable request is selected"]
6880        pub const _00: Self = Self::new(0);
6881
6882        #[doc = "Group B output disable request is selected"]
6883        pub const _01: Self = Self::new(1);
6884
6885        #[doc = "Setting prohibited"]
6886        pub const _10: Self = Self::new(2);
6887
6888        #[doc = "Setting prohibited"]
6889        pub const _11: Self = Self::new(3);
6890    }
6891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6892    pub struct Grpabh_SPEC;
6893    pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
6894    impl Grpabh {
6895        #[doc = "Same time output level high disable request disabled"]
6896        pub const _0: Self = Self::new(0);
6897
6898        #[doc = "Same time output level high disable request enabled"]
6899        pub const _1: Self = Self::new(1);
6900    }
6901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6902    pub struct Grpabl_SPEC;
6903    pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
6904    impl Grpabl {
6905        #[doc = "Same time output level low disable request disabled"]
6906        pub const _0: Self = Self::new(0);
6907
6908        #[doc = "Same time output level low disable request enabled"]
6909        pub const _1: Self = Self::new(1);
6910    }
6911}
6912#[doc(hidden)]
6913#[derive(Copy, Clone, Eq, PartialEq)]
6914pub struct Gtst_SPEC;
6915impl crate::sealed::RegSpec for Gtst_SPEC {
6916    type DataType = u32;
6917}
6918
6919#[doc = "General PWM Timer Status Register"]
6920pub type Gtst = crate::RegValueT<Gtst_SPEC>;
6921
6922impl Gtst {
6923    #[doc = "Input Capture/Compare Match Flag A"]
6924    #[inline(always)]
6925    pub fn tcfa(
6926        self,
6927    ) -> crate::common::RegisterField<
6928        0,
6929        0x1,
6930        1,
6931        0,
6932        gtst::Tcfa,
6933        gtst::Tcfa,
6934        Gtst_SPEC,
6935        crate::common::RW,
6936    > {
6937        crate::common::RegisterField::<
6938            0,
6939            0x1,
6940            1,
6941            0,
6942            gtst::Tcfa,
6943            gtst::Tcfa,
6944            Gtst_SPEC,
6945            crate::common::RW,
6946        >::from_register(self, 0)
6947    }
6948
6949    #[doc = "Input Capture/Compare Match Flag B"]
6950    #[inline(always)]
6951    pub fn tcfb(
6952        self,
6953    ) -> crate::common::RegisterField<
6954        1,
6955        0x1,
6956        1,
6957        0,
6958        gtst::Tcfb,
6959        gtst::Tcfb,
6960        Gtst_SPEC,
6961        crate::common::RW,
6962    > {
6963        crate::common::RegisterField::<
6964            1,
6965            0x1,
6966            1,
6967            0,
6968            gtst::Tcfb,
6969            gtst::Tcfb,
6970            Gtst_SPEC,
6971            crate::common::RW,
6972        >::from_register(self, 0)
6973    }
6974
6975    #[doc = "Input Compare Match Flag C"]
6976    #[inline(always)]
6977    pub fn tcfc(
6978        self,
6979    ) -> crate::common::RegisterField<
6980        2,
6981        0x1,
6982        1,
6983        0,
6984        gtst::Tcfc,
6985        gtst::Tcfc,
6986        Gtst_SPEC,
6987        crate::common::RW,
6988    > {
6989        crate::common::RegisterField::<
6990            2,
6991            0x1,
6992            1,
6993            0,
6994            gtst::Tcfc,
6995            gtst::Tcfc,
6996            Gtst_SPEC,
6997            crate::common::RW,
6998        >::from_register(self, 0)
6999    }
7000
7001    #[doc = "Input Compare Match Flag D"]
7002    #[inline(always)]
7003    pub fn tcfd(
7004        self,
7005    ) -> crate::common::RegisterField<
7006        3,
7007        0x1,
7008        1,
7009        0,
7010        gtst::Tcfd,
7011        gtst::Tcfd,
7012        Gtst_SPEC,
7013        crate::common::RW,
7014    > {
7015        crate::common::RegisterField::<
7016            3,
7017            0x1,
7018            1,
7019            0,
7020            gtst::Tcfd,
7021            gtst::Tcfd,
7022            Gtst_SPEC,
7023            crate::common::RW,
7024        >::from_register(self, 0)
7025    }
7026
7027    #[doc = "Input Compare Match Flag E"]
7028    #[inline(always)]
7029    pub fn tcfe(
7030        self,
7031    ) -> crate::common::RegisterField<
7032        4,
7033        0x1,
7034        1,
7035        0,
7036        gtst::Tcfe,
7037        gtst::Tcfe,
7038        Gtst_SPEC,
7039        crate::common::RW,
7040    > {
7041        crate::common::RegisterField::<
7042            4,
7043            0x1,
7044            1,
7045            0,
7046            gtst::Tcfe,
7047            gtst::Tcfe,
7048            Gtst_SPEC,
7049            crate::common::RW,
7050        >::from_register(self, 0)
7051    }
7052
7053    #[doc = "Input Compare Match Flag F"]
7054    #[inline(always)]
7055    pub fn tcff(
7056        self,
7057    ) -> crate::common::RegisterField<
7058        5,
7059        0x1,
7060        1,
7061        0,
7062        gtst::Tcff,
7063        gtst::Tcff,
7064        Gtst_SPEC,
7065        crate::common::RW,
7066    > {
7067        crate::common::RegisterField::<
7068            5,
7069            0x1,
7070            1,
7071            0,
7072            gtst::Tcff,
7073            gtst::Tcff,
7074            Gtst_SPEC,
7075            crate::common::RW,
7076        >::from_register(self, 0)
7077    }
7078
7079    #[doc = "Overflow Flag"]
7080    #[inline(always)]
7081    pub fn tcfpo(
7082        self,
7083    ) -> crate::common::RegisterField<
7084        6,
7085        0x1,
7086        1,
7087        0,
7088        gtst::Tcfpo,
7089        gtst::Tcfpo,
7090        Gtst_SPEC,
7091        crate::common::RW,
7092    > {
7093        crate::common::RegisterField::<
7094            6,
7095            0x1,
7096            1,
7097            0,
7098            gtst::Tcfpo,
7099            gtst::Tcfpo,
7100            Gtst_SPEC,
7101            crate::common::RW,
7102        >::from_register(self, 0)
7103    }
7104
7105    #[doc = "Underflow Flag"]
7106    #[inline(always)]
7107    pub fn tcfpu(
7108        self,
7109    ) -> crate::common::RegisterField<
7110        7,
7111        0x1,
7112        1,
7113        0,
7114        gtst::Tcfpu,
7115        gtst::Tcfpu,
7116        Gtst_SPEC,
7117        crate::common::RW,
7118    > {
7119        crate::common::RegisterField::<
7120            7,
7121            0x1,
7122            1,
7123            0,
7124            gtst::Tcfpu,
7125            gtst::Tcfpu,
7126            Gtst_SPEC,
7127            crate::common::RW,
7128        >::from_register(self, 0)
7129    }
7130
7131    #[doc = "Count Direction Flag"]
7132    #[inline(always)]
7133    pub fn tucf(
7134        self,
7135    ) -> crate::common::RegisterField<
7136        15,
7137        0x1,
7138        1,
7139        0,
7140        gtst::Tucf,
7141        gtst::Tucf,
7142        Gtst_SPEC,
7143        crate::common::R,
7144    > {
7145        crate::common::RegisterField::<
7146            15,
7147            0x1,
7148            1,
7149            0,
7150            gtst::Tucf,
7151            gtst::Tucf,
7152            Gtst_SPEC,
7153            crate::common::R,
7154        >::from_register(self, 0)
7155    }
7156
7157    #[doc = "Output Disable Flag"]
7158    #[inline(always)]
7159    pub fn odf(
7160        self,
7161    ) -> crate::common::RegisterField<
7162        24,
7163        0x1,
7164        1,
7165        0,
7166        gtst::Odf,
7167        gtst::Odf,
7168        Gtst_SPEC,
7169        crate::common::R,
7170    > {
7171        crate::common::RegisterField::<
7172            24,
7173            0x1,
7174            1,
7175            0,
7176            gtst::Odf,
7177            gtst::Odf,
7178            Gtst_SPEC,
7179            crate::common::R,
7180        >::from_register(self, 0)
7181    }
7182
7183    #[doc = "Same Time Output Level High Flag"]
7184    #[inline(always)]
7185    pub fn oabhf(
7186        self,
7187    ) -> crate::common::RegisterField<
7188        29,
7189        0x1,
7190        1,
7191        0,
7192        gtst::Oabhf,
7193        gtst::Oabhf,
7194        Gtst_SPEC,
7195        crate::common::R,
7196    > {
7197        crate::common::RegisterField::<
7198            29,
7199            0x1,
7200            1,
7201            0,
7202            gtst::Oabhf,
7203            gtst::Oabhf,
7204            Gtst_SPEC,
7205            crate::common::R,
7206        >::from_register(self, 0)
7207    }
7208
7209    #[doc = "Same Time Output Level Low Flag"]
7210    #[inline(always)]
7211    pub fn oablf(
7212        self,
7213    ) -> crate::common::RegisterField<
7214        30,
7215        0x1,
7216        1,
7217        0,
7218        gtst::Oablf,
7219        gtst::Oablf,
7220        Gtst_SPEC,
7221        crate::common::R,
7222    > {
7223        crate::common::RegisterField::<
7224            30,
7225            0x1,
7226            1,
7227            0,
7228            gtst::Oablf,
7229            gtst::Oablf,
7230            Gtst_SPEC,
7231            crate::common::R,
7232        >::from_register(self, 0)
7233    }
7234}
7235impl ::core::default::Default for Gtst {
7236    #[inline(always)]
7237    fn default() -> Gtst {
7238        <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
7239    }
7240}
7241pub mod gtst {
7242
7243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7244    pub struct Tcfa_SPEC;
7245    pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
7246    impl Tcfa {
7247        #[doc = "No input capture/compare match of GTCCRA is generated"]
7248        pub const _0: Self = Self::new(0);
7249
7250        #[doc = "An input capture/compare match of GTCCRA is generated"]
7251        pub const _1: Self = Self::new(1);
7252    }
7253    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7254    pub struct Tcfb_SPEC;
7255    pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
7256    impl Tcfb {
7257        #[doc = "No input capture/compare match of GTCCRB is generated"]
7258        pub const _0: Self = Self::new(0);
7259
7260        #[doc = "An input capture/compare match of GTCCRB is generated"]
7261        pub const _1: Self = Self::new(1);
7262    }
7263    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7264    pub struct Tcfc_SPEC;
7265    pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
7266    impl Tcfc {
7267        #[doc = "No compare match of GTCCRC is generated"]
7268        pub const _0: Self = Self::new(0);
7269
7270        #[doc = "A compare match of GTCCRC is generated"]
7271        pub const _1: Self = Self::new(1);
7272    }
7273    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7274    pub struct Tcfd_SPEC;
7275    pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
7276    impl Tcfd {
7277        #[doc = "No compare match of GTCCRD is generated"]
7278        pub const _0: Self = Self::new(0);
7279
7280        #[doc = "A compare match of GTCCRD is generated"]
7281        pub const _1: Self = Self::new(1);
7282    }
7283    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7284    pub struct Tcfe_SPEC;
7285    pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
7286    impl Tcfe {
7287        #[doc = "No compare match of GTCCRE is generated"]
7288        pub const _0: Self = Self::new(0);
7289
7290        #[doc = "A compare match of GTCCRE is generated"]
7291        pub const _1: Self = Self::new(1);
7292    }
7293    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7294    pub struct Tcff_SPEC;
7295    pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
7296    impl Tcff {
7297        #[doc = "No compare match of GTCCRF is generated"]
7298        pub const _0: Self = Self::new(0);
7299
7300        #[doc = "A compare match of GTCCRF is generated"]
7301        pub const _1: Self = Self::new(1);
7302    }
7303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7304    pub struct Tcfpo_SPEC;
7305    pub type Tcfpo = crate::EnumBitfieldStruct<u8, Tcfpo_SPEC>;
7306    impl Tcfpo {
7307        #[doc = "No overflow (crest) occurred"]
7308        pub const _0: Self = Self::new(0);
7309
7310        #[doc = "An overflow (crest) occurred"]
7311        pub const _1: Self = Self::new(1);
7312    }
7313    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7314    pub struct Tcfpu_SPEC;
7315    pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
7316    impl Tcfpu {
7317        #[doc = "No underflow (trough) occurred"]
7318        pub const _0: Self = Self::new(0);
7319
7320        #[doc = "An underflow (trough) occurred"]
7321        pub const _1: Self = Self::new(1);
7322    }
7323    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7324    pub struct Tucf_SPEC;
7325    pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
7326    impl Tucf {
7327        #[doc = "GTCNT counter counts downward"]
7328        pub const _0: Self = Self::new(0);
7329
7330        #[doc = "GTCNT counter counts upward"]
7331        pub const _1: Self = Self::new(1);
7332    }
7333    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7334    pub struct Odf_SPEC;
7335    pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
7336    impl Odf {
7337        #[doc = "No output disable request is generated"]
7338        pub const _0: Self = Self::new(0);
7339
7340        #[doc = "An output disable request is generated"]
7341        pub const _1: Self = Self::new(1);
7342    }
7343    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7344    pub struct Oabhf_SPEC;
7345    pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
7346    impl Oabhf {
7347        #[doc = "No simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred."]
7348        pub const _0: Self = Self::new(0);
7349
7350        #[doc = "A simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred."]
7351        pub const _1: Self = Self::new(1);
7352    }
7353    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7354    pub struct Oablf_SPEC;
7355    pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
7356    impl Oablf {
7357        #[doc = "No simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred."]
7358        pub const _0: Self = Self::new(0);
7359
7360        #[doc = "A simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred."]
7361        pub const _1: Self = Self::new(1);
7362    }
7363}
7364#[doc(hidden)]
7365#[derive(Copy, Clone, Eq, PartialEq)]
7366pub struct Gtber_SPEC;
7367impl crate::sealed::RegSpec for Gtber_SPEC {
7368    type DataType = u32;
7369}
7370
7371#[doc = "General PWM Timer Buffer Enable Register"]
7372pub type Gtber = crate::RegValueT<Gtber_SPEC>;
7373
7374impl Gtber {
7375    #[doc = "GTCCR Buffer Operation Disable"]
7376    #[inline(always)]
7377    pub fn bd0(
7378        self,
7379    ) -> crate::common::RegisterField<
7380        0,
7381        0x1,
7382        1,
7383        0,
7384        gtber::Bd0,
7385        gtber::Bd0,
7386        Gtber_SPEC,
7387        crate::common::RW,
7388    > {
7389        crate::common::RegisterField::<
7390            0,
7391            0x1,
7392            1,
7393            0,
7394            gtber::Bd0,
7395            gtber::Bd0,
7396            Gtber_SPEC,
7397            crate::common::RW,
7398        >::from_register(self, 0)
7399    }
7400
7401    #[doc = "GTPR Buffer Operation Disable"]
7402    #[inline(always)]
7403    pub fn bd1(
7404        self,
7405    ) -> crate::common::RegisterField<
7406        1,
7407        0x1,
7408        1,
7409        0,
7410        gtber::Bd1,
7411        gtber::Bd1,
7412        Gtber_SPEC,
7413        crate::common::RW,
7414    > {
7415        crate::common::RegisterField::<
7416            1,
7417            0x1,
7418            1,
7419            0,
7420            gtber::Bd1,
7421            gtber::Bd1,
7422            Gtber_SPEC,
7423            crate::common::RW,
7424        >::from_register(self, 0)
7425    }
7426
7427    #[doc = "GTCCRA Buffer Operation"]
7428    #[inline(always)]
7429    pub fn ccra(
7430        self,
7431    ) -> crate::common::RegisterField<
7432        16,
7433        0x3,
7434        1,
7435        0,
7436        gtber::Ccra,
7437        gtber::Ccra,
7438        Gtber_SPEC,
7439        crate::common::RW,
7440    > {
7441        crate::common::RegisterField::<
7442            16,
7443            0x3,
7444            1,
7445            0,
7446            gtber::Ccra,
7447            gtber::Ccra,
7448            Gtber_SPEC,
7449            crate::common::RW,
7450        >::from_register(self, 0)
7451    }
7452
7453    #[doc = "GTCCRB Buffer Operation"]
7454    #[inline(always)]
7455    pub fn ccrb(
7456        self,
7457    ) -> crate::common::RegisterField<
7458        18,
7459        0x3,
7460        1,
7461        0,
7462        gtber::Ccrb,
7463        gtber::Ccrb,
7464        Gtber_SPEC,
7465        crate::common::RW,
7466    > {
7467        crate::common::RegisterField::<
7468            18,
7469            0x3,
7470            1,
7471            0,
7472            gtber::Ccrb,
7473            gtber::Ccrb,
7474            Gtber_SPEC,
7475            crate::common::RW,
7476        >::from_register(self, 0)
7477    }
7478
7479    #[doc = "GTPR Buffer Operation"]
7480    #[inline(always)]
7481    pub fn pr(
7482        self,
7483    ) -> crate::common::RegisterField<
7484        20,
7485        0x3,
7486        1,
7487        0,
7488        gtber::Pr,
7489        gtber::Pr,
7490        Gtber_SPEC,
7491        crate::common::RW,
7492    > {
7493        crate::common::RegisterField::<
7494            20,
7495            0x3,
7496            1,
7497            0,
7498            gtber::Pr,
7499            gtber::Pr,
7500            Gtber_SPEC,
7501            crate::common::RW,
7502        >::from_register(self, 0)
7503    }
7504
7505    #[doc = "GTCCRA and GTCCRB Forcible Buffer Operation"]
7506    #[inline(always)]
7507    pub fn ccrswt(
7508        self,
7509    ) -> crate::common::RegisterFieldBool<22, 1, 0, Gtber_SPEC, crate::common::W> {
7510        crate::common::RegisterFieldBool::<22, 1, 0, Gtber_SPEC, crate::common::W>::from_register(
7511            self, 0,
7512        )
7513    }
7514}
7515impl ::core::default::Default for Gtber {
7516    #[inline(always)]
7517    fn default() -> Gtber {
7518        <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
7519    }
7520}
7521pub mod gtber {
7522
7523    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7524    pub struct Bd0_SPEC;
7525    pub type Bd0 = crate::EnumBitfieldStruct<u8, Bd0_SPEC>;
7526    impl Bd0 {
7527        #[doc = "Buffer operation is enabled"]
7528        pub const _0: Self = Self::new(0);
7529
7530        #[doc = "Buffer operation is disabled"]
7531        pub const _1: Self = Self::new(1);
7532    }
7533    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7534    pub struct Bd1_SPEC;
7535    pub type Bd1 = crate::EnumBitfieldStruct<u8, Bd1_SPEC>;
7536    impl Bd1 {
7537        #[doc = "Buffer operation is enabled"]
7538        pub const _0: Self = Self::new(0);
7539
7540        #[doc = "Buffer operation is disabled"]
7541        pub const _1: Self = Self::new(1);
7542    }
7543    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7544    pub struct Ccra_SPEC;
7545    pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
7546    impl Ccra {
7547        #[doc = "No buffer operation"]
7548        pub const _00: Self = Self::new(0);
7549
7550        #[doc = "Single buffer operation (GTCCRA <---->GTCCRC)"]
7551        pub const _01: Self = Self::new(1);
7552    }
7553    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7554    pub struct Ccrb_SPEC;
7555    pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
7556    impl Ccrb {
7557        #[doc = "No buffer operation"]
7558        pub const _00: Self = Self::new(0);
7559
7560        #[doc = "Single buffer operation (GTCCRB <----> GTCCRE)"]
7561        pub const _01: Self = Self::new(1);
7562    }
7563    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7564    pub struct Pr_SPEC;
7565    pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
7566    impl Pr {
7567        #[doc = "No buffer operation"]
7568        pub const _00: Self = Self::new(0);
7569
7570        #[doc = "Single buffer operation (GTPBR --> GTPR)"]
7571        pub const _01: Self = Self::new(1);
7572    }
7573}
7574#[doc(hidden)]
7575#[derive(Copy, Clone, Eq, PartialEq)]
7576pub struct Gtcnt_SPEC;
7577impl crate::sealed::RegSpec for Gtcnt_SPEC {
7578    type DataType = u32;
7579}
7580
7581#[doc = "General PWM Timer Counter"]
7582pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
7583
7584impl NoBitfieldReg<Gtcnt_SPEC> for Gtcnt {}
7585impl ::core::default::Default for Gtcnt {
7586    #[inline(always)]
7587    fn default() -> Gtcnt {
7588        <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
7589    }
7590}
7591
7592#[doc(hidden)]
7593#[derive(Copy, Clone, Eq, PartialEq)]
7594pub struct Gtccra_SPEC;
7595impl crate::sealed::RegSpec for Gtccra_SPEC {
7596    type DataType = u32;
7597}
7598
7599#[doc = "General PWM Timer Compare Capture Register A"]
7600pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
7601
7602impl NoBitfieldReg<Gtccra_SPEC> for Gtccra {}
7603impl ::core::default::Default for Gtccra {
7604    #[inline(always)]
7605    fn default() -> Gtccra {
7606        <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(65535)
7607    }
7608}
7609
7610#[doc(hidden)]
7611#[derive(Copy, Clone, Eq, PartialEq)]
7612pub struct Gtccrb_SPEC;
7613impl crate::sealed::RegSpec for Gtccrb_SPEC {
7614    type DataType = u32;
7615}
7616
7617#[doc = "General PWM Timer Compare Capture Register B"]
7618pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
7619
7620impl NoBitfieldReg<Gtccrb_SPEC> for Gtccrb {}
7621impl ::core::default::Default for Gtccrb {
7622    #[inline(always)]
7623    fn default() -> Gtccrb {
7624        <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(65535)
7625    }
7626}
7627
7628#[doc(hidden)]
7629#[derive(Copy, Clone, Eq, PartialEq)]
7630pub struct Gtccrc_SPEC;
7631impl crate::sealed::RegSpec for Gtccrc_SPEC {
7632    type DataType = u32;
7633}
7634
7635#[doc = "General PWM Timer Compare Capture Register C"]
7636pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
7637
7638impl NoBitfieldReg<Gtccrc_SPEC> for Gtccrc {}
7639impl ::core::default::Default for Gtccrc {
7640    #[inline(always)]
7641    fn default() -> Gtccrc {
7642        <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(65535)
7643    }
7644}
7645
7646#[doc(hidden)]
7647#[derive(Copy, Clone, Eq, PartialEq)]
7648pub struct Gtccre_SPEC;
7649impl crate::sealed::RegSpec for Gtccre_SPEC {
7650    type DataType = u32;
7651}
7652
7653#[doc = "General PWM Timer Compare Capture Register E"]
7654pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
7655
7656impl NoBitfieldReg<Gtccre_SPEC> for Gtccre {}
7657impl ::core::default::Default for Gtccre {
7658    #[inline(always)]
7659    fn default() -> Gtccre {
7660        <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(65535)
7661    }
7662}
7663
7664#[doc(hidden)]
7665#[derive(Copy, Clone, Eq, PartialEq)]
7666pub struct Gtccrd_SPEC;
7667impl crate::sealed::RegSpec for Gtccrd_SPEC {
7668    type DataType = u32;
7669}
7670
7671#[doc = "General PWM Timer Compare Capture Register D"]
7672pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
7673
7674impl NoBitfieldReg<Gtccrd_SPEC> for Gtccrd {}
7675impl ::core::default::Default for Gtccrd {
7676    #[inline(always)]
7677    fn default() -> Gtccrd {
7678        <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(65535)
7679    }
7680}
7681
7682#[doc(hidden)]
7683#[derive(Copy, Clone, Eq, PartialEq)]
7684pub struct Gtccrf_SPEC;
7685impl crate::sealed::RegSpec for Gtccrf_SPEC {
7686    type DataType = u32;
7687}
7688
7689#[doc = "General PWM Timer Compare Capture Register F"]
7690pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
7691
7692impl NoBitfieldReg<Gtccrf_SPEC> for Gtccrf {}
7693impl ::core::default::Default for Gtccrf {
7694    #[inline(always)]
7695    fn default() -> Gtccrf {
7696        <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(65535)
7697    }
7698}
7699
7700#[doc(hidden)]
7701#[derive(Copy, Clone, Eq, PartialEq)]
7702pub struct Gtpr_SPEC;
7703impl crate::sealed::RegSpec for Gtpr_SPEC {
7704    type DataType = u32;
7705}
7706
7707#[doc = "General PWM Timer Cycle Setting Register"]
7708pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
7709
7710impl NoBitfieldReg<Gtpr_SPEC> for Gtpr {}
7711impl ::core::default::Default for Gtpr {
7712    #[inline(always)]
7713    fn default() -> Gtpr {
7714        <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(65535)
7715    }
7716}
7717
7718#[doc(hidden)]
7719#[derive(Copy, Clone, Eq, PartialEq)]
7720pub struct Gtpbr_SPEC;
7721impl crate::sealed::RegSpec for Gtpbr_SPEC {
7722    type DataType = u32;
7723}
7724
7725#[doc = "General PWM Timer Cycle Setting Buffer Register"]
7726pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
7727
7728impl NoBitfieldReg<Gtpbr_SPEC> for Gtpbr {}
7729impl ::core::default::Default for Gtpbr {
7730    #[inline(always)]
7731    fn default() -> Gtpbr {
7732        <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(65535)
7733    }
7734}
7735
7736#[doc(hidden)]
7737#[derive(Copy, Clone, Eq, PartialEq)]
7738pub struct Gtdtcr_SPEC;
7739impl crate::sealed::RegSpec for Gtdtcr_SPEC {
7740    type DataType = u32;
7741}
7742
7743#[doc = "General PWM Timer Dead Time Control Register"]
7744pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
7745
7746impl Gtdtcr {
7747    #[doc = "Negative-Phase Waveform Setting"]
7748    #[inline(always)]
7749    pub fn tde(
7750        self,
7751    ) -> crate::common::RegisterField<
7752        0,
7753        0x1,
7754        1,
7755        0,
7756        gtdtcr::Tde,
7757        gtdtcr::Tde,
7758        Gtdtcr_SPEC,
7759        crate::common::RW,
7760    > {
7761        crate::common::RegisterField::<
7762            0,
7763            0x1,
7764            1,
7765            0,
7766            gtdtcr::Tde,
7767            gtdtcr::Tde,
7768            Gtdtcr_SPEC,
7769            crate::common::RW,
7770        >::from_register(self, 0)
7771    }
7772}
7773impl ::core::default::Default for Gtdtcr {
7774    #[inline(always)]
7775    fn default() -> Gtdtcr {
7776        <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
7777    }
7778}
7779pub mod gtdtcr {
7780
7781    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7782    pub struct Tde_SPEC;
7783    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
7784    impl Tde {
7785        #[doc = "GTCCRB is set without using GTDVU"]
7786        pub const _0: Self = Self::new(0);
7787
7788        #[doc = "GTDVU is used to set the compare match value for negative-phase waveform with dead time automatically in GTCCRB"]
7789        pub const _1: Self = Self::new(1);
7790    }
7791}
7792#[doc(hidden)]
7793#[derive(Copy, Clone, Eq, PartialEq)]
7794pub struct Gtdvu_SPEC;
7795impl crate::sealed::RegSpec for Gtdvu_SPEC {
7796    type DataType = u32;
7797}
7798
7799#[doc = "General PWM Timer Dead Time Value Register U"]
7800pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
7801
7802impl NoBitfieldReg<Gtdvu_SPEC> for Gtdvu {}
7803impl ::core::default::Default for Gtdvu {
7804    #[inline(always)]
7805    fn default() -> Gtdvu {
7806        <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(65535)
7807    }
7808}
ra2e3_pac/gpt164.rs

ra2e3_pac/
gpt164.rs
