ra2e2/i3c/
svctl.rs

1#[doc = "Register `SVCTL` reader"]
2pub struct R(crate::R<SVCTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SVCTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SVCTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SVCTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SVCTL` writer"]
17pub struct W(crate::W<SVCTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SVCTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SVCTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SVCTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `GCAE` reader - General Call Address Enable"]
38pub type GCAE_R = crate::BitReader<GCAE_A>;
39#[doc = "General Call Address Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum GCAE_A {
42    #[doc = "0: General call address detection disables."]
43    _0 = 0,
44    #[doc = "1: General call address detection enables."]
45    _1 = 1,
46}
47impl From<GCAE_A> for bool {
48    #[inline(always)]
49    fn from(variant: GCAE_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl GCAE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> GCAE_A {
57        match self.bits {
58            false => GCAE_A::_0,
59            true => GCAE_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == GCAE_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == GCAE_A::_1
71    }
72}
73#[doc = "Field `GCAE` writer - General Call Address Enable"]
74pub type GCAE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SVCTL_SPEC, GCAE_A, O>;
75impl<'a, const O: u8> GCAE_W<'a, O> {
76    #[doc = "General call address detection disables."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(GCAE_A::_0)
80    }
81    #[doc = "General call address detection enables."]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(GCAE_A::_1)
85    }
86}
87#[doc = "Field `HSMCE` reader - Hs-mode Master Code Enable"]
88pub type HSMCE_R = crate::BitReader<HSMCE_A>;
89#[doc = "Hs-mode Master Code Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum HSMCE_A {
92    #[doc = "0: Hs-mode Master Code Detection disables."]
93    _0 = 0,
94    #[doc = "1: Hs-mode Master Code Detection enables."]
95    _1 = 1,
96}
97impl From<HSMCE_A> for bool {
98    #[inline(always)]
99    fn from(variant: HSMCE_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl HSMCE_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> HSMCE_A {
107        match self.bits {
108            false => HSMCE_A::_0,
109            true => HSMCE_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == HSMCE_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == HSMCE_A::_1
121    }
122}
123#[doc = "Field `HSMCE` writer - Hs-mode Master Code Enable"]
124pub type HSMCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SVCTL_SPEC, HSMCE_A, O>;
125impl<'a, const O: u8> HSMCE_W<'a, O> {
126    #[doc = "Hs-mode Master Code Detection disables."]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(HSMCE_A::_0)
130    }
131    #[doc = "Hs-mode Master Code Detection enables."]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(HSMCE_A::_1)
135    }
136}
137#[doc = "Field `DVIDE` reader - Device-ID Address Enable"]
138pub type DVIDE_R = crate::BitReader<DVIDE_A>;
139#[doc = "Device-ID Address Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum DVIDE_A {
142    #[doc = "0: Device-ID address detection disables."]
143    _0 = 0,
144    #[doc = "1: Device-ID address detection enables."]
145    _1 = 1,
146}
147impl From<DVIDE_A> for bool {
148    #[inline(always)]
149    fn from(variant: DVIDE_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl DVIDE_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> DVIDE_A {
157        match self.bits {
158            false => DVIDE_A::_0,
159            true => DVIDE_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == DVIDE_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == DVIDE_A::_1
171    }
172}
173#[doc = "Field `DVIDE` writer - Device-ID Address Enable"]
174pub type DVIDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SVCTL_SPEC, DVIDE_A, O>;
175impl<'a, const O: u8> DVIDE_W<'a, O> {
176    #[doc = "Device-ID address detection disables."]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(DVIDE_A::_0)
180    }
181    #[doc = "Device-ID address detection enables."]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(DVIDE_A::_1)
185    }
186}
187#[doc = "Field `HOAE` reader - Host Address Enable"]
188pub type HOAE_R = crate::BitReader<HOAE_A>;
189#[doc = "Host Address Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum HOAE_A {
192    #[doc = "0: Host address detection disables."]
193    _0 = 0,
194    #[doc = "1: Host address detection enables."]
195    _1 = 1,
196}
197impl From<HOAE_A> for bool {
198    #[inline(always)]
199    fn from(variant: HOAE_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl HOAE_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> HOAE_A {
207        match self.bits {
208            false => HOAE_A::_0,
209            true => HOAE_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == HOAE_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == HOAE_A::_1
221    }
222}
223#[doc = "Field `HOAE` writer - Host Address Enable"]
224pub type HOAE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SVCTL_SPEC, HOAE_A, O>;
225impl<'a, const O: u8> HOAE_W<'a, O> {
226    #[doc = "Host address detection disables."]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(HOAE_A::_0)
230    }
231    #[doc = "Host address detection enables."]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(HOAE_A::_1)
235    }
236}
237#[doc = "Field `SVAE0` reader - Slave Address Enable 0"]
238pub type SVAE0_R = crate::BitReader<SVAE0_A>;
239#[doc = "Slave Address Enable 0\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum SVAE0_A {
242    #[doc = "0: Slave 0 disables"]
243    _0 = 0,
244    #[doc = "1: Slave 0 enables"]
245    _1 = 1,
246}
247impl From<SVAE0_A> for bool {
248    #[inline(always)]
249    fn from(variant: SVAE0_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl SVAE0_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> SVAE0_A {
257        match self.bits {
258            false => SVAE0_A::_0,
259            true => SVAE0_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == SVAE0_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == SVAE0_A::_1
271    }
272}
273#[doc = "Field `SVAE0` writer - Slave Address Enable 0"]
274pub type SVAE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, SVCTL_SPEC, SVAE0_A, O>;
275impl<'a, const O: u8> SVAE0_W<'a, O> {
276    #[doc = "Slave 0 disables"]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(SVAE0_A::_0)
280    }
281    #[doc = "Slave 0 enables"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(SVAE0_A::_1)
285    }
286}
287impl R {
288    #[doc = "Bit 0 - General Call Address Enable"]
289    #[inline(always)]
290    pub fn gcae(&self) -> GCAE_R {
291        GCAE_R::new((self.bits & 1) != 0)
292    }
293    #[doc = "Bit 5 - Hs-mode Master Code Enable"]
294    #[inline(always)]
295    pub fn hsmce(&self) -> HSMCE_R {
296        HSMCE_R::new(((self.bits >> 5) & 1) != 0)
297    }
298    #[doc = "Bit 6 - Device-ID Address Enable"]
299    #[inline(always)]
300    pub fn dvide(&self) -> DVIDE_R {
301        DVIDE_R::new(((self.bits >> 6) & 1) != 0)
302    }
303    #[doc = "Bit 15 - Host Address Enable"]
304    #[inline(always)]
305    pub fn hoae(&self) -> HOAE_R {
306        HOAE_R::new(((self.bits >> 15) & 1) != 0)
307    }
308    #[doc = "Bit 16 - Slave Address Enable 0"]
309    #[inline(always)]
310    pub fn svae0(&self) -> SVAE0_R {
311        SVAE0_R::new(((self.bits >> 16) & 1) != 0)
312    }
313}
314impl W {
315    #[doc = "Bit 0 - General Call Address Enable"]
316    #[inline(always)]
317    #[must_use]
318    pub fn gcae(&mut self) -> GCAE_W<0> {
319        GCAE_W::new(self)
320    }
321    #[doc = "Bit 5 - Hs-mode Master Code Enable"]
322    #[inline(always)]
323    #[must_use]
324    pub fn hsmce(&mut self) -> HSMCE_W<5> {
325        HSMCE_W::new(self)
326    }
327    #[doc = "Bit 6 - Device-ID Address Enable"]
328    #[inline(always)]
329    #[must_use]
330    pub fn dvide(&mut self) -> DVIDE_W<6> {
331        DVIDE_W::new(self)
332    }
333    #[doc = "Bit 15 - Host Address Enable"]
334    #[inline(always)]
335    #[must_use]
336    pub fn hoae(&mut self) -> HOAE_W<15> {
337        HOAE_W::new(self)
338    }
339    #[doc = "Bit 16 - Slave Address Enable 0"]
340    #[inline(always)]
341    #[must_use]
342    pub fn svae0(&mut self) -> SVAE0_W<16> {
343        SVAE0_W::new(self)
344    }
345    #[doc = "Writes raw bits to the register."]
346    #[inline(always)]
347    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
348        self.0.bits(bits);
349        self
350    }
351}
352#[doc = "Slave Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [svctl](index.html) module"]
353pub struct SVCTL_SPEC;
354impl crate::RegisterSpec for SVCTL_SPEC {
355    type Ux = u32;
356}
357#[doc = "`read()` method returns [svctl::R](R) reader structure"]
358impl crate::Readable for SVCTL_SPEC {
359    type Reader = R;
360}
361#[doc = "`write(|w| ..)` method takes [svctl::W](W) writer structure"]
362impl crate::Writable for SVCTL_SPEC {
363    type Writer = W;
364    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
365    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
366}
367#[doc = "`reset()` method sets SVCTL to value 0"]
368impl crate::Resettable for SVCTL_SPEC {
369    const RESET_VALUE: Self::Ux = 0;
370}
ra2e2/i3c/svctl.rs

ra2e2/i3c/
svctl.rs
