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ra2e2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:02:12 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "Module Stop Control Register A"]
48    #[inline(always)]
49    pub const fn mstpcra(
50        &self,
51    ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(28usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Division Control Register"]
60    #[inline(always)]
61    pub const fn sckdivcr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(32usize),
67            )
68        }
69    }
70
71    #[doc = "System Clock Source Control Register"]
72    #[inline(always)]
73    pub const fn sckscr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(38usize),
79            )
80        }
81    }
82
83    #[doc = "Memory Wait Cycle Control Register for Code Flash"]
84    #[inline(always)]
85    pub const fn memwait(
86        &self,
87    ) -> &'static crate::common::Reg<self::Memwait_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Memwait_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(49usize),
91            )
92        }
93    }
94
95    #[doc = "High-Speed On-Chip Oscillator Control Register"]
96    #[inline(always)]
97    pub const fn hococr(
98        &self,
99    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(54usize),
103            )
104        }
105    }
106
107    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
108    #[inline(always)]
109    pub const fn mococr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(56usize),
115            )
116        }
117    }
118
119    #[doc = "Oscillation Stabilization Flag Register"]
120    #[inline(always)]
121    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
122        unsafe {
123            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
124                self._svd2pac_as_ptr().add(60usize),
125            )
126        }
127    }
128
129    #[doc = "Clock Out Control Register"]
130    #[inline(always)]
131    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(62usize),
135            )
136        }
137    }
138
139    #[doc = "Lower Power Operation Control Register"]
140    #[inline(always)]
141    pub const fn lpopt(&self) -> &'static crate::common::Reg<self::Lpopt_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Lpopt_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(76usize),
145            )
146        }
147    }
148
149    #[doc = "MOCO User Trimming Control Register"]
150    #[inline(always)]
151    pub const fn mocoutcr(
152        &self,
153    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(97usize),
157            )
158        }
159    }
160
161    #[doc = "HOCO User Trimming Control Register"]
162    #[inline(always)]
163    pub const fn hocoutcr(
164        &self,
165    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
166        unsafe {
167            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
168                self._svd2pac_as_ptr().add(98usize),
169            )
170        }
171    }
172
173    #[doc = "Snooze Control Register"]
174    #[inline(always)]
175    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
176        unsafe {
177            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
178                self._svd2pac_as_ptr().add(146usize),
179            )
180        }
181    }
182
183    #[doc = "Snooze End Control Register 0"]
184    #[inline(always)]
185    pub const fn snzedcr0(
186        &self,
187    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
188        unsafe {
189            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
190                self._svd2pac_as_ptr().add(148usize),
191            )
192        }
193    }
194
195    #[doc = "Snooze Request Control Register 0"]
196    #[inline(always)]
197    pub const fn snzreqcr0(
198        &self,
199    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(152usize),
203            )
204        }
205    }
206
207    #[doc = "Power Save Memory Control Register"]
208    #[inline(always)]
209    pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(159usize),
213            )
214        }
215    }
216
217    #[doc = "Operating Power Control Register"]
218    #[inline(always)]
219    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
220        unsafe {
221            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
222                self._svd2pac_as_ptr().add(160usize),
223            )
224        }
225    }
226
227    #[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
228    #[inline(always)]
229    pub const fn hocowtcr(
230        &self,
231    ) -> &'static crate::common::Reg<self::Hocowtcr_SPEC, crate::common::RW> {
232        unsafe {
233            crate::common::Reg::<self::Hocowtcr_SPEC, crate::common::RW>::from_ptr(
234                self._svd2pac_as_ptr().add(165usize),
235            )
236        }
237    }
238
239    #[doc = "Sub Operating Power Control Register"]
240    #[inline(always)]
241    pub const fn sopccr(
242        &self,
243    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
244        unsafe {
245            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
246                self._svd2pac_as_ptr().add(170usize),
247            )
248        }
249    }
250
251    #[doc = "Reset Status Register 1"]
252    #[inline(always)]
253    pub const fn rstsr1(
254        &self,
255    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(192usize),
259            )
260        }
261    }
262
263    #[doc = "Voltage Monitor 1 Circuit Control Register"]
264    #[inline(always)]
265    pub const fn lvd1cr1(
266        &self,
267    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(224usize),
271            )
272        }
273    }
274
275    #[doc = "Voltage Monitor 1 Circuit Status Register"]
276    #[inline(always)]
277    pub const fn lvd1sr(
278        &self,
279    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(225usize),
283            )
284        }
285    }
286
287    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
288    #[inline(always)]
289    pub const fn lvd2cr1(
290        &self,
291    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(226usize),
295            )
296        }
297    }
298
299    #[doc = "Voltage Monitor 2 Circuit Status Register"]
300    #[inline(always)]
301    pub const fn lvd2sr(
302        &self,
303    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(227usize),
307            )
308        }
309    }
310
311    #[doc = "Protect Register"]
312    #[inline(always)]
313    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(1022usize),
317            )
318        }
319    }
320
321    #[doc = "System Control OCD Control Register"]
322    #[inline(always)]
323    pub const fn syocdcr(
324        &self,
325    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(1038usize),
329            )
330        }
331    }
332
333    #[doc = "Reset Status Register 0"]
334    #[inline(always)]
335    pub const fn rstsr0(
336        &self,
337    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
338        unsafe {
339            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
340                self._svd2pac_as_ptr().add(1040usize),
341            )
342        }
343    }
344
345    #[doc = "Reset Status Register 2"]
346    #[inline(always)]
347    pub const fn rstsr2(
348        &self,
349    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
350        unsafe {
351            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
352                self._svd2pac_as_ptr().add(1041usize),
353            )
354        }
355    }
356
357    #[doc = "Voltage Monitor Circuit Control Register"]
358    #[inline(always)]
359    pub const fn lvcmpcr(
360        &self,
361    ) -> &'static crate::common::Reg<self::Lvcmpcr_SPEC, crate::common::RW> {
362        unsafe {
363            crate::common::Reg::<self::Lvcmpcr_SPEC, crate::common::RW>::from_ptr(
364                self._svd2pac_as_ptr().add(1047usize),
365            )
366        }
367    }
368
369    #[doc = "Voltage Detection Level Select Register"]
370    #[inline(always)]
371    pub const fn lvdlvlr(
372        &self,
373    ) -> &'static crate::common::Reg<self::Lvdlvlr_SPEC, crate::common::RW> {
374        unsafe {
375            crate::common::Reg::<self::Lvdlvlr_SPEC, crate::common::RW>::from_ptr(
376                self._svd2pac_as_ptr().add(1048usize),
377            )
378        }
379    }
380
381    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
382    #[inline(always)]
383    pub const fn lvd1cr0(
384        &self,
385    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
386        unsafe {
387            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
388                self._svd2pac_as_ptr().add(1050usize),
389            )
390        }
391    }
392
393    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
394    #[inline(always)]
395    pub const fn lvd2cr0(
396        &self,
397    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
398        unsafe {
399            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
400                self._svd2pac_as_ptr().add(1051usize),
401            )
402        }
403    }
404
405    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
406    #[inline(always)]
407    pub const fn lococr(
408        &self,
409    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
410        unsafe {
411            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
412                self._svd2pac_as_ptr().add(1168usize),
413            )
414        }
415    }
416
417    #[doc = "LOCO User Trimming Control Register"]
418    #[inline(always)]
419    pub const fn locoutcr(
420        &self,
421    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
422        unsafe {
423            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
424                self._svd2pac_as_ptr().add(1170usize),
425            )
426        }
427    }
428}
429#[doc(hidden)]
430#[derive(Copy, Clone, Eq, PartialEq)]
431pub struct Sbycr_SPEC;
432impl crate::sealed::RegSpec for Sbycr_SPEC {
433    type DataType = u16;
434}
435
436#[doc = "Standby Control Register"]
437pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
438
439impl Sbycr {
440    #[doc = "Software Standby Mode Select"]
441    #[inline(always)]
442    pub fn ssby(
443        self,
444    ) -> crate::common::RegisterField<
445        15,
446        0x1,
447        1,
448        0,
449        sbycr::Ssby,
450        sbycr::Ssby,
451        Sbycr_SPEC,
452        crate::common::RW,
453    > {
454        crate::common::RegisterField::<
455            15,
456            0x1,
457            1,
458            0,
459            sbycr::Ssby,
460            sbycr::Ssby,
461            Sbycr_SPEC,
462            crate::common::RW,
463        >::from_register(self, 0)
464    }
465}
466impl ::core::default::Default for Sbycr {
467    #[inline(always)]
468    fn default() -> Sbycr {
469        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(0)
470    }
471}
472pub mod sbycr {
473
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Ssby_SPEC;
476    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
477    impl Ssby {
478        #[doc = "Sleep mode"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "Software Standby mode."]
482        pub const _1: Self = Self::new(1);
483    }
484}
485#[doc(hidden)]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct Mstpcra_SPEC;
488impl crate::sealed::RegSpec for Mstpcra_SPEC {
489    type DataType = u32;
490}
491
492#[doc = "Module Stop Control Register A"]
493pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
494
495impl Mstpcra {
496    #[doc = "DTC Module Stop"]
497    #[inline(always)]
498    pub fn mstpa22(
499        self,
500    ) -> crate::common::RegisterField<
501        22,
502        0x1,
503        1,
504        0,
505        mstpcra::Mstpa22,
506        mstpcra::Mstpa22,
507        Mstpcra_SPEC,
508        crate::common::RW,
509    > {
510        crate::common::RegisterField::<
511            22,
512            0x1,
513            1,
514            0,
515            mstpcra::Mstpa22,
516            mstpcra::Mstpa22,
517            Mstpcra_SPEC,
518            crate::common::RW,
519        >::from_register(self, 0)
520    }
521}
522impl ::core::default::Default for Mstpcra {
523    #[inline(always)]
524    fn default() -> Mstpcra {
525        <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(4290772991)
526    }
527}
528pub mod mstpcra {
529
530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
531    pub struct Mstpa22_SPEC;
532    pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
533    impl Mstpa22 {
534        #[doc = "Cancel the module-stop state"]
535        pub const _0: Self = Self::new(0);
536
537        #[doc = "Enter the module-stop state"]
538        pub const _1: Self = Self::new(1);
539    }
540}
541#[doc(hidden)]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct Sckdivcr_SPEC;
544impl crate::sealed::RegSpec for Sckdivcr_SPEC {
545    type DataType = u32;
546}
547
548#[doc = "System Clock Division Control Register"]
549pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
550
551impl Sckdivcr {
552    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
553    #[inline(always)]
554    pub fn pckd(
555        self,
556    ) -> crate::common::RegisterField<
557        0,
558        0x7,
559        1,
560        0,
561        sckdivcr::Pckd,
562        sckdivcr::Pckd,
563        Sckdivcr_SPEC,
564        crate::common::RW,
565    > {
566        crate::common::RegisterField::<
567            0,
568            0x7,
569            1,
570            0,
571            sckdivcr::Pckd,
572            sckdivcr::Pckd,
573            Sckdivcr_SPEC,
574            crate::common::RW,
575        >::from_register(self, 0)
576    }
577
578    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
579    #[inline(always)]
580    pub fn pckb(
581        self,
582    ) -> crate::common::RegisterField<
583        8,
584        0x7,
585        1,
586        0,
587        sckdivcr::Pckb,
588        sckdivcr::Pckb,
589        Sckdivcr_SPEC,
590        crate::common::RW,
591    > {
592        crate::common::RegisterField::<
593            8,
594            0x7,
595            1,
596            0,
597            sckdivcr::Pckb,
598            sckdivcr::Pckb,
599            Sckdivcr_SPEC,
600            crate::common::RW,
601        >::from_register(self, 0)
602    }
603
604    #[doc = "System Clock (ICLK) Select"]
605    #[inline(always)]
606    pub fn ick(
607        self,
608    ) -> crate::common::RegisterField<
609        24,
610        0x7,
611        1,
612        0,
613        sckdivcr::Ick,
614        sckdivcr::Ick,
615        Sckdivcr_SPEC,
616        crate::common::RW,
617    > {
618        crate::common::RegisterField::<
619            24,
620            0x7,
621            1,
622            0,
623            sckdivcr::Ick,
624            sckdivcr::Ick,
625            Sckdivcr_SPEC,
626            crate::common::RW,
627        >::from_register(self, 0)
628    }
629}
630impl ::core::default::Default for Sckdivcr {
631    #[inline(always)]
632    fn default() -> Sckdivcr {
633        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(67109892)
634    }
635}
636pub mod sckdivcr {
637
638    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
639    pub struct Pckd_SPEC;
640    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
641    impl Pckd {
642        #[doc = "x 1/1"]
643        pub const _000: Self = Self::new(0);
644
645        #[doc = "x 1/2"]
646        pub const _001: Self = Self::new(1);
647
648        #[doc = "x 1/4"]
649        pub const _010: Self = Self::new(2);
650
651        #[doc = "x 1/8"]
652        pub const _011: Self = Self::new(3);
653
654        #[doc = "x 1/16"]
655        pub const _100: Self = Self::new(4);
656
657        #[doc = "x 1/32"]
658        pub const _101: Self = Self::new(5);
659
660        #[doc = "x 1/64"]
661        pub const _110: Self = Self::new(6);
662    }
663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
664    pub struct Pckb_SPEC;
665    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
666    impl Pckb {
667        #[doc = "x 1/1"]
668        pub const _000: Self = Self::new(0);
669
670        #[doc = "x 1/2"]
671        pub const _001: Self = Self::new(1);
672
673        #[doc = "x 1/4"]
674        pub const _010: Self = Self::new(2);
675
676        #[doc = "x 1/8"]
677        pub const _011: Self = Self::new(3);
678
679        #[doc = "x 1/16"]
680        pub const _100: Self = Self::new(4);
681
682        #[doc = "x 1/32"]
683        pub const _101: Self = Self::new(5);
684
685        #[doc = "x 1/64"]
686        pub const _110: Self = Self::new(6);
687    }
688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689    pub struct Ick_SPEC;
690    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
691    impl Ick {
692        #[doc = "x 1/1"]
693        pub const _000: Self = Self::new(0);
694
695        #[doc = "x 1/2"]
696        pub const _001: Self = Self::new(1);
697
698        #[doc = "x 1/4"]
699        pub const _010: Self = Self::new(2);
700
701        #[doc = "x 1/8"]
702        pub const _011: Self = Self::new(3);
703
704        #[doc = "x 1/16"]
705        pub const _100: Self = Self::new(4);
706
707        #[doc = "x 1/32"]
708        pub const _101: Self = Self::new(5);
709
710        #[doc = "x 1/64"]
711        pub const _110: Self = Self::new(6);
712    }
713}
714#[doc(hidden)]
715#[derive(Copy, Clone, Eq, PartialEq)]
716pub struct Sckscr_SPEC;
717impl crate::sealed::RegSpec for Sckscr_SPEC {
718    type DataType = u8;
719}
720
721#[doc = "System Clock Source Control Register"]
722pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
723
724impl Sckscr {
725    #[doc = "Clock Source Select"]
726    #[inline(always)]
727    pub fn cksel(
728        self,
729    ) -> crate::common::RegisterField<
730        0,
731        0x7,
732        1,
733        0,
734        sckscr::Cksel,
735        sckscr::Cksel,
736        Sckscr_SPEC,
737        crate::common::RW,
738    > {
739        crate::common::RegisterField::<
740            0,
741            0x7,
742            1,
743            0,
744            sckscr::Cksel,
745            sckscr::Cksel,
746            Sckscr_SPEC,
747            crate::common::RW,
748        >::from_register(self, 0)
749    }
750}
751impl ::core::default::Default for Sckscr {
752    #[inline(always)]
753    fn default() -> Sckscr {
754        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
755    }
756}
757pub mod sckscr {
758
759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
760    pub struct Cksel_SPEC;
761    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
762    impl Cksel {
763        #[doc = "HOCO"]
764        pub const _000: Self = Self::new(0);
765
766        #[doc = "MOCO"]
767        pub const _001: Self = Self::new(1);
768
769        #[doc = "LOCO"]
770        pub const _010: Self = Self::new(2);
771
772        #[doc = "Setting prohibited"]
773        pub const _011: Self = Self::new(3);
774
775        #[doc = "Setting prohibited"]
776        pub const _100: Self = Self::new(4);
777
778        #[doc = "Setting prohibited"]
779        pub const _101: Self = Self::new(5);
780
781        #[doc = "Setting prohibited"]
782        pub const _110: Self = Self::new(6);
783
784        #[doc = "Setting prohibited"]
785        pub const _111: Self = Self::new(7);
786    }
787}
788#[doc(hidden)]
789#[derive(Copy, Clone, Eq, PartialEq)]
790pub struct Memwait_SPEC;
791impl crate::sealed::RegSpec for Memwait_SPEC {
792    type DataType = u8;
793}
794
795#[doc = "Memory Wait Cycle Control Register for Code Flash"]
796pub type Memwait = crate::RegValueT<Memwait_SPEC>;
797
798impl Memwait {
799    #[doc = "Memory Wait Cycle Select for Code Flash"]
800    #[inline(always)]
801    pub fn memwait(
802        self,
803    ) -> crate::common::RegisterField<
804        0,
805        0x1,
806        1,
807        0,
808        memwait::Memwait,
809        memwait::Memwait,
810        Memwait_SPEC,
811        crate::common::RW,
812    > {
813        crate::common::RegisterField::<
814            0,
815            0x1,
816            1,
817            0,
818            memwait::Memwait,
819            memwait::Memwait,
820            Memwait_SPEC,
821            crate::common::RW,
822        >::from_register(self, 0)
823    }
824}
825impl ::core::default::Default for Memwait {
826    #[inline(always)]
827    fn default() -> Memwait {
828        <crate::RegValueT<Memwait_SPEC> as RegisterValue<_>>::new(0)
829    }
830}
831pub mod memwait {
832
833    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
834    pub struct Memwait_SPEC;
835    pub type Memwait = crate::EnumBitfieldStruct<u8, Memwait_SPEC>;
836    impl Memwait {
837        #[doc = "No wait"]
838        pub const _0: Self = Self::new(0);
839
840        #[doc = "Wait"]
841        pub const _1: Self = Self::new(1);
842    }
843}
844#[doc(hidden)]
845#[derive(Copy, Clone, Eq, PartialEq)]
846pub struct Hococr_SPEC;
847impl crate::sealed::RegSpec for Hococr_SPEC {
848    type DataType = u8;
849}
850
851#[doc = "High-Speed On-Chip Oscillator Control Register"]
852pub type Hococr = crate::RegValueT<Hococr_SPEC>;
853
854impl Hococr {
855    #[doc = "HOCO Stop"]
856    #[inline(always)]
857    pub fn hcstp(
858        self,
859    ) -> crate::common::RegisterField<
860        0,
861        0x1,
862        1,
863        0,
864        hococr::Hcstp,
865        hococr::Hcstp,
866        Hococr_SPEC,
867        crate::common::RW,
868    > {
869        crate::common::RegisterField::<
870            0,
871            0x1,
872            1,
873            0,
874            hococr::Hcstp,
875            hococr::Hcstp,
876            Hococr_SPEC,
877            crate::common::RW,
878        >::from_register(self, 0)
879    }
880}
881impl ::core::default::Default for Hococr {
882    #[inline(always)]
883    fn default() -> Hococr {
884        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
885    }
886}
887pub mod hococr {
888
889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
890    pub struct Hcstp_SPEC;
891    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
892    impl Hcstp {
893        #[doc = "Operate the HOCO clock"]
894        pub const _0: Self = Self::new(0);
895
896        #[doc = "Stop the HOCO clock"]
897        pub const _1: Self = Self::new(1);
898    }
899}
900#[doc(hidden)]
901#[derive(Copy, Clone, Eq, PartialEq)]
902pub struct Mococr_SPEC;
903impl crate::sealed::RegSpec for Mococr_SPEC {
904    type DataType = u8;
905}
906
907#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
908pub type Mococr = crate::RegValueT<Mococr_SPEC>;
909
910impl Mococr {
911    #[doc = "MOCO Stop"]
912    #[inline(always)]
913    pub fn mcstp(
914        self,
915    ) -> crate::common::RegisterField<
916        0,
917        0x1,
918        1,
919        0,
920        mococr::Mcstp,
921        mococr::Mcstp,
922        Mococr_SPEC,
923        crate::common::RW,
924    > {
925        crate::common::RegisterField::<
926            0,
927            0x1,
928            1,
929            0,
930            mococr::Mcstp,
931            mococr::Mcstp,
932            Mococr_SPEC,
933            crate::common::RW,
934        >::from_register(self, 0)
935    }
936}
937impl ::core::default::Default for Mococr {
938    #[inline(always)]
939    fn default() -> Mococr {
940        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
941    }
942}
943pub mod mococr {
944
945    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
946    pub struct Mcstp_SPEC;
947    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
948    impl Mcstp {
949        #[doc = "MOCO clock is operating"]
950        pub const _0: Self = Self::new(0);
951
952        #[doc = "MOCO clock is stopped"]
953        pub const _1: Self = Self::new(1);
954    }
955}
956#[doc(hidden)]
957#[derive(Copy, Clone, Eq, PartialEq)]
958pub struct Oscsf_SPEC;
959impl crate::sealed::RegSpec for Oscsf_SPEC {
960    type DataType = u8;
961}
962
963#[doc = "Oscillation Stabilization Flag Register"]
964pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
965
966impl Oscsf {
967    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
968    #[inline(always)]
969    pub fn hocosf(
970        self,
971    ) -> crate::common::RegisterField<
972        0,
973        0x1,
974        1,
975        0,
976        oscsf::Hocosf,
977        oscsf::Hocosf,
978        Oscsf_SPEC,
979        crate::common::R,
980    > {
981        crate::common::RegisterField::<
982            0,
983            0x1,
984            1,
985            0,
986            oscsf::Hocosf,
987            oscsf::Hocosf,
988            Oscsf_SPEC,
989            crate::common::R,
990        >::from_register(self, 0)
991    }
992}
993impl ::core::default::Default for Oscsf {
994    #[inline(always)]
995    fn default() -> Oscsf {
996        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
997    }
998}
999pub mod oscsf {
1000
1001    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1002    pub struct Hocosf_SPEC;
1003    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1004    impl Hocosf {
1005        #[doc = "The HOCO clock is stopped or is not yet stable"]
1006        pub const _0: Self = Self::new(0);
1007
1008        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1009        pub const _1: Self = Self::new(1);
1010    }
1011}
1012#[doc(hidden)]
1013#[derive(Copy, Clone, Eq, PartialEq)]
1014pub struct Ckocr_SPEC;
1015impl crate::sealed::RegSpec for Ckocr_SPEC {
1016    type DataType = u8;
1017}
1018
1019#[doc = "Clock Out Control Register"]
1020pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1021
1022impl Ckocr {
1023    #[doc = "Clock Out Source Select"]
1024    #[inline(always)]
1025    pub fn ckosel(
1026        self,
1027    ) -> crate::common::RegisterField<
1028        0,
1029        0x7,
1030        1,
1031        0,
1032        ckocr::Ckosel,
1033        ckocr::Ckosel,
1034        Ckocr_SPEC,
1035        crate::common::RW,
1036    > {
1037        crate::common::RegisterField::<
1038            0,
1039            0x7,
1040            1,
1041            0,
1042            ckocr::Ckosel,
1043            ckocr::Ckosel,
1044            Ckocr_SPEC,
1045            crate::common::RW,
1046        >::from_register(self, 0)
1047    }
1048
1049    #[doc = "Clock Output Frequency Division Ratio"]
1050    #[inline(always)]
1051    pub fn ckodiv(
1052        self,
1053    ) -> crate::common::RegisterField<
1054        4,
1055        0x7,
1056        1,
1057        0,
1058        ckocr::Ckodiv,
1059        ckocr::Ckodiv,
1060        Ckocr_SPEC,
1061        crate::common::RW,
1062    > {
1063        crate::common::RegisterField::<
1064            4,
1065            0x7,
1066            1,
1067            0,
1068            ckocr::Ckodiv,
1069            ckocr::Ckodiv,
1070            Ckocr_SPEC,
1071            crate::common::RW,
1072        >::from_register(self, 0)
1073    }
1074
1075    #[doc = "Clock Out Enable"]
1076    #[inline(always)]
1077    pub fn ckoen(
1078        self,
1079    ) -> crate::common::RegisterField<
1080        7,
1081        0x1,
1082        1,
1083        0,
1084        ckocr::Ckoen,
1085        ckocr::Ckoen,
1086        Ckocr_SPEC,
1087        crate::common::RW,
1088    > {
1089        crate::common::RegisterField::<
1090            7,
1091            0x1,
1092            1,
1093            0,
1094            ckocr::Ckoen,
1095            ckocr::Ckoen,
1096            Ckocr_SPEC,
1097            crate::common::RW,
1098        >::from_register(self, 0)
1099    }
1100}
1101impl ::core::default::Default for Ckocr {
1102    #[inline(always)]
1103    fn default() -> Ckocr {
1104        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
1105    }
1106}
1107pub mod ckocr {
1108
1109    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1110    pub struct Ckosel_SPEC;
1111    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
1112    impl Ckosel {
1113        #[doc = "HOCO (value after reset)"]
1114        pub const _000: Self = Self::new(0);
1115
1116        #[doc = "MOCO"]
1117        pub const _001: Self = Self::new(1);
1118
1119        #[doc = "LOCO"]
1120        pub const _010: Self = Self::new(2);
1121
1122        #[doc = "Setting prohibited"]
1123        pub const _011: Self = Self::new(3);
1124
1125        #[doc = "Setting prohibited"]
1126        pub const _100: Self = Self::new(4);
1127
1128        #[doc = "Setting prohibited"]
1129        pub const _101: Self = Self::new(5);
1130    }
1131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1132    pub struct Ckodiv_SPEC;
1133    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
1134    impl Ckodiv {
1135        #[doc = "x 1/1"]
1136        pub const _000: Self = Self::new(0);
1137
1138        #[doc = "x 1/2"]
1139        pub const _001: Self = Self::new(1);
1140
1141        #[doc = "x 1/4"]
1142        pub const _010: Self = Self::new(2);
1143
1144        #[doc = "x 1/8"]
1145        pub const _011: Self = Self::new(3);
1146
1147        #[doc = "x 1/16"]
1148        pub const _100: Self = Self::new(4);
1149
1150        #[doc = "x 1/32"]
1151        pub const _101: Self = Self::new(5);
1152
1153        #[doc = "x 1/64"]
1154        pub const _110: Self = Self::new(6);
1155
1156        #[doc = "x 1/128"]
1157        pub const _111: Self = Self::new(7);
1158    }
1159    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1160    pub struct Ckoen_SPEC;
1161    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
1162    impl Ckoen {
1163        #[doc = "Disable clock out"]
1164        pub const _0: Self = Self::new(0);
1165
1166        #[doc = "Enable clock out"]
1167        pub const _1: Self = Self::new(1);
1168    }
1169}
1170#[doc(hidden)]
1171#[derive(Copy, Clone, Eq, PartialEq)]
1172pub struct Lpopt_SPEC;
1173impl crate::sealed::RegSpec for Lpopt_SPEC {
1174    type DataType = u8;
1175}
1176
1177#[doc = "Lower Power Operation Control Register"]
1178pub type Lpopt = crate::RegValueT<Lpopt_SPEC>;
1179
1180impl Lpopt {
1181    #[doc = "MPU Clock Disable Control"]
1182    #[inline(always)]
1183    pub fn mpudis(
1184        self,
1185    ) -> crate::common::RegisterField<
1186        0,
1187        0x1,
1188        1,
1189        0,
1190        lpopt::Mpudis,
1191        lpopt::Mpudis,
1192        Lpopt_SPEC,
1193        crate::common::RW,
1194    > {
1195        crate::common::RegisterField::<
1196            0,
1197            0x1,
1198            1,
1199            0,
1200            lpopt::Mpudis,
1201            lpopt::Mpudis,
1202            Lpopt_SPEC,
1203            crate::common::RW,
1204        >::from_register(self, 0)
1205    }
1206
1207    #[doc = "Debug Clock Disable Control"]
1208    #[inline(always)]
1209    pub fn dclkdis(
1210        self,
1211    ) -> crate::common::RegisterField<
1212        1,
1213        0x3,
1214        1,
1215        0,
1216        lpopt::Dclkdis,
1217        lpopt::Dclkdis,
1218        Lpopt_SPEC,
1219        crate::common::RW,
1220    > {
1221        crate::common::RegisterField::<
1222            1,
1223            0x3,
1224            1,
1225            0,
1226            lpopt::Dclkdis,
1227            lpopt::Dclkdis,
1228            Lpopt_SPEC,
1229            crate::common::RW,
1230        >::from_register(self, 0)
1231    }
1232
1233    #[doc = "BPF Clock Disable Control"]
1234    #[inline(always)]
1235    pub fn bpfclkdis(
1236        self,
1237    ) -> crate::common::RegisterField<
1238        3,
1239        0x1,
1240        1,
1241        0,
1242        lpopt::Bpfclkdis,
1243        lpopt::Bpfclkdis,
1244        Lpopt_SPEC,
1245        crate::common::RW,
1246    > {
1247        crate::common::RegisterField::<
1248            3,
1249            0x1,
1250            1,
1251            0,
1252            lpopt::Bpfclkdis,
1253            lpopt::Bpfclkdis,
1254            Lpopt_SPEC,
1255            crate::common::RW,
1256        >::from_register(self, 0)
1257    }
1258
1259    #[doc = "Lower Power Operation Enable"]
1260    #[inline(always)]
1261    pub fn lpopten(
1262        self,
1263    ) -> crate::common::RegisterField<
1264        7,
1265        0x1,
1266        1,
1267        0,
1268        lpopt::Lpopten,
1269        lpopt::Lpopten,
1270        Lpopt_SPEC,
1271        crate::common::RW,
1272    > {
1273        crate::common::RegisterField::<
1274            7,
1275            0x1,
1276            1,
1277            0,
1278            lpopt::Lpopten,
1279            lpopt::Lpopten,
1280            Lpopt_SPEC,
1281            crate::common::RW,
1282        >::from_register(self, 0)
1283    }
1284}
1285impl ::core::default::Default for Lpopt {
1286    #[inline(always)]
1287    fn default() -> Lpopt {
1288        <crate::RegValueT<Lpopt_SPEC> as RegisterValue<_>>::new(64)
1289    }
1290}
1291pub mod lpopt {
1292
1293    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1294    pub struct Mpudis_SPEC;
1295    pub type Mpudis = crate::EnumBitfieldStruct<u8, Mpudis_SPEC>;
1296    impl Mpudis {
1297        #[doc = "MPU operates as normal"]
1298        pub const _0: Self = Self::new(0);
1299
1300        #[doc = "MPU operate clock stops (MPU function disable)."]
1301        pub const _1: Self = Self::new(1);
1302    }
1303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1304    pub struct Dclkdis_SPEC;
1305    pub type Dclkdis = crate::EnumBitfieldStruct<u8, Dclkdis_SPEC>;
1306    impl Dclkdis {
1307        #[doc = "Debug clock does not stop"]
1308        pub const _00: Self = Self::new(0);
1309    }
1310    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1311    pub struct Bpfclkdis_SPEC;
1312    pub type Bpfclkdis = crate::EnumBitfieldStruct<u8, Bpfclkdis_SPEC>;
1313    impl Bpfclkdis {
1314        #[doc = "Flash register R/W clock operates as normal"]
1315        pub const _0: Self = Self::new(0);
1316
1317        #[doc = "Flash register R/W clock stops."]
1318        pub const _1: Self = Self::new(1);
1319    }
1320    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1321    pub struct Lpopten_SPEC;
1322    pub type Lpopten = crate::EnumBitfieldStruct<u8, Lpopten_SPEC>;
1323    impl Lpopten {
1324        #[doc = "All lower power counter measure disable"]
1325        pub const _0: Self = Self::new(0);
1326
1327        #[doc = "All lower power counter measure enable"]
1328        pub const _1: Self = Self::new(1);
1329    }
1330}
1331#[doc(hidden)]
1332#[derive(Copy, Clone, Eq, PartialEq)]
1333pub struct Mocoutcr_SPEC;
1334impl crate::sealed::RegSpec for Mocoutcr_SPEC {
1335    type DataType = u8;
1336}
1337
1338#[doc = "MOCO User Trimming Control Register"]
1339pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
1340
1341impl Mocoutcr {
1342    #[doc = "MOCO User Trimming"]
1343    #[inline(always)]
1344    pub fn mocoutrm(
1345        self,
1346    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
1347        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1348    }
1349}
1350impl ::core::default::Default for Mocoutcr {
1351    #[inline(always)]
1352    fn default() -> Mocoutcr {
1353        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
1354    }
1355}
1356
1357#[doc(hidden)]
1358#[derive(Copy, Clone, Eq, PartialEq)]
1359pub struct Hocoutcr_SPEC;
1360impl crate::sealed::RegSpec for Hocoutcr_SPEC {
1361    type DataType = u8;
1362}
1363
1364#[doc = "HOCO User Trimming Control Register"]
1365pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
1366
1367impl Hocoutcr {
1368    #[doc = "HOCO User Trimming"]
1369    #[inline(always)]
1370    pub fn hocoutrm(
1371        self,
1372    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
1373        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1374    }
1375}
1376impl ::core::default::Default for Hocoutcr {
1377    #[inline(always)]
1378    fn default() -> Hocoutcr {
1379        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
1380    }
1381}
1382
1383#[doc(hidden)]
1384#[derive(Copy, Clone, Eq, PartialEq)]
1385pub struct Snzcr_SPEC;
1386impl crate::sealed::RegSpec for Snzcr_SPEC {
1387    type DataType = u8;
1388}
1389
1390#[doc = "Snooze Control Register"]
1391pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
1392
1393impl Snzcr {
1394    #[doc = "DTC Enable in Snooze mode"]
1395    #[inline(always)]
1396    pub fn snzdtcen(
1397        self,
1398    ) -> crate::common::RegisterField<
1399        1,
1400        0x1,
1401        1,
1402        0,
1403        snzcr::Snzdtcen,
1404        snzcr::Snzdtcen,
1405        Snzcr_SPEC,
1406        crate::common::RW,
1407    > {
1408        crate::common::RegisterField::<
1409            1,
1410            0x1,
1411            1,
1412            0,
1413            snzcr::Snzdtcen,
1414            snzcr::Snzdtcen,
1415            Snzcr_SPEC,
1416            crate::common::RW,
1417        >::from_register(self, 0)
1418    }
1419
1420    #[doc = "Snooze mode Enable"]
1421    #[inline(always)]
1422    pub fn snze(
1423        self,
1424    ) -> crate::common::RegisterField<
1425        7,
1426        0x1,
1427        1,
1428        0,
1429        snzcr::Snze,
1430        snzcr::Snze,
1431        Snzcr_SPEC,
1432        crate::common::RW,
1433    > {
1434        crate::common::RegisterField::<
1435            7,
1436            0x1,
1437            1,
1438            0,
1439            snzcr::Snze,
1440            snzcr::Snze,
1441            Snzcr_SPEC,
1442            crate::common::RW,
1443        >::from_register(self, 0)
1444    }
1445}
1446impl ::core::default::Default for Snzcr {
1447    #[inline(always)]
1448    fn default() -> Snzcr {
1449        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
1450    }
1451}
1452pub mod snzcr {
1453
1454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1455    pub struct Snzdtcen_SPEC;
1456    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
1457    impl Snzdtcen {
1458        #[doc = "Disable DTC operation"]
1459        pub const _0: Self = Self::new(0);
1460
1461        #[doc = "Enable DTC operation"]
1462        pub const _1: Self = Self::new(1);
1463    }
1464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1465    pub struct Snze_SPEC;
1466    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
1467    impl Snze {
1468        #[doc = "Disable Snooze mode"]
1469        pub const _0: Self = Self::new(0);
1470
1471        #[doc = "Enable Snooze mode"]
1472        pub const _1: Self = Self::new(1);
1473    }
1474}
1475#[doc(hidden)]
1476#[derive(Copy, Clone, Eq, PartialEq)]
1477pub struct Snzedcr0_SPEC;
1478impl crate::sealed::RegSpec for Snzedcr0_SPEC {
1479    type DataType = u8;
1480}
1481
1482#[doc = "Snooze End Control Register 0"]
1483pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
1484
1485impl Snzedcr0 {
1486    #[doc = "AGT1 Underflow Snooze End Enable"]
1487    #[inline(always)]
1488    pub fn agtunfed(
1489        self,
1490    ) -> crate::common::RegisterField<
1491        0,
1492        0x1,
1493        1,
1494        0,
1495        snzedcr0::Agtunfed,
1496        snzedcr0::Agtunfed,
1497        Snzedcr0_SPEC,
1498        crate::common::RW,
1499    > {
1500        crate::common::RegisterField::<
1501            0,
1502            0x1,
1503            1,
1504            0,
1505            snzedcr0::Agtunfed,
1506            snzedcr0::Agtunfed,
1507            Snzedcr0_SPEC,
1508            crate::common::RW,
1509        >::from_register(self, 0)
1510    }
1511
1512    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
1513    #[inline(always)]
1514    pub fn dtczred(
1515        self,
1516    ) -> crate::common::RegisterField<
1517        1,
1518        0x1,
1519        1,
1520        0,
1521        snzedcr0::Dtczred,
1522        snzedcr0::Dtczred,
1523        Snzedcr0_SPEC,
1524        crate::common::RW,
1525    > {
1526        crate::common::RegisterField::<
1527            1,
1528            0x1,
1529            1,
1530            0,
1531            snzedcr0::Dtczred,
1532            snzedcr0::Dtczred,
1533            Snzedcr0_SPEC,
1534            crate::common::RW,
1535        >::from_register(self, 0)
1536    }
1537
1538    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
1539    #[inline(always)]
1540    pub fn dtcnzred(
1541        self,
1542    ) -> crate::common::RegisterField<
1543        2,
1544        0x1,
1545        1,
1546        0,
1547        snzedcr0::Dtcnzred,
1548        snzedcr0::Dtcnzred,
1549        Snzedcr0_SPEC,
1550        crate::common::RW,
1551    > {
1552        crate::common::RegisterField::<
1553            2,
1554            0x1,
1555            1,
1556            0,
1557            snzedcr0::Dtcnzred,
1558            snzedcr0::Dtcnzred,
1559            Snzedcr0_SPEC,
1560            crate::common::RW,
1561        >::from_register(self, 0)
1562    }
1563
1564    #[doc = "ADC12 Compare Match Snooze End Enable"]
1565    #[inline(always)]
1566    pub fn ad0mated(
1567        self,
1568    ) -> crate::common::RegisterField<
1569        3,
1570        0x1,
1571        1,
1572        0,
1573        snzedcr0::Ad0Mated,
1574        snzedcr0::Ad0Mated,
1575        Snzedcr0_SPEC,
1576        crate::common::RW,
1577    > {
1578        crate::common::RegisterField::<
1579            3,
1580            0x1,
1581            1,
1582            0,
1583            snzedcr0::Ad0Mated,
1584            snzedcr0::Ad0Mated,
1585            Snzedcr0_SPEC,
1586            crate::common::RW,
1587        >::from_register(self, 0)
1588    }
1589
1590    #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
1591    #[inline(always)]
1592    pub fn ad0umted(
1593        self,
1594    ) -> crate::common::RegisterField<
1595        4,
1596        0x1,
1597        1,
1598        0,
1599        snzedcr0::Ad0Umted,
1600        snzedcr0::Ad0Umted,
1601        Snzedcr0_SPEC,
1602        crate::common::RW,
1603    > {
1604        crate::common::RegisterField::<
1605            4,
1606            0x1,
1607            1,
1608            0,
1609            snzedcr0::Ad0Umted,
1610            snzedcr0::Ad0Umted,
1611            Snzedcr0_SPEC,
1612            crate::common::RW,
1613        >::from_register(self, 0)
1614    }
1615}
1616impl ::core::default::Default for Snzedcr0 {
1617    #[inline(always)]
1618    fn default() -> Snzedcr0 {
1619        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
1620    }
1621}
1622pub mod snzedcr0 {
1623
1624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1625    pub struct Agtunfed_SPEC;
1626    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
1627    impl Agtunfed {
1628        #[doc = "Disable the snooze end request"]
1629        pub const _0: Self = Self::new(0);
1630
1631        #[doc = "Enable the snooze end request"]
1632        pub const _1: Self = Self::new(1);
1633    }
1634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1635    pub struct Dtczred_SPEC;
1636    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
1637    impl Dtczred {
1638        #[doc = "Disable the snooze end request"]
1639        pub const _0: Self = Self::new(0);
1640
1641        #[doc = "Enable the snooze end request"]
1642        pub const _1: Self = Self::new(1);
1643    }
1644    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1645    pub struct Dtcnzred_SPEC;
1646    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
1647    impl Dtcnzred {
1648        #[doc = "Disable the snooze end request"]
1649        pub const _0: Self = Self::new(0);
1650
1651        #[doc = "Enable the snooze end request"]
1652        pub const _1: Self = Self::new(1);
1653    }
1654    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1655    pub struct Ad0Mated_SPEC;
1656    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
1657    impl Ad0Mated {
1658        #[doc = "Disable the snooze end request"]
1659        pub const _0: Self = Self::new(0);
1660
1661        #[doc = "Enable the snooze end request"]
1662        pub const _1: Self = Self::new(1);
1663    }
1664    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1665    pub struct Ad0Umted_SPEC;
1666    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
1667    impl Ad0Umted {
1668        #[doc = "Disable the snooze end request"]
1669        pub const _0: Self = Self::new(0);
1670
1671        #[doc = "Enable the snooze end request"]
1672        pub const _1: Self = Self::new(1);
1673    }
1674}
1675#[doc(hidden)]
1676#[derive(Copy, Clone, Eq, PartialEq)]
1677pub struct Snzreqcr0_SPEC;
1678impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
1679    type DataType = u32;
1680}
1681
1682#[doc = "Snooze Request Control Register 0"]
1683pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
1684
1685impl Snzreqcr0 {
1686    #[doc = "Enable IRQ0 pin snooze request"]
1687    #[inline(always)]
1688    pub fn snzreqen0(
1689        self,
1690    ) -> crate::common::RegisterField<
1691        0,
1692        0x1,
1693        1,
1694        0,
1695        snzreqcr0::Snzreqen0,
1696        snzreqcr0::Snzreqen0,
1697        Snzreqcr0_SPEC,
1698        crate::common::RW,
1699    > {
1700        crate::common::RegisterField::<
1701            0,
1702            0x1,
1703            1,
1704            0,
1705            snzreqcr0::Snzreqen0,
1706            snzreqcr0::Snzreqen0,
1707            Snzreqcr0_SPEC,
1708            crate::common::RW,
1709        >::from_register(self, 0)
1710    }
1711
1712    #[doc = "Enable IRQ1 pin snooze request"]
1713    #[inline(always)]
1714    pub fn snzreqen1(
1715        self,
1716    ) -> crate::common::RegisterField<
1717        1,
1718        0x1,
1719        1,
1720        0,
1721        snzreqcr0::Snzreqen1,
1722        snzreqcr0::Snzreqen1,
1723        Snzreqcr0_SPEC,
1724        crate::common::RW,
1725    > {
1726        crate::common::RegisterField::<
1727            1,
1728            0x1,
1729            1,
1730            0,
1731            snzreqcr0::Snzreqen1,
1732            snzreqcr0::Snzreqen1,
1733            Snzreqcr0_SPEC,
1734            crate::common::RW,
1735        >::from_register(self, 0)
1736    }
1737
1738    #[doc = "Enable IRQ2 pin snooze request"]
1739    #[inline(always)]
1740    pub fn snzreqen2(
1741        self,
1742    ) -> crate::common::RegisterField<
1743        2,
1744        0x1,
1745        1,
1746        0,
1747        snzreqcr0::Snzreqen2,
1748        snzreqcr0::Snzreqen2,
1749        Snzreqcr0_SPEC,
1750        crate::common::RW,
1751    > {
1752        crate::common::RegisterField::<
1753            2,
1754            0x1,
1755            1,
1756            0,
1757            snzreqcr0::Snzreqen2,
1758            snzreqcr0::Snzreqen2,
1759            Snzreqcr0_SPEC,
1760            crate::common::RW,
1761        >::from_register(self, 0)
1762    }
1763
1764    #[doc = "Enable IRQ3 pin snooze request"]
1765    #[inline(always)]
1766    pub fn snzreqen3(
1767        self,
1768    ) -> crate::common::RegisterField<
1769        3,
1770        0x1,
1771        1,
1772        0,
1773        snzreqcr0::Snzreqen3,
1774        snzreqcr0::Snzreqen3,
1775        Snzreqcr0_SPEC,
1776        crate::common::RW,
1777    > {
1778        crate::common::RegisterField::<
1779            3,
1780            0x1,
1781            1,
1782            0,
1783            snzreqcr0::Snzreqen3,
1784            snzreqcr0::Snzreqen3,
1785            Snzreqcr0_SPEC,
1786            crate::common::RW,
1787        >::from_register(self, 0)
1788    }
1789
1790    #[doc = "Enable IRQ4 pin snooze request"]
1791    #[inline(always)]
1792    pub fn snzreqen4(
1793        self,
1794    ) -> crate::common::RegisterField<
1795        4,
1796        0x1,
1797        1,
1798        0,
1799        snzreqcr0::Snzreqen4,
1800        snzreqcr0::Snzreqen4,
1801        Snzreqcr0_SPEC,
1802        crate::common::RW,
1803    > {
1804        crate::common::RegisterField::<
1805            4,
1806            0x1,
1807            1,
1808            0,
1809            snzreqcr0::Snzreqen4,
1810            snzreqcr0::Snzreqen4,
1811            Snzreqcr0_SPEC,
1812            crate::common::RW,
1813        >::from_register(self, 0)
1814    }
1815
1816    #[doc = "Enable IRQ5 pin snooze request"]
1817    #[inline(always)]
1818    pub fn snzreqen5(
1819        self,
1820    ) -> crate::common::RegisterField<
1821        5,
1822        0x1,
1823        1,
1824        0,
1825        snzreqcr0::Snzreqen5,
1826        snzreqcr0::Snzreqen5,
1827        Snzreqcr0_SPEC,
1828        crate::common::RW,
1829    > {
1830        crate::common::RegisterField::<
1831            5,
1832            0x1,
1833            1,
1834            0,
1835            snzreqcr0::Snzreqen5,
1836            snzreqcr0::Snzreqen5,
1837            Snzreqcr0_SPEC,
1838            crate::common::RW,
1839        >::from_register(self, 0)
1840    }
1841
1842    #[doc = "Enable IRQ6 pin snooze request"]
1843    #[inline(always)]
1844    pub fn snzreqen6(
1845        self,
1846    ) -> crate::common::RegisterField<
1847        6,
1848        0x1,
1849        1,
1850        0,
1851        snzreqcr0::Snzreqen6,
1852        snzreqcr0::Snzreqen6,
1853        Snzreqcr0_SPEC,
1854        crate::common::RW,
1855    > {
1856        crate::common::RegisterField::<
1857            6,
1858            0x1,
1859            1,
1860            0,
1861            snzreqcr0::Snzreqen6,
1862            snzreqcr0::Snzreqen6,
1863            Snzreqcr0_SPEC,
1864            crate::common::RW,
1865        >::from_register(self, 0)
1866    }
1867
1868    #[doc = "Enable IRQ7 pin snooze request"]
1869    #[inline(always)]
1870    pub fn snzreqen7(
1871        self,
1872    ) -> crate::common::RegisterField<
1873        7,
1874        0x1,
1875        1,
1876        0,
1877        snzreqcr0::Snzreqen7,
1878        snzreqcr0::Snzreqen7,
1879        Snzreqcr0_SPEC,
1880        crate::common::RW,
1881    > {
1882        crate::common::RegisterField::<
1883            7,
1884            0x1,
1885            1,
1886            0,
1887            snzreqcr0::Snzreqen7,
1888            snzreqcr0::Snzreqen7,
1889            Snzreqcr0_SPEC,
1890            crate::common::RW,
1891        >::from_register(self, 0)
1892    }
1893
1894    #[doc = "Enable KEY_INTKR snooze request"]
1895    #[inline(always)]
1896    pub fn snzreqen17(
1897        self,
1898    ) -> crate::common::RegisterField<
1899        17,
1900        0x1,
1901        1,
1902        0,
1903        snzreqcr0::Snzreqen17,
1904        snzreqcr0::Snzreqen17,
1905        Snzreqcr0_SPEC,
1906        crate::common::RW,
1907    > {
1908        crate::common::RegisterField::<
1909            17,
1910            0x1,
1911            1,
1912            0,
1913            snzreqcr0::Snzreqen17,
1914            snzreqcr0::Snzreqen17,
1915            Snzreqcr0_SPEC,
1916            crate::common::RW,
1917        >::from_register(self, 0)
1918    }
1919
1920    #[doc = "Enable AGT1 underflow snooze request"]
1921    #[inline(always)]
1922    pub fn snzreqen28(
1923        self,
1924    ) -> crate::common::RegisterField<
1925        28,
1926        0x1,
1927        1,
1928        0,
1929        snzreqcr0::Snzreqen28,
1930        snzreqcr0::Snzreqen28,
1931        Snzreqcr0_SPEC,
1932        crate::common::RW,
1933    > {
1934        crate::common::RegisterField::<
1935            28,
1936            0x1,
1937            1,
1938            0,
1939            snzreqcr0::Snzreqen28,
1940            snzreqcr0::Snzreqen28,
1941            Snzreqcr0_SPEC,
1942            crate::common::RW,
1943        >::from_register(self, 0)
1944    }
1945
1946    #[doc = "Enable AGT1 compare match A snooze request"]
1947    #[inline(always)]
1948    pub fn snzreqen29(
1949        self,
1950    ) -> crate::common::RegisterField<
1951        29,
1952        0x1,
1953        1,
1954        0,
1955        snzreqcr0::Snzreqen29,
1956        snzreqcr0::Snzreqen29,
1957        Snzreqcr0_SPEC,
1958        crate::common::RW,
1959    > {
1960        crate::common::RegisterField::<
1961            29,
1962            0x1,
1963            1,
1964            0,
1965            snzreqcr0::Snzreqen29,
1966            snzreqcr0::Snzreqen29,
1967            Snzreqcr0_SPEC,
1968            crate::common::RW,
1969        >::from_register(self, 0)
1970    }
1971
1972    #[doc = "Enable AGT1 compare match B snooze request"]
1973    #[inline(always)]
1974    pub fn snzreqen30(
1975        self,
1976    ) -> crate::common::RegisterField<
1977        30,
1978        0x1,
1979        1,
1980        0,
1981        snzreqcr0::Snzreqen30,
1982        snzreqcr0::Snzreqen30,
1983        Snzreqcr0_SPEC,
1984        crate::common::RW,
1985    > {
1986        crate::common::RegisterField::<
1987            30,
1988            0x1,
1989            1,
1990            0,
1991            snzreqcr0::Snzreqen30,
1992            snzreqcr0::Snzreqen30,
1993            Snzreqcr0_SPEC,
1994            crate::common::RW,
1995        >::from_register(self, 0)
1996    }
1997}
1998impl ::core::default::Default for Snzreqcr0 {
1999    #[inline(always)]
2000    fn default() -> Snzreqcr0 {
2001        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
2002    }
2003}
2004pub mod snzreqcr0 {
2005
2006    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2007    pub struct Snzreqen0_SPEC;
2008    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2009    impl Snzreqen0 {
2010        #[doc = "Disable the snooze request"]
2011        pub const _0: Self = Self::new(0);
2012
2013        #[doc = "Enable the snooze request"]
2014        pub const _1: Self = Self::new(1);
2015    }
2016    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2017    pub struct Snzreqen1_SPEC;
2018    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2019    impl Snzreqen1 {
2020        #[doc = "Disable the snooze request"]
2021        pub const _0: Self = Self::new(0);
2022
2023        #[doc = "Enable the snooze request"]
2024        pub const _1: Self = Self::new(1);
2025    }
2026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2027    pub struct Snzreqen2_SPEC;
2028    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2029    impl Snzreqen2 {
2030        #[doc = "Disable the snooze request"]
2031        pub const _0: Self = Self::new(0);
2032
2033        #[doc = "Enable the snooze request"]
2034        pub const _1: Self = Self::new(1);
2035    }
2036    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2037    pub struct Snzreqen3_SPEC;
2038    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
2039    impl Snzreqen3 {
2040        #[doc = "Disable the snooze request"]
2041        pub const _0: Self = Self::new(0);
2042
2043        #[doc = "Enable the snooze request"]
2044        pub const _1: Self = Self::new(1);
2045    }
2046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2047    pub struct Snzreqen4_SPEC;
2048    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
2049    impl Snzreqen4 {
2050        #[doc = "Disable the snooze request"]
2051        pub const _0: Self = Self::new(0);
2052
2053        #[doc = "Enable the snooze request"]
2054        pub const _1: Self = Self::new(1);
2055    }
2056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2057    pub struct Snzreqen5_SPEC;
2058    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
2059    impl Snzreqen5 {
2060        #[doc = "Disable the snooze request"]
2061        pub const _0: Self = Self::new(0);
2062
2063        #[doc = "Enable the snooze request"]
2064        pub const _1: Self = Self::new(1);
2065    }
2066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2067    pub struct Snzreqen6_SPEC;
2068    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
2069    impl Snzreqen6 {
2070        #[doc = "Disable the snooze request"]
2071        pub const _0: Self = Self::new(0);
2072
2073        #[doc = "Enable the snooze request"]
2074        pub const _1: Self = Self::new(1);
2075    }
2076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2077    pub struct Snzreqen7_SPEC;
2078    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
2079    impl Snzreqen7 {
2080        #[doc = "Disable the snooze request"]
2081        pub const _0: Self = Self::new(0);
2082
2083        #[doc = "Enable the snooze request"]
2084        pub const _1: Self = Self::new(1);
2085    }
2086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2087    pub struct Snzreqen17_SPEC;
2088    pub type Snzreqen17 = crate::EnumBitfieldStruct<u8, Snzreqen17_SPEC>;
2089    impl Snzreqen17 {
2090        #[doc = "Disable the snooze request"]
2091        pub const _0: Self = Self::new(0);
2092
2093        #[doc = "Enable the snooze request"]
2094        pub const _1: Self = Self::new(1);
2095    }
2096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2097    pub struct Snzreqen28_SPEC;
2098    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
2099    impl Snzreqen28 {
2100        #[doc = "Disable the snooze request"]
2101        pub const _0: Self = Self::new(0);
2102
2103        #[doc = "Enable the snooze request"]
2104        pub const _1: Self = Self::new(1);
2105    }
2106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2107    pub struct Snzreqen29_SPEC;
2108    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
2109    impl Snzreqen29 {
2110        #[doc = "Disable the snooze request"]
2111        pub const _0: Self = Self::new(0);
2112
2113        #[doc = "Enable the snooze request"]
2114        pub const _1: Self = Self::new(1);
2115    }
2116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2117    pub struct Snzreqen30_SPEC;
2118    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
2119    impl Snzreqen30 {
2120        #[doc = "Disable the snooze request"]
2121        pub const _0: Self = Self::new(0);
2122
2123        #[doc = "Enable the snooze request"]
2124        pub const _1: Self = Self::new(1);
2125    }
2126}
2127#[doc(hidden)]
2128#[derive(Copy, Clone, Eq, PartialEq)]
2129pub struct Psmcr_SPEC;
2130impl crate::sealed::RegSpec for Psmcr_SPEC {
2131    type DataType = u8;
2132}
2133
2134#[doc = "Power Save Memory Control Register"]
2135pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
2136
2137impl Psmcr {
2138    #[doc = "Power Save Memory Control"]
2139    #[inline(always)]
2140    pub fn psmc(
2141        self,
2142    ) -> crate::common::RegisterField<
2143        0,
2144        0x3,
2145        1,
2146        0,
2147        psmcr::Psmc,
2148        psmcr::Psmc,
2149        Psmcr_SPEC,
2150        crate::common::RW,
2151    > {
2152        crate::common::RegisterField::<
2153            0,
2154            0x3,
2155            1,
2156            0,
2157            psmcr::Psmc,
2158            psmcr::Psmc,
2159            Psmcr_SPEC,
2160            crate::common::RW,
2161        >::from_register(self, 0)
2162    }
2163}
2164impl ::core::default::Default for Psmcr {
2165    #[inline(always)]
2166    fn default() -> Psmcr {
2167        <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
2168    }
2169}
2170pub mod psmcr {
2171
2172    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2173    pub struct Psmc_SPEC;
2174    pub type Psmc = crate::EnumBitfieldStruct<u8, Psmc_SPEC>;
2175    impl Psmc {
2176        #[doc = "All SRAMs are on in Software Standby mode"]
2177        pub const _00: Self = Self::new(0);
2178
2179        #[doc = "4 KB SRAM (0x2000_4000 to 0x2000_4FFF) is on in Software Standby mode"]
2180        pub const _01: Self = Self::new(1);
2181
2182        #[doc = "Setting prohibited"]
2183        pub const _10: Self = Self::new(2);
2184
2185        #[doc = "Setting prohibited"]
2186        pub const _11: Self = Self::new(3);
2187    }
2188}
2189#[doc(hidden)]
2190#[derive(Copy, Clone, Eq, PartialEq)]
2191pub struct Opccr_SPEC;
2192impl crate::sealed::RegSpec for Opccr_SPEC {
2193    type DataType = u8;
2194}
2195
2196#[doc = "Operating Power Control Register"]
2197pub type Opccr = crate::RegValueT<Opccr_SPEC>;
2198
2199impl Opccr {
2200    #[doc = "Operating Power Control Mode Select"]
2201    #[inline(always)]
2202    pub fn opcm(
2203        self,
2204    ) -> crate::common::RegisterField<
2205        0,
2206        0x3,
2207        1,
2208        0,
2209        opccr::Opcm,
2210        opccr::Opcm,
2211        Opccr_SPEC,
2212        crate::common::RW,
2213    > {
2214        crate::common::RegisterField::<
2215            0,
2216            0x3,
2217            1,
2218            0,
2219            opccr::Opcm,
2220            opccr::Opcm,
2221            Opccr_SPEC,
2222            crate::common::RW,
2223        >::from_register(self, 0)
2224    }
2225
2226    #[doc = "Operating Power Control Mode Transition Status Flag"]
2227    #[inline(always)]
2228    pub fn opcmtsf(
2229        self,
2230    ) -> crate::common::RegisterField<
2231        4,
2232        0x1,
2233        1,
2234        0,
2235        opccr::Opcmtsf,
2236        opccr::Opcmtsf,
2237        Opccr_SPEC,
2238        crate::common::R,
2239    > {
2240        crate::common::RegisterField::<
2241            4,
2242            0x1,
2243            1,
2244            0,
2245            opccr::Opcmtsf,
2246            opccr::Opcmtsf,
2247            Opccr_SPEC,
2248            crate::common::R,
2249        >::from_register(self, 0)
2250    }
2251}
2252impl ::core::default::Default for Opccr {
2253    #[inline(always)]
2254    fn default() -> Opccr {
2255        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(1)
2256    }
2257}
2258pub mod opccr {
2259
2260    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2261    pub struct Opcm_SPEC;
2262    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
2263    impl Opcm {
2264        #[doc = "High-speed mode"]
2265        pub const _00: Self = Self::new(0);
2266
2267        #[doc = "Middle-speed mode"]
2268        pub const _01: Self = Self::new(1);
2269
2270        #[doc = "Setting prohibited"]
2271        pub const _10: Self = Self::new(2);
2272
2273        #[doc = "Low-speed mode"]
2274        pub const _11: Self = Self::new(3);
2275    }
2276    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2277    pub struct Opcmtsf_SPEC;
2278    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
2279    impl Opcmtsf {
2280        #[doc = "Transition completed"]
2281        pub const _0: Self = Self::new(0);
2282
2283        #[doc = "During transition"]
2284        pub const _1: Self = Self::new(1);
2285    }
2286}
2287#[doc(hidden)]
2288#[derive(Copy, Clone, Eq, PartialEq)]
2289pub struct Hocowtcr_SPEC;
2290impl crate::sealed::RegSpec for Hocowtcr_SPEC {
2291    type DataType = u8;
2292}
2293
2294#[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
2295pub type Hocowtcr = crate::RegValueT<Hocowtcr_SPEC>;
2296
2297impl Hocowtcr {
2298    #[doc = "HOCO Wait Time Setting"]
2299    #[inline(always)]
2300    pub fn hsts(
2301        self,
2302    ) -> crate::common::RegisterField<
2303        0,
2304        0x7,
2305        1,
2306        0,
2307        hocowtcr::Hsts,
2308        hocowtcr::Hsts,
2309        Hocowtcr_SPEC,
2310        crate::common::RW,
2311    > {
2312        crate::common::RegisterField::<
2313            0,
2314            0x7,
2315            1,
2316            0,
2317            hocowtcr::Hsts,
2318            hocowtcr::Hsts,
2319            Hocowtcr_SPEC,
2320            crate::common::RW,
2321        >::from_register(self, 0)
2322    }
2323}
2324impl ::core::default::Default for Hocowtcr {
2325    #[inline(always)]
2326    fn default() -> Hocowtcr {
2327        <crate::RegValueT<Hocowtcr_SPEC> as RegisterValue<_>>::new(5)
2328    }
2329}
2330pub mod hocowtcr {
2331
2332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2333    pub struct Hsts_SPEC;
2334    pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
2335    impl Hsts {
2336        #[doc = "Value after reset."]
2337        pub const _101: Self = Self::new(5);
2338
2339        #[doc = "Before starting high-speed on-chip oscillator by setting HOCOCR.HCSTP bit, the HSTS\\[2:0\\] bits must be set to 011b beforehand. Wait time = 46 cycles (5.75 µs) Wait time is calculated at MOCO = 8 MHz (typically 0.125 µs)."]
2340        pub const _011: Self = Self::new(3);
2341    }
2342}
2343#[doc(hidden)]
2344#[derive(Copy, Clone, Eq, PartialEq)]
2345pub struct Sopccr_SPEC;
2346impl crate::sealed::RegSpec for Sopccr_SPEC {
2347    type DataType = u8;
2348}
2349
2350#[doc = "Sub Operating Power Control Register"]
2351pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
2352
2353impl Sopccr {
2354    #[doc = "Sub Operating Power Control Mode Select"]
2355    #[inline(always)]
2356    pub fn sopcm(
2357        self,
2358    ) -> crate::common::RegisterField<
2359        0,
2360        0x1,
2361        1,
2362        0,
2363        sopccr::Sopcm,
2364        sopccr::Sopcm,
2365        Sopccr_SPEC,
2366        crate::common::RW,
2367    > {
2368        crate::common::RegisterField::<
2369            0,
2370            0x1,
2371            1,
2372            0,
2373            sopccr::Sopcm,
2374            sopccr::Sopcm,
2375            Sopccr_SPEC,
2376            crate::common::RW,
2377        >::from_register(self, 0)
2378    }
2379
2380    #[doc = "Operating Power Control Mode Transition Status Flag"]
2381    #[inline(always)]
2382    pub fn sopcmtsf(
2383        self,
2384    ) -> crate::common::RegisterField<
2385        4,
2386        0x1,
2387        1,
2388        0,
2389        sopccr::Sopcmtsf,
2390        sopccr::Sopcmtsf,
2391        Sopccr_SPEC,
2392        crate::common::R,
2393    > {
2394        crate::common::RegisterField::<
2395            4,
2396            0x1,
2397            1,
2398            0,
2399            sopccr::Sopcmtsf,
2400            sopccr::Sopcmtsf,
2401            Sopccr_SPEC,
2402            crate::common::R,
2403        >::from_register(self, 0)
2404    }
2405}
2406impl ::core::default::Default for Sopccr {
2407    #[inline(always)]
2408    fn default() -> Sopccr {
2409        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
2410    }
2411}
2412pub mod sopccr {
2413
2414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2415    pub struct Sopcm_SPEC;
2416    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
2417    impl Sopcm {
2418        #[doc = "Other than Subosc-speed mode"]
2419        pub const _0: Self = Self::new(0);
2420
2421        #[doc = "Subosc-speed mode"]
2422        pub const _1: Self = Self::new(1);
2423    }
2424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2425    pub struct Sopcmtsf_SPEC;
2426    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
2427    impl Sopcmtsf {
2428        #[doc = "Transition completed"]
2429        pub const _0: Self = Self::new(0);
2430
2431        #[doc = "During transition"]
2432        pub const _1: Self = Self::new(1);
2433    }
2434}
2435#[doc(hidden)]
2436#[derive(Copy, Clone, Eq, PartialEq)]
2437pub struct Rstsr1_SPEC;
2438impl crate::sealed::RegSpec for Rstsr1_SPEC {
2439    type DataType = u16;
2440}
2441
2442#[doc = "Reset Status Register 1"]
2443pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
2444
2445impl Rstsr1 {
2446    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
2447    #[inline(always)]
2448    pub fn iwdtrf(
2449        self,
2450    ) -> crate::common::RegisterField<
2451        0,
2452        0x1,
2453        1,
2454        0,
2455        rstsr1::Iwdtrf,
2456        rstsr1::Iwdtrf,
2457        Rstsr1_SPEC,
2458        crate::common::RW,
2459    > {
2460        crate::common::RegisterField::<
2461            0,
2462            0x1,
2463            1,
2464            0,
2465            rstsr1::Iwdtrf,
2466            rstsr1::Iwdtrf,
2467            Rstsr1_SPEC,
2468            crate::common::RW,
2469        >::from_register(self, 0)
2470    }
2471
2472    #[doc = "Watchdog Timer Reset Detect Flag"]
2473    #[inline(always)]
2474    pub fn wdtrf(
2475        self,
2476    ) -> crate::common::RegisterField<
2477        1,
2478        0x1,
2479        1,
2480        0,
2481        rstsr1::Wdtrf,
2482        rstsr1::Wdtrf,
2483        Rstsr1_SPEC,
2484        crate::common::RW,
2485    > {
2486        crate::common::RegisterField::<
2487            1,
2488            0x1,
2489            1,
2490            0,
2491            rstsr1::Wdtrf,
2492            rstsr1::Wdtrf,
2493            Rstsr1_SPEC,
2494            crate::common::RW,
2495        >::from_register(self, 0)
2496    }
2497
2498    #[doc = "Software Reset Detect Flag"]
2499    #[inline(always)]
2500    pub fn swrf(
2501        self,
2502    ) -> crate::common::RegisterField<
2503        2,
2504        0x1,
2505        1,
2506        0,
2507        rstsr1::Swrf,
2508        rstsr1::Swrf,
2509        Rstsr1_SPEC,
2510        crate::common::RW,
2511    > {
2512        crate::common::RegisterField::<
2513            2,
2514            0x1,
2515            1,
2516            0,
2517            rstsr1::Swrf,
2518            rstsr1::Swrf,
2519            Rstsr1_SPEC,
2520            crate::common::RW,
2521        >::from_register(self, 0)
2522    }
2523
2524    #[doc = "SRAM Parity Error Reset Detect Flag"]
2525    #[inline(always)]
2526    pub fn rperf(
2527        self,
2528    ) -> crate::common::RegisterField<
2529        8,
2530        0x1,
2531        1,
2532        0,
2533        rstsr1::Rperf,
2534        rstsr1::Rperf,
2535        Rstsr1_SPEC,
2536        crate::common::RW,
2537    > {
2538        crate::common::RegisterField::<
2539            8,
2540            0x1,
2541            1,
2542            0,
2543            rstsr1::Rperf,
2544            rstsr1::Rperf,
2545            Rstsr1_SPEC,
2546            crate::common::RW,
2547        >::from_register(self, 0)
2548    }
2549
2550    #[doc = "Bus Slave MPU Error Reset Detect Flag"]
2551    #[inline(always)]
2552    pub fn bussrf(
2553        self,
2554    ) -> crate::common::RegisterField<
2555        10,
2556        0x1,
2557        1,
2558        0,
2559        rstsr1::Bussrf,
2560        rstsr1::Bussrf,
2561        Rstsr1_SPEC,
2562        crate::common::RW,
2563    > {
2564        crate::common::RegisterField::<
2565            10,
2566            0x1,
2567            1,
2568            0,
2569            rstsr1::Bussrf,
2570            rstsr1::Bussrf,
2571            Rstsr1_SPEC,
2572            crate::common::RW,
2573        >::from_register(self, 0)
2574    }
2575
2576    #[doc = "Bus Master MPU Error Reset Detect Flag"]
2577    #[inline(always)]
2578    pub fn busmrf(
2579        self,
2580    ) -> crate::common::RegisterField<
2581        11,
2582        0x1,
2583        1,
2584        0,
2585        rstsr1::Busmrf,
2586        rstsr1::Busmrf,
2587        Rstsr1_SPEC,
2588        crate::common::RW,
2589    > {
2590        crate::common::RegisterField::<
2591            11,
2592            0x1,
2593            1,
2594            0,
2595            rstsr1::Busmrf,
2596            rstsr1::Busmrf,
2597            Rstsr1_SPEC,
2598            crate::common::RW,
2599        >::from_register(self, 0)
2600    }
2601
2602    #[doc = "CPU Stack Pointer Error Reset Detect Flag"]
2603    #[inline(always)]
2604    pub fn sperf(
2605        self,
2606    ) -> crate::common::RegisterField<
2607        12,
2608        0x1,
2609        1,
2610        0,
2611        rstsr1::Sperf,
2612        rstsr1::Sperf,
2613        Rstsr1_SPEC,
2614        crate::common::RW,
2615    > {
2616        crate::common::RegisterField::<
2617            12,
2618            0x1,
2619            1,
2620            0,
2621            rstsr1::Sperf,
2622            rstsr1::Sperf,
2623            Rstsr1_SPEC,
2624            crate::common::RW,
2625        >::from_register(self, 0)
2626    }
2627}
2628impl ::core::default::Default for Rstsr1 {
2629    #[inline(always)]
2630    fn default() -> Rstsr1 {
2631        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
2632    }
2633}
2634pub mod rstsr1 {
2635
2636    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2637    pub struct Iwdtrf_SPEC;
2638    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
2639    impl Iwdtrf {
2640        #[doc = "Independent watchdog timer reset not detected"]
2641        pub const _0: Self = Self::new(0);
2642
2643        #[doc = "Independent watchdog timer reset detected"]
2644        pub const _1: Self = Self::new(1);
2645    }
2646    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2647    pub struct Wdtrf_SPEC;
2648    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
2649    impl Wdtrf {
2650        #[doc = "Watchdog timer reset not detected"]
2651        pub const _0: Self = Self::new(0);
2652
2653        #[doc = "Watchdog timer reset detected"]
2654        pub const _1: Self = Self::new(1);
2655    }
2656    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2657    pub struct Swrf_SPEC;
2658    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
2659    impl Swrf {
2660        #[doc = "Software reset not detected"]
2661        pub const _0: Self = Self::new(0);
2662
2663        #[doc = "Software reset detected"]
2664        pub const _1: Self = Self::new(1);
2665    }
2666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2667    pub struct Rperf_SPEC;
2668    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
2669    impl Rperf {
2670        #[doc = "SRAM parity error reset not detected"]
2671        pub const _0: Self = Self::new(0);
2672
2673        #[doc = "SRAM parity error reset detected"]
2674        pub const _1: Self = Self::new(1);
2675    }
2676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2677    pub struct Bussrf_SPEC;
2678    pub type Bussrf = crate::EnumBitfieldStruct<u8, Bussrf_SPEC>;
2679    impl Bussrf {
2680        #[doc = "Bus slave MPU error reset not detected"]
2681        pub const _0: Self = Self::new(0);
2682
2683        #[doc = "Bus slave MPU error reset detected"]
2684        pub const _1: Self = Self::new(1);
2685    }
2686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2687    pub struct Busmrf_SPEC;
2688    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
2689    impl Busmrf {
2690        #[doc = "Bus master MPU error reset not detected"]
2691        pub const _0: Self = Self::new(0);
2692
2693        #[doc = "Bus master MPU error reset detected"]
2694        pub const _1: Self = Self::new(1);
2695    }
2696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2697    pub struct Sperf_SPEC;
2698    pub type Sperf = crate::EnumBitfieldStruct<u8, Sperf_SPEC>;
2699    impl Sperf {
2700        #[doc = "CPU stack pointer error reset not detected"]
2701        pub const _0: Self = Self::new(0);
2702
2703        #[doc = "CPU stack pointer error reset detected"]
2704        pub const _1: Self = Self::new(1);
2705    }
2706}
2707#[doc(hidden)]
2708#[derive(Copy, Clone, Eq, PartialEq)]
2709pub struct Lvd1Cr1_SPEC;
2710impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
2711    type DataType = u8;
2712}
2713
2714#[doc = "Voltage Monitor 1 Circuit Control Register"]
2715pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
2716
2717impl Lvd1Cr1 {
2718    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
2719    #[inline(always)]
2720    pub fn idtsel(
2721        self,
2722    ) -> crate::common::RegisterField<
2723        0,
2724        0x3,
2725        1,
2726        0,
2727        lvd1cr1::Idtsel,
2728        lvd1cr1::Idtsel,
2729        Lvd1Cr1_SPEC,
2730        crate::common::RW,
2731    > {
2732        crate::common::RegisterField::<
2733            0,
2734            0x3,
2735            1,
2736            0,
2737            lvd1cr1::Idtsel,
2738            lvd1cr1::Idtsel,
2739            Lvd1Cr1_SPEC,
2740            crate::common::RW,
2741        >::from_register(self, 0)
2742    }
2743
2744    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
2745    #[inline(always)]
2746    pub fn irqsel(
2747        self,
2748    ) -> crate::common::RegisterField<
2749        2,
2750        0x1,
2751        1,
2752        0,
2753        lvd1cr1::Irqsel,
2754        lvd1cr1::Irqsel,
2755        Lvd1Cr1_SPEC,
2756        crate::common::RW,
2757    > {
2758        crate::common::RegisterField::<
2759            2,
2760            0x1,
2761            1,
2762            0,
2763            lvd1cr1::Irqsel,
2764            lvd1cr1::Irqsel,
2765            Lvd1Cr1_SPEC,
2766            crate::common::RW,
2767        >::from_register(self, 0)
2768    }
2769}
2770impl ::core::default::Default for Lvd1Cr1 {
2771    #[inline(always)]
2772    fn default() -> Lvd1Cr1 {
2773        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
2774    }
2775}
2776pub mod lvd1cr1 {
2777
2778    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2779    pub struct Idtsel_SPEC;
2780    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
2781    impl Idtsel {
2782        #[doc = "When VCC >= Vdet1 (rise) is detected"]
2783        pub const _00: Self = Self::new(0);
2784
2785        #[doc = "When VCC < Vdet1 (fall) is detected"]
2786        pub const _01: Self = Self::new(1);
2787
2788        #[doc = "When fall and rise are detected"]
2789        pub const _10: Self = Self::new(2);
2790
2791        #[doc = "Settings prohibited"]
2792        pub const _11: Self = Self::new(3);
2793    }
2794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2795    pub struct Irqsel_SPEC;
2796    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
2797    impl Irqsel {
2798        #[doc = "Non-maskable interrupt"]
2799        pub const _0: Self = Self::new(0);
2800
2801        #[doc = "Maskable interrupt"]
2802        pub const _1: Self = Self::new(1);
2803    }
2804}
2805#[doc(hidden)]
2806#[derive(Copy, Clone, Eq, PartialEq)]
2807pub struct Lvd1Sr_SPEC;
2808impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
2809    type DataType = u8;
2810}
2811
2812#[doc = "Voltage Monitor 1 Circuit Status Register"]
2813pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
2814
2815impl Lvd1Sr {
2816    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
2817    #[inline(always)]
2818    pub fn det(
2819        self,
2820    ) -> crate::common::RegisterField<
2821        0,
2822        0x1,
2823        1,
2824        0,
2825        lvd1sr::Det,
2826        lvd1sr::Det,
2827        Lvd1Sr_SPEC,
2828        crate::common::RW,
2829    > {
2830        crate::common::RegisterField::<
2831            0,
2832            0x1,
2833            1,
2834            0,
2835            lvd1sr::Det,
2836            lvd1sr::Det,
2837            Lvd1Sr_SPEC,
2838            crate::common::RW,
2839        >::from_register(self, 0)
2840    }
2841
2842    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
2843    #[inline(always)]
2844    pub fn mon(
2845        self,
2846    ) -> crate::common::RegisterField<
2847        1,
2848        0x1,
2849        1,
2850        0,
2851        lvd1sr::Mon,
2852        lvd1sr::Mon,
2853        Lvd1Sr_SPEC,
2854        crate::common::R,
2855    > {
2856        crate::common::RegisterField::<
2857            1,
2858            0x1,
2859            1,
2860            0,
2861            lvd1sr::Mon,
2862            lvd1sr::Mon,
2863            Lvd1Sr_SPEC,
2864            crate::common::R,
2865        >::from_register(self, 0)
2866    }
2867}
2868impl ::core::default::Default for Lvd1Sr {
2869    #[inline(always)]
2870    fn default() -> Lvd1Sr {
2871        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
2872    }
2873}
2874pub mod lvd1sr {
2875
2876    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2877    pub struct Det_SPEC;
2878    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
2879    impl Det {
2880        #[doc = "Not detected"]
2881        pub const _0: Self = Self::new(0);
2882
2883        #[doc = "Vdet1 crossing is detected"]
2884        pub const _1: Self = Self::new(1);
2885    }
2886    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2887    pub struct Mon_SPEC;
2888    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
2889    impl Mon {
2890        #[doc = "VCC < Vdet1"]
2891        pub const _0: Self = Self::new(0);
2892
2893        #[doc = "VCC >= Vdet1 or MON is disabled"]
2894        pub const _1: Self = Self::new(1);
2895    }
2896}
2897#[doc(hidden)]
2898#[derive(Copy, Clone, Eq, PartialEq)]
2899pub struct Lvd2Cr1_SPEC;
2900impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
2901    type DataType = u8;
2902}
2903
2904#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
2905pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
2906
2907impl Lvd2Cr1 {
2908    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
2909    #[inline(always)]
2910    pub fn idtsel(
2911        self,
2912    ) -> crate::common::RegisterField<
2913        0,
2914        0x3,
2915        1,
2916        0,
2917        lvd2cr1::Idtsel,
2918        lvd2cr1::Idtsel,
2919        Lvd2Cr1_SPEC,
2920        crate::common::RW,
2921    > {
2922        crate::common::RegisterField::<
2923            0,
2924            0x3,
2925            1,
2926            0,
2927            lvd2cr1::Idtsel,
2928            lvd2cr1::Idtsel,
2929            Lvd2Cr1_SPEC,
2930            crate::common::RW,
2931        >::from_register(self, 0)
2932    }
2933
2934    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
2935    #[inline(always)]
2936    pub fn irqsel(
2937        self,
2938    ) -> crate::common::RegisterField<
2939        2,
2940        0x1,
2941        1,
2942        0,
2943        lvd2cr1::Irqsel,
2944        lvd2cr1::Irqsel,
2945        Lvd2Cr1_SPEC,
2946        crate::common::RW,
2947    > {
2948        crate::common::RegisterField::<
2949            2,
2950            0x1,
2951            1,
2952            0,
2953            lvd2cr1::Irqsel,
2954            lvd2cr1::Irqsel,
2955            Lvd2Cr1_SPEC,
2956            crate::common::RW,
2957        >::from_register(self, 0)
2958    }
2959}
2960impl ::core::default::Default for Lvd2Cr1 {
2961    #[inline(always)]
2962    fn default() -> Lvd2Cr1 {
2963        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
2964    }
2965}
2966pub mod lvd2cr1 {
2967
2968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2969    pub struct Idtsel_SPEC;
2970    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
2971    impl Idtsel {
2972        #[doc = "When VCC>= Vdet2 (rise) is detected"]
2973        pub const _00: Self = Self::new(0);
2974
2975        #[doc = "When VCC < Vdet2 (fall) is detected"]
2976        pub const _01: Self = Self::new(1);
2977
2978        #[doc = "When fall and rise are detected"]
2979        pub const _10: Self = Self::new(2);
2980
2981        #[doc = "Settings prohibited"]
2982        pub const _11: Self = Self::new(3);
2983    }
2984    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2985    pub struct Irqsel_SPEC;
2986    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
2987    impl Irqsel {
2988        #[doc = "Non-maskable interrupt"]
2989        pub const _0: Self = Self::new(0);
2990
2991        #[doc = "Maskable interrupt"]
2992        pub const _1: Self = Self::new(1);
2993    }
2994}
2995#[doc(hidden)]
2996#[derive(Copy, Clone, Eq, PartialEq)]
2997pub struct Lvd2Sr_SPEC;
2998impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
2999    type DataType = u8;
3000}
3001
3002#[doc = "Voltage Monitor 2 Circuit Status Register"]
3003pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
3004
3005impl Lvd2Sr {
3006    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
3007    #[inline(always)]
3008    pub fn det(
3009        self,
3010    ) -> crate::common::RegisterField<
3011        0,
3012        0x1,
3013        1,
3014        0,
3015        lvd2sr::Det,
3016        lvd2sr::Det,
3017        Lvd2Sr_SPEC,
3018        crate::common::RW,
3019    > {
3020        crate::common::RegisterField::<
3021            0,
3022            0x1,
3023            1,
3024            0,
3025            lvd2sr::Det,
3026            lvd2sr::Det,
3027            Lvd2Sr_SPEC,
3028            crate::common::RW,
3029        >::from_register(self, 0)
3030    }
3031
3032    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
3033    #[inline(always)]
3034    pub fn mon(
3035        self,
3036    ) -> crate::common::RegisterField<
3037        1,
3038        0x1,
3039        1,
3040        0,
3041        lvd2sr::Mon,
3042        lvd2sr::Mon,
3043        Lvd2Sr_SPEC,
3044        crate::common::R,
3045    > {
3046        crate::common::RegisterField::<
3047            1,
3048            0x1,
3049            1,
3050            0,
3051            lvd2sr::Mon,
3052            lvd2sr::Mon,
3053            Lvd2Sr_SPEC,
3054            crate::common::R,
3055        >::from_register(self, 0)
3056    }
3057}
3058impl ::core::default::Default for Lvd2Sr {
3059    #[inline(always)]
3060    fn default() -> Lvd2Sr {
3061        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
3062    }
3063}
3064pub mod lvd2sr {
3065
3066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3067    pub struct Det_SPEC;
3068    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3069    impl Det {
3070        #[doc = "Not detected"]
3071        pub const _0: Self = Self::new(0);
3072
3073        #[doc = "Vdet2 crossing is detected"]
3074        pub const _1: Self = Self::new(1);
3075    }
3076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3077    pub struct Mon_SPEC;
3078    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3079    impl Mon {
3080        #[doc = "VCC < Vdet2"]
3081        pub const _0: Self = Self::new(0);
3082
3083        #[doc = "VCC>= Vdet2 or MON is disabled"]
3084        pub const _1: Self = Self::new(1);
3085    }
3086}
3087#[doc(hidden)]
3088#[derive(Copy, Clone, Eq, PartialEq)]
3089pub struct Prcr_SPEC;
3090impl crate::sealed::RegSpec for Prcr_SPEC {
3091    type DataType = u16;
3092}
3093
3094#[doc = "Protect Register"]
3095pub type Prcr = crate::RegValueT<Prcr_SPEC>;
3096
3097impl Prcr {
3098    #[doc = "Enable writing to the registers related to the clock generation circuit"]
3099    #[inline(always)]
3100    pub fn prc0(
3101        self,
3102    ) -> crate::common::RegisterField<
3103        0,
3104        0x1,
3105        1,
3106        0,
3107        prcr::Prc0,
3108        prcr::Prc0,
3109        Prcr_SPEC,
3110        crate::common::RW,
3111    > {
3112        crate::common::RegisterField::<
3113            0,
3114            0x1,
3115            1,
3116            0,
3117            prcr::Prc0,
3118            prcr::Prc0,
3119            Prcr_SPEC,
3120            crate::common::RW,
3121        >::from_register(self, 0)
3122    }
3123
3124    #[doc = "Enable writing to the registers related to the low power modes"]
3125    #[inline(always)]
3126    pub fn prc1(
3127        self,
3128    ) -> crate::common::RegisterField<
3129        1,
3130        0x1,
3131        1,
3132        0,
3133        prcr::Prc1,
3134        prcr::Prc1,
3135        Prcr_SPEC,
3136        crate::common::RW,
3137    > {
3138        crate::common::RegisterField::<
3139            1,
3140            0x1,
3141            1,
3142            0,
3143            prcr::Prc1,
3144            prcr::Prc1,
3145            Prcr_SPEC,
3146            crate::common::RW,
3147        >::from_register(self, 0)
3148    }
3149
3150    #[doc = "Enable writing to the registers related to the LVD"]
3151    #[inline(always)]
3152    pub fn prc3(
3153        self,
3154    ) -> crate::common::RegisterField<
3155        3,
3156        0x1,
3157        1,
3158        0,
3159        prcr::Prc3,
3160        prcr::Prc3,
3161        Prcr_SPEC,
3162        crate::common::RW,
3163    > {
3164        crate::common::RegisterField::<
3165            3,
3166            0x1,
3167            1,
3168            0,
3169            prcr::Prc3,
3170            prcr::Prc3,
3171            Prcr_SPEC,
3172            crate::common::RW,
3173        >::from_register(self, 0)
3174    }
3175
3176    #[doc = "PRC Key Code"]
3177    #[inline(always)]
3178    pub fn prkey(
3179        self,
3180    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
3181        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
3182    }
3183}
3184impl ::core::default::Default for Prcr {
3185    #[inline(always)]
3186    fn default() -> Prcr {
3187        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
3188    }
3189}
3190pub mod prcr {
3191
3192    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3193    pub struct Prc0_SPEC;
3194    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
3195    impl Prc0 {
3196        #[doc = "Disable writes"]
3197        pub const _0: Self = Self::new(0);
3198
3199        #[doc = "Enable writes"]
3200        pub const _1: Self = Self::new(1);
3201    }
3202    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3203    pub struct Prc1_SPEC;
3204    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
3205    impl Prc1 {
3206        #[doc = "Disable writes"]
3207        pub const _0: Self = Self::new(0);
3208
3209        #[doc = "Enable writes"]
3210        pub const _1: Self = Self::new(1);
3211    }
3212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3213    pub struct Prc3_SPEC;
3214    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
3215    impl Prc3 {
3216        #[doc = "Disable writes"]
3217        pub const _0: Self = Self::new(0);
3218
3219        #[doc = "Enable writes"]
3220        pub const _1: Self = Self::new(1);
3221    }
3222}
3223#[doc(hidden)]
3224#[derive(Copy, Clone, Eq, PartialEq)]
3225pub struct Syocdcr_SPEC;
3226impl crate::sealed::RegSpec for Syocdcr_SPEC {
3227    type DataType = u8;
3228}
3229
3230#[doc = "System Control OCD Control Register"]
3231pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
3232
3233impl Syocdcr {
3234    #[doc = "Debugger Enable bit"]
3235    #[inline(always)]
3236    pub fn dbgen(
3237        self,
3238    ) -> crate::common::RegisterField<
3239        7,
3240        0x1,
3241        1,
3242        0,
3243        syocdcr::Dbgen,
3244        syocdcr::Dbgen,
3245        Syocdcr_SPEC,
3246        crate::common::RW,
3247    > {
3248        crate::common::RegisterField::<
3249            7,
3250            0x1,
3251            1,
3252            0,
3253            syocdcr::Dbgen,
3254            syocdcr::Dbgen,
3255            Syocdcr_SPEC,
3256            crate::common::RW,
3257        >::from_register(self, 0)
3258    }
3259}
3260impl ::core::default::Default for Syocdcr {
3261    #[inline(always)]
3262    fn default() -> Syocdcr {
3263        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
3264    }
3265}
3266pub mod syocdcr {
3267
3268    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3269    pub struct Dbgen_SPEC;
3270    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
3271    impl Dbgen {
3272        #[doc = "On-chip debugger is disabled"]
3273        pub const _0: Self = Self::new(0);
3274
3275        #[doc = "On-chip debugger is enabled"]
3276        pub const _1: Self = Self::new(1);
3277    }
3278}
3279#[doc(hidden)]
3280#[derive(Copy, Clone, Eq, PartialEq)]
3281pub struct Rstsr0_SPEC;
3282impl crate::sealed::RegSpec for Rstsr0_SPEC {
3283    type DataType = u8;
3284}
3285
3286#[doc = "Reset Status Register 0"]
3287pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
3288
3289impl Rstsr0 {
3290    #[doc = "Power-On Reset Detect Flag"]
3291    #[inline(always)]
3292    pub fn porf(
3293        self,
3294    ) -> crate::common::RegisterField<
3295        0,
3296        0x1,
3297        1,
3298        0,
3299        rstsr0::Porf,
3300        rstsr0::Porf,
3301        Rstsr0_SPEC,
3302        crate::common::RW,
3303    > {
3304        crate::common::RegisterField::<
3305            0,
3306            0x1,
3307            1,
3308            0,
3309            rstsr0::Porf,
3310            rstsr0::Porf,
3311            Rstsr0_SPEC,
3312            crate::common::RW,
3313        >::from_register(self, 0)
3314    }
3315
3316    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
3317    #[inline(always)]
3318    pub fn lvd0rf(
3319        self,
3320    ) -> crate::common::RegisterField<
3321        1,
3322        0x1,
3323        1,
3324        0,
3325        rstsr0::Lvd0Rf,
3326        rstsr0::Lvd0Rf,
3327        Rstsr0_SPEC,
3328        crate::common::RW,
3329    > {
3330        crate::common::RegisterField::<
3331            1,
3332            0x1,
3333            1,
3334            0,
3335            rstsr0::Lvd0Rf,
3336            rstsr0::Lvd0Rf,
3337            Rstsr0_SPEC,
3338            crate::common::RW,
3339        >::from_register(self, 0)
3340    }
3341
3342    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
3343    #[inline(always)]
3344    pub fn lvd1rf(
3345        self,
3346    ) -> crate::common::RegisterField<
3347        2,
3348        0x1,
3349        1,
3350        0,
3351        rstsr0::Lvd1Rf,
3352        rstsr0::Lvd1Rf,
3353        Rstsr0_SPEC,
3354        crate::common::RW,
3355    > {
3356        crate::common::RegisterField::<
3357            2,
3358            0x1,
3359            1,
3360            0,
3361            rstsr0::Lvd1Rf,
3362            rstsr0::Lvd1Rf,
3363            Rstsr0_SPEC,
3364            crate::common::RW,
3365        >::from_register(self, 0)
3366    }
3367
3368    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
3369    #[inline(always)]
3370    pub fn lvd2rf(
3371        self,
3372    ) -> crate::common::RegisterField<
3373        3,
3374        0x1,
3375        1,
3376        0,
3377        rstsr0::Lvd2Rf,
3378        rstsr0::Lvd2Rf,
3379        Rstsr0_SPEC,
3380        crate::common::RW,
3381    > {
3382        crate::common::RegisterField::<
3383            3,
3384            0x1,
3385            1,
3386            0,
3387            rstsr0::Lvd2Rf,
3388            rstsr0::Lvd2Rf,
3389            Rstsr0_SPEC,
3390            crate::common::RW,
3391        >::from_register(self, 0)
3392    }
3393}
3394impl ::core::default::Default for Rstsr0 {
3395    #[inline(always)]
3396    fn default() -> Rstsr0 {
3397        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
3398    }
3399}
3400pub mod rstsr0 {
3401
3402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3403    pub struct Porf_SPEC;
3404    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
3405    impl Porf {
3406        #[doc = "Power-on reset not detected"]
3407        pub const _0: Self = Self::new(0);
3408
3409        #[doc = "Power-on reset detected"]
3410        pub const _1: Self = Self::new(1);
3411    }
3412    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3413    pub struct Lvd0Rf_SPEC;
3414    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
3415    impl Lvd0Rf {
3416        #[doc = "Voltage monitor 0 reset not detected"]
3417        pub const _0: Self = Self::new(0);
3418
3419        #[doc = "Voltage monitor 0 reset detected"]
3420        pub const _1: Self = Self::new(1);
3421    }
3422    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3423    pub struct Lvd1Rf_SPEC;
3424    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
3425    impl Lvd1Rf {
3426        #[doc = "Voltage monitor 1 reset not detected"]
3427        pub const _0: Self = Self::new(0);
3428
3429        #[doc = "Voltage monitor 1 reset detected"]
3430        pub const _1: Self = Self::new(1);
3431    }
3432    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3433    pub struct Lvd2Rf_SPEC;
3434    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
3435    impl Lvd2Rf {
3436        #[doc = "Voltage monitor 2 reset not detected"]
3437        pub const _0: Self = Self::new(0);
3438
3439        #[doc = "Voltage monitor 2 reset detected"]
3440        pub const _1: Self = Self::new(1);
3441    }
3442}
3443#[doc(hidden)]
3444#[derive(Copy, Clone, Eq, PartialEq)]
3445pub struct Rstsr2_SPEC;
3446impl crate::sealed::RegSpec for Rstsr2_SPEC {
3447    type DataType = u8;
3448}
3449
3450#[doc = "Reset Status Register 2"]
3451pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
3452
3453impl Rstsr2 {
3454    #[doc = "Cold/Warm Start Determination Flag"]
3455    #[inline(always)]
3456    pub fn cwsf(
3457        self,
3458    ) -> crate::common::RegisterField<
3459        0,
3460        0x1,
3461        1,
3462        0,
3463        rstsr2::Cwsf,
3464        rstsr2::Cwsf,
3465        Rstsr2_SPEC,
3466        crate::common::RW,
3467    > {
3468        crate::common::RegisterField::<
3469            0,
3470            0x1,
3471            1,
3472            0,
3473            rstsr2::Cwsf,
3474            rstsr2::Cwsf,
3475            Rstsr2_SPEC,
3476            crate::common::RW,
3477        >::from_register(self, 0)
3478    }
3479}
3480impl ::core::default::Default for Rstsr2 {
3481    #[inline(always)]
3482    fn default() -> Rstsr2 {
3483        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
3484    }
3485}
3486pub mod rstsr2 {
3487
3488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3489    pub struct Cwsf_SPEC;
3490    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
3491    impl Cwsf {
3492        #[doc = "Cold start"]
3493        pub const _0: Self = Self::new(0);
3494
3495        #[doc = "Warm start"]
3496        pub const _1: Self = Self::new(1);
3497    }
3498}
3499#[doc(hidden)]
3500#[derive(Copy, Clone, Eq, PartialEq)]
3501pub struct Lvcmpcr_SPEC;
3502impl crate::sealed::RegSpec for Lvcmpcr_SPEC {
3503    type DataType = u8;
3504}
3505
3506#[doc = "Voltage Monitor Circuit Control Register"]
3507pub type Lvcmpcr = crate::RegValueT<Lvcmpcr_SPEC>;
3508
3509impl Lvcmpcr {
3510    #[doc = "Voltage Detection 1 Enable"]
3511    #[inline(always)]
3512    pub fn lvd1e(
3513        self,
3514    ) -> crate::common::RegisterField<
3515        5,
3516        0x1,
3517        1,
3518        0,
3519        lvcmpcr::Lvd1E,
3520        lvcmpcr::Lvd1E,
3521        Lvcmpcr_SPEC,
3522        crate::common::RW,
3523    > {
3524        crate::common::RegisterField::<
3525            5,
3526            0x1,
3527            1,
3528            0,
3529            lvcmpcr::Lvd1E,
3530            lvcmpcr::Lvd1E,
3531            Lvcmpcr_SPEC,
3532            crate::common::RW,
3533        >::from_register(self, 0)
3534    }
3535
3536    #[doc = "Voltage Detection 2 Enable"]
3537    #[inline(always)]
3538    pub fn lvd2e(
3539        self,
3540    ) -> crate::common::RegisterField<
3541        6,
3542        0x1,
3543        1,
3544        0,
3545        lvcmpcr::Lvd2E,
3546        lvcmpcr::Lvd2E,
3547        Lvcmpcr_SPEC,
3548        crate::common::RW,
3549    > {
3550        crate::common::RegisterField::<
3551            6,
3552            0x1,
3553            1,
3554            0,
3555            lvcmpcr::Lvd2E,
3556            lvcmpcr::Lvd2E,
3557            Lvcmpcr_SPEC,
3558            crate::common::RW,
3559        >::from_register(self, 0)
3560    }
3561}
3562impl ::core::default::Default for Lvcmpcr {
3563    #[inline(always)]
3564    fn default() -> Lvcmpcr {
3565        <crate::RegValueT<Lvcmpcr_SPEC> as RegisterValue<_>>::new(0)
3566    }
3567}
3568pub mod lvcmpcr {
3569
3570    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3571    pub struct Lvd1E_SPEC;
3572    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
3573    impl Lvd1E {
3574        #[doc = "Voltage detection 1 circuit disabled"]
3575        pub const _0: Self = Self::new(0);
3576
3577        #[doc = "Voltage detection 1 circuit enabled"]
3578        pub const _1: Self = Self::new(1);
3579    }
3580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3581    pub struct Lvd2E_SPEC;
3582    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
3583    impl Lvd2E {
3584        #[doc = "Voltage detection 2 circuit disabled"]
3585        pub const _0: Self = Self::new(0);
3586
3587        #[doc = "Voltage detection 2 circuit enabled"]
3588        pub const _1: Self = Self::new(1);
3589    }
3590}
3591#[doc(hidden)]
3592#[derive(Copy, Clone, Eq, PartialEq)]
3593pub struct Lvdlvlr_SPEC;
3594impl crate::sealed::RegSpec for Lvdlvlr_SPEC {
3595    type DataType = u8;
3596}
3597
3598#[doc = "Voltage Detection Level Select Register"]
3599pub type Lvdlvlr = crate::RegValueT<Lvdlvlr_SPEC>;
3600
3601impl Lvdlvlr {
3602    #[doc = "Voltage Detection 1 Level Select (Standard voltage during fall in voltage)"]
3603    #[inline(always)]
3604    pub fn lvd1lvl(
3605        self,
3606    ) -> crate::common::RegisterField<
3607        0,
3608        0x1f,
3609        1,
3610        0,
3611        lvdlvlr::Lvd1Lvl,
3612        lvdlvlr::Lvd1Lvl,
3613        Lvdlvlr_SPEC,
3614        crate::common::RW,
3615    > {
3616        crate::common::RegisterField::<
3617            0,
3618            0x1f,
3619            1,
3620            0,
3621            lvdlvlr::Lvd1Lvl,
3622            lvdlvlr::Lvd1Lvl,
3623            Lvdlvlr_SPEC,
3624            crate::common::RW,
3625        >::from_register(self, 0)
3626    }
3627
3628    #[doc = "Voltage Detection 2 Level Select (Standard voltage during fall in voltage)"]
3629    #[inline(always)]
3630    pub fn lvd2lvl(
3631        self,
3632    ) -> crate::common::RegisterField<
3633        5,
3634        0x7,
3635        1,
3636        0,
3637        lvdlvlr::Lvd2Lvl,
3638        lvdlvlr::Lvd2Lvl,
3639        Lvdlvlr_SPEC,
3640        crate::common::RW,
3641    > {
3642        crate::common::RegisterField::<
3643            5,
3644            0x7,
3645            1,
3646            0,
3647            lvdlvlr::Lvd2Lvl,
3648            lvdlvlr::Lvd2Lvl,
3649            Lvdlvlr_SPEC,
3650            crate::common::RW,
3651        >::from_register(self, 0)
3652    }
3653}
3654impl ::core::default::Default for Lvdlvlr {
3655    #[inline(always)]
3656    fn default() -> Lvdlvlr {
3657        <crate::RegValueT<Lvdlvlr_SPEC> as RegisterValue<_>>::new(7)
3658    }
3659}
3660pub mod lvdlvlr {
3661
3662    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3663    pub struct Lvd1Lvl_SPEC;
3664    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
3665    impl Lvd1Lvl {
3666        #[doc = "Vdet1_0"]
3667        pub const _0_X_00: Self = Self::new(0);
3668
3669        #[doc = "Vdet1_1"]
3670        pub const _0_X_01: Self = Self::new(1);
3671
3672        #[doc = "Vdet1_2"]
3673        pub const _0_X_02: Self = Self::new(2);
3674
3675        #[doc = "Vdet1_3"]
3676        pub const _0_X_03: Self = Self::new(3);
3677
3678        #[doc = "Vdet1_4"]
3679        pub const _0_X_04: Self = Self::new(4);
3680
3681        #[doc = "Vdet1_5"]
3682        pub const _0_X_05: Self = Self::new(5);
3683
3684        #[doc = "Vdet1_6"]
3685        pub const _0_X_06: Self = Self::new(6);
3686
3687        #[doc = "Vdet1_7"]
3688        pub const _0_X_07: Self = Self::new(7);
3689
3690        #[doc = "Vdet1_8"]
3691        pub const _0_X_08: Self = Self::new(8);
3692
3693        #[doc = "Vdet1_9"]
3694        pub const _0_X_09: Self = Self::new(9);
3695
3696        #[doc = "Vdet1_A"]
3697        pub const _0_X_0_A: Self = Self::new(10);
3698
3699        #[doc = "Vdet1_B"]
3700        pub const _0_X_0_B: Self = Self::new(11);
3701
3702        #[doc = "Vdet1_C"]
3703        pub const _0_X_0_C: Self = Self::new(12);
3704
3705        #[doc = "Vdet1_D"]
3706        pub const _0_X_0_D: Self = Self::new(13);
3707
3708        #[doc = "Vdet1_E"]
3709        pub const _0_X_0_E: Self = Self::new(14);
3710
3711        #[doc = "Vdet1_F"]
3712        pub const _0_X_0_F: Self = Self::new(15);
3713    }
3714    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3715    pub struct Lvd2Lvl_SPEC;
3716    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
3717    impl Lvd2Lvl {
3718        #[doc = "Vdet2_0"]
3719        pub const _000: Self = Self::new(0);
3720
3721        #[doc = "Vdet2_1"]
3722        pub const _001: Self = Self::new(1);
3723
3724        #[doc = "Vdet2_2"]
3725        pub const _010: Self = Self::new(2);
3726
3727        #[doc = "Vdet2_3"]
3728        pub const _011: Self = Self::new(3);
3729    }
3730}
3731#[doc(hidden)]
3732#[derive(Copy, Clone, Eq, PartialEq)]
3733pub struct Lvd1Cr0_SPEC;
3734impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
3735    type DataType = u8;
3736}
3737
3738#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
3739pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
3740
3741impl Lvd1Cr0 {
3742    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
3743    #[inline(always)]
3744    pub fn rie(
3745        self,
3746    ) -> crate::common::RegisterField<
3747        0,
3748        0x1,
3749        1,
3750        0,
3751        lvd1cr0::Rie,
3752        lvd1cr0::Rie,
3753        Lvd1Cr0_SPEC,
3754        crate::common::RW,
3755    > {
3756        crate::common::RegisterField::<
3757            0,
3758            0x1,
3759            1,
3760            0,
3761            lvd1cr0::Rie,
3762            lvd1cr0::Rie,
3763            Lvd1Cr0_SPEC,
3764            crate::common::RW,
3765        >::from_register(self, 0)
3766    }
3767
3768    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
3769    #[inline(always)]
3770    pub fn cmpe(
3771        self,
3772    ) -> crate::common::RegisterField<
3773        2,
3774        0x1,
3775        1,
3776        0,
3777        lvd1cr0::Cmpe,
3778        lvd1cr0::Cmpe,
3779        Lvd1Cr0_SPEC,
3780        crate::common::RW,
3781    > {
3782        crate::common::RegisterField::<
3783            2,
3784            0x1,
3785            1,
3786            0,
3787            lvd1cr0::Cmpe,
3788            lvd1cr0::Cmpe,
3789            Lvd1Cr0_SPEC,
3790            crate::common::RW,
3791        >::from_register(self, 0)
3792    }
3793
3794    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
3795    #[inline(always)]
3796    pub fn ri(
3797        self,
3798    ) -> crate::common::RegisterField<
3799        6,
3800        0x1,
3801        1,
3802        0,
3803        lvd1cr0::Ri,
3804        lvd1cr0::Ri,
3805        Lvd1Cr0_SPEC,
3806        crate::common::RW,
3807    > {
3808        crate::common::RegisterField::<
3809            6,
3810            0x1,
3811            1,
3812            0,
3813            lvd1cr0::Ri,
3814            lvd1cr0::Ri,
3815            Lvd1Cr0_SPEC,
3816            crate::common::RW,
3817        >::from_register(self, 0)
3818    }
3819
3820    #[doc = "Voltage Monitor 1 Reset Negate Select"]
3821    #[inline(always)]
3822    pub fn rn(
3823        self,
3824    ) -> crate::common::RegisterField<
3825        7,
3826        0x1,
3827        1,
3828        0,
3829        lvd1cr0::Rn,
3830        lvd1cr0::Rn,
3831        Lvd1Cr0_SPEC,
3832        crate::common::RW,
3833    > {
3834        crate::common::RegisterField::<
3835            7,
3836            0x1,
3837            1,
3838            0,
3839            lvd1cr0::Rn,
3840            lvd1cr0::Rn,
3841            Lvd1Cr0_SPEC,
3842            crate::common::RW,
3843        >::from_register(self, 0)
3844    }
3845}
3846impl ::core::default::Default for Lvd1Cr0 {
3847    #[inline(always)]
3848    fn default() -> Lvd1Cr0 {
3849        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(128)
3850    }
3851}
3852pub mod lvd1cr0 {
3853
3854    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3855    pub struct Rie_SPEC;
3856    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
3857    impl Rie {
3858        #[doc = "Disable"]
3859        pub const _0: Self = Self::new(0);
3860
3861        #[doc = "Enable"]
3862        pub const _1: Self = Self::new(1);
3863    }
3864    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3865    pub struct Cmpe_SPEC;
3866    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
3867    impl Cmpe {
3868        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
3869        pub const _0: Self = Self::new(0);
3870
3871        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
3872        pub const _1: Self = Self::new(1);
3873    }
3874    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3875    pub struct Ri_SPEC;
3876    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
3877    impl Ri {
3878        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
3879        pub const _0: Self = Self::new(0);
3880
3881        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
3882        pub const _1: Self = Self::new(1);
3883    }
3884    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3885    pub struct Rn_SPEC;
3886    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
3887    impl Rn {
3888        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
3889        pub const _0: Self = Self::new(0);
3890
3891        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
3892        pub const _1: Self = Self::new(1);
3893    }
3894}
3895#[doc(hidden)]
3896#[derive(Copy, Clone, Eq, PartialEq)]
3897pub struct Lvd2Cr0_SPEC;
3898impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
3899    type DataType = u8;
3900}
3901
3902#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
3903pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
3904
3905impl Lvd2Cr0 {
3906    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
3907    #[inline(always)]
3908    pub fn rie(
3909        self,
3910    ) -> crate::common::RegisterField<
3911        0,
3912        0x1,
3913        1,
3914        0,
3915        lvd2cr0::Rie,
3916        lvd2cr0::Rie,
3917        Lvd2Cr0_SPEC,
3918        crate::common::RW,
3919    > {
3920        crate::common::RegisterField::<
3921            0,
3922            0x1,
3923            1,
3924            0,
3925            lvd2cr0::Rie,
3926            lvd2cr0::Rie,
3927            Lvd2Cr0_SPEC,
3928            crate::common::RW,
3929        >::from_register(self, 0)
3930    }
3931
3932    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
3933    #[inline(always)]
3934    pub fn cmpe(
3935        self,
3936    ) -> crate::common::RegisterField<
3937        2,
3938        0x1,
3939        1,
3940        0,
3941        lvd2cr0::Cmpe,
3942        lvd2cr0::Cmpe,
3943        Lvd2Cr0_SPEC,
3944        crate::common::RW,
3945    > {
3946        crate::common::RegisterField::<
3947            2,
3948            0x1,
3949            1,
3950            0,
3951            lvd2cr0::Cmpe,
3952            lvd2cr0::Cmpe,
3953            Lvd2Cr0_SPEC,
3954            crate::common::RW,
3955        >::from_register(self, 0)
3956    }
3957
3958    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
3959    #[inline(always)]
3960    pub fn ri(
3961        self,
3962    ) -> crate::common::RegisterField<
3963        6,
3964        0x1,
3965        1,
3966        0,
3967        lvd2cr0::Ri,
3968        lvd2cr0::Ri,
3969        Lvd2Cr0_SPEC,
3970        crate::common::RW,
3971    > {
3972        crate::common::RegisterField::<
3973            6,
3974            0x1,
3975            1,
3976            0,
3977            lvd2cr0::Ri,
3978            lvd2cr0::Ri,
3979            Lvd2Cr0_SPEC,
3980            crate::common::RW,
3981        >::from_register(self, 0)
3982    }
3983
3984    #[doc = "Voltage Monitor 2 Reset Negate Select"]
3985    #[inline(always)]
3986    pub fn rn(
3987        self,
3988    ) -> crate::common::RegisterField<
3989        7,
3990        0x1,
3991        1,
3992        0,
3993        lvd2cr0::Rn,
3994        lvd2cr0::Rn,
3995        Lvd2Cr0_SPEC,
3996        crate::common::RW,
3997    > {
3998        crate::common::RegisterField::<
3999            7,
4000            0x1,
4001            1,
4002            0,
4003            lvd2cr0::Rn,
4004            lvd2cr0::Rn,
4005            Lvd2Cr0_SPEC,
4006            crate::common::RW,
4007        >::from_register(self, 0)
4008    }
4009}
4010impl ::core::default::Default for Lvd2Cr0 {
4011    #[inline(always)]
4012    fn default() -> Lvd2Cr0 {
4013        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(128)
4014    }
4015}
4016pub mod lvd2cr0 {
4017
4018    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4019    pub struct Rie_SPEC;
4020    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
4021    impl Rie {
4022        #[doc = "Disable"]
4023        pub const _0: Self = Self::new(0);
4024
4025        #[doc = "Enable"]
4026        pub const _1: Self = Self::new(1);
4027    }
4028    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4029    pub struct Cmpe_SPEC;
4030    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
4031    impl Cmpe {
4032        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
4033        pub const _0: Self = Self::new(0);
4034
4035        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
4036        pub const _1: Self = Self::new(1);
4037    }
4038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4039    pub struct Ri_SPEC;
4040    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
4041    impl Ri {
4042        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
4043        pub const _0: Self = Self::new(0);
4044
4045        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
4046        pub const _1: Self = Self::new(1);
4047    }
4048    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4049    pub struct Rn_SPEC;
4050    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
4051    impl Rn {
4052        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
4053        pub const _0: Self = Self::new(0);
4054
4055        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
4056        pub const _1: Self = Self::new(1);
4057    }
4058}
4059#[doc(hidden)]
4060#[derive(Copy, Clone, Eq, PartialEq)]
4061pub struct Lococr_SPEC;
4062impl crate::sealed::RegSpec for Lococr_SPEC {
4063    type DataType = u8;
4064}
4065
4066#[doc = "Low-Speed On-Chip Oscillator Control Register"]
4067pub type Lococr = crate::RegValueT<Lococr_SPEC>;
4068
4069impl Lococr {
4070    #[doc = "LOCO Stop"]
4071    #[inline(always)]
4072    pub fn lcstp(
4073        self,
4074    ) -> crate::common::RegisterField<
4075        0,
4076        0x1,
4077        1,
4078        0,
4079        lococr::Lcstp,
4080        lococr::Lcstp,
4081        Lococr_SPEC,
4082        crate::common::RW,
4083    > {
4084        crate::common::RegisterField::<
4085            0,
4086            0x1,
4087            1,
4088            0,
4089            lococr::Lcstp,
4090            lococr::Lcstp,
4091            Lococr_SPEC,
4092            crate::common::RW,
4093        >::from_register(self, 0)
4094    }
4095}
4096impl ::core::default::Default for Lococr {
4097    #[inline(always)]
4098    fn default() -> Lococr {
4099        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
4100    }
4101}
4102pub mod lococr {
4103
4104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4105    pub struct Lcstp_SPEC;
4106    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
4107    impl Lcstp {
4108        #[doc = "Operate the LOCO clock"]
4109        pub const _0: Self = Self::new(0);
4110
4111        #[doc = "Stop the LOCO clock"]
4112        pub const _1: Self = Self::new(1);
4113    }
4114}
4115#[doc(hidden)]
4116#[derive(Copy, Clone, Eq, PartialEq)]
4117pub struct Locoutcr_SPEC;
4118impl crate::sealed::RegSpec for Locoutcr_SPEC {
4119    type DataType = u8;
4120}
4121
4122#[doc = "LOCO User Trimming Control Register"]
4123pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
4124
4125impl Locoutcr {
4126    #[doc = "LOCO User Trimming"]
4127    #[inline(always)]
4128    pub fn locoutrm(
4129        self,
4130    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
4131        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
4132    }
4133}
4134impl ::core::default::Default for Locoutcr {
4135    #[inline(always)]
4136    fn default() -> Locoutcr {
4137        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
4138    }
4139}