ra2e1/icu/
nmiclr.rs

1#[doc = "Register `NMICLR` reader"]
2pub struct R(crate::R<NMICLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<NMICLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<NMICLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<NMICLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `NMICLR` writer"]
17pub struct W(crate::W<NMICLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<NMICLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<NMICLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<NMICLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `IWDTCLR` reader - IWDT Clear"]
38pub type IWDTCLR_R = crate::BitReader<IWDTCLR_A>;
39#[doc = "IWDT Clear\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum IWDTCLR_A {
42    #[doc = "0: No effect"]
43    _0 = 0,
44    #[doc = "1: Clear the NMISR.IWDTST flag"]
45    _1 = 1,
46}
47impl From<IWDTCLR_A> for bool {
48    #[inline(always)]
49    fn from(variant: IWDTCLR_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl IWDTCLR_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> IWDTCLR_A {
57        match self.bits {
58            false => IWDTCLR_A::_0,
59            true => IWDTCLR_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == IWDTCLR_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == IWDTCLR_A::_1
71    }
72}
73#[doc = "Field `IWDTCLR` writer - IWDT Clear"]
74pub type IWDTCLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, IWDTCLR_A, O>;
75impl<'a, const O: u8> IWDTCLR_W<'a, O> {
76    #[doc = "No effect"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(IWDTCLR_A::_0)
80    }
81    #[doc = "Clear the NMISR.IWDTST flag"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(IWDTCLR_A::_1)
85    }
86}
87#[doc = "Field `WDTCLR` reader - WDT Clear"]
88pub type WDTCLR_R = crate::BitReader<WDTCLR_A>;
89#[doc = "WDT Clear\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum WDTCLR_A {
92    #[doc = "0: No effect"]
93    _0 = 0,
94    #[doc = "1: Clear the NMISR.WDTST flag"]
95    _1 = 1,
96}
97impl From<WDTCLR_A> for bool {
98    #[inline(always)]
99    fn from(variant: WDTCLR_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl WDTCLR_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> WDTCLR_A {
107        match self.bits {
108            false => WDTCLR_A::_0,
109            true => WDTCLR_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == WDTCLR_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == WDTCLR_A::_1
121    }
122}
123#[doc = "Field `WDTCLR` writer - WDT Clear"]
124pub type WDTCLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, WDTCLR_A, O>;
125impl<'a, const O: u8> WDTCLR_W<'a, O> {
126    #[doc = "No effect"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(WDTCLR_A::_0)
130    }
131    #[doc = "Clear the NMISR.WDTST flag"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(WDTCLR_A::_1)
135    }
136}
137#[doc = "Field `LVD1CLR` reader - LVD1 Clear"]
138pub type LVD1CLR_R = crate::BitReader<LVD1CLR_A>;
139#[doc = "LVD1 Clear\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum LVD1CLR_A {
142    #[doc = "0: No effect"]
143    _0 = 0,
144    #[doc = "1: Clear the NMISR.LVD1ST flag"]
145    _1 = 1,
146}
147impl From<LVD1CLR_A> for bool {
148    #[inline(always)]
149    fn from(variant: LVD1CLR_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl LVD1CLR_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> LVD1CLR_A {
157        match self.bits {
158            false => LVD1CLR_A::_0,
159            true => LVD1CLR_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == LVD1CLR_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == LVD1CLR_A::_1
171    }
172}
173#[doc = "Field `LVD1CLR` writer - LVD1 Clear"]
174pub type LVD1CLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, LVD1CLR_A, O>;
175impl<'a, const O: u8> LVD1CLR_W<'a, O> {
176    #[doc = "No effect"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(LVD1CLR_A::_0)
180    }
181    #[doc = "Clear the NMISR.LVD1ST flag"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(LVD1CLR_A::_1)
185    }
186}
187#[doc = "Field `LVD2CLR` reader - LVD2 Clear"]
188pub type LVD2CLR_R = crate::BitReader<LVD2CLR_A>;
189#[doc = "LVD2 Clear\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum LVD2CLR_A {
192    #[doc = "0: No effect"]
193    _0 = 0,
194    #[doc = "1: Clear the NMISR.LVD2ST flag."]
195    _1 = 1,
196}
197impl From<LVD2CLR_A> for bool {
198    #[inline(always)]
199    fn from(variant: LVD2CLR_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl LVD2CLR_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> LVD2CLR_A {
207        match self.bits {
208            false => LVD2CLR_A::_0,
209            true => LVD2CLR_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == LVD2CLR_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == LVD2CLR_A::_1
221    }
222}
223#[doc = "Field `LVD2CLR` writer - LVD2 Clear"]
224pub type LVD2CLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, LVD2CLR_A, O>;
225impl<'a, const O: u8> LVD2CLR_W<'a, O> {
226    #[doc = "No effect"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(LVD2CLR_A::_0)
230    }
231    #[doc = "Clear the NMISR.LVD2ST flag."]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(LVD2CLR_A::_1)
235    }
236}
237#[doc = "Field `OSTCLR` reader - OST Clear"]
238pub type OSTCLR_R = crate::BitReader<OSTCLR_A>;
239#[doc = "OST Clear\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum OSTCLR_A {
242    #[doc = "0: No effect"]
243    _0 = 0,
244    #[doc = "1: Clear the NMISR.OSTST flag"]
245    _1 = 1,
246}
247impl From<OSTCLR_A> for bool {
248    #[inline(always)]
249    fn from(variant: OSTCLR_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl OSTCLR_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> OSTCLR_A {
257        match self.bits {
258            false => OSTCLR_A::_0,
259            true => OSTCLR_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == OSTCLR_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == OSTCLR_A::_1
271    }
272}
273#[doc = "Field `OSTCLR` writer - OST Clear"]
274pub type OSTCLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, OSTCLR_A, O>;
275impl<'a, const O: u8> OSTCLR_W<'a, O> {
276    #[doc = "No effect"]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(OSTCLR_A::_0)
280    }
281    #[doc = "Clear the NMISR.OSTST flag"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(OSTCLR_A::_1)
285    }
286}
287#[doc = "Field `NMICLR` reader - NMI Clear"]
288pub type NMICLR_R = crate::BitReader<NMICLR_A>;
289#[doc = "NMI Clear\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum NMICLR_A {
292    #[doc = "0: No effect"]
293    _0 = 0,
294    #[doc = "1: Clear the NMISR.NMIST flag"]
295    _1 = 1,
296}
297impl From<NMICLR_A> for bool {
298    #[inline(always)]
299    fn from(variant: NMICLR_A) -> Self {
300        variant as u8 != 0
301    }
302}
303impl NMICLR_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> NMICLR_A {
307        match self.bits {
308            false => NMICLR_A::_0,
309            true => NMICLR_A::_1,
310        }
311    }
312    #[doc = "Checks if the value of the field is `_0`"]
313    #[inline(always)]
314    pub fn is_0(&self) -> bool {
315        *self == NMICLR_A::_0
316    }
317    #[doc = "Checks if the value of the field is `_1`"]
318    #[inline(always)]
319    pub fn is_1(&self) -> bool {
320        *self == NMICLR_A::_1
321    }
322}
323#[doc = "Field `NMICLR` writer - NMI Clear"]
324pub type NMICLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, NMICLR_A, O>;
325impl<'a, const O: u8> NMICLR_W<'a, O> {
326    #[doc = "No effect"]
327    #[inline(always)]
328    pub fn _0(self) -> &'a mut W {
329        self.variant(NMICLR_A::_0)
330    }
331    #[doc = "Clear the NMISR.NMIST flag"]
332    #[inline(always)]
333    pub fn _1(self) -> &'a mut W {
334        self.variant(NMICLR_A::_1)
335    }
336}
337#[doc = "Field `RPECLR` reader - SRAM Parity Error Clear"]
338pub type RPECLR_R = crate::BitReader<RPECLR_A>;
339#[doc = "SRAM Parity Error Clear\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum RPECLR_A {
342    #[doc = "0: No effect"]
343    _0 = 0,
344    #[doc = "1: Clear the NMISR.RPEST flag"]
345    _1 = 1,
346}
347impl From<RPECLR_A> for bool {
348    #[inline(always)]
349    fn from(variant: RPECLR_A) -> Self {
350        variant as u8 != 0
351    }
352}
353impl RPECLR_R {
354    #[doc = "Get enumerated values variant"]
355    #[inline(always)]
356    pub fn variant(&self) -> RPECLR_A {
357        match self.bits {
358            false => RPECLR_A::_0,
359            true => RPECLR_A::_1,
360        }
361    }
362    #[doc = "Checks if the value of the field is `_0`"]
363    #[inline(always)]
364    pub fn is_0(&self) -> bool {
365        *self == RPECLR_A::_0
366    }
367    #[doc = "Checks if the value of the field is `_1`"]
368    #[inline(always)]
369    pub fn is_1(&self) -> bool {
370        *self == RPECLR_A::_1
371    }
372}
373#[doc = "Field `RPECLR` writer - SRAM Parity Error Clear"]
374pub type RPECLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, RPECLR_A, O>;
375impl<'a, const O: u8> RPECLR_W<'a, O> {
376    #[doc = "No effect"]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(RPECLR_A::_0)
380    }
381    #[doc = "Clear the NMISR.RPEST flag"]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(RPECLR_A::_1)
385    }
386}
387#[doc = "Field `BUSSCLR` reader - Bus Slave Error Clear"]
388pub type BUSSCLR_R = crate::BitReader<BUSSCLR_A>;
389#[doc = "Bus Slave Error Clear\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum BUSSCLR_A {
392    #[doc = "0: No effect"]
393    _0 = 0,
394    #[doc = "1: Clear the NMISR.BUSSST flag"]
395    _1 = 1,
396}
397impl From<BUSSCLR_A> for bool {
398    #[inline(always)]
399    fn from(variant: BUSSCLR_A) -> Self {
400        variant as u8 != 0
401    }
402}
403impl BUSSCLR_R {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub fn variant(&self) -> BUSSCLR_A {
407        match self.bits {
408            false => BUSSCLR_A::_0,
409            true => BUSSCLR_A::_1,
410        }
411    }
412    #[doc = "Checks if the value of the field is `_0`"]
413    #[inline(always)]
414    pub fn is_0(&self) -> bool {
415        *self == BUSSCLR_A::_0
416    }
417    #[doc = "Checks if the value of the field is `_1`"]
418    #[inline(always)]
419    pub fn is_1(&self) -> bool {
420        *self == BUSSCLR_A::_1
421    }
422}
423#[doc = "Field `BUSSCLR` writer - Bus Slave Error Clear"]
424pub type BUSSCLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, BUSSCLR_A, O>;
425impl<'a, const O: u8> BUSSCLR_W<'a, O> {
426    #[doc = "No effect"]
427    #[inline(always)]
428    pub fn _0(self) -> &'a mut W {
429        self.variant(BUSSCLR_A::_0)
430    }
431    #[doc = "Clear the NMISR.BUSSST flag"]
432    #[inline(always)]
433    pub fn _1(self) -> &'a mut W {
434        self.variant(BUSSCLR_A::_1)
435    }
436}
437#[doc = "Field `BUSMCLR` reader - Bus Master Error Clear"]
438pub type BUSMCLR_R = crate::BitReader<BUSMCLR_A>;
439#[doc = "Bus Master Error Clear\n\nValue on reset: 0"]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum BUSMCLR_A {
442    #[doc = "0: No effect"]
443    _0 = 0,
444    #[doc = "1: Clear the NMISR.BUSMST flag"]
445    _1 = 1,
446}
447impl From<BUSMCLR_A> for bool {
448    #[inline(always)]
449    fn from(variant: BUSMCLR_A) -> Self {
450        variant as u8 != 0
451    }
452}
453impl BUSMCLR_R {
454    #[doc = "Get enumerated values variant"]
455    #[inline(always)]
456    pub fn variant(&self) -> BUSMCLR_A {
457        match self.bits {
458            false => BUSMCLR_A::_0,
459            true => BUSMCLR_A::_1,
460        }
461    }
462    #[doc = "Checks if the value of the field is `_0`"]
463    #[inline(always)]
464    pub fn is_0(&self) -> bool {
465        *self == BUSMCLR_A::_0
466    }
467    #[doc = "Checks if the value of the field is `_1`"]
468    #[inline(always)]
469    pub fn is_1(&self) -> bool {
470        *self == BUSMCLR_A::_1
471    }
472}
473#[doc = "Field `BUSMCLR` writer - Bus Master Error Clear"]
474pub type BUSMCLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, BUSMCLR_A, O>;
475impl<'a, const O: u8> BUSMCLR_W<'a, O> {
476    #[doc = "No effect"]
477    #[inline(always)]
478    pub fn _0(self) -> &'a mut W {
479        self.variant(BUSMCLR_A::_0)
480    }
481    #[doc = "Clear the NMISR.BUSMST flag"]
482    #[inline(always)]
483    pub fn _1(self) -> &'a mut W {
484        self.variant(BUSMCLR_A::_1)
485    }
486}
487#[doc = "Field `SPECLR` reader - CPU Stack Pointer Monitor Interrupt Clear"]
488pub type SPECLR_R = crate::BitReader<SPECLR_A>;
489#[doc = "CPU Stack Pointer Monitor Interrupt Clear\n\nValue on reset: 0"]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491pub enum SPECLR_A {
492    #[doc = "0: No effect"]
493    _0 = 0,
494    #[doc = "1: Clear the NMISR.SPEST flag"]
495    _1 = 1,
496}
497impl From<SPECLR_A> for bool {
498    #[inline(always)]
499    fn from(variant: SPECLR_A) -> Self {
500        variant as u8 != 0
501    }
502}
503impl SPECLR_R {
504    #[doc = "Get enumerated values variant"]
505    #[inline(always)]
506    pub fn variant(&self) -> SPECLR_A {
507        match self.bits {
508            false => SPECLR_A::_0,
509            true => SPECLR_A::_1,
510        }
511    }
512    #[doc = "Checks if the value of the field is `_0`"]
513    #[inline(always)]
514    pub fn is_0(&self) -> bool {
515        *self == SPECLR_A::_0
516    }
517    #[doc = "Checks if the value of the field is `_1`"]
518    #[inline(always)]
519    pub fn is_1(&self) -> bool {
520        *self == SPECLR_A::_1
521    }
522}
523#[doc = "Field `SPECLR` writer - CPU Stack Pointer Monitor Interrupt Clear"]
524pub type SPECLR_W<'a, const O: u8> = crate::BitWriter<'a, u16, NMICLR_SPEC, SPECLR_A, O>;
525impl<'a, const O: u8> SPECLR_W<'a, O> {
526    #[doc = "No effect"]
527    #[inline(always)]
528    pub fn _0(self) -> &'a mut W {
529        self.variant(SPECLR_A::_0)
530    }
531    #[doc = "Clear the NMISR.SPEST flag"]
532    #[inline(always)]
533    pub fn _1(self) -> &'a mut W {
534        self.variant(SPECLR_A::_1)
535    }
536}
537impl R {
538    #[doc = "Bit 0 - IWDT Clear"]
539    #[inline(always)]
540    pub fn iwdtclr(&self) -> IWDTCLR_R {
541        IWDTCLR_R::new((self.bits & 1) != 0)
542    }
543    #[doc = "Bit 1 - WDT Clear"]
544    #[inline(always)]
545    pub fn wdtclr(&self) -> WDTCLR_R {
546        WDTCLR_R::new(((self.bits >> 1) & 1) != 0)
547    }
548    #[doc = "Bit 2 - LVD1 Clear"]
549    #[inline(always)]
550    pub fn lvd1clr(&self) -> LVD1CLR_R {
551        LVD1CLR_R::new(((self.bits >> 2) & 1) != 0)
552    }
553    #[doc = "Bit 3 - LVD2 Clear"]
554    #[inline(always)]
555    pub fn lvd2clr(&self) -> LVD2CLR_R {
556        LVD2CLR_R::new(((self.bits >> 3) & 1) != 0)
557    }
558    #[doc = "Bit 6 - OST Clear"]
559    #[inline(always)]
560    pub fn ostclr(&self) -> OSTCLR_R {
561        OSTCLR_R::new(((self.bits >> 6) & 1) != 0)
562    }
563    #[doc = "Bit 7 - NMI Clear"]
564    #[inline(always)]
565    pub fn nmiclr(&self) -> NMICLR_R {
566        NMICLR_R::new(((self.bits >> 7) & 1) != 0)
567    }
568    #[doc = "Bit 8 - SRAM Parity Error Clear"]
569    #[inline(always)]
570    pub fn rpeclr(&self) -> RPECLR_R {
571        RPECLR_R::new(((self.bits >> 8) & 1) != 0)
572    }
573    #[doc = "Bit 10 - Bus Slave Error Clear"]
574    #[inline(always)]
575    pub fn bussclr(&self) -> BUSSCLR_R {
576        BUSSCLR_R::new(((self.bits >> 10) & 1) != 0)
577    }
578    #[doc = "Bit 11 - Bus Master Error Clear"]
579    #[inline(always)]
580    pub fn busmclr(&self) -> BUSMCLR_R {
581        BUSMCLR_R::new(((self.bits >> 11) & 1) != 0)
582    }
583    #[doc = "Bit 12 - CPU Stack Pointer Monitor Interrupt Clear"]
584    #[inline(always)]
585    pub fn speclr(&self) -> SPECLR_R {
586        SPECLR_R::new(((self.bits >> 12) & 1) != 0)
587    }
588}
589impl W {
590    #[doc = "Bit 0 - IWDT Clear"]
591    #[inline(always)]
592    #[must_use]
593    pub fn iwdtclr(&mut self) -> IWDTCLR_W<0> {
594        IWDTCLR_W::new(self)
595    }
596    #[doc = "Bit 1 - WDT Clear"]
597    #[inline(always)]
598    #[must_use]
599    pub fn wdtclr(&mut self) -> WDTCLR_W<1> {
600        WDTCLR_W::new(self)
601    }
602    #[doc = "Bit 2 - LVD1 Clear"]
603    #[inline(always)]
604    #[must_use]
605    pub fn lvd1clr(&mut self) -> LVD1CLR_W<2> {
606        LVD1CLR_W::new(self)
607    }
608    #[doc = "Bit 3 - LVD2 Clear"]
609    #[inline(always)]
610    #[must_use]
611    pub fn lvd2clr(&mut self) -> LVD2CLR_W<3> {
612        LVD2CLR_W::new(self)
613    }
614    #[doc = "Bit 6 - OST Clear"]
615    #[inline(always)]
616    #[must_use]
617    pub fn ostclr(&mut self) -> OSTCLR_W<6> {
618        OSTCLR_W::new(self)
619    }
620    #[doc = "Bit 7 - NMI Clear"]
621    #[inline(always)]
622    #[must_use]
623    pub fn nmiclr(&mut self) -> NMICLR_W<7> {
624        NMICLR_W::new(self)
625    }
626    #[doc = "Bit 8 - SRAM Parity Error Clear"]
627    #[inline(always)]
628    #[must_use]
629    pub fn rpeclr(&mut self) -> RPECLR_W<8> {
630        RPECLR_W::new(self)
631    }
632    #[doc = "Bit 10 - Bus Slave Error Clear"]
633    #[inline(always)]
634    #[must_use]
635    pub fn bussclr(&mut self) -> BUSSCLR_W<10> {
636        BUSSCLR_W::new(self)
637    }
638    #[doc = "Bit 11 - Bus Master Error Clear"]
639    #[inline(always)]
640    #[must_use]
641    pub fn busmclr(&mut self) -> BUSMCLR_W<11> {
642        BUSMCLR_W::new(self)
643    }
644    #[doc = "Bit 12 - CPU Stack Pointer Monitor Interrupt Clear"]
645    #[inline(always)]
646    #[must_use]
647    pub fn speclr(&mut self) -> SPECLR_W<12> {
648        SPECLR_W::new(self)
649    }
650    #[doc = "Writes raw bits to the register."]
651    #[inline(always)]
652    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
653        self.0.bits(bits);
654        self
655    }
656}
657#[doc = "Non-Maskable Interrupt Status Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nmiclr](index.html) module"]
658pub struct NMICLR_SPEC;
659impl crate::RegisterSpec for NMICLR_SPEC {
660    type Ux = u16;
661}
662#[doc = "`read()` method returns [nmiclr::R](R) reader structure"]
663impl crate::Readable for NMICLR_SPEC {
664    type Reader = R;
665}
666#[doc = "`write(|w| ..)` method takes [nmiclr::W](W) writer structure"]
667impl crate::Writable for NMICLR_SPEC {
668    type Writer = W;
669    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
670    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
671}
672#[doc = "`reset()` method sets NMICLR to value 0"]
673impl crate::Resettable for NMICLR_SPEC {
674    const RESET_VALUE: Self::Ux = 0;
675}
ra2e1/icu/nmiclr.rs

ra2e1/icu/
nmiclr.rs
