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ra2a2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.02, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:01:00 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "Module Stop Control Register A"]
48    #[inline(always)]
49    pub const fn mstpcra(
50        &self,
51    ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(28usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Division Control Register"]
60    #[inline(always)]
61    pub const fn sckdivcr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(32usize),
67            )
68        }
69    }
70
71    #[doc = "System Clock Source Control Register"]
72    #[inline(always)]
73    pub const fn sckscr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(38usize),
79            )
80        }
81    }
82
83    #[doc = "PLL Clock Control Register"]
84    #[inline(always)]
85    pub const fn pllccr(
86        &self,
87    ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(40usize),
91            )
92        }
93    }
94
95    #[doc = "PLL Control Register"]
96    #[inline(always)]
97    pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(42usize),
101            )
102        }
103    }
104
105    #[doc = "Memory Wait Cycle Control Register for Code Flash"]
106    #[inline(always)]
107    pub const fn memwait(
108        &self,
109    ) -> &'static crate::common::Reg<self::Memwait_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Memwait_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(49usize),
113            )
114        }
115    }
116
117    #[doc = "Main Clock Oscillator Control Register"]
118    #[inline(always)]
119    pub const fn mosccr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(50usize),
125            )
126        }
127    }
128
129    #[doc = "High-Speed On-Chip Oscillator Control Register"]
130    #[inline(always)]
131    pub const fn hococr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(54usize),
137            )
138        }
139    }
140
141    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
142    #[inline(always)]
143    pub const fn mococr(
144        &self,
145    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(56usize),
149            )
150        }
151    }
152
153    #[doc = "Oscillation Stabilization Flag Register"]
154    #[inline(always)]
155    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
156        unsafe {
157            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
158                self._svd2pac_as_ptr().add(60usize),
159            )
160        }
161    }
162
163    #[doc = "Clock Out Control Register"]
164    #[inline(always)]
165    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
166        unsafe {
167            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
168                self._svd2pac_as_ptr().add(62usize),
169            )
170        }
171    }
172
173    #[doc = "Oscillation Stop Detection Control Register"]
174    #[inline(always)]
175    pub const fn ostdcr(
176        &self,
177    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
178        unsafe {
179            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
180                self._svd2pac_as_ptr().add(64usize),
181            )
182        }
183    }
184
185    #[doc = "Oscillation Stop Detection Status Register"]
186    #[inline(always)]
187    pub const fn ostdsr(
188        &self,
189    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(65usize),
193            )
194        }
195    }
196
197    #[doc = "Lower Power Operation Control Register"]
198    #[inline(always)]
199    pub const fn lpopt(&self) -> &'static crate::common::Reg<self::Lpopt_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Lpopt_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(76usize),
203            )
204        }
205    }
206
207    #[doc = "Segment LCD Source Clock Control Register"]
208    #[inline(always)]
209    pub const fn slcdsckcr(
210        &self,
211    ) -> &'static crate::common::Reg<self::Slcdsckcr_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Slcdsckcr_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(80usize),
215            )
216        }
217    }
218
219    #[doc = "MOCO User Trimming Control Register"]
220    #[inline(always)]
221    pub const fn mocoutcr(
222        &self,
223    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
224        unsafe {
225            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
226                self._svd2pac_as_ptr().add(97usize),
227            )
228        }
229    }
230
231    #[doc = "HOCO User Trimming Control Register"]
232    #[inline(always)]
233    pub const fn hocoutcr(
234        &self,
235    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(98usize),
239            )
240        }
241    }
242
243    #[doc = "Snooze Control Register"]
244    #[inline(always)]
245    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(146usize),
249            )
250        }
251    }
252
253    #[doc = "Snooze End Control Register 0"]
254    #[inline(always)]
255    pub const fn snzedcr0(
256        &self,
257    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(148usize),
261            )
262        }
263    }
264
265    #[doc = "Snooze Request Control Register 0"]
266    #[inline(always)]
267    pub const fn snzreqcr0(
268        &self,
269    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(152usize),
273            )
274        }
275    }
276
277    #[doc = "Power Save Memory Control Register"]
278    #[inline(always)]
279    pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(159usize),
283            )
284        }
285    }
286
287    #[doc = "Operating Power Control Register"]
288    #[inline(always)]
289    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(160usize),
293            )
294        }
295    }
296
297    #[doc = "Main Clock Oscillator Wait Control Register"]
298    #[inline(always)]
299    pub const fn moscwtcr(
300        &self,
301    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
302        unsafe {
303            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
304                self._svd2pac_as_ptr().add(162usize),
305            )
306        }
307    }
308
309    #[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
310    #[inline(always)]
311    pub const fn hocowtcr(
312        &self,
313    ) -> &'static crate::common::Reg<self::Hocowtcr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Hocowtcr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(165usize),
317            )
318        }
319    }
320
321    #[doc = "Sub Operating Power Control Register"]
322    #[inline(always)]
323    pub const fn sopccr(
324        &self,
325    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(170usize),
329            )
330        }
331    }
332
333    #[doc = "Reset Status Register 1"]
334    #[inline(always)]
335    pub const fn rstsr1(
336        &self,
337    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
338        unsafe {
339            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
340                self._svd2pac_as_ptr().add(192usize),
341            )
342        }
343    }
344
345    #[doc = "24-bit Sigma-delta A/D Converter Clock Control Register"]
346    #[inline(always)]
347    pub const fn sdadcckcr(
348        &self,
349    ) -> &'static crate::common::Reg<self::Sdadcckcr_SPEC, crate::common::RW> {
350        unsafe {
351            crate::common::Reg::<self::Sdadcckcr_SPEC, crate::common::RW>::from_ptr(
352                self._svd2pac_as_ptr().add(209usize),
353            )
354        }
355    }
356
357    #[doc = "Sub Clock Oscillation Stop Detection Control Register"]
358    #[inline(always)]
359    pub const fn sostd(&self) -> &'static crate::common::Reg<self::Sostd_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Sostd_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(216usize),
363            )
364        }
365    }
366
367    #[doc = "Main Oscillation Stop Detection Control Register"]
368    #[inline(always)]
369    pub const fn mostd(&self) -> &'static crate::common::Reg<self::Mostd_SPEC, crate::common::RW> {
370        unsafe {
371            crate::common::Reg::<self::Mostd_SPEC, crate::common::RW>::from_ptr(
372                self._svd2pac_as_ptr().add(218usize),
373            )
374        }
375    }
376
377    #[doc = "Voltage Monitor 1 Circuit Control Register"]
378    #[inline(always)]
379    pub const fn lvd1cr1(
380        &self,
381    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
382        unsafe {
383            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
384                self._svd2pac_as_ptr().add(224usize),
385            )
386        }
387    }
388
389    #[doc = "Voltage Monitor 1 Circuit Status Register"]
390    #[inline(always)]
391    pub const fn lvd1sr(
392        &self,
393    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
394        unsafe {
395            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
396                self._svd2pac_as_ptr().add(225usize),
397            )
398        }
399    }
400
401    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
402    #[inline(always)]
403    pub const fn lvd2cr1(
404        &self,
405    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
406        unsafe {
407            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
408                self._svd2pac_as_ptr().add(226usize),
409            )
410        }
411    }
412
413    #[doc = "Voltage Monitor 2 Circuit Status Register"]
414    #[inline(always)]
415    pub const fn lvd2sr(
416        &self,
417    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
418        unsafe {
419            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
420                self._svd2pac_as_ptr().add(227usize),
421            )
422        }
423    }
424
425    #[doc = "Protect Register"]
426    #[inline(always)]
427    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
428        unsafe {
429            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
430                self._svd2pac_as_ptr().add(1022usize),
431            )
432        }
433    }
434
435    #[doc = "System Control OCD Control Register"]
436    #[inline(always)]
437    pub const fn syocdcr(
438        &self,
439    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
440        unsafe {
441            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
442                self._svd2pac_as_ptr().add(1038usize),
443            )
444        }
445    }
446
447    #[doc = "Reset Status Register 0"]
448    #[inline(always)]
449    pub const fn rstsr0(
450        &self,
451    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
452        unsafe {
453            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
454                self._svd2pac_as_ptr().add(1040usize),
455            )
456        }
457    }
458
459    #[doc = "Reset Status Register 2"]
460    #[inline(always)]
461    pub const fn rstsr2(
462        &self,
463    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
464        unsafe {
465            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
466                self._svd2pac_as_ptr().add(1041usize),
467            )
468        }
469    }
470
471    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
472    #[inline(always)]
473    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(1043usize),
477            )
478        }
479    }
480
481    #[doc = "Voltage Monitor Circuit Control Register"]
482    #[inline(always)]
483    pub const fn lvcmpcr(
484        &self,
485    ) -> &'static crate::common::Reg<self::Lvcmpcr_SPEC, crate::common::RW> {
486        unsafe {
487            crate::common::Reg::<self::Lvcmpcr_SPEC, crate::common::RW>::from_ptr(
488                self._svd2pac_as_ptr().add(1047usize),
489            )
490        }
491    }
492
493    #[doc = "Voltage Detection Level Select Register"]
494    #[inline(always)]
495    pub const fn lvdlvlr(
496        &self,
497    ) -> &'static crate::common::Reg<self::Lvdlvlr_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::Lvdlvlr_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(1048usize),
501            )
502        }
503    }
504
505    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
506    #[inline(always)]
507    pub const fn lvd1cr0(
508        &self,
509    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
510        unsafe {
511            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
512                self._svd2pac_as_ptr().add(1050usize),
513            )
514        }
515    }
516
517    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
518    #[inline(always)]
519    pub const fn lvd2cr0(
520        &self,
521    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
522        unsafe {
523            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
524                self._svd2pac_as_ptr().add(1051usize),
525            )
526        }
527    }
528
529    #[doc = "Sub-Clock Oscillator Control Register"]
530    #[inline(always)]
531    pub const fn sosccr(
532        &self,
533    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(1152usize),
537            )
538        }
539    }
540
541    #[doc = "Sub-Clock Oscillator Mode Control Register"]
542    #[inline(always)]
543    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(1153usize),
547            )
548        }
549    }
550
551    #[doc = "Sub-Clock Oscillator Margin Check Register"]
552    #[inline(always)]
553    pub const fn somrg(&self) -> &'static crate::common::Reg<self::Somrg_SPEC, crate::common::RW> {
554        unsafe {
555            crate::common::Reg::<self::Somrg_SPEC, crate::common::RW>::from_ptr(
556                self._svd2pac_as_ptr().add(1154usize),
557            )
558        }
559    }
560
561    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
562    #[inline(always)]
563    pub const fn lococr(
564        &self,
565    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
566        unsafe {
567            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
568                self._svd2pac_as_ptr().add(1168usize),
569            )
570        }
571    }
572
573    #[doc = "LOCO User Trimming Control Register"]
574    #[inline(always)]
575    pub const fn locoutcr(
576        &self,
577    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
578        unsafe {
579            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
580                self._svd2pac_as_ptr().add(1170usize),
581            )
582        }
583    }
584
585    #[doc = "EXLVDVBAT Circuit Control Register"]
586    #[inline(always)]
587    pub const fn vbtlvdcr(
588        &self,
589    ) -> &'static crate::common::Reg<self::Vbtlvdcr_SPEC, crate::common::RW> {
590        unsafe {
591            crate::common::Reg::<self::Vbtlvdcr_SPEC, crate::common::RW>::from_ptr(
592                self._svd2pac_as_ptr().add(1216usize),
593            )
594        }
595    }
596
597    #[doc = "EXLVDVBAT Circuit Status Register"]
598    #[inline(always)]
599    pub const fn vbtlvdsr(
600        &self,
601    ) -> &'static crate::common::Reg<self::Vbtlvdsr_SPEC, crate::common::RW> {
602        unsafe {
603            crate::common::Reg::<self::Vbtlvdsr_SPEC, crate::common::RW>::from_ptr(
604                self._svd2pac_as_ptr().add(1217usize),
605            )
606        }
607    }
608
609    #[doc = "EXLVDVBAT Comparator Control Register"]
610    #[inline(always)]
611    pub const fn vbtcmpcr(
612        &self,
613    ) -> &'static crate::common::Reg<self::Vbtcmpcr_SPEC, crate::common::RW> {
614        unsafe {
615            crate::common::Reg::<self::Vbtcmpcr_SPEC, crate::common::RW>::from_ptr(
616                self._svd2pac_as_ptr().add(1218usize),
617            )
618        }
619    }
620
621    #[doc = "EXLVDVBAT Pin Low Voltage Detect Interrupt Control Register"]
622    #[inline(always)]
623    pub const fn vbtlvdicr(
624        &self,
625    ) -> &'static crate::common::Reg<self::Vbtlvdicr_SPEC, crate::common::RW> {
626        unsafe {
627            crate::common::Reg::<self::Vbtlvdicr_SPEC, crate::common::RW>::from_ptr(
628                self._svd2pac_as_ptr().add(1219usize),
629            )
630        }
631    }
632
633    #[doc = "LVDVRTC Circuit Control Register"]
634    #[inline(always)]
635    pub const fn vrtlvdcr(
636        &self,
637    ) -> &'static crate::common::Reg<self::Vrtlvdcr_SPEC, crate::common::RW> {
638        unsafe {
639            crate::common::Reg::<self::Vrtlvdcr_SPEC, crate::common::RW>::from_ptr(
640                self._svd2pac_as_ptr().add(1220usize),
641            )
642        }
643    }
644
645    #[doc = "VRTC Status Register"]
646    #[inline(always)]
647    pub const fn vrtsr(&self) -> &'static crate::common::Reg<self::Vrtsr_SPEC, crate::common::RW> {
648        unsafe {
649            crate::common::Reg::<self::Vrtsr_SPEC, crate::common::RW>::from_ptr(
650                self._svd2pac_as_ptr().add(1221usize),
651            )
652        }
653    }
654
655    #[doc = "VRTC Comparator Control Register"]
656    #[inline(always)]
657    pub const fn vrtcmpcr(
658        &self,
659    ) -> &'static crate::common::Reg<self::Vrtcmpcr_SPEC, crate::common::RW> {
660        unsafe {
661            crate::common::Reg::<self::Vrtcmpcr_SPEC, crate::common::RW>::from_ptr(
662                self._svd2pac_as_ptr().add(1222usize),
663            )
664        }
665    }
666
667    #[doc = "VRTC Pin Low Voltage Detect Interrupt Control Register"]
668    #[inline(always)]
669    pub const fn vrtlvdicr(
670        &self,
671    ) -> &'static crate::common::Reg<self::Vrtlvdicr_SPEC, crate::common::RW> {
672        unsafe {
673            crate::common::Reg::<self::Vrtlvdicr_SPEC, crate::common::RW>::from_ptr(
674                self._svd2pac_as_ptr().add(1223usize),
675            )
676        }
677    }
678
679    #[doc = "EXLVD Circuit Control Register"]
680    #[inline(always)]
681    pub const fn exlvdcr(
682        &self,
683    ) -> &'static crate::common::Reg<self::Exlvdcr_SPEC, crate::common::RW> {
684        unsafe {
685            crate::common::Reg::<self::Exlvdcr_SPEC, crate::common::RW>::from_ptr(
686                self._svd2pac_as_ptr().add(1224usize),
687            )
688        }
689    }
690
691    #[doc = "EXLVD Circuit Status Register"]
692    #[inline(always)]
693    pub const fn exlvdsr(
694        &self,
695    ) -> &'static crate::common::Reg<self::Exlvdsr_SPEC, crate::common::RW> {
696        unsafe {
697            crate::common::Reg::<self::Exlvdsr_SPEC, crate::common::RW>::from_ptr(
698                self._svd2pac_as_ptr().add(1225usize),
699            )
700        }
701    }
702
703    #[doc = "EXLVD Comparator Control Register"]
704    #[inline(always)]
705    pub const fn exlvdcmpcr(
706        &self,
707    ) -> &'static crate::common::Reg<self::Exlvdcmpcr_SPEC, crate::common::RW> {
708        unsafe {
709            crate::common::Reg::<self::Exlvdcmpcr_SPEC, crate::common::RW>::from_ptr(
710                self._svd2pac_as_ptr().add(1226usize),
711            )
712        }
713    }
714
715    #[doc = "EXLVD Pin Low Voltage Detect Interrupt Control Register"]
716    #[inline(always)]
717    pub const fn exlvdicr(
718        &self,
719    ) -> &'static crate::common::Reg<self::Exlvdicr_SPEC, crate::common::RW> {
720        unsafe {
721            crate::common::Reg::<self::Exlvdicr_SPEC, crate::common::RW>::from_ptr(
722                self._svd2pac_as_ptr().add(1227usize),
723            )
724        }
725    }
726}
727#[doc(hidden)]
728#[derive(Copy, Clone, Eq, PartialEq)]
729pub struct Sbycr_SPEC;
730impl crate::sealed::RegSpec for Sbycr_SPEC {
731    type DataType = u16;
732}
733
734#[doc = "Standby Control Register"]
735pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
736
737impl Sbycr {
738    #[doc = "Software Standby Mode Select"]
739    #[inline(always)]
740    pub fn ssby(
741        self,
742    ) -> crate::common::RegisterField<
743        15,
744        0x1,
745        1,
746        0,
747        sbycr::Ssby,
748        sbycr::Ssby,
749        Sbycr_SPEC,
750        crate::common::RW,
751    > {
752        crate::common::RegisterField::<
753            15,
754            0x1,
755            1,
756            0,
757            sbycr::Ssby,
758            sbycr::Ssby,
759            Sbycr_SPEC,
760            crate::common::RW,
761        >::from_register(self, 0)
762    }
763}
764impl ::core::default::Default for Sbycr {
765    #[inline(always)]
766    fn default() -> Sbycr {
767        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(0)
768    }
769}
770pub mod sbycr {
771
772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
773    pub struct Ssby_SPEC;
774    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
775    impl Ssby {
776        #[doc = "Sleep mode"]
777        pub const _0: Self = Self::new(0);
778
779        #[doc = "Software Standby mode"]
780        pub const _1: Self = Self::new(1);
781    }
782}
783#[doc(hidden)]
784#[derive(Copy, Clone, Eq, PartialEq)]
785pub struct Mstpcra_SPEC;
786impl crate::sealed::RegSpec for Mstpcra_SPEC {
787    type DataType = u32;
788}
789
790#[doc = "Module Stop Control Register A"]
791pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
792
793impl Mstpcra {
794    #[doc = "Sub Oscillation Stop Detection for SDADCCLK Module Stop"]
795    #[inline(always)]
796    pub fn mstpa16(
797        self,
798    ) -> crate::common::RegisterField<
799        16,
800        0x1,
801        1,
802        0,
803        mstpcra::Mstpa16,
804        mstpcra::Mstpa16,
805        Mstpcra_SPEC,
806        crate::common::RW,
807    > {
808        crate::common::RegisterField::<
809            16,
810            0x1,
811            1,
812            0,
813            mstpcra::Mstpa16,
814            mstpcra::Mstpa16,
815            Mstpcra_SPEC,
816            crate::common::RW,
817        >::from_register(self, 0)
818    }
819
820    #[doc = "Main Oscillation Stop Detection for SDADCCLK Module Stop"]
821    #[inline(always)]
822    pub fn mstpa17(
823        self,
824    ) -> crate::common::RegisterField<
825        17,
826        0x1,
827        1,
828        0,
829        mstpcra::Mstpa17,
830        mstpcra::Mstpa17,
831        Mstpcra_SPEC,
832        crate::common::RW,
833    > {
834        crate::common::RegisterField::<
835            17,
836            0x1,
837            1,
838            0,
839            mstpcra::Mstpa17,
840            mstpcra::Mstpa17,
841            Mstpcra_SPEC,
842            crate::common::RW,
843        >::from_register(self, 0)
844    }
845
846    #[doc = "DTC Module Stop"]
847    #[inline(always)]
848    pub fn mstpa22(
849        self,
850    ) -> crate::common::RegisterField<
851        22,
852        0x1,
853        1,
854        0,
855        mstpcra::Mstpa22,
856        mstpcra::Mstpa22,
857        Mstpcra_SPEC,
858        crate::common::RW,
859    > {
860        crate::common::RegisterField::<
861            22,
862            0x1,
863            1,
864            0,
865            mstpcra::Mstpa22,
866            mstpcra::Mstpa22,
867            Mstpcra_SPEC,
868            crate::common::RW,
869        >::from_register(self, 0)
870    }
871}
872impl ::core::default::Default for Mstpcra {
873    #[inline(always)]
874    fn default() -> Mstpcra {
875        <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(4290772991)
876    }
877}
878pub mod mstpcra {
879
880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
881    pub struct Mstpa16_SPEC;
882    pub type Mstpa16 = crate::EnumBitfieldStruct<u8, Mstpa16_SPEC>;
883    impl Mstpa16 {
884        #[doc = "Supply input clock. SFR used by SOSTD can be read/written."]
885        pub const _0: Self = Self::new(0);
886
887        #[doc = "Stop supply of input clock. SFR used by SOSTD cannot be written. SOSTD clock is stopped and error flag is in the reset status."]
888        pub const _1: Self = Self::new(1);
889    }
890    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
891    pub struct Mstpa17_SPEC;
892    pub type Mstpa17 = crate::EnumBitfieldStruct<u8, Mstpa17_SPEC>;
893    impl Mstpa17 {
894        #[doc = "Supply input clock. SFR used by MOSTD can be read/written."]
895        pub const _0: Self = Self::new(0);
896
897        #[doc = "Stop supply of input clock. SFR used by MOSTD cannot be written. MOSTD clock is stopped and error flag is in the reset status."]
898        pub const _1: Self = Self::new(1);
899    }
900    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
901    pub struct Mstpa22_SPEC;
902    pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
903    impl Mstpa22 {
904        #[doc = "Cancel the module-stop state"]
905        pub const _0: Self = Self::new(0);
906
907        #[doc = "Enter the module-stop state"]
908        pub const _1: Self = Self::new(1);
909    }
910}
911#[doc(hidden)]
912#[derive(Copy, Clone, Eq, PartialEq)]
913pub struct Sckdivcr_SPEC;
914impl crate::sealed::RegSpec for Sckdivcr_SPEC {
915    type DataType = u32;
916}
917
918#[doc = "System Clock Division Control Register"]
919pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
920
921impl Sckdivcr {
922    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
923    #[inline(always)]
924    pub fn pckd(
925        self,
926    ) -> crate::common::RegisterField<
927        0,
928        0x7,
929        1,
930        0,
931        sckdivcr::Pckd,
932        sckdivcr::Pckd,
933        Sckdivcr_SPEC,
934        crate::common::RW,
935    > {
936        crate::common::RegisterField::<
937            0,
938            0x7,
939            1,
940            0,
941            sckdivcr::Pckd,
942            sckdivcr::Pckd,
943            Sckdivcr_SPEC,
944            crate::common::RW,
945        >::from_register(self, 0)
946    }
947
948    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
949    #[inline(always)]
950    pub fn pckb(
951        self,
952    ) -> crate::common::RegisterField<
953        8,
954        0x7,
955        1,
956        0,
957        sckdivcr::Pckb,
958        sckdivcr::Pckb,
959        Sckdivcr_SPEC,
960        crate::common::RW,
961    > {
962        crate::common::RegisterField::<
963            8,
964            0x7,
965            1,
966            0,
967            sckdivcr::Pckb,
968            sckdivcr::Pckb,
969            Sckdivcr_SPEC,
970            crate::common::RW,
971        >::from_register(self, 0)
972    }
973
974    #[doc = "System Clock (ICLK) Select"]
975    #[inline(always)]
976    pub fn ick(
977        self,
978    ) -> crate::common::RegisterField<
979        24,
980        0x7,
981        1,
982        0,
983        sckdivcr::Ick,
984        sckdivcr::Ick,
985        Sckdivcr_SPEC,
986        crate::common::RW,
987    > {
988        crate::common::RegisterField::<
989            24,
990            0x7,
991            1,
992            0,
993            sckdivcr::Ick,
994            sckdivcr::Ick,
995            Sckdivcr_SPEC,
996            crate::common::RW,
997        >::from_register(self, 0)
998    }
999}
1000impl ::core::default::Default for Sckdivcr {
1001    #[inline(always)]
1002    fn default() -> Sckdivcr {
1003        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(67109892)
1004    }
1005}
1006pub mod sckdivcr {
1007
1008    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1009    pub struct Pckd_SPEC;
1010    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1011    impl Pckd {
1012        #[doc = "x 1/1"]
1013        pub const _000: Self = Self::new(0);
1014
1015        #[doc = "x 1/2"]
1016        pub const _001: Self = Self::new(1);
1017
1018        #[doc = "x 1/4"]
1019        pub const _010: Self = Self::new(2);
1020
1021        #[doc = "x 1/8"]
1022        pub const _011: Self = Self::new(3);
1023
1024        #[doc = "x 1/16"]
1025        pub const _100: Self = Self::new(4);
1026
1027        #[doc = "x 1/32"]
1028        pub const _101: Self = Self::new(5);
1029
1030        #[doc = "x 1/64"]
1031        pub const _110: Self = Self::new(6);
1032    }
1033    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1034    pub struct Pckb_SPEC;
1035    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1036    impl Pckb {
1037        #[doc = "x 1/1"]
1038        pub const _000: Self = Self::new(0);
1039
1040        #[doc = "x 1/2"]
1041        pub const _001: Self = Self::new(1);
1042
1043        #[doc = "x 1/4"]
1044        pub const _010: Self = Self::new(2);
1045
1046        #[doc = "x 1/8"]
1047        pub const _011: Self = Self::new(3);
1048
1049        #[doc = "x 1/16"]
1050        pub const _100: Self = Self::new(4);
1051
1052        #[doc = "x 1/32"]
1053        pub const _101: Self = Self::new(5);
1054
1055        #[doc = "x 1/64"]
1056        pub const _110: Self = Self::new(6);
1057    }
1058    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1059    pub struct Ick_SPEC;
1060    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1061    impl Ick {
1062        #[doc = "x 1/1"]
1063        pub const _000: Self = Self::new(0);
1064
1065        #[doc = "x 1/2"]
1066        pub const _001: Self = Self::new(1);
1067
1068        #[doc = "x 1/4"]
1069        pub const _010: Self = Self::new(2);
1070
1071        #[doc = "x 1/8"]
1072        pub const _011: Self = Self::new(3);
1073
1074        #[doc = "x 1/16"]
1075        pub const _100: Self = Self::new(4);
1076
1077        #[doc = "x 1/32"]
1078        pub const _101: Self = Self::new(5);
1079
1080        #[doc = "x 1/64"]
1081        pub const _110: Self = Self::new(6);
1082    }
1083}
1084#[doc(hidden)]
1085#[derive(Copy, Clone, Eq, PartialEq)]
1086pub struct Sckscr_SPEC;
1087impl crate::sealed::RegSpec for Sckscr_SPEC {
1088    type DataType = u8;
1089}
1090
1091#[doc = "System Clock Source Control Register"]
1092pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1093
1094impl Sckscr {
1095    #[doc = "Clock Source Select"]
1096    #[inline(always)]
1097    pub fn cksel(
1098        self,
1099    ) -> crate::common::RegisterField<
1100        0,
1101        0x7,
1102        1,
1103        0,
1104        sckscr::Cksel,
1105        sckscr::Cksel,
1106        Sckscr_SPEC,
1107        crate::common::RW,
1108    > {
1109        crate::common::RegisterField::<
1110            0,
1111            0x7,
1112            1,
1113            0,
1114            sckscr::Cksel,
1115            sckscr::Cksel,
1116            Sckscr_SPEC,
1117            crate::common::RW,
1118        >::from_register(self, 0)
1119    }
1120}
1121impl ::core::default::Default for Sckscr {
1122    #[inline(always)]
1123    fn default() -> Sckscr {
1124        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1125    }
1126}
1127pub mod sckscr {
1128
1129    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1130    pub struct Cksel_SPEC;
1131    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1132    impl Cksel {
1133        #[doc = "HOCO"]
1134        pub const _000: Self = Self::new(0);
1135
1136        #[doc = "MOCO"]
1137        pub const _001: Self = Self::new(1);
1138
1139        #[doc = "LOCO"]
1140        pub const _010: Self = Self::new(2);
1141
1142        #[doc = "Main clock oscillator (MOSC)"]
1143        pub const _011: Self = Self::new(3);
1144
1145        #[doc = "Sub-clock oscillator (SOSC)"]
1146        pub const _100: Self = Self::new(4);
1147
1148        #[doc = "Setting prohibited"]
1149        pub const _101: Self = Self::new(5);
1150
1151        #[doc = "Setting prohibited"]
1152        pub const _110: Self = Self::new(6);
1153
1154        #[doc = "Setting prohibited"]
1155        pub const _111: Self = Self::new(7);
1156    }
1157}
1158#[doc(hidden)]
1159#[derive(Copy, Clone, Eq, PartialEq)]
1160pub struct Pllccr_SPEC;
1161impl crate::sealed::RegSpec for Pllccr_SPEC {
1162    type DataType = u16;
1163}
1164
1165#[doc = "PLL Clock Control Register"]
1166pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1167
1168impl Pllccr {
1169    #[doc = "PLL Frequency Multiplication Factor Select"]
1170    #[inline(always)]
1171    pub fn pllmul(
1172        self,
1173    ) -> crate::common::RegisterField<
1174        8,
1175        0xff,
1176        1,
1177        0,
1178        pllccr::Pllmul,
1179        pllccr::Pllmul,
1180        Pllccr_SPEC,
1181        crate::common::RW,
1182    > {
1183        crate::common::RegisterField::<
1184            8,
1185            0xff,
1186            1,
1187            0,
1188            pllccr::Pllmul,
1189            pllccr::Pllmul,
1190            Pllccr_SPEC,
1191            crate::common::RW,
1192        >::from_register(self, 0)
1193    }
1194}
1195impl ::core::default::Default for Pllccr {
1196    #[inline(always)]
1197    fn default() -> Pllccr {
1198        <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(40452)
1199    }
1200}
1201pub mod pllccr {
1202
1203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1204    pub struct Pllmul_SPEC;
1205    pub type Pllmul = crate::EnumBitfieldStruct<u8, Pllmul_SPEC>;
1206    impl Pllmul {
1207        #[doc = "× 732 (value after reset)"]
1208        pub const _0_X_9_E: Self = Self::new(158);
1209
1210        #[doc = "× 781"]
1211        pub const _0_X_CF: Self = Self::new(207);
1212    }
1213}
1214#[doc(hidden)]
1215#[derive(Copy, Clone, Eq, PartialEq)]
1216pub struct Pllcr_SPEC;
1217impl crate::sealed::RegSpec for Pllcr_SPEC {
1218    type DataType = u8;
1219}
1220
1221#[doc = "PLL Control Register"]
1222pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1223
1224impl Pllcr {
1225    #[doc = "PLL Stop Control"]
1226    #[inline(always)]
1227    pub fn pllstp(
1228        self,
1229    ) -> crate::common::RegisterField<
1230        0,
1231        0x1,
1232        1,
1233        0,
1234        pllcr::Pllstp,
1235        pllcr::Pllstp,
1236        Pllcr_SPEC,
1237        crate::common::RW,
1238    > {
1239        crate::common::RegisterField::<
1240            0,
1241            0x1,
1242            1,
1243            0,
1244            pllcr::Pllstp,
1245            pllcr::Pllstp,
1246            Pllcr_SPEC,
1247            crate::common::RW,
1248        >::from_register(self, 0)
1249    }
1250}
1251impl ::core::default::Default for Pllcr {
1252    #[inline(always)]
1253    fn default() -> Pllcr {
1254        <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1255    }
1256}
1257pub mod pllcr {
1258
1259    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1260    pub struct Pllstp_SPEC;
1261    pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1262    impl Pllstp {
1263        #[doc = "PLL is operating"]
1264        pub const _0: Self = Self::new(0);
1265
1266        #[doc = "PLL is stopped"]
1267        pub const _1: Self = Self::new(1);
1268    }
1269}
1270#[doc(hidden)]
1271#[derive(Copy, Clone, Eq, PartialEq)]
1272pub struct Memwait_SPEC;
1273impl crate::sealed::RegSpec for Memwait_SPEC {
1274    type DataType = u8;
1275}
1276
1277#[doc = "Memory Wait Cycle Control Register for Code Flash"]
1278pub type Memwait = crate::RegValueT<Memwait_SPEC>;
1279
1280impl Memwait {
1281    #[doc = "Memory Wait Cycle Select for Code Flash"]
1282    #[inline(always)]
1283    pub fn memwait(
1284        self,
1285    ) -> crate::common::RegisterField<
1286        0,
1287        0x1,
1288        1,
1289        0,
1290        memwait::Memwait,
1291        memwait::Memwait,
1292        Memwait_SPEC,
1293        crate::common::RW,
1294    > {
1295        crate::common::RegisterField::<
1296            0,
1297            0x1,
1298            1,
1299            0,
1300            memwait::Memwait,
1301            memwait::Memwait,
1302            Memwait_SPEC,
1303            crate::common::RW,
1304        >::from_register(self, 0)
1305    }
1306}
1307impl ::core::default::Default for Memwait {
1308    #[inline(always)]
1309    fn default() -> Memwait {
1310        <crate::RegValueT<Memwait_SPEC> as RegisterValue<_>>::new(0)
1311    }
1312}
1313pub mod memwait {
1314
1315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1316    pub struct Memwait_SPEC;
1317    pub type Memwait = crate::EnumBitfieldStruct<u8, Memwait_SPEC>;
1318    impl Memwait {
1319        #[doc = "No wait"]
1320        pub const _0: Self = Self::new(0);
1321
1322        #[doc = "Wait"]
1323        pub const _1: Self = Self::new(1);
1324    }
1325}
1326#[doc(hidden)]
1327#[derive(Copy, Clone, Eq, PartialEq)]
1328pub struct Mosccr_SPEC;
1329impl crate::sealed::RegSpec for Mosccr_SPEC {
1330    type DataType = u8;
1331}
1332
1333#[doc = "Main Clock Oscillator Control Register"]
1334pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1335
1336impl Mosccr {
1337    #[doc = "Main Clock Oscillator Stop"]
1338    #[inline(always)]
1339    pub fn mostp(
1340        self,
1341    ) -> crate::common::RegisterField<
1342        0,
1343        0x1,
1344        1,
1345        0,
1346        mosccr::Mostp,
1347        mosccr::Mostp,
1348        Mosccr_SPEC,
1349        crate::common::RW,
1350    > {
1351        crate::common::RegisterField::<
1352            0,
1353            0x1,
1354            1,
1355            0,
1356            mosccr::Mostp,
1357            mosccr::Mostp,
1358            Mosccr_SPEC,
1359            crate::common::RW,
1360        >::from_register(self, 0)
1361    }
1362}
1363impl ::core::default::Default for Mosccr {
1364    #[inline(always)]
1365    fn default() -> Mosccr {
1366        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1367    }
1368}
1369pub mod mosccr {
1370
1371    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1372    pub struct Mostp_SPEC;
1373    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1374    impl Mostp {
1375        #[doc = "Operate the main clock oscillator"]
1376        pub const _0: Self = Self::new(0);
1377
1378        #[doc = "Stop the main clock oscillator"]
1379        pub const _1: Self = Self::new(1);
1380    }
1381}
1382#[doc(hidden)]
1383#[derive(Copy, Clone, Eq, PartialEq)]
1384pub struct Hococr_SPEC;
1385impl crate::sealed::RegSpec for Hococr_SPEC {
1386    type DataType = u8;
1387}
1388
1389#[doc = "High-Speed On-Chip Oscillator Control Register"]
1390pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1391
1392impl Hococr {
1393    #[doc = "HOCO Stop"]
1394    #[inline(always)]
1395    pub fn hcstp(
1396        self,
1397    ) -> crate::common::RegisterField<
1398        0,
1399        0x1,
1400        1,
1401        0,
1402        hococr::Hcstp,
1403        hococr::Hcstp,
1404        Hococr_SPEC,
1405        crate::common::RW,
1406    > {
1407        crate::common::RegisterField::<
1408            0,
1409            0x1,
1410            1,
1411            0,
1412            hococr::Hcstp,
1413            hococr::Hcstp,
1414            Hococr_SPEC,
1415            crate::common::RW,
1416        >::from_register(self, 0)
1417    }
1418}
1419impl ::core::default::Default for Hococr {
1420    #[inline(always)]
1421    fn default() -> Hococr {
1422        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1423    }
1424}
1425pub mod hococr {
1426
1427    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1428    pub struct Hcstp_SPEC;
1429    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1430    impl Hcstp {
1431        #[doc = "Operate the HOCO clock"]
1432        pub const _0: Self = Self::new(0);
1433
1434        #[doc = "Stop the HOCO clock"]
1435        pub const _1: Self = Self::new(1);
1436    }
1437}
1438#[doc(hidden)]
1439#[derive(Copy, Clone, Eq, PartialEq)]
1440pub struct Mococr_SPEC;
1441impl crate::sealed::RegSpec for Mococr_SPEC {
1442    type DataType = u8;
1443}
1444
1445#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1446pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1447
1448impl Mococr {
1449    #[doc = "MOCO Stop"]
1450    #[inline(always)]
1451    pub fn mcstp(
1452        self,
1453    ) -> crate::common::RegisterField<
1454        0,
1455        0x1,
1456        1,
1457        0,
1458        mococr::Mcstp,
1459        mococr::Mcstp,
1460        Mococr_SPEC,
1461        crate::common::RW,
1462    > {
1463        crate::common::RegisterField::<
1464            0,
1465            0x1,
1466            1,
1467            0,
1468            mococr::Mcstp,
1469            mococr::Mcstp,
1470            Mococr_SPEC,
1471            crate::common::RW,
1472        >::from_register(self, 0)
1473    }
1474}
1475impl ::core::default::Default for Mococr {
1476    #[inline(always)]
1477    fn default() -> Mococr {
1478        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1479    }
1480}
1481pub mod mococr {
1482
1483    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1484    pub struct Mcstp_SPEC;
1485    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1486    impl Mcstp {
1487        #[doc = "MOCO clock is operating"]
1488        pub const _0: Self = Self::new(0);
1489
1490        #[doc = "MOCO clock is stopped"]
1491        pub const _1: Self = Self::new(1);
1492    }
1493}
1494#[doc(hidden)]
1495#[derive(Copy, Clone, Eq, PartialEq)]
1496pub struct Oscsf_SPEC;
1497impl crate::sealed::RegSpec for Oscsf_SPEC {
1498    type DataType = u8;
1499}
1500
1501#[doc = "Oscillation Stabilization Flag Register"]
1502pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1503
1504impl Oscsf {
1505    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1506    #[inline(always)]
1507    pub fn hocosf(
1508        self,
1509    ) -> crate::common::RegisterField<
1510        0,
1511        0x1,
1512        1,
1513        0,
1514        oscsf::Hocosf,
1515        oscsf::Hocosf,
1516        Oscsf_SPEC,
1517        crate::common::R,
1518    > {
1519        crate::common::RegisterField::<
1520            0,
1521            0x1,
1522            1,
1523            0,
1524            oscsf::Hocosf,
1525            oscsf::Hocosf,
1526            Oscsf_SPEC,
1527            crate::common::R,
1528        >::from_register(self, 0)
1529    }
1530
1531    #[doc = "Main Clock Oscillation Stabilization Flag"]
1532    #[inline(always)]
1533    pub fn moscsf(
1534        self,
1535    ) -> crate::common::RegisterField<
1536        3,
1537        0x1,
1538        1,
1539        0,
1540        oscsf::Moscsf,
1541        oscsf::Moscsf,
1542        Oscsf_SPEC,
1543        crate::common::R,
1544    > {
1545        crate::common::RegisterField::<
1546            3,
1547            0x1,
1548            1,
1549            0,
1550            oscsf::Moscsf,
1551            oscsf::Moscsf,
1552            Oscsf_SPEC,
1553            crate::common::R,
1554        >::from_register(self, 0)
1555    }
1556
1557    #[doc = "PLL Clock Oscillation Stabilization Flag"]
1558    #[inline(always)]
1559    pub fn pllsf(
1560        self,
1561    ) -> crate::common::RegisterField<
1562        5,
1563        0x1,
1564        1,
1565        0,
1566        oscsf::Pllsf,
1567        oscsf::Pllsf,
1568        Oscsf_SPEC,
1569        crate::common::R,
1570    > {
1571        crate::common::RegisterField::<
1572            5,
1573            0x1,
1574            1,
1575            0,
1576            oscsf::Pllsf,
1577            oscsf::Pllsf,
1578            Oscsf_SPEC,
1579            crate::common::R,
1580        >::from_register(self, 0)
1581    }
1582}
1583impl ::core::default::Default for Oscsf {
1584    #[inline(always)]
1585    fn default() -> Oscsf {
1586        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1587    }
1588}
1589pub mod oscsf {
1590
1591    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1592    pub struct Hocosf_SPEC;
1593    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1594    impl Hocosf {
1595        #[doc = "The HOCO clock is stopped or is not yet stable"]
1596        pub const _0: Self = Self::new(0);
1597
1598        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1599        pub const _1: Self = Self::new(1);
1600    }
1601    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1602    pub struct Moscsf_SPEC;
1603    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1604    impl Moscsf {
1605        #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1606        pub const _0: Self = Self::new(0);
1607
1608        #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1609        pub const _1: Self = Self::new(1);
1610    }
1611    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1612    pub struct Pllsf_SPEC;
1613    pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
1614    impl Pllsf {
1615        #[doc = "The PLL clock is stopped or oscillation of the PLL clock is not yet stable"]
1616        pub const _0: Self = Self::new(0);
1617
1618        #[doc = "The PLL clock is stable, so is available for use as the SDADCCLK clock"]
1619        pub const _1: Self = Self::new(1);
1620    }
1621}
1622#[doc(hidden)]
1623#[derive(Copy, Clone, Eq, PartialEq)]
1624pub struct Ckocr_SPEC;
1625impl crate::sealed::RegSpec for Ckocr_SPEC {
1626    type DataType = u8;
1627}
1628
1629#[doc = "Clock Out Control Register"]
1630pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1631
1632impl Ckocr {
1633    #[doc = "Clock Out Source Select"]
1634    #[inline(always)]
1635    pub fn ckosel(
1636        self,
1637    ) -> crate::common::RegisterField<
1638        0,
1639        0x7,
1640        1,
1641        0,
1642        ckocr::Ckosel,
1643        ckocr::Ckosel,
1644        Ckocr_SPEC,
1645        crate::common::RW,
1646    > {
1647        crate::common::RegisterField::<
1648            0,
1649            0x7,
1650            1,
1651            0,
1652            ckocr::Ckosel,
1653            ckocr::Ckosel,
1654            Ckocr_SPEC,
1655            crate::common::RW,
1656        >::from_register(self, 0)
1657    }
1658
1659    #[doc = "Clock Output Frequency Division Ratio"]
1660    #[inline(always)]
1661    pub fn ckodiv(
1662        self,
1663    ) -> crate::common::RegisterField<
1664        4,
1665        0x7,
1666        1,
1667        0,
1668        ckocr::Ckodiv,
1669        ckocr::Ckodiv,
1670        Ckocr_SPEC,
1671        crate::common::RW,
1672    > {
1673        crate::common::RegisterField::<
1674            4,
1675            0x7,
1676            1,
1677            0,
1678            ckocr::Ckodiv,
1679            ckocr::Ckodiv,
1680            Ckocr_SPEC,
1681            crate::common::RW,
1682        >::from_register(self, 0)
1683    }
1684
1685    #[doc = "Clock Out Enable"]
1686    #[inline(always)]
1687    pub fn ckoen(
1688        self,
1689    ) -> crate::common::RegisterField<
1690        7,
1691        0x1,
1692        1,
1693        0,
1694        ckocr::Ckoen,
1695        ckocr::Ckoen,
1696        Ckocr_SPEC,
1697        crate::common::RW,
1698    > {
1699        crate::common::RegisterField::<
1700            7,
1701            0x1,
1702            1,
1703            0,
1704            ckocr::Ckoen,
1705            ckocr::Ckoen,
1706            Ckocr_SPEC,
1707            crate::common::RW,
1708        >::from_register(self, 0)
1709    }
1710}
1711impl ::core::default::Default for Ckocr {
1712    #[inline(always)]
1713    fn default() -> Ckocr {
1714        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
1715    }
1716}
1717pub mod ckocr {
1718
1719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1720    pub struct Ckosel_SPEC;
1721    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
1722    impl Ckosel {
1723        #[doc = "HOCO (value after reset)"]
1724        pub const _000: Self = Self::new(0);
1725
1726        #[doc = "MOCO"]
1727        pub const _001: Self = Self::new(1);
1728
1729        #[doc = "LOCO"]
1730        pub const _010: Self = Self::new(2);
1731
1732        #[doc = "MOSC"]
1733        pub const _011: Self = Self::new(3);
1734
1735        #[doc = "SOSC"]
1736        pub const _100: Self = Self::new(4);
1737
1738        #[doc = "PLL"]
1739        pub const _101: Self = Self::new(5);
1740    }
1741    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1742    pub struct Ckodiv_SPEC;
1743    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
1744    impl Ckodiv {
1745        #[doc = "x 1/1"]
1746        pub const _000: Self = Self::new(0);
1747
1748        #[doc = "x 1/2"]
1749        pub const _001: Self = Self::new(1);
1750
1751        #[doc = "x 1/4"]
1752        pub const _010: Self = Self::new(2);
1753
1754        #[doc = "x 1/8"]
1755        pub const _011: Self = Self::new(3);
1756
1757        #[doc = "x 1/16"]
1758        pub const _100: Self = Self::new(4);
1759
1760        #[doc = "x 1/32"]
1761        pub const _101: Self = Self::new(5);
1762
1763        #[doc = "x 1/64"]
1764        pub const _110: Self = Self::new(6);
1765
1766        #[doc = "x 1/128"]
1767        pub const _111: Self = Self::new(7);
1768    }
1769    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1770    pub struct Ckoen_SPEC;
1771    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
1772    impl Ckoen {
1773        #[doc = "Disable clock out"]
1774        pub const _0: Self = Self::new(0);
1775
1776        #[doc = "Enable clock out"]
1777        pub const _1: Self = Self::new(1);
1778    }
1779}
1780#[doc(hidden)]
1781#[derive(Copy, Clone, Eq, PartialEq)]
1782pub struct Ostdcr_SPEC;
1783impl crate::sealed::RegSpec for Ostdcr_SPEC {
1784    type DataType = u8;
1785}
1786
1787#[doc = "Oscillation Stop Detection Control Register"]
1788pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
1789
1790impl Ostdcr {
1791    #[doc = "Oscillation Stop Detection Interrupt Enable"]
1792    #[inline(always)]
1793    pub fn ostdie(
1794        self,
1795    ) -> crate::common::RegisterField<
1796        0,
1797        0x1,
1798        1,
1799        0,
1800        ostdcr::Ostdie,
1801        ostdcr::Ostdie,
1802        Ostdcr_SPEC,
1803        crate::common::RW,
1804    > {
1805        crate::common::RegisterField::<
1806            0,
1807            0x1,
1808            1,
1809            0,
1810            ostdcr::Ostdie,
1811            ostdcr::Ostdie,
1812            Ostdcr_SPEC,
1813            crate::common::RW,
1814        >::from_register(self, 0)
1815    }
1816
1817    #[doc = "Oscillation Stop Detection Function Enable"]
1818    #[inline(always)]
1819    pub fn ostde(
1820        self,
1821    ) -> crate::common::RegisterField<
1822        7,
1823        0x1,
1824        1,
1825        0,
1826        ostdcr::Ostde,
1827        ostdcr::Ostde,
1828        Ostdcr_SPEC,
1829        crate::common::RW,
1830    > {
1831        crate::common::RegisterField::<
1832            7,
1833            0x1,
1834            1,
1835            0,
1836            ostdcr::Ostde,
1837            ostdcr::Ostde,
1838            Ostdcr_SPEC,
1839            crate::common::RW,
1840        >::from_register(self, 0)
1841    }
1842}
1843impl ::core::default::Default for Ostdcr {
1844    #[inline(always)]
1845    fn default() -> Ostdcr {
1846        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
1847    }
1848}
1849pub mod ostdcr {
1850
1851    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1852    pub struct Ostdie_SPEC;
1853    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
1854    impl Ostdie {
1855        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
1856        pub const _0: Self = Self::new(0);
1857
1858        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
1859        pub const _1: Self = Self::new(1);
1860    }
1861    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1862    pub struct Ostde_SPEC;
1863    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
1864    impl Ostde {
1865        #[doc = "Disable oscillation stop detection function"]
1866        pub const _0: Self = Self::new(0);
1867
1868        #[doc = "Enable oscillation stop detection function"]
1869        pub const _1: Self = Self::new(1);
1870    }
1871}
1872#[doc(hidden)]
1873#[derive(Copy, Clone, Eq, PartialEq)]
1874pub struct Ostdsr_SPEC;
1875impl crate::sealed::RegSpec for Ostdsr_SPEC {
1876    type DataType = u8;
1877}
1878
1879#[doc = "Oscillation Stop Detection Status Register"]
1880pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
1881
1882impl Ostdsr {
1883    #[doc = "Oscillation Stop Detection Flag"]
1884    #[inline(always)]
1885    pub fn ostdf(
1886        self,
1887    ) -> crate::common::RegisterField<
1888        0,
1889        0x1,
1890        1,
1891        0,
1892        ostdsr::Ostdf,
1893        ostdsr::Ostdf,
1894        Ostdsr_SPEC,
1895        crate::common::RW,
1896    > {
1897        crate::common::RegisterField::<
1898            0,
1899            0x1,
1900            1,
1901            0,
1902            ostdsr::Ostdf,
1903            ostdsr::Ostdf,
1904            Ostdsr_SPEC,
1905            crate::common::RW,
1906        >::from_register(self, 0)
1907    }
1908}
1909impl ::core::default::Default for Ostdsr {
1910    #[inline(always)]
1911    fn default() -> Ostdsr {
1912        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
1913    }
1914}
1915pub mod ostdsr {
1916
1917    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1918    pub struct Ostdf_SPEC;
1919    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
1920    impl Ostdf {
1921        #[doc = "Main clock oscillation stop not detected"]
1922        pub const _0: Self = Self::new(0);
1923
1924        #[doc = "Main clock oscillation stop detected"]
1925        pub const _1: Self = Self::new(1);
1926    }
1927}
1928#[doc(hidden)]
1929#[derive(Copy, Clone, Eq, PartialEq)]
1930pub struct Lpopt_SPEC;
1931impl crate::sealed::RegSpec for Lpopt_SPEC {
1932    type DataType = u8;
1933}
1934
1935#[doc = "Lower Power Operation Control Register"]
1936pub type Lpopt = crate::RegValueT<Lpopt_SPEC>;
1937
1938impl Lpopt {
1939    #[doc = "MPU Clock Disable Control"]
1940    #[inline(always)]
1941    pub fn mpudis(
1942        self,
1943    ) -> crate::common::RegisterField<
1944        0,
1945        0x1,
1946        1,
1947        0,
1948        lpopt::Mpudis,
1949        lpopt::Mpudis,
1950        Lpopt_SPEC,
1951        crate::common::RW,
1952    > {
1953        crate::common::RegisterField::<
1954            0,
1955            0x1,
1956            1,
1957            0,
1958            lpopt::Mpudis,
1959            lpopt::Mpudis,
1960            Lpopt_SPEC,
1961            crate::common::RW,
1962        >::from_register(self, 0)
1963    }
1964
1965    #[doc = "Debug Clock Disable Control"]
1966    #[inline(always)]
1967    pub fn dclkdis(
1968        self,
1969    ) -> crate::common::RegisterField<
1970        1,
1971        0x3,
1972        1,
1973        0,
1974        lpopt::Dclkdis,
1975        lpopt::Dclkdis,
1976        Lpopt_SPEC,
1977        crate::common::RW,
1978    > {
1979        crate::common::RegisterField::<
1980            1,
1981            0x3,
1982            1,
1983            0,
1984            lpopt::Dclkdis,
1985            lpopt::Dclkdis,
1986            Lpopt_SPEC,
1987            crate::common::RW,
1988        >::from_register(self, 0)
1989    }
1990
1991    #[doc = "BPF Clock Disable Control"]
1992    #[inline(always)]
1993    pub fn bpfclkdis(
1994        self,
1995    ) -> crate::common::RegisterField<
1996        3,
1997        0x1,
1998        1,
1999        0,
2000        lpopt::Bpfclkdis,
2001        lpopt::Bpfclkdis,
2002        Lpopt_SPEC,
2003        crate::common::RW,
2004    > {
2005        crate::common::RegisterField::<
2006            3,
2007            0x1,
2008            1,
2009            0,
2010            lpopt::Bpfclkdis,
2011            lpopt::Bpfclkdis,
2012            Lpopt_SPEC,
2013            crate::common::RW,
2014        >::from_register(self, 0)
2015    }
2016
2017    #[doc = "Lower Power Operation Enable"]
2018    #[inline(always)]
2019    pub fn lpopten(
2020        self,
2021    ) -> crate::common::RegisterField<
2022        7,
2023        0x1,
2024        1,
2025        0,
2026        lpopt::Lpopten,
2027        lpopt::Lpopten,
2028        Lpopt_SPEC,
2029        crate::common::RW,
2030    > {
2031        crate::common::RegisterField::<
2032            7,
2033            0x1,
2034            1,
2035            0,
2036            lpopt::Lpopten,
2037            lpopt::Lpopten,
2038            Lpopt_SPEC,
2039            crate::common::RW,
2040        >::from_register(self, 0)
2041    }
2042}
2043impl ::core::default::Default for Lpopt {
2044    #[inline(always)]
2045    fn default() -> Lpopt {
2046        <crate::RegValueT<Lpopt_SPEC> as RegisterValue<_>>::new(64)
2047    }
2048}
2049pub mod lpopt {
2050
2051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2052    pub struct Mpudis_SPEC;
2053    pub type Mpudis = crate::EnumBitfieldStruct<u8, Mpudis_SPEC>;
2054    impl Mpudis {
2055        #[doc = "MPU operates as normal"]
2056        pub const _0: Self = Self::new(0);
2057
2058        #[doc = "MPU operate clock stops (MPU function disable)."]
2059        pub const _1: Self = Self::new(1);
2060    }
2061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2062    pub struct Dclkdis_SPEC;
2063    pub type Dclkdis = crate::EnumBitfieldStruct<u8, Dclkdis_SPEC>;
2064    impl Dclkdis {
2065        #[doc = "Debug clock does not stop"]
2066        pub const _00: Self = Self::new(0);
2067    }
2068    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2069    pub struct Bpfclkdis_SPEC;
2070    pub type Bpfclkdis = crate::EnumBitfieldStruct<u8, Bpfclkdis_SPEC>;
2071    impl Bpfclkdis {
2072        #[doc = "Flash register R/W clock operates as normal"]
2073        pub const _0: Self = Self::new(0);
2074
2075        #[doc = "Flash register R/W clock stops."]
2076        pub const _1: Self = Self::new(1);
2077    }
2078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2079    pub struct Lpopten_SPEC;
2080    pub type Lpopten = crate::EnumBitfieldStruct<u8, Lpopten_SPEC>;
2081    impl Lpopten {
2082        #[doc = "All lower power counter measure disable"]
2083        pub const _0: Self = Self::new(0);
2084
2085        #[doc = "All lower power counter measure enable"]
2086        pub const _1: Self = Self::new(1);
2087    }
2088}
2089#[doc(hidden)]
2090#[derive(Copy, Clone, Eq, PartialEq)]
2091pub struct Slcdsckcr_SPEC;
2092impl crate::sealed::RegSpec for Slcdsckcr_SPEC {
2093    type DataType = u8;
2094}
2095
2096#[doc = "Segment LCD Source Clock Control Register"]
2097pub type Slcdsckcr = crate::RegValueT<Slcdsckcr_SPEC>;
2098
2099impl Slcdsckcr {
2100    #[doc = "LCD Source Clock (LCDSRCCLK) Select"]
2101    #[inline(always)]
2102    pub fn lcdscksel(
2103        self,
2104    ) -> crate::common::RegisterField<
2105        0,
2106        0x7,
2107        1,
2108        0,
2109        slcdsckcr::Lcdscksel,
2110        slcdsckcr::Lcdscksel,
2111        Slcdsckcr_SPEC,
2112        crate::common::RW,
2113    > {
2114        crate::common::RegisterField::<
2115            0,
2116            0x7,
2117            1,
2118            0,
2119            slcdsckcr::Lcdscksel,
2120            slcdsckcr::Lcdscksel,
2121            Slcdsckcr_SPEC,
2122            crate::common::RW,
2123        >::from_register(self, 0)
2124    }
2125
2126    #[doc = "LCD Source Clock Out Enable"]
2127    #[inline(always)]
2128    pub fn lcdscken(
2129        self,
2130    ) -> crate::common::RegisterField<
2131        7,
2132        0x1,
2133        1,
2134        0,
2135        slcdsckcr::Lcdscken,
2136        slcdsckcr::Lcdscken,
2137        Slcdsckcr_SPEC,
2138        crate::common::RW,
2139    > {
2140        crate::common::RegisterField::<
2141            7,
2142            0x1,
2143            1,
2144            0,
2145            slcdsckcr::Lcdscken,
2146            slcdsckcr::Lcdscken,
2147            Slcdsckcr_SPEC,
2148            crate::common::RW,
2149        >::from_register(self, 0)
2150    }
2151}
2152impl ::core::default::Default for Slcdsckcr {
2153    #[inline(always)]
2154    fn default() -> Slcdsckcr {
2155        <crate::RegValueT<Slcdsckcr_SPEC> as RegisterValue<_>>::new(0)
2156    }
2157}
2158pub mod slcdsckcr {
2159
2160    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2161    pub struct Lcdscksel_SPEC;
2162    pub type Lcdscksel = crate::EnumBitfieldStruct<u8, Lcdscksel_SPEC>;
2163    impl Lcdscksel {
2164        #[doc = "LOCO"]
2165        pub const _000: Self = Self::new(0);
2166
2167        #[doc = "SOSC"]
2168        pub const _001: Self = Self::new(1);
2169
2170        #[doc = "MOSC"]
2171        pub const _010: Self = Self::new(2);
2172
2173        #[doc = "MOCO"]
2174        pub const _011: Self = Self::new(3);
2175
2176        #[doc = "HOCO"]
2177        pub const _100: Self = Self::new(4);
2178    }
2179    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2180    pub struct Lcdscken_SPEC;
2181    pub type Lcdscken = crate::EnumBitfieldStruct<u8, Lcdscken_SPEC>;
2182    impl Lcdscken {
2183        #[doc = "LCD source clock out disabled"]
2184        pub const _0: Self = Self::new(0);
2185
2186        #[doc = "LCD source clock out enabled"]
2187        pub const _1: Self = Self::new(1);
2188    }
2189}
2190#[doc(hidden)]
2191#[derive(Copy, Clone, Eq, PartialEq)]
2192pub struct Mocoutcr_SPEC;
2193impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2194    type DataType = u8;
2195}
2196
2197#[doc = "MOCO User Trimming Control Register"]
2198pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2199
2200impl Mocoutcr {
2201    #[doc = "MOCO User Trimming"]
2202    #[inline(always)]
2203    pub fn mocoutrm(
2204        self,
2205    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2206        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2207    }
2208}
2209impl ::core::default::Default for Mocoutcr {
2210    #[inline(always)]
2211    fn default() -> Mocoutcr {
2212        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2213    }
2214}
2215
2216#[doc(hidden)]
2217#[derive(Copy, Clone, Eq, PartialEq)]
2218pub struct Hocoutcr_SPEC;
2219impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2220    type DataType = u8;
2221}
2222
2223#[doc = "HOCO User Trimming Control Register"]
2224pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2225
2226impl Hocoutcr {
2227    #[doc = "HOCO User Trimming"]
2228    #[inline(always)]
2229    pub fn hocoutrm(
2230        self,
2231    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2232        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2233    }
2234}
2235impl ::core::default::Default for Hocoutcr {
2236    #[inline(always)]
2237    fn default() -> Hocoutcr {
2238        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2239    }
2240}
2241
2242#[doc(hidden)]
2243#[derive(Copy, Clone, Eq, PartialEq)]
2244pub struct Snzcr_SPEC;
2245impl crate::sealed::RegSpec for Snzcr_SPEC {
2246    type DataType = u8;
2247}
2248
2249#[doc = "Snooze Control Register"]
2250pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
2251
2252impl Snzcr {
2253    #[doc = "RXD0 Snooze Request Enable"]
2254    #[inline(always)]
2255    pub fn rxdreqen(
2256        self,
2257    ) -> crate::common::RegisterField<
2258        0,
2259        0x1,
2260        1,
2261        0,
2262        snzcr::Rxdreqen,
2263        snzcr::Rxdreqen,
2264        Snzcr_SPEC,
2265        crate::common::RW,
2266    > {
2267        crate::common::RegisterField::<
2268            0,
2269            0x1,
2270            1,
2271            0,
2272            snzcr::Rxdreqen,
2273            snzcr::Rxdreqen,
2274            Snzcr_SPEC,
2275            crate::common::RW,
2276        >::from_register(self, 0)
2277    }
2278
2279    #[doc = "DTC Enable in Snooze mode"]
2280    #[inline(always)]
2281    pub fn snzdtcen(
2282        self,
2283    ) -> crate::common::RegisterField<
2284        1,
2285        0x1,
2286        1,
2287        0,
2288        snzcr::Snzdtcen,
2289        snzcr::Snzdtcen,
2290        Snzcr_SPEC,
2291        crate::common::RW,
2292    > {
2293        crate::common::RegisterField::<
2294            1,
2295            0x1,
2296            1,
2297            0,
2298            snzcr::Snzdtcen,
2299            snzcr::Snzdtcen,
2300            Snzcr_SPEC,
2301            crate::common::RW,
2302        >::from_register(self, 0)
2303    }
2304
2305    #[doc = "Snooze mode Enable"]
2306    #[inline(always)]
2307    pub fn snze(
2308        self,
2309    ) -> crate::common::RegisterField<
2310        7,
2311        0x1,
2312        1,
2313        0,
2314        snzcr::Snze,
2315        snzcr::Snze,
2316        Snzcr_SPEC,
2317        crate::common::RW,
2318    > {
2319        crate::common::RegisterField::<
2320            7,
2321            0x1,
2322            1,
2323            0,
2324            snzcr::Snze,
2325            snzcr::Snze,
2326            Snzcr_SPEC,
2327            crate::common::RW,
2328        >::from_register(self, 0)
2329    }
2330}
2331impl ::core::default::Default for Snzcr {
2332    #[inline(always)]
2333    fn default() -> Snzcr {
2334        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
2335    }
2336}
2337pub mod snzcr {
2338
2339    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2340    pub struct Rxdreqen_SPEC;
2341    pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
2342    impl Rxdreqen {
2343        #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
2344        pub const _0: Self = Self::new(0);
2345
2346        #[doc = "Detect RXD0 falling edge in Software Standby mode"]
2347        pub const _1: Self = Self::new(1);
2348    }
2349    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2350    pub struct Snzdtcen_SPEC;
2351    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
2352    impl Snzdtcen {
2353        #[doc = "Disable DTC operation"]
2354        pub const _0: Self = Self::new(0);
2355
2356        #[doc = "Enable DTC operation"]
2357        pub const _1: Self = Self::new(1);
2358    }
2359    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2360    pub struct Snze_SPEC;
2361    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
2362    impl Snze {
2363        #[doc = "Disable Snooze mode"]
2364        pub const _0: Self = Self::new(0);
2365
2366        #[doc = "Enable Snooze mode"]
2367        pub const _1: Self = Self::new(1);
2368    }
2369}
2370#[doc(hidden)]
2371#[derive(Copy, Clone, Eq, PartialEq)]
2372pub struct Snzedcr0_SPEC;
2373impl crate::sealed::RegSpec for Snzedcr0_SPEC {
2374    type DataType = u8;
2375}
2376
2377#[doc = "Snooze End Control Register 0"]
2378pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
2379
2380impl Snzedcr0 {
2381    #[doc = "AGTW1 Underflow Snooze End Enable"]
2382    #[inline(always)]
2383    pub fn agtwunfed(
2384        self,
2385    ) -> crate::common::RegisterField<
2386        0,
2387        0x1,
2388        1,
2389        0,
2390        snzedcr0::Agtwunfed,
2391        snzedcr0::Agtwunfed,
2392        Snzedcr0_SPEC,
2393        crate::common::RW,
2394    > {
2395        crate::common::RegisterField::<
2396            0,
2397            0x1,
2398            1,
2399            0,
2400            snzedcr0::Agtwunfed,
2401            snzedcr0::Agtwunfed,
2402            Snzedcr0_SPEC,
2403            crate::common::RW,
2404        >::from_register(self, 0)
2405    }
2406
2407    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
2408    #[inline(always)]
2409    pub fn dtczred(
2410        self,
2411    ) -> crate::common::RegisterField<
2412        1,
2413        0x1,
2414        1,
2415        0,
2416        snzedcr0::Dtczred,
2417        snzedcr0::Dtczred,
2418        Snzedcr0_SPEC,
2419        crate::common::RW,
2420    > {
2421        crate::common::RegisterField::<
2422            1,
2423            0x1,
2424            1,
2425            0,
2426            snzedcr0::Dtczred,
2427            snzedcr0::Dtczred,
2428            Snzedcr0_SPEC,
2429            crate::common::RW,
2430        >::from_register(self, 0)
2431    }
2432
2433    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
2434    #[inline(always)]
2435    pub fn dtcnzred(
2436        self,
2437    ) -> crate::common::RegisterField<
2438        2,
2439        0x1,
2440        1,
2441        0,
2442        snzedcr0::Dtcnzred,
2443        snzedcr0::Dtcnzred,
2444        Snzedcr0_SPEC,
2445        crate::common::RW,
2446    > {
2447        crate::common::RegisterField::<
2448            2,
2449            0x1,
2450            1,
2451            0,
2452            snzedcr0::Dtcnzred,
2453            snzedcr0::Dtcnzred,
2454            Snzedcr0_SPEC,
2455            crate::common::RW,
2456        >::from_register(self, 0)
2457    }
2458
2459    #[doc = "ADC12 Compare Match Snooze End Enable"]
2460    #[inline(always)]
2461    pub fn ad0mated(
2462        self,
2463    ) -> crate::common::RegisterField<
2464        3,
2465        0x1,
2466        1,
2467        0,
2468        snzedcr0::Ad0Mated,
2469        snzedcr0::Ad0Mated,
2470        Snzedcr0_SPEC,
2471        crate::common::RW,
2472    > {
2473        crate::common::RegisterField::<
2474            3,
2475            0x1,
2476            1,
2477            0,
2478            snzedcr0::Ad0Mated,
2479            snzedcr0::Ad0Mated,
2480            Snzedcr0_SPEC,
2481            crate::common::RW,
2482        >::from_register(self, 0)
2483    }
2484
2485    #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
2486    #[inline(always)]
2487    pub fn ad0umted(
2488        self,
2489    ) -> crate::common::RegisterField<
2490        4,
2491        0x1,
2492        1,
2493        0,
2494        snzedcr0::Ad0Umted,
2495        snzedcr0::Ad0Umted,
2496        Snzedcr0_SPEC,
2497        crate::common::RW,
2498    > {
2499        crate::common::RegisterField::<
2500            4,
2501            0x1,
2502            1,
2503            0,
2504            snzedcr0::Ad0Umted,
2505            snzedcr0::Ad0Umted,
2506            Snzedcr0_SPEC,
2507            crate::common::RW,
2508        >::from_register(self, 0)
2509    }
2510
2511    #[doc = "SCI0 Address Mismatch Snooze End Enable"]
2512    #[inline(always)]
2513    pub fn sci0umted(
2514        self,
2515    ) -> crate::common::RegisterField<
2516        7,
2517        0x1,
2518        1,
2519        0,
2520        snzedcr0::Sci0Umted,
2521        snzedcr0::Sci0Umted,
2522        Snzedcr0_SPEC,
2523        crate::common::RW,
2524    > {
2525        crate::common::RegisterField::<
2526            7,
2527            0x1,
2528            1,
2529            0,
2530            snzedcr0::Sci0Umted,
2531            snzedcr0::Sci0Umted,
2532            Snzedcr0_SPEC,
2533            crate::common::RW,
2534        >::from_register(self, 0)
2535    }
2536}
2537impl ::core::default::Default for Snzedcr0 {
2538    #[inline(always)]
2539    fn default() -> Snzedcr0 {
2540        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
2541    }
2542}
2543pub mod snzedcr0 {
2544
2545    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2546    pub struct Agtwunfed_SPEC;
2547    pub type Agtwunfed = crate::EnumBitfieldStruct<u8, Agtwunfed_SPEC>;
2548    impl Agtwunfed {
2549        #[doc = "Disable the snooze end request"]
2550        pub const _0: Self = Self::new(0);
2551
2552        #[doc = "Enable the snooze end request"]
2553        pub const _1: Self = Self::new(1);
2554    }
2555    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2556    pub struct Dtczred_SPEC;
2557    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
2558    impl Dtczred {
2559        #[doc = "Disable the snooze end request"]
2560        pub const _0: Self = Self::new(0);
2561
2562        #[doc = "Enable the snooze end request"]
2563        pub const _1: Self = Self::new(1);
2564    }
2565    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2566    pub struct Dtcnzred_SPEC;
2567    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
2568    impl Dtcnzred {
2569        #[doc = "Disable the snooze end request"]
2570        pub const _0: Self = Self::new(0);
2571
2572        #[doc = "Enable the snooze end request"]
2573        pub const _1: Self = Self::new(1);
2574    }
2575    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2576    pub struct Ad0Mated_SPEC;
2577    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
2578    impl Ad0Mated {
2579        #[doc = "Disable the snooze end request"]
2580        pub const _0: Self = Self::new(0);
2581
2582        #[doc = "Enable the snooze end request"]
2583        pub const _1: Self = Self::new(1);
2584    }
2585    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2586    pub struct Ad0Umted_SPEC;
2587    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
2588    impl Ad0Umted {
2589        #[doc = "Disable the snooze end request"]
2590        pub const _0: Self = Self::new(0);
2591
2592        #[doc = "Enable the snooze end request"]
2593        pub const _1: Self = Self::new(1);
2594    }
2595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2596    pub struct Sci0Umted_SPEC;
2597    pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
2598    impl Sci0Umted {
2599        #[doc = "Disable the snooze end request"]
2600        pub const _0: Self = Self::new(0);
2601
2602        #[doc = "Enable the snooze end request"]
2603        pub const _1: Self = Self::new(1);
2604    }
2605}
2606#[doc(hidden)]
2607#[derive(Copy, Clone, Eq, PartialEq)]
2608pub struct Snzreqcr0_SPEC;
2609impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
2610    type DataType = u32;
2611}
2612
2613#[doc = "Snooze Request Control Register 0"]
2614pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
2615
2616impl Snzreqcr0 {
2617    #[doc = "Enable IRQ0 Pin Snooze Request"]
2618    #[inline(always)]
2619    pub fn snzreqen0(
2620        self,
2621    ) -> crate::common::RegisterField<
2622        0,
2623        0x1,
2624        1,
2625        0,
2626        snzreqcr0::Snzreqen0,
2627        snzreqcr0::Snzreqen0,
2628        Snzreqcr0_SPEC,
2629        crate::common::RW,
2630    > {
2631        crate::common::RegisterField::<
2632            0,
2633            0x1,
2634            1,
2635            0,
2636            snzreqcr0::Snzreqen0,
2637            snzreqcr0::Snzreqen0,
2638            Snzreqcr0_SPEC,
2639            crate::common::RW,
2640        >::from_register(self, 0)
2641    }
2642
2643    #[doc = "Enable IRQ1 Pin Snooze Request"]
2644    #[inline(always)]
2645    pub fn snzreqen1(
2646        self,
2647    ) -> crate::common::RegisterField<
2648        1,
2649        0x1,
2650        1,
2651        0,
2652        snzreqcr0::Snzreqen1,
2653        snzreqcr0::Snzreqen1,
2654        Snzreqcr0_SPEC,
2655        crate::common::RW,
2656    > {
2657        crate::common::RegisterField::<
2658            1,
2659            0x1,
2660            1,
2661            0,
2662            snzreqcr0::Snzreqen1,
2663            snzreqcr0::Snzreqen1,
2664            Snzreqcr0_SPEC,
2665            crate::common::RW,
2666        >::from_register(self, 0)
2667    }
2668
2669    #[doc = "Enable IRQ2 Pin Snooze Request"]
2670    #[inline(always)]
2671    pub fn snzreqen2(
2672        self,
2673    ) -> crate::common::RegisterField<
2674        2,
2675        0x1,
2676        1,
2677        0,
2678        snzreqcr0::Snzreqen2,
2679        snzreqcr0::Snzreqen2,
2680        Snzreqcr0_SPEC,
2681        crate::common::RW,
2682    > {
2683        crate::common::RegisterField::<
2684            2,
2685            0x1,
2686            1,
2687            0,
2688            snzreqcr0::Snzreqen2,
2689            snzreqcr0::Snzreqen2,
2690            Snzreqcr0_SPEC,
2691            crate::common::RW,
2692        >::from_register(self, 0)
2693    }
2694
2695    #[doc = "Enable IRQ3 Pin Snooze Request"]
2696    #[inline(always)]
2697    pub fn snzreqen3(
2698        self,
2699    ) -> crate::common::RegisterField<
2700        3,
2701        0x1,
2702        1,
2703        0,
2704        snzreqcr0::Snzreqen3,
2705        snzreqcr0::Snzreqen3,
2706        Snzreqcr0_SPEC,
2707        crate::common::RW,
2708    > {
2709        crate::common::RegisterField::<
2710            3,
2711            0x1,
2712            1,
2713            0,
2714            snzreqcr0::Snzreqen3,
2715            snzreqcr0::Snzreqen3,
2716            Snzreqcr0_SPEC,
2717            crate::common::RW,
2718        >::from_register(self, 0)
2719    }
2720
2721    #[doc = "Enable IRQ4 Pin Snooze Request"]
2722    #[inline(always)]
2723    pub fn snzreqen4(
2724        self,
2725    ) -> crate::common::RegisterField<
2726        4,
2727        0x1,
2728        1,
2729        0,
2730        snzreqcr0::Snzreqen4,
2731        snzreqcr0::Snzreqen4,
2732        Snzreqcr0_SPEC,
2733        crate::common::RW,
2734    > {
2735        crate::common::RegisterField::<
2736            4,
2737            0x1,
2738            1,
2739            0,
2740            snzreqcr0::Snzreqen4,
2741            snzreqcr0::Snzreqen4,
2742            Snzreqcr0_SPEC,
2743            crate::common::RW,
2744        >::from_register(self, 0)
2745    }
2746
2747    #[doc = "Enable IRQ5 Pin Snooze Request"]
2748    #[inline(always)]
2749    pub fn snzreqen5(
2750        self,
2751    ) -> crate::common::RegisterField<
2752        5,
2753        0x1,
2754        1,
2755        0,
2756        snzreqcr0::Snzreqen5,
2757        snzreqcr0::Snzreqen5,
2758        Snzreqcr0_SPEC,
2759        crate::common::RW,
2760    > {
2761        crate::common::RegisterField::<
2762            5,
2763            0x1,
2764            1,
2765            0,
2766            snzreqcr0::Snzreqen5,
2767            snzreqcr0::Snzreqen5,
2768            Snzreqcr0_SPEC,
2769            crate::common::RW,
2770        >::from_register(self, 0)
2771    }
2772
2773    #[doc = "Enable IRQ6 Pin Snooze Request"]
2774    #[inline(always)]
2775    pub fn snzreqen6(
2776        self,
2777    ) -> crate::common::RegisterField<
2778        6,
2779        0x1,
2780        1,
2781        0,
2782        snzreqcr0::Snzreqen6,
2783        snzreqcr0::Snzreqen6,
2784        Snzreqcr0_SPEC,
2785        crate::common::RW,
2786    > {
2787        crate::common::RegisterField::<
2788            6,
2789            0x1,
2790            1,
2791            0,
2792            snzreqcr0::Snzreqen6,
2793            snzreqcr0::Snzreqen6,
2794            Snzreqcr0_SPEC,
2795            crate::common::RW,
2796        >::from_register(self, 0)
2797    }
2798
2799    #[doc = "Enable IRQ7 Pin Snooze Request"]
2800    #[inline(always)]
2801    pub fn snzreqen7(
2802        self,
2803    ) -> crate::common::RegisterField<
2804        7,
2805        0x1,
2806        1,
2807        0,
2808        snzreqcr0::Snzreqen7,
2809        snzreqcr0::Snzreqen7,
2810        Snzreqcr0_SPEC,
2811        crate::common::RW,
2812    > {
2813        crate::common::RegisterField::<
2814            7,
2815            0x1,
2816            1,
2817            0,
2818            snzreqcr0::Snzreqen7,
2819            snzreqcr0::Snzreqen7,
2820            Snzreqcr0_SPEC,
2821            crate::common::RW,
2822        >::from_register(self, 0)
2823    }
2824
2825    #[doc = "Enable IRQ8 Pin Snooze Request"]
2826    #[inline(always)]
2827    pub fn snzreqen8(
2828        self,
2829    ) -> crate::common::RegisterField<
2830        8,
2831        0x1,
2832        1,
2833        0,
2834        snzreqcr0::Snzreqen8,
2835        snzreqcr0::Snzreqen8,
2836        Snzreqcr0_SPEC,
2837        crate::common::RW,
2838    > {
2839        crate::common::RegisterField::<
2840            8,
2841            0x1,
2842            1,
2843            0,
2844            snzreqcr0::Snzreqen8,
2845            snzreqcr0::Snzreqen8,
2846            Snzreqcr0_SPEC,
2847            crate::common::RW,
2848        >::from_register(self, 0)
2849    }
2850
2851    #[doc = "Enable IRQ9 Pin Snooze Request"]
2852    #[inline(always)]
2853    pub fn snzreqen9(
2854        self,
2855    ) -> crate::common::RegisterField<
2856        9,
2857        0x1,
2858        1,
2859        0,
2860        snzreqcr0::Snzreqen9,
2861        snzreqcr0::Snzreqen9,
2862        Snzreqcr0_SPEC,
2863        crate::common::RW,
2864    > {
2865        crate::common::RegisterField::<
2866            9,
2867            0x1,
2868            1,
2869            0,
2870            snzreqcr0::Snzreqen9,
2871            snzreqcr0::Snzreqen9,
2872            Snzreqcr0_SPEC,
2873            crate::common::RW,
2874        >::from_register(self, 0)
2875    }
2876
2877    #[doc = "Enable IRQ10 Pin Snooze Request"]
2878    #[inline(always)]
2879    pub fn snzreqen10(
2880        self,
2881    ) -> crate::common::RegisterField<
2882        10,
2883        0x1,
2884        1,
2885        0,
2886        snzreqcr0::Snzreqen10,
2887        snzreqcr0::Snzreqen10,
2888        Snzreqcr0_SPEC,
2889        crate::common::RW,
2890    > {
2891        crate::common::RegisterField::<
2892            10,
2893            0x1,
2894            1,
2895            0,
2896            snzreqcr0::Snzreqen10,
2897            snzreqcr0::Snzreqen10,
2898            Snzreqcr0_SPEC,
2899            crate::common::RW,
2900        >::from_register(self, 0)
2901    }
2902
2903    #[doc = "Enable IRQ11 Pin Snooze Request"]
2904    #[inline(always)]
2905    pub fn snzreqen11(
2906        self,
2907    ) -> crate::common::RegisterField<
2908        11,
2909        0x1,
2910        1,
2911        0,
2912        snzreqcr0::Snzreqen11,
2913        snzreqcr0::Snzreqen11,
2914        Snzreqcr0_SPEC,
2915        crate::common::RW,
2916    > {
2917        crate::common::RegisterField::<
2918            11,
2919            0x1,
2920            1,
2921            0,
2922            snzreqcr0::Snzreqen11,
2923            snzreqcr0::Snzreqen11,
2924            Snzreqcr0_SPEC,
2925            crate::common::RW,
2926        >::from_register(self, 0)
2927    }
2928
2929    #[doc = "Enable RTC Alarm 1 Snooze Request"]
2930    #[inline(always)]
2931    pub fn snzreqen23(
2932        self,
2933    ) -> crate::common::RegisterField<
2934        23,
2935        0x1,
2936        1,
2937        0,
2938        snzreqcr0::Snzreqen23,
2939        snzreqcr0::Snzreqen23,
2940        Snzreqcr0_SPEC,
2941        crate::common::RW,
2942    > {
2943        crate::common::RegisterField::<
2944            23,
2945            0x1,
2946            1,
2947            0,
2948            snzreqcr0::Snzreqen23,
2949            snzreqcr0::Snzreqen23,
2950            Snzreqcr0_SPEC,
2951            crate::common::RW,
2952        >::from_register(self, 0)
2953    }
2954
2955    #[doc = "Enable RTC Alarm 0 Snooze Request"]
2956    #[inline(always)]
2957    pub fn snzreqen24(
2958        self,
2959    ) -> crate::common::RegisterField<
2960        24,
2961        0x1,
2962        1,
2963        0,
2964        snzreqcr0::Snzreqen24,
2965        snzreqcr0::Snzreqen24,
2966        Snzreqcr0_SPEC,
2967        crate::common::RW,
2968    > {
2969        crate::common::RegisterField::<
2970            24,
2971            0x1,
2972            1,
2973            0,
2974            snzreqcr0::Snzreqen24,
2975            snzreqcr0::Snzreqen24,
2976            Snzreqcr0_SPEC,
2977            crate::common::RW,
2978        >::from_register(self, 0)
2979    }
2980
2981    #[doc = "Enable RTC Period Snooze Request"]
2982    #[inline(always)]
2983    pub fn snzreqen25(
2984        self,
2985    ) -> crate::common::RegisterField<
2986        25,
2987        0x1,
2988        1,
2989        0,
2990        snzreqcr0::Snzreqen25,
2991        snzreqcr0::Snzreqen25,
2992        Snzreqcr0_SPEC,
2993        crate::common::RW,
2994    > {
2995        crate::common::RegisterField::<
2996            25,
2997            0x1,
2998            1,
2999            0,
3000            snzreqcr0::Snzreqen25,
3001            snzreqcr0::Snzreqen25,
3002            Snzreqcr0_SPEC,
3003            crate::common::RW,
3004        >::from_register(self, 0)
3005    }
3006
3007    #[doc = "Enable AGTW1 Underflow Snooze Request"]
3008    #[inline(always)]
3009    pub fn snzreqen28(
3010        self,
3011    ) -> crate::common::RegisterField<
3012        28,
3013        0x1,
3014        1,
3015        0,
3016        snzreqcr0::Snzreqen28,
3017        snzreqcr0::Snzreqen28,
3018        Snzreqcr0_SPEC,
3019        crate::common::RW,
3020    > {
3021        crate::common::RegisterField::<
3022            28,
3023            0x1,
3024            1,
3025            0,
3026            snzreqcr0::Snzreqen28,
3027            snzreqcr0::Snzreqen28,
3028            Snzreqcr0_SPEC,
3029            crate::common::RW,
3030        >::from_register(self, 0)
3031    }
3032
3033    #[doc = "Enable AGTW1 Compare Match A Snooze Request"]
3034    #[inline(always)]
3035    pub fn snzreqen29(
3036        self,
3037    ) -> crate::common::RegisterField<
3038        29,
3039        0x1,
3040        1,
3041        0,
3042        snzreqcr0::Snzreqen29,
3043        snzreqcr0::Snzreqen29,
3044        Snzreqcr0_SPEC,
3045        crate::common::RW,
3046    > {
3047        crate::common::RegisterField::<
3048            29,
3049            0x1,
3050            1,
3051            0,
3052            snzreqcr0::Snzreqen29,
3053            snzreqcr0::Snzreqen29,
3054            Snzreqcr0_SPEC,
3055            crate::common::RW,
3056        >::from_register(self, 0)
3057    }
3058
3059    #[doc = "Enable AGTW1 Compare Match B Snooze Request"]
3060    #[inline(always)]
3061    pub fn snzreqen30(
3062        self,
3063    ) -> crate::common::RegisterField<
3064        30,
3065        0x1,
3066        1,
3067        0,
3068        snzreqcr0::Snzreqen30,
3069        snzreqcr0::Snzreqen30,
3070        Snzreqcr0_SPEC,
3071        crate::common::RW,
3072    > {
3073        crate::common::RegisterField::<
3074            30,
3075            0x1,
3076            1,
3077            0,
3078            snzreqcr0::Snzreqen30,
3079            snzreqcr0::Snzreqen30,
3080            Snzreqcr0_SPEC,
3081            crate::common::RW,
3082        >::from_register(self, 0)
3083    }
3084}
3085impl ::core::default::Default for Snzreqcr0 {
3086    #[inline(always)]
3087    fn default() -> Snzreqcr0 {
3088        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3089    }
3090}
3091pub mod snzreqcr0 {
3092
3093    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3094    pub struct Snzreqen0_SPEC;
3095    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3096    impl Snzreqen0 {
3097        #[doc = "Disable the snooze request"]
3098        pub const _0: Self = Self::new(0);
3099
3100        #[doc = "Enable the snooze request"]
3101        pub const _1: Self = Self::new(1);
3102    }
3103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3104    pub struct Snzreqen1_SPEC;
3105    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3106    impl Snzreqen1 {
3107        #[doc = "Disable the snooze request"]
3108        pub const _0: Self = Self::new(0);
3109
3110        #[doc = "Enable the snooze request"]
3111        pub const _1: Self = Self::new(1);
3112    }
3113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3114    pub struct Snzreqen2_SPEC;
3115    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3116    impl Snzreqen2 {
3117        #[doc = "Disable the snooze request"]
3118        pub const _0: Self = Self::new(0);
3119
3120        #[doc = "Enable the snooze request"]
3121        pub const _1: Self = Self::new(1);
3122    }
3123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3124    pub struct Snzreqen3_SPEC;
3125    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3126    impl Snzreqen3 {
3127        #[doc = "Disable the snooze request"]
3128        pub const _0: Self = Self::new(0);
3129
3130        #[doc = "Enable the snooze request"]
3131        pub const _1: Self = Self::new(1);
3132    }
3133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3134    pub struct Snzreqen4_SPEC;
3135    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3136    impl Snzreqen4 {
3137        #[doc = "Disable the snooze request"]
3138        pub const _0: Self = Self::new(0);
3139
3140        #[doc = "Enable the snooze request"]
3141        pub const _1: Self = Self::new(1);
3142    }
3143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3144    pub struct Snzreqen5_SPEC;
3145    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
3146    impl Snzreqen5 {
3147        #[doc = "Disable the snooze request"]
3148        pub const _0: Self = Self::new(0);
3149
3150        #[doc = "Enable the snooze request"]
3151        pub const _1: Self = Self::new(1);
3152    }
3153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3154    pub struct Snzreqen6_SPEC;
3155    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
3156    impl Snzreqen6 {
3157        #[doc = "Disable the snooze request"]
3158        pub const _0: Self = Self::new(0);
3159
3160        #[doc = "Enable the snooze request"]
3161        pub const _1: Self = Self::new(1);
3162    }
3163    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3164    pub struct Snzreqen7_SPEC;
3165    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
3166    impl Snzreqen7 {
3167        #[doc = "Disable the snooze request"]
3168        pub const _0: Self = Self::new(0);
3169
3170        #[doc = "Enable the snooze request"]
3171        pub const _1: Self = Self::new(1);
3172    }
3173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3174    pub struct Snzreqen8_SPEC;
3175    pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
3176    impl Snzreqen8 {
3177        #[doc = "Disable the snooze request"]
3178        pub const _0: Self = Self::new(0);
3179
3180        #[doc = "Enable the snooze request"]
3181        pub const _1: Self = Self::new(1);
3182    }
3183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3184    pub struct Snzreqen9_SPEC;
3185    pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
3186    impl Snzreqen9 {
3187        #[doc = "Disable the snooze request"]
3188        pub const _0: Self = Self::new(0);
3189
3190        #[doc = "Enable the snooze request"]
3191        pub const _1: Self = Self::new(1);
3192    }
3193    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3194    pub struct Snzreqen10_SPEC;
3195    pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
3196    impl Snzreqen10 {
3197        #[doc = "Disable the snooze request"]
3198        pub const _0: Self = Self::new(0);
3199
3200        #[doc = "Enable the snooze request"]
3201        pub const _1: Self = Self::new(1);
3202    }
3203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3204    pub struct Snzreqen11_SPEC;
3205    pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
3206    impl Snzreqen11 {
3207        #[doc = "Disable the snooze request"]
3208        pub const _0: Self = Self::new(0);
3209
3210        #[doc = "Enable the snooze request"]
3211        pub const _1: Self = Self::new(1);
3212    }
3213    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3214    pub struct Snzreqen23_SPEC;
3215    pub type Snzreqen23 = crate::EnumBitfieldStruct<u8, Snzreqen23_SPEC>;
3216    impl Snzreqen23 {
3217        #[doc = "Disable the snooze request"]
3218        pub const _0: Self = Self::new(0);
3219
3220        #[doc = "Enable the snooze request"]
3221        pub const _1: Self = Self::new(1);
3222    }
3223    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3224    pub struct Snzreqen24_SPEC;
3225    pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
3226    impl Snzreqen24 {
3227        #[doc = "Disable the snooze request"]
3228        pub const _0: Self = Self::new(0);
3229
3230        #[doc = "Enable the snooze request"]
3231        pub const _1: Self = Self::new(1);
3232    }
3233    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3234    pub struct Snzreqen25_SPEC;
3235    pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
3236    impl Snzreqen25 {
3237        #[doc = "Disable the snooze request"]
3238        pub const _0: Self = Self::new(0);
3239
3240        #[doc = "Enable the snooze request"]
3241        pub const _1: Self = Self::new(1);
3242    }
3243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3244    pub struct Snzreqen28_SPEC;
3245    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
3246    impl Snzreqen28 {
3247        #[doc = "Disable the snooze request"]
3248        pub const _0: Self = Self::new(0);
3249
3250        #[doc = "Enable the snooze request"]
3251        pub const _1: Self = Self::new(1);
3252    }
3253    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3254    pub struct Snzreqen29_SPEC;
3255    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
3256    impl Snzreqen29 {
3257        #[doc = "Disable the snooze request"]
3258        pub const _0: Self = Self::new(0);
3259
3260        #[doc = "Enable the snooze request"]
3261        pub const _1: Self = Self::new(1);
3262    }
3263    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3264    pub struct Snzreqen30_SPEC;
3265    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
3266    impl Snzreqen30 {
3267        #[doc = "Disable the snooze request"]
3268        pub const _0: Self = Self::new(0);
3269
3270        #[doc = "Enable the snooze request"]
3271        pub const _1: Self = Self::new(1);
3272    }
3273}
3274#[doc(hidden)]
3275#[derive(Copy, Clone, Eq, PartialEq)]
3276pub struct Psmcr_SPEC;
3277impl crate::sealed::RegSpec for Psmcr_SPEC {
3278    type DataType = u8;
3279}
3280
3281#[doc = "Power Save Memory Control Register"]
3282pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
3283
3284impl Psmcr {
3285    #[doc = "Power Save Memory Control"]
3286    #[inline(always)]
3287    pub fn psmc(
3288        self,
3289    ) -> crate::common::RegisterField<
3290        0,
3291        0x3,
3292        1,
3293        0,
3294        psmcr::Psmc,
3295        psmcr::Psmc,
3296        Psmcr_SPEC,
3297        crate::common::RW,
3298    > {
3299        crate::common::RegisterField::<
3300            0,
3301            0x3,
3302            1,
3303            0,
3304            psmcr::Psmc,
3305            psmcr::Psmc,
3306            Psmcr_SPEC,
3307            crate::common::RW,
3308        >::from_register(self, 0)
3309    }
3310}
3311impl ::core::default::Default for Psmcr {
3312    #[inline(always)]
3313    fn default() -> Psmcr {
3314        <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
3315    }
3316}
3317pub mod psmcr {
3318
3319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3320    pub struct Psmc_SPEC;
3321    pub type Psmc = crate::EnumBitfieldStruct<u8, Psmc_SPEC>;
3322    impl Psmc {
3323        #[doc = "All SRAMs are on in Software Standby mode"]
3324        pub const _00: Self = Self::new(0);
3325
3326        #[doc = "8 KB SRAM (0x2000_4000 to 0x2000_5FFF) is on in Software Standby mode"]
3327        pub const _01: Self = Self::new(1);
3328
3329        #[doc = "Setting prohibited"]
3330        pub const _10: Self = Self::new(2);
3331
3332        #[doc = "Setting prohibited"]
3333        pub const _11: Self = Self::new(3);
3334    }
3335}
3336#[doc(hidden)]
3337#[derive(Copy, Clone, Eq, PartialEq)]
3338pub struct Opccr_SPEC;
3339impl crate::sealed::RegSpec for Opccr_SPEC {
3340    type DataType = u8;
3341}
3342
3343#[doc = "Operating Power Control Register"]
3344pub type Opccr = crate::RegValueT<Opccr_SPEC>;
3345
3346impl Opccr {
3347    #[doc = "Operating Power Control Mode Select"]
3348    #[inline(always)]
3349    pub fn opcm(
3350        self,
3351    ) -> crate::common::RegisterField<
3352        0,
3353        0x3,
3354        1,
3355        0,
3356        opccr::Opcm,
3357        opccr::Opcm,
3358        Opccr_SPEC,
3359        crate::common::RW,
3360    > {
3361        crate::common::RegisterField::<
3362            0,
3363            0x3,
3364            1,
3365            0,
3366            opccr::Opcm,
3367            opccr::Opcm,
3368            Opccr_SPEC,
3369            crate::common::RW,
3370        >::from_register(self, 0)
3371    }
3372
3373    #[doc = "Operating Power Control Mode Transition Status Flag"]
3374    #[inline(always)]
3375    pub fn opcmtsf(
3376        self,
3377    ) -> crate::common::RegisterField<
3378        4,
3379        0x1,
3380        1,
3381        0,
3382        opccr::Opcmtsf,
3383        opccr::Opcmtsf,
3384        Opccr_SPEC,
3385        crate::common::R,
3386    > {
3387        crate::common::RegisterField::<
3388            4,
3389            0x1,
3390            1,
3391            0,
3392            opccr::Opcmtsf,
3393            opccr::Opcmtsf,
3394            Opccr_SPEC,
3395            crate::common::R,
3396        >::from_register(self, 0)
3397    }
3398}
3399impl ::core::default::Default for Opccr {
3400    #[inline(always)]
3401    fn default() -> Opccr {
3402        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(1)
3403    }
3404}
3405pub mod opccr {
3406
3407    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3408    pub struct Opcm_SPEC;
3409    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
3410    impl Opcm {
3411        #[doc = "High-speed mode"]
3412        pub const _00: Self = Self::new(0);
3413
3414        #[doc = "Middle-speed mode"]
3415        pub const _01: Self = Self::new(1);
3416
3417        #[doc = "Setting prohibited"]
3418        pub const _10: Self = Self::new(2);
3419
3420        #[doc = "Low-speed mode"]
3421        pub const _11: Self = Self::new(3);
3422    }
3423    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3424    pub struct Opcmtsf_SPEC;
3425    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
3426    impl Opcmtsf {
3427        #[doc = "Transition completed"]
3428        pub const _0: Self = Self::new(0);
3429
3430        #[doc = "During transition"]
3431        pub const _1: Self = Self::new(1);
3432    }
3433}
3434#[doc(hidden)]
3435#[derive(Copy, Clone, Eq, PartialEq)]
3436pub struct Moscwtcr_SPEC;
3437impl crate::sealed::RegSpec for Moscwtcr_SPEC {
3438    type DataType = u8;
3439}
3440
3441#[doc = "Main Clock Oscillator Wait Control Register"]
3442pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
3443
3444impl Moscwtcr {
3445    #[doc = "Main Clock Oscillator Wait Time Setting"]
3446    #[inline(always)]
3447    pub fn msts(
3448        self,
3449    ) -> crate::common::RegisterField<
3450        0,
3451        0xf,
3452        1,
3453        0,
3454        moscwtcr::Msts,
3455        moscwtcr::Msts,
3456        Moscwtcr_SPEC,
3457        crate::common::RW,
3458    > {
3459        crate::common::RegisterField::<
3460            0,
3461            0xf,
3462            1,
3463            0,
3464            moscwtcr::Msts,
3465            moscwtcr::Msts,
3466            Moscwtcr_SPEC,
3467            crate::common::RW,
3468        >::from_register(self, 0)
3469    }
3470}
3471impl ::core::default::Default for Moscwtcr {
3472    #[inline(always)]
3473    fn default() -> Moscwtcr {
3474        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
3475    }
3476}
3477pub mod moscwtcr {
3478
3479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3480    pub struct Msts_SPEC;
3481    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
3482    impl Msts {
3483        #[doc = "Wait time = 2 cycles (0.25 us)"]
3484        pub const _0_X_0: Self = Self::new(0);
3485
3486        #[doc = "Wait time = 1024 cycles (128 us)"]
3487        pub const _0_X_1: Self = Self::new(1);
3488
3489        #[doc = "Wait time = 2048 cycles (256 us)"]
3490        pub const _0_X_2: Self = Self::new(2);
3491
3492        #[doc = "Wait time = 4096 cycles (512 us)"]
3493        pub const _0_X_3: Self = Self::new(3);
3494
3495        #[doc = "Wait time = 8192 cycles (1024 us)"]
3496        pub const _0_X_4: Self = Self::new(4);
3497
3498        #[doc = "Wait time = 16384 cycles (2048 us)"]
3499        pub const _0_X_5: Self = Self::new(5);
3500
3501        #[doc = "Wait time = 32768 cycles (4096 us)"]
3502        pub const _0_X_6: Self = Self::new(6);
3503
3504        #[doc = "Wait time = 65536 cycles (8192 us)"]
3505        pub const _0_X_7: Self = Self::new(7);
3506
3507        #[doc = "Wait time = 131072 cycles (16384 us)"]
3508        pub const _0_X_8: Self = Self::new(8);
3509
3510        #[doc = "Wait time = 262144 cycles (32768 us)"]
3511        pub const _0_X_9: Self = Self::new(9);
3512    }
3513}
3514#[doc(hidden)]
3515#[derive(Copy, Clone, Eq, PartialEq)]
3516pub struct Hocowtcr_SPEC;
3517impl crate::sealed::RegSpec for Hocowtcr_SPEC {
3518    type DataType = u8;
3519}
3520
3521#[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
3522pub type Hocowtcr = crate::RegValueT<Hocowtcr_SPEC>;
3523
3524impl Hocowtcr {
3525    #[doc = "HOCO Wait Time Setting"]
3526    #[inline(always)]
3527    pub fn hsts(
3528        self,
3529    ) -> crate::common::RegisterField<
3530        0,
3531        0x7,
3532        1,
3533        0,
3534        hocowtcr::Hsts,
3535        hocowtcr::Hsts,
3536        Hocowtcr_SPEC,
3537        crate::common::RW,
3538    > {
3539        crate::common::RegisterField::<
3540            0,
3541            0x7,
3542            1,
3543            0,
3544            hocowtcr::Hsts,
3545            hocowtcr::Hsts,
3546            Hocowtcr_SPEC,
3547            crate::common::RW,
3548        >::from_register(self, 0)
3549    }
3550}
3551impl ::core::default::Default for Hocowtcr {
3552    #[inline(always)]
3553    fn default() -> Hocowtcr {
3554        <crate::RegValueT<Hocowtcr_SPEC> as RegisterValue<_>>::new(5)
3555    }
3556}
3557pub mod hocowtcr {
3558
3559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3560    pub struct Hsts_SPEC;
3561    pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
3562    impl Hsts {
3563        #[doc = "Value after reset."]
3564        pub const _101: Self = Self::new(5);
3565
3566        #[doc = "Before starting high-speed on-chip oscillator by setting HOCOCR.HCSTP bit, the HSTS\\[2:0\\] bits must be set to 011b beforehand. Wait time = 46 cycles (5.75 µs) Wait time is calculated at MOCO = 8 MHz (typically 0.125 µs)."]
3567        pub const _011: Self = Self::new(3);
3568    }
3569}
3570#[doc(hidden)]
3571#[derive(Copy, Clone, Eq, PartialEq)]
3572pub struct Sopccr_SPEC;
3573impl crate::sealed::RegSpec for Sopccr_SPEC {
3574    type DataType = u8;
3575}
3576
3577#[doc = "Sub Operating Power Control Register"]
3578pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
3579
3580impl Sopccr {
3581    #[doc = "Sub Operating Power Control Mode Select"]
3582    #[inline(always)]
3583    pub fn sopcm(
3584        self,
3585    ) -> crate::common::RegisterField<
3586        0,
3587        0x1,
3588        1,
3589        0,
3590        sopccr::Sopcm,
3591        sopccr::Sopcm,
3592        Sopccr_SPEC,
3593        crate::common::RW,
3594    > {
3595        crate::common::RegisterField::<
3596            0,
3597            0x1,
3598            1,
3599            0,
3600            sopccr::Sopcm,
3601            sopccr::Sopcm,
3602            Sopccr_SPEC,
3603            crate::common::RW,
3604        >::from_register(self, 0)
3605    }
3606
3607    #[doc = "Operating Power Control Mode Transition Status Flag"]
3608    #[inline(always)]
3609    pub fn sopcmtsf(
3610        self,
3611    ) -> crate::common::RegisterField<
3612        4,
3613        0x1,
3614        1,
3615        0,
3616        sopccr::Sopcmtsf,
3617        sopccr::Sopcmtsf,
3618        Sopccr_SPEC,
3619        crate::common::R,
3620    > {
3621        crate::common::RegisterField::<
3622            4,
3623            0x1,
3624            1,
3625            0,
3626            sopccr::Sopcmtsf,
3627            sopccr::Sopcmtsf,
3628            Sopccr_SPEC,
3629            crate::common::R,
3630        >::from_register(self, 0)
3631    }
3632}
3633impl ::core::default::Default for Sopccr {
3634    #[inline(always)]
3635    fn default() -> Sopccr {
3636        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
3637    }
3638}
3639pub mod sopccr {
3640
3641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3642    pub struct Sopcm_SPEC;
3643    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
3644    impl Sopcm {
3645        #[doc = "Other than Subosc-speed mode"]
3646        pub const _0: Self = Self::new(0);
3647
3648        #[doc = "Subosc-speed mode"]
3649        pub const _1: Self = Self::new(1);
3650    }
3651    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3652    pub struct Sopcmtsf_SPEC;
3653    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
3654    impl Sopcmtsf {
3655        #[doc = "Transition completed"]
3656        pub const _0: Self = Self::new(0);
3657
3658        #[doc = "During transition"]
3659        pub const _1: Self = Self::new(1);
3660    }
3661}
3662#[doc(hidden)]
3663#[derive(Copy, Clone, Eq, PartialEq)]
3664pub struct Rstsr1_SPEC;
3665impl crate::sealed::RegSpec for Rstsr1_SPEC {
3666    type DataType = u16;
3667}
3668
3669#[doc = "Reset Status Register 1"]
3670pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
3671
3672impl Rstsr1 {
3673    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
3674    #[inline(always)]
3675    pub fn iwdtrf(
3676        self,
3677    ) -> crate::common::RegisterField<
3678        0,
3679        0x1,
3680        1,
3681        0,
3682        rstsr1::Iwdtrf,
3683        rstsr1::Iwdtrf,
3684        Rstsr1_SPEC,
3685        crate::common::RW,
3686    > {
3687        crate::common::RegisterField::<
3688            0,
3689            0x1,
3690            1,
3691            0,
3692            rstsr1::Iwdtrf,
3693            rstsr1::Iwdtrf,
3694            Rstsr1_SPEC,
3695            crate::common::RW,
3696        >::from_register(self, 0)
3697    }
3698
3699    #[doc = "Watchdog Timer Reset Detect Flag"]
3700    #[inline(always)]
3701    pub fn wdtrf(
3702        self,
3703    ) -> crate::common::RegisterField<
3704        1,
3705        0x1,
3706        1,
3707        0,
3708        rstsr1::Wdtrf,
3709        rstsr1::Wdtrf,
3710        Rstsr1_SPEC,
3711        crate::common::RW,
3712    > {
3713        crate::common::RegisterField::<
3714            1,
3715            0x1,
3716            1,
3717            0,
3718            rstsr1::Wdtrf,
3719            rstsr1::Wdtrf,
3720            Rstsr1_SPEC,
3721            crate::common::RW,
3722        >::from_register(self, 0)
3723    }
3724
3725    #[doc = "Software Reset Detect Flag"]
3726    #[inline(always)]
3727    pub fn swrf(
3728        self,
3729    ) -> crate::common::RegisterField<
3730        2,
3731        0x1,
3732        1,
3733        0,
3734        rstsr1::Swrf,
3735        rstsr1::Swrf,
3736        Rstsr1_SPEC,
3737        crate::common::RW,
3738    > {
3739        crate::common::RegisterField::<
3740            2,
3741            0x1,
3742            1,
3743            0,
3744            rstsr1::Swrf,
3745            rstsr1::Swrf,
3746            Rstsr1_SPEC,
3747            crate::common::RW,
3748        >::from_register(self, 0)
3749    }
3750
3751    #[doc = "SRAM Parity Error Reset Detect Flag"]
3752    #[inline(always)]
3753    pub fn rperf(
3754        self,
3755    ) -> crate::common::RegisterField<
3756        8,
3757        0x1,
3758        1,
3759        0,
3760        rstsr1::Rperf,
3761        rstsr1::Rperf,
3762        Rstsr1_SPEC,
3763        crate::common::RW,
3764    > {
3765        crate::common::RegisterField::<
3766            8,
3767            0x1,
3768            1,
3769            0,
3770            rstsr1::Rperf,
3771            rstsr1::Rperf,
3772            Rstsr1_SPEC,
3773            crate::common::RW,
3774        >::from_register(self, 0)
3775    }
3776
3777    #[doc = "SRAM ECC Error Reset Detect Flag"]
3778    #[inline(always)]
3779    pub fn reerf(
3780        self,
3781    ) -> crate::common::RegisterField<
3782        9,
3783        0x1,
3784        1,
3785        0,
3786        rstsr1::Reerf,
3787        rstsr1::Reerf,
3788        Rstsr1_SPEC,
3789        crate::common::RW,
3790    > {
3791        crate::common::RegisterField::<
3792            9,
3793            0x1,
3794            1,
3795            0,
3796            rstsr1::Reerf,
3797            rstsr1::Reerf,
3798            Rstsr1_SPEC,
3799            crate::common::RW,
3800        >::from_register(self, 0)
3801    }
3802
3803    #[doc = "Bus Slave MPU Error Reset Detect Flag"]
3804    #[inline(always)]
3805    pub fn bussrf(
3806        self,
3807    ) -> crate::common::RegisterField<
3808        10,
3809        0x1,
3810        1,
3811        0,
3812        rstsr1::Bussrf,
3813        rstsr1::Bussrf,
3814        Rstsr1_SPEC,
3815        crate::common::RW,
3816    > {
3817        crate::common::RegisterField::<
3818            10,
3819            0x1,
3820            1,
3821            0,
3822            rstsr1::Bussrf,
3823            rstsr1::Bussrf,
3824            Rstsr1_SPEC,
3825            crate::common::RW,
3826        >::from_register(self, 0)
3827    }
3828
3829    #[doc = "Bus Master MPU Error Reset Detect Flag"]
3830    #[inline(always)]
3831    pub fn busmrf(
3832        self,
3833    ) -> crate::common::RegisterField<
3834        11,
3835        0x1,
3836        1,
3837        0,
3838        rstsr1::Busmrf,
3839        rstsr1::Busmrf,
3840        Rstsr1_SPEC,
3841        crate::common::RW,
3842    > {
3843        crate::common::RegisterField::<
3844            11,
3845            0x1,
3846            1,
3847            0,
3848            rstsr1::Busmrf,
3849            rstsr1::Busmrf,
3850            Rstsr1_SPEC,
3851            crate::common::RW,
3852        >::from_register(self, 0)
3853    }
3854
3855    #[doc = "CPU Stack Pointer Error Reset Detect Flag"]
3856    #[inline(always)]
3857    pub fn sperf(
3858        self,
3859    ) -> crate::common::RegisterField<
3860        12,
3861        0x1,
3862        1,
3863        0,
3864        rstsr1::Sperf,
3865        rstsr1::Sperf,
3866        Rstsr1_SPEC,
3867        crate::common::RW,
3868    > {
3869        crate::common::RegisterField::<
3870            12,
3871            0x1,
3872            1,
3873            0,
3874            rstsr1::Sperf,
3875            rstsr1::Sperf,
3876            Rstsr1_SPEC,
3877            crate::common::RW,
3878        >::from_register(self, 0)
3879    }
3880}
3881impl ::core::default::Default for Rstsr1 {
3882    #[inline(always)]
3883    fn default() -> Rstsr1 {
3884        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
3885    }
3886}
3887pub mod rstsr1 {
3888
3889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3890    pub struct Iwdtrf_SPEC;
3891    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
3892    impl Iwdtrf {
3893        #[doc = "Independent watchdog timer reset not detected"]
3894        pub const _0: Self = Self::new(0);
3895
3896        #[doc = "Independent watchdog timer reset detected"]
3897        pub const _1: Self = Self::new(1);
3898    }
3899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3900    pub struct Wdtrf_SPEC;
3901    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
3902    impl Wdtrf {
3903        #[doc = "Watchdog timer reset not detected"]
3904        pub const _0: Self = Self::new(0);
3905
3906        #[doc = "Watchdog timer reset detected"]
3907        pub const _1: Self = Self::new(1);
3908    }
3909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3910    pub struct Swrf_SPEC;
3911    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
3912    impl Swrf {
3913        #[doc = "Software reset not detected"]
3914        pub const _0: Self = Self::new(0);
3915
3916        #[doc = "Software reset detected"]
3917        pub const _1: Self = Self::new(1);
3918    }
3919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3920    pub struct Rperf_SPEC;
3921    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
3922    impl Rperf {
3923        #[doc = "SRAM parity error reset not detected"]
3924        pub const _0: Self = Self::new(0);
3925
3926        #[doc = "SRAM parity error reset detected"]
3927        pub const _1: Self = Self::new(1);
3928    }
3929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3930    pub struct Reerf_SPEC;
3931    pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
3932    impl Reerf {
3933        #[doc = "SRAM ECC error reset not detected"]
3934        pub const _0: Self = Self::new(0);
3935
3936        #[doc = "SRAM ECC error reset detected"]
3937        pub const _1: Self = Self::new(1);
3938    }
3939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3940    pub struct Bussrf_SPEC;
3941    pub type Bussrf = crate::EnumBitfieldStruct<u8, Bussrf_SPEC>;
3942    impl Bussrf {
3943        #[doc = "Bus slave MPU error reset not detected"]
3944        pub const _0: Self = Self::new(0);
3945
3946        #[doc = "Bus slave MPU error reset detected"]
3947        pub const _1: Self = Self::new(1);
3948    }
3949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3950    pub struct Busmrf_SPEC;
3951    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
3952    impl Busmrf {
3953        #[doc = "Bus master MPU error reset not detected"]
3954        pub const _0: Self = Self::new(0);
3955
3956        #[doc = "Bus master MPU error reset detected"]
3957        pub const _1: Self = Self::new(1);
3958    }
3959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3960    pub struct Sperf_SPEC;
3961    pub type Sperf = crate::EnumBitfieldStruct<u8, Sperf_SPEC>;
3962    impl Sperf {
3963        #[doc = "CPU stack pointer error reset not detected"]
3964        pub const _0: Self = Self::new(0);
3965
3966        #[doc = "CPU stack pointer error reset detected"]
3967        pub const _1: Self = Self::new(1);
3968    }
3969}
3970#[doc(hidden)]
3971#[derive(Copy, Clone, Eq, PartialEq)]
3972pub struct Sdadcckcr_SPEC;
3973impl crate::sealed::RegSpec for Sdadcckcr_SPEC {
3974    type DataType = u8;
3975}
3976
3977#[doc = "24-bit Sigma-delta A/D Converter Clock Control Register"]
3978pub type Sdadcckcr = crate::RegValueT<Sdadcckcr_SPEC>;
3979
3980impl Sdadcckcr {
3981    #[doc = "24-bit Sigma-delta A/D Converter Clock Select"]
3982    #[inline(always)]
3983    pub fn cksel(
3984        self,
3985    ) -> crate::common::RegisterField<
3986        0,
3987        0x3,
3988        1,
3989        0,
3990        sdadcckcr::Cksel,
3991        sdadcckcr::Cksel,
3992        Sdadcckcr_SPEC,
3993        crate::common::RW,
3994    > {
3995        crate::common::RegisterField::<
3996            0,
3997            0x3,
3998            1,
3999            0,
4000            sdadcckcr::Cksel,
4001            sdadcckcr::Cksel,
4002            Sdadcckcr_SPEC,
4003            crate::common::RW,
4004        >::from_register(self, 0)
4005    }
4006
4007    #[doc = "Clock Switch Enable for Oscillation Stop Detected"]
4008    #[inline(always)]
4009    pub fn ostdcse(
4010        self,
4011    ) -> crate::common::RegisterField<
4012        4,
4013        0x1,
4014        1,
4015        0,
4016        sdadcckcr::Ostdcse,
4017        sdadcckcr::Ostdcse,
4018        Sdadcckcr_SPEC,
4019        crate::common::RW,
4020    > {
4021        crate::common::RegisterField::<
4022            4,
4023            0x1,
4024            1,
4025            0,
4026            sdadcckcr::Ostdcse,
4027            sdadcckcr::Ostdcse,
4028            Sdadcckcr_SPEC,
4029            crate::common::RW,
4030        >::from_register(self, 0)
4031    }
4032}
4033impl ::core::default::Default for Sdadcckcr {
4034    #[inline(always)]
4035    fn default() -> Sdadcckcr {
4036        <crate::RegValueT<Sdadcckcr_SPEC> as RegisterValue<_>>::new(0)
4037    }
4038}
4039pub mod sdadcckcr {
4040
4041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4042    pub struct Cksel_SPEC;
4043    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
4044    impl Cksel {
4045        #[doc = "MOSC"]
4046        pub const _00: Self = Self::new(0);
4047
4048        #[doc = "HOCO"]
4049        pub const _01: Self = Self::new(1);
4050
4051        #[doc = "PLL"]
4052        pub const _10: Self = Self::new(2);
4053    }
4054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4055    pub struct Ostdcse_SPEC;
4056    pub type Ostdcse = crate::EnumBitfieldStruct<u8, Ostdcse_SPEC>;
4057    impl Ostdcse {
4058        #[doc = "Not switched to HOCO when oscillation stop detected"]
4059        pub const _0: Self = Self::new(0);
4060
4061        #[doc = "Switched to HOCO, when oscillation stop detected"]
4062        pub const _1: Self = Self::new(1);
4063    }
4064}
4065#[doc(hidden)]
4066#[derive(Copy, Clone, Eq, PartialEq)]
4067pub struct Sostd_SPEC;
4068impl crate::sealed::RegSpec for Sostd_SPEC {
4069    type DataType = u16;
4070}
4071
4072#[doc = "Sub Clock Oscillation Stop Detection Control Register"]
4073pub type Sostd = crate::RegValueT<Sostd_SPEC>;
4074
4075impl Sostd {
4076    #[doc = "Oscillation Stop Detection Time"]
4077    #[inline(always)]
4078    pub fn osdccmp(
4079        self,
4080    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Sostd_SPEC, crate::common::RW> {
4081        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Sostd_SPEC,crate::common::RW>::from_register(self,0)
4082    }
4083
4084    #[doc = "Status of Oscillation Stop Detector Operation"]
4085    #[inline(always)]
4086    pub fn osdcf(
4087        self,
4088    ) -> crate::common::RegisterField<
4089        14,
4090        0x1,
4091        1,
4092        0,
4093        sostd::Osdcf,
4094        sostd::Osdcf,
4095        Sostd_SPEC,
4096        crate::common::R,
4097    > {
4098        crate::common::RegisterField::<
4099            14,
4100            0x1,
4101            1,
4102            0,
4103            sostd::Osdcf,
4104            sostd::Osdcf,
4105            Sostd_SPEC,
4106            crate::common::R,
4107        >::from_register(self, 0)
4108    }
4109
4110    #[doc = "Control of Oscillation Stop Detector Operation"]
4111    #[inline(always)]
4112    pub fn osdce(
4113        self,
4114    ) -> crate::common::RegisterField<
4115        15,
4116        0x1,
4117        1,
4118        0,
4119        sostd::Osdce,
4120        sostd::Osdce,
4121        Sostd_SPEC,
4122        crate::common::RW,
4123    > {
4124        crate::common::RegisterField::<
4125            15,
4126            0x1,
4127            1,
4128            0,
4129            sostd::Osdce,
4130            sostd::Osdce,
4131            Sostd_SPEC,
4132            crate::common::RW,
4133        >::from_register(self, 0)
4134    }
4135}
4136impl ::core::default::Default for Sostd {
4137    #[inline(always)]
4138    fn default() -> Sostd {
4139        <crate::RegValueT<Sostd_SPEC> as RegisterValue<_>>::new(4095)
4140    }
4141}
4142pub mod sostd {
4143
4144    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4145    pub struct Osdcf_SPEC;
4146    pub type Osdcf = crate::EnumBitfieldStruct<u8, Osdcf_SPEC>;
4147    impl Osdcf {
4148        #[doc = "Stop operation of the oscillation stop detector"]
4149        pub const _0: Self = Self::new(0);
4150
4151        #[doc = "Run operation of the oscillation stop detector"]
4152        pub const _1: Self = Self::new(1);
4153    }
4154    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4155    pub struct Osdce_SPEC;
4156    pub type Osdce = crate::EnumBitfieldStruct<u8, Osdce_SPEC>;
4157    impl Osdce {
4158        #[doc = "Stop operation of the oscillation stop detector"]
4159        pub const _0: Self = Self::new(0);
4160
4161        #[doc = "Start operation of the oscillation stop detector"]
4162        pub const _1: Self = Self::new(1);
4163    }
4164}
4165#[doc(hidden)]
4166#[derive(Copy, Clone, Eq, PartialEq)]
4167pub struct Mostd_SPEC;
4168impl crate::sealed::RegSpec for Mostd_SPEC {
4169    type DataType = u16;
4170}
4171
4172#[doc = "Main Oscillation Stop Detection Control Register"]
4173pub type Mostd = crate::RegValueT<Mostd_SPEC>;
4174
4175impl Mostd {
4176    #[doc = "Oscillation Stop Detection Time"]
4177    #[inline(always)]
4178    pub fn osdccmp(
4179        self,
4180    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Mostd_SPEC, crate::common::RW> {
4181        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Mostd_SPEC,crate::common::RW>::from_register(self,0)
4182    }
4183
4184    #[doc = "Status of Oscillation Stop Detector Operation"]
4185    #[inline(always)]
4186    pub fn osdcf(
4187        self,
4188    ) -> crate::common::RegisterField<
4189        14,
4190        0x1,
4191        1,
4192        0,
4193        mostd::Osdcf,
4194        mostd::Osdcf,
4195        Mostd_SPEC,
4196        crate::common::R,
4197    > {
4198        crate::common::RegisterField::<
4199            14,
4200            0x1,
4201            1,
4202            0,
4203            mostd::Osdcf,
4204            mostd::Osdcf,
4205            Mostd_SPEC,
4206            crate::common::R,
4207        >::from_register(self, 0)
4208    }
4209
4210    #[doc = "Control of Oscillation Stop Detector Operation"]
4211    #[inline(always)]
4212    pub fn osdce(
4213        self,
4214    ) -> crate::common::RegisterField<
4215        15,
4216        0x1,
4217        1,
4218        0,
4219        mostd::Osdce,
4220        mostd::Osdce,
4221        Mostd_SPEC,
4222        crate::common::RW,
4223    > {
4224        crate::common::RegisterField::<
4225            15,
4226            0x1,
4227            1,
4228            0,
4229            mostd::Osdce,
4230            mostd::Osdce,
4231            Mostd_SPEC,
4232            crate::common::RW,
4233        >::from_register(self, 0)
4234    }
4235}
4236impl ::core::default::Default for Mostd {
4237    #[inline(always)]
4238    fn default() -> Mostd {
4239        <crate::RegValueT<Mostd_SPEC> as RegisterValue<_>>::new(4095)
4240    }
4241}
4242pub mod mostd {
4243
4244    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4245    pub struct Osdcf_SPEC;
4246    pub type Osdcf = crate::EnumBitfieldStruct<u8, Osdcf_SPEC>;
4247    impl Osdcf {
4248        #[doc = "Stop operation of the oscillation stop detector"]
4249        pub const _0: Self = Self::new(0);
4250
4251        #[doc = "Run operation of the oscillation stop detector"]
4252        pub const _1: Self = Self::new(1);
4253    }
4254    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4255    pub struct Osdce_SPEC;
4256    pub type Osdce = crate::EnumBitfieldStruct<u8, Osdce_SPEC>;
4257    impl Osdce {
4258        #[doc = "Stop operation of the oscillation stop detector"]
4259        pub const _0: Self = Self::new(0);
4260
4261        #[doc = "Start operation of the oscillation stop detector"]
4262        pub const _1: Self = Self::new(1);
4263    }
4264}
4265#[doc(hidden)]
4266#[derive(Copy, Clone, Eq, PartialEq)]
4267pub struct Lvd1Cr1_SPEC;
4268impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4269    type DataType = u8;
4270}
4271
4272#[doc = "Voltage Monitor 1 Circuit Control Register"]
4273pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4274
4275impl Lvd1Cr1 {
4276    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4277    #[inline(always)]
4278    pub fn idtsel(
4279        self,
4280    ) -> crate::common::RegisterField<
4281        0,
4282        0x3,
4283        1,
4284        0,
4285        lvd1cr1::Idtsel,
4286        lvd1cr1::Idtsel,
4287        Lvd1Cr1_SPEC,
4288        crate::common::RW,
4289    > {
4290        crate::common::RegisterField::<
4291            0,
4292            0x3,
4293            1,
4294            0,
4295            lvd1cr1::Idtsel,
4296            lvd1cr1::Idtsel,
4297            Lvd1Cr1_SPEC,
4298            crate::common::RW,
4299        >::from_register(self, 0)
4300    }
4301
4302    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4303    #[inline(always)]
4304    pub fn irqsel(
4305        self,
4306    ) -> crate::common::RegisterField<
4307        2,
4308        0x1,
4309        1,
4310        0,
4311        lvd1cr1::Irqsel,
4312        lvd1cr1::Irqsel,
4313        Lvd1Cr1_SPEC,
4314        crate::common::RW,
4315    > {
4316        crate::common::RegisterField::<
4317            2,
4318            0x1,
4319            1,
4320            0,
4321            lvd1cr1::Irqsel,
4322            lvd1cr1::Irqsel,
4323            Lvd1Cr1_SPEC,
4324            crate::common::RW,
4325        >::from_register(self, 0)
4326    }
4327}
4328impl ::core::default::Default for Lvd1Cr1 {
4329    #[inline(always)]
4330    fn default() -> Lvd1Cr1 {
4331        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4332    }
4333}
4334pub mod lvd1cr1 {
4335
4336    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4337    pub struct Idtsel_SPEC;
4338    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4339    impl Idtsel {
4340        #[doc = "When VCC >= Vdet1 (rise) is detected"]
4341        pub const _00: Self = Self::new(0);
4342
4343        #[doc = "When VCC < Vdet1 (fall) is detected"]
4344        pub const _01: Self = Self::new(1);
4345
4346        #[doc = "When fall and rise are detected"]
4347        pub const _10: Self = Self::new(2);
4348
4349        #[doc = "Settings prohibited"]
4350        pub const _11: Self = Self::new(3);
4351    }
4352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4353    pub struct Irqsel_SPEC;
4354    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4355    impl Irqsel {
4356        #[doc = "Non-maskable interrupt"]
4357        pub const _0: Self = Self::new(0);
4358
4359        #[doc = "Maskable interrupt"]
4360        pub const _1: Self = Self::new(1);
4361    }
4362}
4363#[doc(hidden)]
4364#[derive(Copy, Clone, Eq, PartialEq)]
4365pub struct Lvd1Sr_SPEC;
4366impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4367    type DataType = u8;
4368}
4369
4370#[doc = "Voltage Monitor 1 Circuit Status Register"]
4371pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4372
4373impl Lvd1Sr {
4374    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4375    #[inline(always)]
4376    pub fn det(
4377        self,
4378    ) -> crate::common::RegisterField<
4379        0,
4380        0x1,
4381        1,
4382        0,
4383        lvd1sr::Det,
4384        lvd1sr::Det,
4385        Lvd1Sr_SPEC,
4386        crate::common::RW,
4387    > {
4388        crate::common::RegisterField::<
4389            0,
4390            0x1,
4391            1,
4392            0,
4393            lvd1sr::Det,
4394            lvd1sr::Det,
4395            Lvd1Sr_SPEC,
4396            crate::common::RW,
4397        >::from_register(self, 0)
4398    }
4399
4400    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4401    #[inline(always)]
4402    pub fn mon(
4403        self,
4404    ) -> crate::common::RegisterField<
4405        1,
4406        0x1,
4407        1,
4408        0,
4409        lvd1sr::Mon,
4410        lvd1sr::Mon,
4411        Lvd1Sr_SPEC,
4412        crate::common::R,
4413    > {
4414        crate::common::RegisterField::<
4415            1,
4416            0x1,
4417            1,
4418            0,
4419            lvd1sr::Mon,
4420            lvd1sr::Mon,
4421            Lvd1Sr_SPEC,
4422            crate::common::R,
4423        >::from_register(self, 0)
4424    }
4425}
4426impl ::core::default::Default for Lvd1Sr {
4427    #[inline(always)]
4428    fn default() -> Lvd1Sr {
4429        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4430    }
4431}
4432pub mod lvd1sr {
4433
4434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4435    pub struct Det_SPEC;
4436    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4437    impl Det {
4438        #[doc = "Not detected"]
4439        pub const _0: Self = Self::new(0);
4440
4441        #[doc = "Vdet1 crossing is detected"]
4442        pub const _1: Self = Self::new(1);
4443    }
4444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4445    pub struct Mon_SPEC;
4446    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4447    impl Mon {
4448        #[doc = "VCC < Vdet1"]
4449        pub const _0: Self = Self::new(0);
4450
4451        #[doc = "VCC >= Vdet1 or MON is disabled"]
4452        pub const _1: Self = Self::new(1);
4453    }
4454}
4455#[doc(hidden)]
4456#[derive(Copy, Clone, Eq, PartialEq)]
4457pub struct Lvd2Cr1_SPEC;
4458impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4459    type DataType = u8;
4460}
4461
4462#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4463pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4464
4465impl Lvd2Cr1 {
4466    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4467    #[inline(always)]
4468    pub fn idtsel(
4469        self,
4470    ) -> crate::common::RegisterField<
4471        0,
4472        0x3,
4473        1,
4474        0,
4475        lvd2cr1::Idtsel,
4476        lvd2cr1::Idtsel,
4477        Lvd2Cr1_SPEC,
4478        crate::common::RW,
4479    > {
4480        crate::common::RegisterField::<
4481            0,
4482            0x3,
4483            1,
4484            0,
4485            lvd2cr1::Idtsel,
4486            lvd2cr1::Idtsel,
4487            Lvd2Cr1_SPEC,
4488            crate::common::RW,
4489        >::from_register(self, 0)
4490    }
4491
4492    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4493    #[inline(always)]
4494    pub fn irqsel(
4495        self,
4496    ) -> crate::common::RegisterField<
4497        2,
4498        0x1,
4499        1,
4500        0,
4501        lvd2cr1::Irqsel,
4502        lvd2cr1::Irqsel,
4503        Lvd2Cr1_SPEC,
4504        crate::common::RW,
4505    > {
4506        crate::common::RegisterField::<
4507            2,
4508            0x1,
4509            1,
4510            0,
4511            lvd2cr1::Irqsel,
4512            lvd2cr1::Irqsel,
4513            Lvd2Cr1_SPEC,
4514            crate::common::RW,
4515        >::from_register(self, 0)
4516    }
4517}
4518impl ::core::default::Default for Lvd2Cr1 {
4519    #[inline(always)]
4520    fn default() -> Lvd2Cr1 {
4521        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
4522    }
4523}
4524pub mod lvd2cr1 {
4525
4526    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4527    pub struct Idtsel_SPEC;
4528    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4529    impl Idtsel {
4530        #[doc = "When VCC >= Vdet2 (rise) is detected"]
4531        pub const _00: Self = Self::new(0);
4532
4533        #[doc = "When VCC < Vdet2 (fall) is detected"]
4534        pub const _01: Self = Self::new(1);
4535
4536        #[doc = "When fall and rise are detected"]
4537        pub const _10: Self = Self::new(2);
4538
4539        #[doc = "Settings prohibited"]
4540        pub const _11: Self = Self::new(3);
4541    }
4542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4543    pub struct Irqsel_SPEC;
4544    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4545    impl Irqsel {
4546        #[doc = "Non-maskable interrupt"]
4547        pub const _0: Self = Self::new(0);
4548
4549        #[doc = "Maskable interrupt"]
4550        pub const _1: Self = Self::new(1);
4551    }
4552}
4553#[doc(hidden)]
4554#[derive(Copy, Clone, Eq, PartialEq)]
4555pub struct Lvd2Sr_SPEC;
4556impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
4557    type DataType = u8;
4558}
4559
4560#[doc = "Voltage Monitor 2 Circuit Status Register"]
4561pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
4562
4563impl Lvd2Sr {
4564    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
4565    #[inline(always)]
4566    pub fn det(
4567        self,
4568    ) -> crate::common::RegisterField<
4569        0,
4570        0x1,
4571        1,
4572        0,
4573        lvd2sr::Det,
4574        lvd2sr::Det,
4575        Lvd2Sr_SPEC,
4576        crate::common::RW,
4577    > {
4578        crate::common::RegisterField::<
4579            0,
4580            0x1,
4581            1,
4582            0,
4583            lvd2sr::Det,
4584            lvd2sr::Det,
4585            Lvd2Sr_SPEC,
4586            crate::common::RW,
4587        >::from_register(self, 0)
4588    }
4589
4590    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
4591    #[inline(always)]
4592    pub fn mon(
4593        self,
4594    ) -> crate::common::RegisterField<
4595        1,
4596        0x1,
4597        1,
4598        0,
4599        lvd2sr::Mon,
4600        lvd2sr::Mon,
4601        Lvd2Sr_SPEC,
4602        crate::common::R,
4603    > {
4604        crate::common::RegisterField::<
4605            1,
4606            0x1,
4607            1,
4608            0,
4609            lvd2sr::Mon,
4610            lvd2sr::Mon,
4611            Lvd2Sr_SPEC,
4612            crate::common::R,
4613        >::from_register(self, 0)
4614    }
4615}
4616impl ::core::default::Default for Lvd2Sr {
4617    #[inline(always)]
4618    fn default() -> Lvd2Sr {
4619        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
4620    }
4621}
4622pub mod lvd2sr {
4623
4624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4625    pub struct Det_SPEC;
4626    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4627    impl Det {
4628        #[doc = "Not detected"]
4629        pub const _0: Self = Self::new(0);
4630
4631        #[doc = "Vdet2 crossing is detected"]
4632        pub const _1: Self = Self::new(1);
4633    }
4634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4635    pub struct Mon_SPEC;
4636    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4637    impl Mon {
4638        #[doc = "VCC < Vdet2"]
4639        pub const _0: Self = Self::new(0);
4640
4641        #[doc = "VCC >= Vdet2 or MON is disabled"]
4642        pub const _1: Self = Self::new(1);
4643    }
4644}
4645#[doc(hidden)]
4646#[derive(Copy, Clone, Eq, PartialEq)]
4647pub struct Prcr_SPEC;
4648impl crate::sealed::RegSpec for Prcr_SPEC {
4649    type DataType = u16;
4650}
4651
4652#[doc = "Protect Register"]
4653pub type Prcr = crate::RegValueT<Prcr_SPEC>;
4654
4655impl Prcr {
4656    #[doc = "Enable writing to the registers related to the clock generation circuit"]
4657    #[inline(always)]
4658    pub fn prc0(
4659        self,
4660    ) -> crate::common::RegisterField<
4661        0,
4662        0x1,
4663        1,
4664        0,
4665        prcr::Prc0,
4666        prcr::Prc0,
4667        Prcr_SPEC,
4668        crate::common::RW,
4669    > {
4670        crate::common::RegisterField::<
4671            0,
4672            0x1,
4673            1,
4674            0,
4675            prcr::Prc0,
4676            prcr::Prc0,
4677            Prcr_SPEC,
4678            crate::common::RW,
4679        >::from_register(self, 0)
4680    }
4681
4682    #[doc = "Enable writing to the registers related to the low power modes"]
4683    #[inline(always)]
4684    pub fn prc1(
4685        self,
4686    ) -> crate::common::RegisterField<
4687        1,
4688        0x1,
4689        1,
4690        0,
4691        prcr::Prc1,
4692        prcr::Prc1,
4693        Prcr_SPEC,
4694        crate::common::RW,
4695    > {
4696        crate::common::RegisterField::<
4697            1,
4698            0x1,
4699            1,
4700            0,
4701            prcr::Prc1,
4702            prcr::Prc1,
4703            Prcr_SPEC,
4704            crate::common::RW,
4705        >::from_register(self, 0)
4706    }
4707
4708    #[doc = "Enable writing to the registers related to the LVD"]
4709    #[inline(always)]
4710    pub fn prc3(
4711        self,
4712    ) -> crate::common::RegisterField<
4713        3,
4714        0x1,
4715        1,
4716        0,
4717        prcr::Prc3,
4718        prcr::Prc3,
4719        Prcr_SPEC,
4720        crate::common::RW,
4721    > {
4722        crate::common::RegisterField::<
4723            3,
4724            0x1,
4725            1,
4726            0,
4727            prcr::Prc3,
4728            prcr::Prc3,
4729            Prcr_SPEC,
4730            crate::common::RW,
4731        >::from_register(self, 0)
4732    }
4733
4734    #[doc = "PRC Key Code"]
4735    #[inline(always)]
4736    pub fn prkey(
4737        self,
4738    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
4739        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
4740    }
4741}
4742impl ::core::default::Default for Prcr {
4743    #[inline(always)]
4744    fn default() -> Prcr {
4745        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
4746    }
4747}
4748pub mod prcr {
4749
4750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4751    pub struct Prc0_SPEC;
4752    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
4753    impl Prc0 {
4754        #[doc = "Disable writes"]
4755        pub const _0: Self = Self::new(0);
4756
4757        #[doc = "Enable writes"]
4758        pub const _1: Self = Self::new(1);
4759    }
4760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4761    pub struct Prc1_SPEC;
4762    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
4763    impl Prc1 {
4764        #[doc = "Disable writes"]
4765        pub const _0: Self = Self::new(0);
4766
4767        #[doc = "Enable writes"]
4768        pub const _1: Self = Self::new(1);
4769    }
4770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4771    pub struct Prc3_SPEC;
4772    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
4773    impl Prc3 {
4774        #[doc = "Disable writes"]
4775        pub const _0: Self = Self::new(0);
4776
4777        #[doc = "Enable writes"]
4778        pub const _1: Self = Self::new(1);
4779    }
4780}
4781#[doc(hidden)]
4782#[derive(Copy, Clone, Eq, PartialEq)]
4783pub struct Syocdcr_SPEC;
4784impl crate::sealed::RegSpec for Syocdcr_SPEC {
4785    type DataType = u8;
4786}
4787
4788#[doc = "System Control OCD Control Register"]
4789pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
4790
4791impl Syocdcr {
4792    #[doc = "Debugger Enable bit"]
4793    #[inline(always)]
4794    pub fn dbgen(
4795        self,
4796    ) -> crate::common::RegisterField<
4797        7,
4798        0x1,
4799        1,
4800        0,
4801        syocdcr::Dbgen,
4802        syocdcr::Dbgen,
4803        Syocdcr_SPEC,
4804        crate::common::RW,
4805    > {
4806        crate::common::RegisterField::<
4807            7,
4808            0x1,
4809            1,
4810            0,
4811            syocdcr::Dbgen,
4812            syocdcr::Dbgen,
4813            Syocdcr_SPEC,
4814            crate::common::RW,
4815        >::from_register(self, 0)
4816    }
4817}
4818impl ::core::default::Default for Syocdcr {
4819    #[inline(always)]
4820    fn default() -> Syocdcr {
4821        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
4822    }
4823}
4824pub mod syocdcr {
4825
4826    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4827    pub struct Dbgen_SPEC;
4828    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
4829    impl Dbgen {
4830        #[doc = "On-chip debugger is disabled"]
4831        pub const _0: Self = Self::new(0);
4832
4833        #[doc = "On-chip debugger is enabled"]
4834        pub const _1: Self = Self::new(1);
4835    }
4836}
4837#[doc(hidden)]
4838#[derive(Copy, Clone, Eq, PartialEq)]
4839pub struct Rstsr0_SPEC;
4840impl crate::sealed::RegSpec for Rstsr0_SPEC {
4841    type DataType = u8;
4842}
4843
4844#[doc = "Reset Status Register 0"]
4845pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
4846
4847impl Rstsr0 {
4848    #[doc = "Power-On Reset Detect Flag"]
4849    #[inline(always)]
4850    pub fn porf(
4851        self,
4852    ) -> crate::common::RegisterField<
4853        0,
4854        0x1,
4855        1,
4856        0,
4857        rstsr0::Porf,
4858        rstsr0::Porf,
4859        Rstsr0_SPEC,
4860        crate::common::RW,
4861    > {
4862        crate::common::RegisterField::<
4863            0,
4864            0x1,
4865            1,
4866            0,
4867            rstsr0::Porf,
4868            rstsr0::Porf,
4869            Rstsr0_SPEC,
4870            crate::common::RW,
4871        >::from_register(self, 0)
4872    }
4873
4874    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
4875    #[inline(always)]
4876    pub fn lvd0rf(
4877        self,
4878    ) -> crate::common::RegisterField<
4879        1,
4880        0x1,
4881        1,
4882        0,
4883        rstsr0::Lvd0Rf,
4884        rstsr0::Lvd0Rf,
4885        Rstsr0_SPEC,
4886        crate::common::RW,
4887    > {
4888        crate::common::RegisterField::<
4889            1,
4890            0x1,
4891            1,
4892            0,
4893            rstsr0::Lvd0Rf,
4894            rstsr0::Lvd0Rf,
4895            Rstsr0_SPEC,
4896            crate::common::RW,
4897        >::from_register(self, 0)
4898    }
4899
4900    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
4901    #[inline(always)]
4902    pub fn lvd1rf(
4903        self,
4904    ) -> crate::common::RegisterField<
4905        2,
4906        0x1,
4907        1,
4908        0,
4909        rstsr0::Lvd1Rf,
4910        rstsr0::Lvd1Rf,
4911        Rstsr0_SPEC,
4912        crate::common::RW,
4913    > {
4914        crate::common::RegisterField::<
4915            2,
4916            0x1,
4917            1,
4918            0,
4919            rstsr0::Lvd1Rf,
4920            rstsr0::Lvd1Rf,
4921            Rstsr0_SPEC,
4922            crate::common::RW,
4923        >::from_register(self, 0)
4924    }
4925
4926    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
4927    #[inline(always)]
4928    pub fn lvd2rf(
4929        self,
4930    ) -> crate::common::RegisterField<
4931        3,
4932        0x1,
4933        1,
4934        0,
4935        rstsr0::Lvd2Rf,
4936        rstsr0::Lvd2Rf,
4937        Rstsr0_SPEC,
4938        crate::common::RW,
4939    > {
4940        crate::common::RegisterField::<
4941            3,
4942            0x1,
4943            1,
4944            0,
4945            rstsr0::Lvd2Rf,
4946            rstsr0::Lvd2Rf,
4947            Rstsr0_SPEC,
4948            crate::common::RW,
4949        >::from_register(self, 0)
4950    }
4951}
4952impl ::core::default::Default for Rstsr0 {
4953    #[inline(always)]
4954    fn default() -> Rstsr0 {
4955        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
4956    }
4957}
4958pub mod rstsr0 {
4959
4960    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4961    pub struct Porf_SPEC;
4962    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
4963    impl Porf {
4964        #[doc = "Power-on reset not detected"]
4965        pub const _0: Self = Self::new(0);
4966
4967        #[doc = "Power-on reset detected"]
4968        pub const _1: Self = Self::new(1);
4969    }
4970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4971    pub struct Lvd0Rf_SPEC;
4972    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
4973    impl Lvd0Rf {
4974        #[doc = "Voltage monitor 0 reset not detected"]
4975        pub const _0: Self = Self::new(0);
4976
4977        #[doc = "Voltage monitor 0 reset detected"]
4978        pub const _1: Self = Self::new(1);
4979    }
4980    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4981    pub struct Lvd1Rf_SPEC;
4982    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
4983    impl Lvd1Rf {
4984        #[doc = "Voltage monitor 1 reset not detected"]
4985        pub const _0: Self = Self::new(0);
4986
4987        #[doc = "Voltage monitor 1 reset detected"]
4988        pub const _1: Self = Self::new(1);
4989    }
4990    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4991    pub struct Lvd2Rf_SPEC;
4992    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
4993    impl Lvd2Rf {
4994        #[doc = "Voltage monitor 2 reset not detected"]
4995        pub const _0: Self = Self::new(0);
4996
4997        #[doc = "Voltage monitor 2 reset detected"]
4998        pub const _1: Self = Self::new(1);
4999    }
5000}
5001#[doc(hidden)]
5002#[derive(Copy, Clone, Eq, PartialEq)]
5003pub struct Rstsr2_SPEC;
5004impl crate::sealed::RegSpec for Rstsr2_SPEC {
5005    type DataType = u8;
5006}
5007
5008#[doc = "Reset Status Register 2"]
5009pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
5010
5011impl Rstsr2 {
5012    #[doc = "Cold/Warm Start Determination Flag"]
5013    #[inline(always)]
5014    pub fn cwsf(
5015        self,
5016    ) -> crate::common::RegisterField<
5017        0,
5018        0x1,
5019        1,
5020        0,
5021        rstsr2::Cwsf,
5022        rstsr2::Cwsf,
5023        Rstsr2_SPEC,
5024        crate::common::RW,
5025    > {
5026        crate::common::RegisterField::<
5027            0,
5028            0x1,
5029            1,
5030            0,
5031            rstsr2::Cwsf,
5032            rstsr2::Cwsf,
5033            Rstsr2_SPEC,
5034            crate::common::RW,
5035        >::from_register(self, 0)
5036    }
5037}
5038impl ::core::default::Default for Rstsr2 {
5039    #[inline(always)]
5040    fn default() -> Rstsr2 {
5041        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
5042    }
5043}
5044pub mod rstsr2 {
5045
5046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5047    pub struct Cwsf_SPEC;
5048    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
5049    impl Cwsf {
5050        #[doc = "Cold start"]
5051        pub const _0: Self = Self::new(0);
5052
5053        #[doc = "Warm start"]
5054        pub const _1: Self = Self::new(1);
5055    }
5056}
5057#[doc(hidden)]
5058#[derive(Copy, Clone, Eq, PartialEq)]
5059pub struct Momcr_SPEC;
5060impl crate::sealed::RegSpec for Momcr_SPEC {
5061    type DataType = u8;
5062}
5063
5064#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
5065pub type Momcr = crate::RegValueT<Momcr_SPEC>;
5066
5067impl Momcr {
5068    #[doc = "Main Clock Oscillator Drive Capability 1 Switching"]
5069    #[inline(always)]
5070    pub fn modrv1(
5071        self,
5072    ) -> crate::common::RegisterField<
5073        3,
5074        0x1,
5075        1,
5076        0,
5077        momcr::Modrv1,
5078        momcr::Modrv1,
5079        Momcr_SPEC,
5080        crate::common::RW,
5081    > {
5082        crate::common::RegisterField::<
5083            3,
5084            0x1,
5085            1,
5086            0,
5087            momcr::Modrv1,
5088            momcr::Modrv1,
5089            Momcr_SPEC,
5090            crate::common::RW,
5091        >::from_register(self, 0)
5092    }
5093
5094    #[doc = "Main Clock Oscillator Switching"]
5095    #[inline(always)]
5096    pub fn mosel(
5097        self,
5098    ) -> crate::common::RegisterField<
5099        6,
5100        0x1,
5101        1,
5102        0,
5103        momcr::Mosel,
5104        momcr::Mosel,
5105        Momcr_SPEC,
5106        crate::common::RW,
5107    > {
5108        crate::common::RegisterField::<
5109            6,
5110            0x1,
5111            1,
5112            0,
5113            momcr::Mosel,
5114            momcr::Mosel,
5115            Momcr_SPEC,
5116            crate::common::RW,
5117        >::from_register(self, 0)
5118    }
5119}
5120impl ::core::default::Default for Momcr {
5121    #[inline(always)]
5122    fn default() -> Momcr {
5123        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
5124    }
5125}
5126pub mod momcr {
5127
5128    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5129    pub struct Modrv1_SPEC;
5130    pub type Modrv1 = crate::EnumBitfieldStruct<u8, Modrv1_SPEC>;
5131    impl Modrv1 {
5132        #[doc = "10 MHz to 20 MHz"]
5133        pub const _0: Self = Self::new(0);
5134
5135        #[doc = "1 MHz to 10 MHz"]
5136        pub const _1: Self = Self::new(1);
5137    }
5138    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5139    pub struct Mosel_SPEC;
5140    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
5141    impl Mosel {
5142        #[doc = "Resonator"]
5143        pub const _0: Self = Self::new(0);
5144
5145        #[doc = "External clock input"]
5146        pub const _1: Self = Self::new(1);
5147    }
5148}
5149#[doc(hidden)]
5150#[derive(Copy, Clone, Eq, PartialEq)]
5151pub struct Lvcmpcr_SPEC;
5152impl crate::sealed::RegSpec for Lvcmpcr_SPEC {
5153    type DataType = u8;
5154}
5155
5156#[doc = "Voltage Monitor Circuit Control Register"]
5157pub type Lvcmpcr = crate::RegValueT<Lvcmpcr_SPEC>;
5158
5159impl Lvcmpcr {
5160    #[doc = "Voltage Detection 1 Enable"]
5161    #[inline(always)]
5162    pub fn lvd1e(
5163        self,
5164    ) -> crate::common::RegisterField<
5165        5,
5166        0x1,
5167        1,
5168        0,
5169        lvcmpcr::Lvd1E,
5170        lvcmpcr::Lvd1E,
5171        Lvcmpcr_SPEC,
5172        crate::common::RW,
5173    > {
5174        crate::common::RegisterField::<
5175            5,
5176            0x1,
5177            1,
5178            0,
5179            lvcmpcr::Lvd1E,
5180            lvcmpcr::Lvd1E,
5181            Lvcmpcr_SPEC,
5182            crate::common::RW,
5183        >::from_register(self, 0)
5184    }
5185
5186    #[doc = "Voltage Detection 2 Enable"]
5187    #[inline(always)]
5188    pub fn lvd2e(
5189        self,
5190    ) -> crate::common::RegisterField<
5191        6,
5192        0x1,
5193        1,
5194        0,
5195        lvcmpcr::Lvd2E,
5196        lvcmpcr::Lvd2E,
5197        Lvcmpcr_SPEC,
5198        crate::common::RW,
5199    > {
5200        crate::common::RegisterField::<
5201            6,
5202            0x1,
5203            1,
5204            0,
5205            lvcmpcr::Lvd2E,
5206            lvcmpcr::Lvd2E,
5207            Lvcmpcr_SPEC,
5208            crate::common::RW,
5209        >::from_register(self, 0)
5210    }
5211}
5212impl ::core::default::Default for Lvcmpcr {
5213    #[inline(always)]
5214    fn default() -> Lvcmpcr {
5215        <crate::RegValueT<Lvcmpcr_SPEC> as RegisterValue<_>>::new(0)
5216    }
5217}
5218pub mod lvcmpcr {
5219
5220    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5221    pub struct Lvd1E_SPEC;
5222    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
5223    impl Lvd1E {
5224        #[doc = "Voltage detection 1 circuit disabled"]
5225        pub const _0: Self = Self::new(0);
5226
5227        #[doc = "Voltage detection 1 circuit enabled"]
5228        pub const _1: Self = Self::new(1);
5229    }
5230    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5231    pub struct Lvd2E_SPEC;
5232    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
5233    impl Lvd2E {
5234        #[doc = "Voltage detection 2 circuit disabled"]
5235        pub const _0: Self = Self::new(0);
5236
5237        #[doc = "Voltage detection 2 circuit enabled"]
5238        pub const _1: Self = Self::new(1);
5239    }
5240}
5241#[doc(hidden)]
5242#[derive(Copy, Clone, Eq, PartialEq)]
5243pub struct Lvdlvlr_SPEC;
5244impl crate::sealed::RegSpec for Lvdlvlr_SPEC {
5245    type DataType = u8;
5246}
5247
5248#[doc = "Voltage Detection Level Select Register"]
5249pub type Lvdlvlr = crate::RegValueT<Lvdlvlr_SPEC>;
5250
5251impl Lvdlvlr {
5252    #[doc = "Voltage Detection 1 Level Select (Standard voltage during fall in voltage)"]
5253    #[inline(always)]
5254    pub fn lvd1lvl(
5255        self,
5256    ) -> crate::common::RegisterField<
5257        0,
5258        0x1f,
5259        1,
5260        0,
5261        lvdlvlr::Lvd1Lvl,
5262        lvdlvlr::Lvd1Lvl,
5263        Lvdlvlr_SPEC,
5264        crate::common::RW,
5265    > {
5266        crate::common::RegisterField::<
5267            0,
5268            0x1f,
5269            1,
5270            0,
5271            lvdlvlr::Lvd1Lvl,
5272            lvdlvlr::Lvd1Lvl,
5273            Lvdlvlr_SPEC,
5274            crate::common::RW,
5275        >::from_register(self, 0)
5276    }
5277
5278    #[doc = "Voltage Detection 2 Level Select (Standard voltage during fall in voltage)"]
5279    #[inline(always)]
5280    pub fn lvd2lvl(
5281        self,
5282    ) -> crate::common::RegisterField<
5283        5,
5284        0x7,
5285        1,
5286        0,
5287        lvdlvlr::Lvd2Lvl,
5288        lvdlvlr::Lvd2Lvl,
5289        Lvdlvlr_SPEC,
5290        crate::common::RW,
5291    > {
5292        crate::common::RegisterField::<
5293            5,
5294            0x7,
5295            1,
5296            0,
5297            lvdlvlr::Lvd2Lvl,
5298            lvdlvlr::Lvd2Lvl,
5299            Lvdlvlr_SPEC,
5300            crate::common::RW,
5301        >::from_register(self, 0)
5302    }
5303}
5304impl ::core::default::Default for Lvdlvlr {
5305    #[inline(always)]
5306    fn default() -> Lvdlvlr {
5307        <crate::RegValueT<Lvdlvlr_SPEC> as RegisterValue<_>>::new(7)
5308    }
5309}
5310pub mod lvdlvlr {
5311
5312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5313    pub struct Lvd1Lvl_SPEC;
5314    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
5315    impl Lvd1Lvl {
5316        #[doc = "Vdet1_0"]
5317        pub const _0_X_00: Self = Self::new(0);
5318
5319        #[doc = "Vdet1_1"]
5320        pub const _0_X_01: Self = Self::new(1);
5321
5322        #[doc = "Vdet1_2"]
5323        pub const _0_X_02: Self = Self::new(2);
5324
5325        #[doc = "Vdet1_3"]
5326        pub const _0_X_03: Self = Self::new(3);
5327
5328        #[doc = "Vdet1_4"]
5329        pub const _0_X_04: Self = Self::new(4);
5330
5331        #[doc = "Vdet1_5"]
5332        pub const _0_X_05: Self = Self::new(5);
5333
5334        #[doc = "Vdet1_6"]
5335        pub const _0_X_06: Self = Self::new(6);
5336
5337        #[doc = "Vdet1_7"]
5338        pub const _0_X_07: Self = Self::new(7);
5339
5340        #[doc = "Vdet1_8"]
5341        pub const _0_X_08: Self = Self::new(8);
5342
5343        #[doc = "Vdet1_9"]
5344        pub const _0_X_09: Self = Self::new(9);
5345
5346        #[doc = "Vdet1_A"]
5347        pub const _0_X_0_A: Self = Self::new(10);
5348
5349        #[doc = "Vdet1_B"]
5350        pub const _0_X_0_B: Self = Self::new(11);
5351
5352        #[doc = "Vdet1_C"]
5353        pub const _0_X_0_C: Self = Self::new(12);
5354
5355        #[doc = "Vdet1_D"]
5356        pub const _0_X_0_D: Self = Self::new(13);
5357
5358        #[doc = "Vdet1_E"]
5359        pub const _0_X_0_E: Self = Self::new(14);
5360
5361        #[doc = "Vdet1_F"]
5362        pub const _0_X_0_F: Self = Self::new(15);
5363    }
5364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5365    pub struct Lvd2Lvl_SPEC;
5366    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
5367    impl Lvd2Lvl {
5368        #[doc = "Vdet2_0"]
5369        pub const _000: Self = Self::new(0);
5370
5371        #[doc = "Vdet2_1"]
5372        pub const _001: Self = Self::new(1);
5373
5374        #[doc = "Vdet2_2"]
5375        pub const _010: Self = Self::new(2);
5376
5377        #[doc = "Vdet2_3"]
5378        pub const _011: Self = Self::new(3);
5379    }
5380}
5381#[doc(hidden)]
5382#[derive(Copy, Clone, Eq, PartialEq)]
5383pub struct Lvd1Cr0_SPEC;
5384impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
5385    type DataType = u8;
5386}
5387
5388#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
5389pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
5390
5391impl Lvd1Cr0 {
5392    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
5393    #[inline(always)]
5394    pub fn rie(
5395        self,
5396    ) -> crate::common::RegisterField<
5397        0,
5398        0x1,
5399        1,
5400        0,
5401        lvd1cr0::Rie,
5402        lvd1cr0::Rie,
5403        Lvd1Cr0_SPEC,
5404        crate::common::RW,
5405    > {
5406        crate::common::RegisterField::<
5407            0,
5408            0x1,
5409            1,
5410            0,
5411            lvd1cr0::Rie,
5412            lvd1cr0::Rie,
5413            Lvd1Cr0_SPEC,
5414            crate::common::RW,
5415        >::from_register(self, 0)
5416    }
5417
5418    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
5419    #[inline(always)]
5420    pub fn cmpe(
5421        self,
5422    ) -> crate::common::RegisterField<
5423        2,
5424        0x1,
5425        1,
5426        0,
5427        lvd1cr0::Cmpe,
5428        lvd1cr0::Cmpe,
5429        Lvd1Cr0_SPEC,
5430        crate::common::RW,
5431    > {
5432        crate::common::RegisterField::<
5433            2,
5434            0x1,
5435            1,
5436            0,
5437            lvd1cr0::Cmpe,
5438            lvd1cr0::Cmpe,
5439            Lvd1Cr0_SPEC,
5440            crate::common::RW,
5441        >::from_register(self, 0)
5442    }
5443
5444    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
5445    #[inline(always)]
5446    pub fn ri(
5447        self,
5448    ) -> crate::common::RegisterField<
5449        6,
5450        0x1,
5451        1,
5452        0,
5453        lvd1cr0::Ri,
5454        lvd1cr0::Ri,
5455        Lvd1Cr0_SPEC,
5456        crate::common::RW,
5457    > {
5458        crate::common::RegisterField::<
5459            6,
5460            0x1,
5461            1,
5462            0,
5463            lvd1cr0::Ri,
5464            lvd1cr0::Ri,
5465            Lvd1Cr0_SPEC,
5466            crate::common::RW,
5467        >::from_register(self, 0)
5468    }
5469
5470    #[doc = "Voltage Monitor 1 Reset Negate Select"]
5471    #[inline(always)]
5472    pub fn rn(
5473        self,
5474    ) -> crate::common::RegisterField<
5475        7,
5476        0x1,
5477        1,
5478        0,
5479        lvd1cr0::Rn,
5480        lvd1cr0::Rn,
5481        Lvd1Cr0_SPEC,
5482        crate::common::RW,
5483    > {
5484        crate::common::RegisterField::<
5485            7,
5486            0x1,
5487            1,
5488            0,
5489            lvd1cr0::Rn,
5490            lvd1cr0::Rn,
5491            Lvd1Cr0_SPEC,
5492            crate::common::RW,
5493        >::from_register(self, 0)
5494    }
5495}
5496impl ::core::default::Default for Lvd1Cr0 {
5497    #[inline(always)]
5498    fn default() -> Lvd1Cr0 {
5499        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(128)
5500    }
5501}
5502pub mod lvd1cr0 {
5503
5504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5505    pub struct Rie_SPEC;
5506    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
5507    impl Rie {
5508        #[doc = "Disable"]
5509        pub const _0: Self = Self::new(0);
5510
5511        #[doc = "Enable"]
5512        pub const _1: Self = Self::new(1);
5513    }
5514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5515    pub struct Cmpe_SPEC;
5516    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
5517    impl Cmpe {
5518        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
5519        pub const _0: Self = Self::new(0);
5520
5521        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
5522        pub const _1: Self = Self::new(1);
5523    }
5524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5525    pub struct Ri_SPEC;
5526    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
5527    impl Ri {
5528        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
5529        pub const _0: Self = Self::new(0);
5530
5531        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
5532        pub const _1: Self = Self::new(1);
5533    }
5534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5535    pub struct Rn_SPEC;
5536    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
5537    impl Rn {
5538        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
5539        pub const _0: Self = Self::new(0);
5540
5541        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
5542        pub const _1: Self = Self::new(1);
5543    }
5544}
5545#[doc(hidden)]
5546#[derive(Copy, Clone, Eq, PartialEq)]
5547pub struct Lvd2Cr0_SPEC;
5548impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
5549    type DataType = u8;
5550}
5551
5552#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
5553pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
5554
5555impl Lvd2Cr0 {
5556    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
5557    #[inline(always)]
5558    pub fn rie(
5559        self,
5560    ) -> crate::common::RegisterField<
5561        0,
5562        0x1,
5563        1,
5564        0,
5565        lvd2cr0::Rie,
5566        lvd2cr0::Rie,
5567        Lvd2Cr0_SPEC,
5568        crate::common::RW,
5569    > {
5570        crate::common::RegisterField::<
5571            0,
5572            0x1,
5573            1,
5574            0,
5575            lvd2cr0::Rie,
5576            lvd2cr0::Rie,
5577            Lvd2Cr0_SPEC,
5578            crate::common::RW,
5579        >::from_register(self, 0)
5580    }
5581
5582    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
5583    #[inline(always)]
5584    pub fn cmpe(
5585        self,
5586    ) -> crate::common::RegisterField<
5587        2,
5588        0x1,
5589        1,
5590        0,
5591        lvd2cr0::Cmpe,
5592        lvd2cr0::Cmpe,
5593        Lvd2Cr0_SPEC,
5594        crate::common::RW,
5595    > {
5596        crate::common::RegisterField::<
5597            2,
5598            0x1,
5599            1,
5600            0,
5601            lvd2cr0::Cmpe,
5602            lvd2cr0::Cmpe,
5603            Lvd2Cr0_SPEC,
5604            crate::common::RW,
5605        >::from_register(self, 0)
5606    }
5607
5608    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
5609    #[inline(always)]
5610    pub fn ri(
5611        self,
5612    ) -> crate::common::RegisterField<
5613        6,
5614        0x1,
5615        1,
5616        0,
5617        lvd2cr0::Ri,
5618        lvd2cr0::Ri,
5619        Lvd2Cr0_SPEC,
5620        crate::common::RW,
5621    > {
5622        crate::common::RegisterField::<
5623            6,
5624            0x1,
5625            1,
5626            0,
5627            lvd2cr0::Ri,
5628            lvd2cr0::Ri,
5629            Lvd2Cr0_SPEC,
5630            crate::common::RW,
5631        >::from_register(self, 0)
5632    }
5633
5634    #[doc = "Voltage Monitor 2 Reset Negate Select"]
5635    #[inline(always)]
5636    pub fn rn(
5637        self,
5638    ) -> crate::common::RegisterField<
5639        7,
5640        0x1,
5641        1,
5642        0,
5643        lvd2cr0::Rn,
5644        lvd2cr0::Rn,
5645        Lvd2Cr0_SPEC,
5646        crate::common::RW,
5647    > {
5648        crate::common::RegisterField::<
5649            7,
5650            0x1,
5651            1,
5652            0,
5653            lvd2cr0::Rn,
5654            lvd2cr0::Rn,
5655            Lvd2Cr0_SPEC,
5656            crate::common::RW,
5657        >::from_register(self, 0)
5658    }
5659}
5660impl ::core::default::Default for Lvd2Cr0 {
5661    #[inline(always)]
5662    fn default() -> Lvd2Cr0 {
5663        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(128)
5664    }
5665}
5666pub mod lvd2cr0 {
5667
5668    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5669    pub struct Rie_SPEC;
5670    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
5671    impl Rie {
5672        #[doc = "Disable"]
5673        pub const _0: Self = Self::new(0);
5674
5675        #[doc = "Enable"]
5676        pub const _1: Self = Self::new(1);
5677    }
5678    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5679    pub struct Cmpe_SPEC;
5680    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
5681    impl Cmpe {
5682        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
5683        pub const _0: Self = Self::new(0);
5684
5685        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
5686        pub const _1: Self = Self::new(1);
5687    }
5688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5689    pub struct Ri_SPEC;
5690    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
5691    impl Ri {
5692        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
5693        pub const _0: Self = Self::new(0);
5694
5695        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
5696        pub const _1: Self = Self::new(1);
5697    }
5698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5699    pub struct Rn_SPEC;
5700    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
5701    impl Rn {
5702        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
5703        pub const _0: Self = Self::new(0);
5704
5705        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
5706        pub const _1: Self = Self::new(1);
5707    }
5708}
5709#[doc(hidden)]
5710#[derive(Copy, Clone, Eq, PartialEq)]
5711pub struct Sosccr_SPEC;
5712impl crate::sealed::RegSpec for Sosccr_SPEC {
5713    type DataType = u8;
5714}
5715
5716#[doc = "Sub-Clock Oscillator Control Register"]
5717pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
5718
5719impl Sosccr {
5720    #[doc = "Sub Clock Oscillator Stop"]
5721    #[inline(always)]
5722    pub fn sostp(
5723        self,
5724    ) -> crate::common::RegisterField<
5725        0,
5726        0x1,
5727        1,
5728        0,
5729        sosccr::Sostp,
5730        sosccr::Sostp,
5731        Sosccr_SPEC,
5732        crate::common::RW,
5733    > {
5734        crate::common::RegisterField::<
5735            0,
5736            0x1,
5737            1,
5738            0,
5739            sosccr::Sostp,
5740            sosccr::Sostp,
5741            Sosccr_SPEC,
5742            crate::common::RW,
5743        >::from_register(self, 0)
5744    }
5745}
5746impl ::core::default::Default for Sosccr {
5747    #[inline(always)]
5748    fn default() -> Sosccr {
5749        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(1)
5750    }
5751}
5752pub mod sosccr {
5753
5754    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5755    pub struct Sostp_SPEC;
5756    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
5757    impl Sostp {
5758        #[doc = "Operate the sub-clock oscillator"]
5759        pub const _0: Self = Self::new(0);
5760
5761        #[doc = "Stop the sub-clock oscillator"]
5762        pub const _1: Self = Self::new(1);
5763    }
5764}
5765#[doc(hidden)]
5766#[derive(Copy, Clone, Eq, PartialEq)]
5767pub struct Somcr_SPEC;
5768impl crate::sealed::RegSpec for Somcr_SPEC {
5769    type DataType = u8;
5770}
5771
5772#[doc = "Sub-Clock Oscillator Mode Control Register"]
5773pub type Somcr = crate::RegValueT<Somcr_SPEC>;
5774
5775impl Somcr {
5776    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
5777    #[inline(always)]
5778    pub fn sodrv(
5779        self,
5780    ) -> crate::common::RegisterField<
5781        0,
5782        0x3,
5783        1,
5784        0,
5785        somcr::Sodrv,
5786        somcr::Sodrv,
5787        Somcr_SPEC,
5788        crate::common::RW,
5789    > {
5790        crate::common::RegisterField::<
5791            0,
5792            0x3,
5793            1,
5794            0,
5795            somcr::Sodrv,
5796            somcr::Sodrv,
5797            Somcr_SPEC,
5798            crate::common::RW,
5799        >::from_register(self, 0)
5800    }
5801}
5802impl ::core::default::Default for Somcr {
5803    #[inline(always)]
5804    fn default() -> Somcr {
5805        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
5806    }
5807}
5808pub mod somcr {
5809
5810    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5811    pub struct Sodrv_SPEC;
5812    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
5813    impl Sodrv {
5814        #[doc = "Normal Mode"]
5815        pub const _00: Self = Self::new(0);
5816
5817        #[doc = "Low Power Mode 1"]
5818        pub const _01: Self = Self::new(1);
5819
5820        #[doc = "Low Power Mode 2"]
5821        pub const _10: Self = Self::new(2);
5822
5823        #[doc = "Low Power Mode 3"]
5824        pub const _11: Self = Self::new(3);
5825    }
5826}
5827#[doc(hidden)]
5828#[derive(Copy, Clone, Eq, PartialEq)]
5829pub struct Somrg_SPEC;
5830impl crate::sealed::RegSpec for Somrg_SPEC {
5831    type DataType = u8;
5832}
5833
5834#[doc = "Sub-Clock Oscillator Margin Check Register"]
5835pub type Somrg = crate::RegValueT<Somrg_SPEC>;
5836
5837impl Somrg {
5838    #[doc = "Sub Clock Oscillator Margin Check Switching"]
5839    #[inline(always)]
5840    pub fn soscmrg(
5841        self,
5842    ) -> crate::common::RegisterField<
5843        0,
5844        0x3,
5845        1,
5846        0,
5847        somrg::Soscmrg,
5848        somrg::Soscmrg,
5849        Somrg_SPEC,
5850        crate::common::RW,
5851    > {
5852        crate::common::RegisterField::<
5853            0,
5854            0x3,
5855            1,
5856            0,
5857            somrg::Soscmrg,
5858            somrg::Soscmrg,
5859            Somrg_SPEC,
5860            crate::common::RW,
5861        >::from_register(self, 0)
5862    }
5863}
5864impl ::core::default::Default for Somrg {
5865    #[inline(always)]
5866    fn default() -> Somrg {
5867        <crate::RegValueT<Somrg_SPEC> as RegisterValue<_>>::new(0)
5868    }
5869}
5870pub mod somrg {
5871
5872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5873    pub struct Soscmrg_SPEC;
5874    pub type Soscmrg = crate::EnumBitfieldStruct<u8, Soscmrg_SPEC>;
5875    impl Soscmrg {
5876        #[doc = "Normal current"]
5877        pub const _00: Self = Self::new(0);
5878
5879        #[doc = "Lower margin check"]
5880        pub const _01: Self = Self::new(1);
5881
5882        #[doc = "Upper margin check"]
5883        pub const _10: Self = Self::new(2);
5884
5885        #[doc = "Setting prohibited"]
5886        pub const _11: Self = Self::new(3);
5887    }
5888}
5889#[doc(hidden)]
5890#[derive(Copy, Clone, Eq, PartialEq)]
5891pub struct Lococr_SPEC;
5892impl crate::sealed::RegSpec for Lococr_SPEC {
5893    type DataType = u8;
5894}
5895
5896#[doc = "Low-Speed On-Chip Oscillator Control Register"]
5897pub type Lococr = crate::RegValueT<Lococr_SPEC>;
5898
5899impl Lococr {
5900    #[doc = "LOCO Stop"]
5901    #[inline(always)]
5902    pub fn lcstp(
5903        self,
5904    ) -> crate::common::RegisterField<
5905        0,
5906        0x1,
5907        1,
5908        0,
5909        lococr::Lcstp,
5910        lococr::Lcstp,
5911        Lococr_SPEC,
5912        crate::common::RW,
5913    > {
5914        crate::common::RegisterField::<
5915            0,
5916            0x1,
5917            1,
5918            0,
5919            lococr::Lcstp,
5920            lococr::Lcstp,
5921            Lococr_SPEC,
5922            crate::common::RW,
5923        >::from_register(self, 0)
5924    }
5925}
5926impl ::core::default::Default for Lococr {
5927    #[inline(always)]
5928    fn default() -> Lococr {
5929        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
5930    }
5931}
5932pub mod lococr {
5933
5934    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5935    pub struct Lcstp_SPEC;
5936    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
5937    impl Lcstp {
5938        #[doc = "Operate the LOCO clock"]
5939        pub const _0: Self = Self::new(0);
5940
5941        #[doc = "Stop the LOCO clock"]
5942        pub const _1: Self = Self::new(1);
5943    }
5944}
5945#[doc(hidden)]
5946#[derive(Copy, Clone, Eq, PartialEq)]
5947pub struct Locoutcr_SPEC;
5948impl crate::sealed::RegSpec for Locoutcr_SPEC {
5949    type DataType = u8;
5950}
5951
5952#[doc = "LOCO User Trimming Control Register"]
5953pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
5954
5955impl Locoutcr {
5956    #[doc = "LOCO User Trimming"]
5957    #[inline(always)]
5958    pub fn locoutrm(
5959        self,
5960    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
5961        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
5962    }
5963}
5964impl ::core::default::Default for Locoutcr {
5965    #[inline(always)]
5966    fn default() -> Locoutcr {
5967        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
5968    }
5969}
5970
5971#[doc(hidden)]
5972#[derive(Copy, Clone, Eq, PartialEq)]
5973pub struct Vbtlvdcr_SPEC;
5974impl crate::sealed::RegSpec for Vbtlvdcr_SPEC {
5975    type DataType = u8;
5976}
5977
5978#[doc = "EXLVDVBAT Circuit Control Register"]
5979pub type Vbtlvdcr = crate::RegValueT<Vbtlvdcr_SPEC>;
5980
5981impl Vbtlvdcr {
5982    #[doc = "EXLVDVBAT Pin Low Voltage Detect Enable"]
5983    #[inline(always)]
5984    pub fn lvde(
5985        self,
5986    ) -> crate::common::RegisterField<
5987        4,
5988        0x1,
5989        1,
5990        0,
5991        vbtlvdcr::Lvde,
5992        vbtlvdcr::Lvde,
5993        Vbtlvdcr_SPEC,
5994        crate::common::RW,
5995    > {
5996        crate::common::RegisterField::<
5997            4,
5998            0x1,
5999            1,
6000            0,
6001            vbtlvdcr::Lvde,
6002            vbtlvdcr::Lvde,
6003            Vbtlvdcr_SPEC,
6004            crate::common::RW,
6005        >::from_register(self, 0)
6006    }
6007
6008    #[doc = "EXLVDVBAT Pin Low Voltage Detect Level Select"]
6009    #[inline(always)]
6010    pub fn lvl(
6011        self,
6012    ) -> crate::common::RegisterField<
6013        5,
6014        0x7,
6015        1,
6016        0,
6017        vbtlvdcr::Lvl,
6018        vbtlvdcr::Lvl,
6019        Vbtlvdcr_SPEC,
6020        crate::common::RW,
6021    > {
6022        crate::common::RegisterField::<
6023            5,
6024            0x7,
6025            1,
6026            0,
6027            vbtlvdcr::Lvl,
6028            vbtlvdcr::Lvl,
6029            Vbtlvdcr_SPEC,
6030            crate::common::RW,
6031        >::from_register(self, 0)
6032    }
6033}
6034impl ::core::default::Default for Vbtlvdcr {
6035    #[inline(always)]
6036    fn default() -> Vbtlvdcr {
6037        <crate::RegValueT<Vbtlvdcr_SPEC> as RegisterValue<_>>::new(0)
6038    }
6039}
6040pub mod vbtlvdcr {
6041
6042    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6043    pub struct Lvde_SPEC;
6044    pub type Lvde = crate::EnumBitfieldStruct<u8, Lvde_SPEC>;
6045    impl Lvde {
6046        #[doc = "EXLVDVBAT pin low voltage detection disabled"]
6047        pub const _0: Self = Self::new(0);
6048
6049        #[doc = "EXLVDVBAT pin low voltage detection enabled"]
6050        pub const _1: Self = Self::new(1);
6051    }
6052    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6053    pub struct Lvl_SPEC;
6054    pub type Lvl = crate::EnumBitfieldStruct<u8, Lvl_SPEC>;
6055    impl Lvl {
6056        #[doc = "2.2 V"]
6057        pub const _000: Self = Self::new(0);
6058
6059        #[doc = "2.4 V"]
6060        pub const _001: Self = Self::new(1);
6061
6062        #[doc = "2.6 V"]
6063        pub const _010: Self = Self::new(2);
6064
6065        #[doc = "2.7 V"]
6066        pub const _011: Self = Self::new(3);
6067
6068        #[doc = "2.8 V"]
6069        pub const _100: Self = Self::new(4);
6070
6071        #[doc = "2.9 V"]
6072        pub const _101: Self = Self::new(5);
6073
6074        #[doc = "3.1 V"]
6075        pub const _110: Self = Self::new(6);
6076
6077        #[doc = "Setting prohibited"]
6078        pub const _111: Self = Self::new(7);
6079    }
6080}
6081#[doc(hidden)]
6082#[derive(Copy, Clone, Eq, PartialEq)]
6083pub struct Vbtlvdsr_SPEC;
6084impl crate::sealed::RegSpec for Vbtlvdsr_SPEC {
6085    type DataType = u8;
6086}
6087
6088#[doc = "EXLVDVBAT Circuit Status Register"]
6089pub type Vbtlvdsr = crate::RegValueT<Vbtlvdsr_SPEC>;
6090
6091impl Vbtlvdsr {
6092    #[doc = "EXLVDVBAT Pin Low Voltage Detect Flag"]
6093    #[inline(always)]
6094    pub fn det(
6095        self,
6096    ) -> crate::common::RegisterField<
6097        1,
6098        0x1,
6099        1,
6100        0,
6101        vbtlvdsr::Det,
6102        vbtlvdsr::Det,
6103        Vbtlvdsr_SPEC,
6104        crate::common::RW,
6105    > {
6106        crate::common::RegisterField::<
6107            1,
6108            0x1,
6109            1,
6110            0,
6111            vbtlvdsr::Det,
6112            vbtlvdsr::Det,
6113            Vbtlvdsr_SPEC,
6114            crate::common::RW,
6115        >::from_register(self, 0)
6116    }
6117
6118    #[doc = "EXLVDVBAT Pin Low Voltage Monitor Flag"]
6119    #[inline(always)]
6120    pub fn mon(
6121        self,
6122    ) -> crate::common::RegisterField<
6123        5,
6124        0x1,
6125        1,
6126        0,
6127        vbtlvdsr::Mon,
6128        vbtlvdsr::Mon,
6129        Vbtlvdsr_SPEC,
6130        crate::common::R,
6131    > {
6132        crate::common::RegisterField::<
6133            5,
6134            0x1,
6135            1,
6136            0,
6137            vbtlvdsr::Mon,
6138            vbtlvdsr::Mon,
6139            Vbtlvdsr_SPEC,
6140            crate::common::R,
6141        >::from_register(self, 0)
6142    }
6143}
6144impl ::core::default::Default for Vbtlvdsr {
6145    #[inline(always)]
6146    fn default() -> Vbtlvdsr {
6147        <crate::RegValueT<Vbtlvdsr_SPEC> as RegisterValue<_>>::new(32)
6148    }
6149}
6150pub mod vbtlvdsr {
6151
6152    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6153    pub struct Det_SPEC;
6154    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
6155    impl Det {
6156        #[doc = "EXLVDVBAT pin low voltage not detected"]
6157        pub const _0: Self = Self::new(0);
6158
6159        #[doc = "EXLVDVBAT pin low voltage detected"]
6160        pub const _1: Self = Self::new(1);
6161    }
6162    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6163    pub struct Mon_SPEC;
6164    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
6165    impl Mon {
6166        #[doc = "EXLVDVBAT < Vdet_lvdvbat"]
6167        pub const _0: Self = Self::new(0);
6168
6169        #[doc = "EXLVDVBAT ≥ Vdet_lvdvbat or MON is disabled"]
6170        pub const _1: Self = Self::new(1);
6171    }
6172}
6173#[doc(hidden)]
6174#[derive(Copy, Clone, Eq, PartialEq)]
6175pub struct Vbtcmpcr_SPEC;
6176impl crate::sealed::RegSpec for Vbtcmpcr_SPEC {
6177    type DataType = u8;
6178}
6179
6180#[doc = "EXLVDVBAT Comparator Control Register"]
6181pub type Vbtcmpcr = crate::RegValueT<Vbtcmpcr_SPEC>;
6182
6183impl Vbtcmpcr {
6184    #[doc = "EXLVDVBAT Pin Low Voltage Detect Circuit Output Enable"]
6185    #[inline(always)]
6186    pub fn cmpe(
6187        self,
6188    ) -> crate::common::RegisterField<
6189        0,
6190        0x1,
6191        1,
6192        0,
6193        vbtcmpcr::Cmpe,
6194        vbtcmpcr::Cmpe,
6195        Vbtcmpcr_SPEC,
6196        crate::common::RW,
6197    > {
6198        crate::common::RegisterField::<
6199            0,
6200            0x1,
6201            1,
6202            0,
6203            vbtcmpcr::Cmpe,
6204            vbtcmpcr::Cmpe,
6205            Vbtcmpcr_SPEC,
6206            crate::common::RW,
6207        >::from_register(self, 0)
6208    }
6209}
6210impl ::core::default::Default for Vbtcmpcr {
6211    #[inline(always)]
6212    fn default() -> Vbtcmpcr {
6213        <crate::RegValueT<Vbtcmpcr_SPEC> as RegisterValue<_>>::new(0)
6214    }
6215}
6216pub mod vbtcmpcr {
6217
6218    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6219    pub struct Cmpe_SPEC;
6220    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
6221    impl Cmpe {
6222        #[doc = "EXLVDVBAT pin low voltage detect circuit output disabled"]
6223        pub const _0: Self = Self::new(0);
6224
6225        #[doc = "EXLVDVBAT pin low voltage detect circuit output enabled"]
6226        pub const _1: Self = Self::new(1);
6227    }
6228}
6229#[doc(hidden)]
6230#[derive(Copy, Clone, Eq, PartialEq)]
6231pub struct Vbtlvdicr_SPEC;
6232impl crate::sealed::RegSpec for Vbtlvdicr_SPEC {
6233    type DataType = u8;
6234}
6235
6236#[doc = "EXLVDVBAT Pin Low Voltage Detect Interrupt Control Register"]
6237pub type Vbtlvdicr = crate::RegValueT<Vbtlvdicr_SPEC>;
6238
6239impl Vbtlvdicr {
6240    #[doc = "EXLVDVBAT Pin Low Voltage Detect Interrupt Enable"]
6241    #[inline(always)]
6242    pub fn ie(
6243        self,
6244    ) -> crate::common::RegisterField<
6245        0,
6246        0x1,
6247        1,
6248        0,
6249        vbtlvdicr::Ie,
6250        vbtlvdicr::Ie,
6251        Vbtlvdicr_SPEC,
6252        crate::common::RW,
6253    > {
6254        crate::common::RegisterField::<
6255            0,
6256            0x1,
6257            1,
6258            0,
6259            vbtlvdicr::Ie,
6260            vbtlvdicr::Ie,
6261            Vbtlvdicr_SPEC,
6262            crate::common::RW,
6263        >::from_register(self, 0)
6264    }
6265
6266    #[doc = "EXLVDVBAT Pin Low Voltage Detect Interrupt Generation Condition Select"]
6267    #[inline(always)]
6268    pub fn idtsel(
6269        self,
6270    ) -> crate::common::RegisterField<
6271        4,
6272        0x3,
6273        1,
6274        0,
6275        vbtlvdicr::Idtsel,
6276        vbtlvdicr::Idtsel,
6277        Vbtlvdicr_SPEC,
6278        crate::common::RW,
6279    > {
6280        crate::common::RegisterField::<
6281            4,
6282            0x3,
6283            1,
6284            0,
6285            vbtlvdicr::Idtsel,
6286            vbtlvdicr::Idtsel,
6287            Vbtlvdicr_SPEC,
6288            crate::common::RW,
6289        >::from_register(self, 0)
6290    }
6291}
6292impl ::core::default::Default for Vbtlvdicr {
6293    #[inline(always)]
6294    fn default() -> Vbtlvdicr {
6295        <crate::RegValueT<Vbtlvdicr_SPEC> as RegisterValue<_>>::new(16)
6296    }
6297}
6298pub mod vbtlvdicr {
6299
6300    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6301    pub struct Ie_SPEC;
6302    pub type Ie = crate::EnumBitfieldStruct<u8, Ie_SPEC>;
6303    impl Ie {
6304        #[doc = "EXLVDVBAT pin low voltage detection interrupt disabled"]
6305        pub const _0: Self = Self::new(0);
6306
6307        #[doc = "EXLVDVBAT pin low voltage detection interrupt enabled"]
6308        pub const _1: Self = Self::new(1);
6309    }
6310    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6311    pub struct Idtsel_SPEC;
6312    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
6313    impl Idtsel {
6314        #[doc = "When EXLVDVBAT > Vdet_lvdvbat (rise) is detected"]
6315        pub const _00: Self = Self::new(0);
6316
6317        #[doc = "When EXLVDVBAT < Vdet_lvdvbat (fall) is detected"]
6318        pub const _01: Self = Self::new(1);
6319
6320        #[doc = "When fall and rise are detected"]
6321        pub const _10: Self = Self::new(2);
6322
6323        #[doc = "Settings prohibited"]
6324        pub const _11: Self = Self::new(3);
6325    }
6326}
6327#[doc(hidden)]
6328#[derive(Copy, Clone, Eq, PartialEq)]
6329pub struct Vrtlvdcr_SPEC;
6330impl crate::sealed::RegSpec for Vrtlvdcr_SPEC {
6331    type DataType = u8;
6332}
6333
6334#[doc = "LVDVRTC Circuit Control Register"]
6335pub type Vrtlvdcr = crate::RegValueT<Vrtlvdcr_SPEC>;
6336
6337impl Vrtlvdcr {
6338    #[doc = "VRTC Pin Low Voltage Detect Enable"]
6339    #[inline(always)]
6340    pub fn lvde(
6341        self,
6342    ) -> crate::common::RegisterField<
6343        4,
6344        0x1,
6345        1,
6346        0,
6347        vrtlvdcr::Lvde,
6348        vrtlvdcr::Lvde,
6349        Vrtlvdcr_SPEC,
6350        crate::common::RW,
6351    > {
6352        crate::common::RegisterField::<
6353            4,
6354            0x1,
6355            1,
6356            0,
6357            vrtlvdcr::Lvde,
6358            vrtlvdcr::Lvde,
6359            Vrtlvdcr_SPEC,
6360            crate::common::RW,
6361        >::from_register(self, 0)
6362    }
6363
6364    #[doc = "VRTC Pin Low Voltage Detect Level Select"]
6365    #[inline(always)]
6366    pub fn lvl(
6367        self,
6368    ) -> crate::common::RegisterField<
6369        6,
6370        0x3,
6371        1,
6372        0,
6373        vrtlvdcr::Lvl,
6374        vrtlvdcr::Lvl,
6375        Vrtlvdcr_SPEC,
6376        crate::common::RW,
6377    > {
6378        crate::common::RegisterField::<
6379            6,
6380            0x3,
6381            1,
6382            0,
6383            vrtlvdcr::Lvl,
6384            vrtlvdcr::Lvl,
6385            Vrtlvdcr_SPEC,
6386            crate::common::RW,
6387        >::from_register(self, 0)
6388    }
6389}
6390impl ::core::default::Default for Vrtlvdcr {
6391    #[inline(always)]
6392    fn default() -> Vrtlvdcr {
6393        <crate::RegValueT<Vrtlvdcr_SPEC> as RegisterValue<_>>::new(0)
6394    }
6395}
6396pub mod vrtlvdcr {
6397
6398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6399    pub struct Lvde_SPEC;
6400    pub type Lvde = crate::EnumBitfieldStruct<u8, Lvde_SPEC>;
6401    impl Lvde {
6402        #[doc = "VRTC pin low voltage detection disabled"]
6403        pub const _0: Self = Self::new(0);
6404
6405        #[doc = "VRTC pin low voltage detection enabled"]
6406        pub const _1: Self = Self::new(1);
6407    }
6408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6409    pub struct Lvl_SPEC;
6410    pub type Lvl = crate::EnumBitfieldStruct<u8, Lvl_SPEC>;
6411    impl Lvl {
6412        #[doc = "2.2 V"]
6413        pub const _00: Self = Self::new(0);
6414
6415        #[doc = "2.4 V"]
6416        pub const _01: Self = Self::new(1);
6417
6418        #[doc = "2.6 V"]
6419        pub const _10: Self = Self::new(2);
6420
6421        #[doc = "2.8 V"]
6422        pub const _11: Self = Self::new(3);
6423    }
6424}
6425#[doc(hidden)]
6426#[derive(Copy, Clone, Eq, PartialEq)]
6427pub struct Vrtsr_SPEC;
6428impl crate::sealed::RegSpec for Vrtsr_SPEC {
6429    type DataType = u8;
6430}
6431
6432#[doc = "VRTC Status Register"]
6433pub type Vrtsr = crate::RegValueT<Vrtsr_SPEC>;
6434
6435impl Vrtsr {
6436    #[doc = "VRTC-domain Power-on Reset Detect Flag"]
6437    #[inline(always)]
6438    pub fn pordet(
6439        self,
6440    ) -> crate::common::RegisterField<
6441        0,
6442        0x1,
6443        1,
6444        0,
6445        vrtsr::Pordet,
6446        vrtsr::Pordet,
6447        Vrtsr_SPEC,
6448        crate::common::RW,
6449    > {
6450        crate::common::RegisterField::<
6451            0,
6452            0x1,
6453            1,
6454            0,
6455            vrtsr::Pordet,
6456            vrtsr::Pordet,
6457            Vrtsr_SPEC,
6458            crate::common::RW,
6459        >::from_register(self, 0)
6460    }
6461
6462    #[doc = "VRTC Voltage Variation Detection Flag"]
6463    #[inline(always)]
6464    pub fn det(
6465        self,
6466    ) -> crate::common::RegisterField<
6467        1,
6468        0x1,
6469        1,
6470        0,
6471        vrtsr::Det,
6472        vrtsr::Det,
6473        Vrtsr_SPEC,
6474        crate::common::RW,
6475    > {
6476        crate::common::RegisterField::<
6477            1,
6478            0x1,
6479            1,
6480            0,
6481            vrtsr::Det,
6482            vrtsr::Det,
6483            Vrtsr_SPEC,
6484            crate::common::RW,
6485        >::from_register(self, 0)
6486    }
6487
6488    #[doc = "VRTC-domain Valid"]
6489    #[inline(always)]
6490    pub fn vrtvld(
6491        self,
6492    ) -> crate::common::RegisterField<
6493        4,
6494        0x1,
6495        1,
6496        0,
6497        vrtsr::Vrtvld,
6498        vrtsr::Vrtvld,
6499        Vrtsr_SPEC,
6500        crate::common::R,
6501    > {
6502        crate::common::RegisterField::<
6503            4,
6504            0x1,
6505            1,
6506            0,
6507            vrtsr::Vrtvld,
6508            vrtsr::Vrtvld,
6509            Vrtsr_SPEC,
6510            crate::common::R,
6511        >::from_register(self, 0)
6512    }
6513
6514    #[doc = "VRTC Signal Monitor Flag"]
6515    #[inline(always)]
6516    pub fn mon(
6517        self,
6518    ) -> crate::common::RegisterField<
6519        5,
6520        0x1,
6521        1,
6522        0,
6523        vrtsr::Mon,
6524        vrtsr::Mon,
6525        Vrtsr_SPEC,
6526        crate::common::R,
6527    > {
6528        crate::common::RegisterField::<
6529            5,
6530            0x1,
6531            1,
6532            0,
6533            vrtsr::Mon,
6534            vrtsr::Mon,
6535            Vrtsr_SPEC,
6536            crate::common::R,
6537        >::from_register(self, 0)
6538    }
6539}
6540impl ::core::default::Default for Vrtsr {
6541    #[inline(always)]
6542    fn default() -> Vrtsr {
6543        <crate::RegValueT<Vrtsr_SPEC> as RegisterValue<_>>::new(33)
6544    }
6545}
6546pub mod vrtsr {
6547
6548    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6549    pub struct Pordet_SPEC;
6550    pub type Pordet = crate::EnumBitfieldStruct<u8, Pordet_SPEC>;
6551    impl Pordet {
6552        #[doc = "VRTC-domain power-on reset not detected"]
6553        pub const _0: Self = Self::new(0);
6554
6555        #[doc = "VRTC-domain power-on reset detected"]
6556        pub const _1: Self = Self::new(1);
6557    }
6558    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6559    pub struct Det_SPEC;
6560    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
6561    impl Det {
6562        #[doc = "Vdet_vrtc crossing not detected"]
6563        pub const _0: Self = Self::new(0);
6564
6565        #[doc = "Vdet_vrtc crossing detected"]
6566        pub const _1: Self = Self::new(1);
6567    }
6568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6569    pub struct Vrtvld_SPEC;
6570    pub type Vrtvld = crate::EnumBitfieldStruct<u8, Vrtvld_SPEC>;
6571    impl Vrtvld {
6572        #[doc = "VRTC-domain area not valid"]
6573        pub const _0: Self = Self::new(0);
6574
6575        #[doc = "VRTC-domain area valid"]
6576        pub const _1: Self = Self::new(1);
6577    }
6578    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6579    pub struct Mon_SPEC;
6580    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
6581    impl Mon {
6582        #[doc = "VRTC < Vdet_vrtc"]
6583        pub const _0: Self = Self::new(0);
6584
6585        #[doc = "VRTC ≥ Vdet_vrtc or MON is disabled"]
6586        pub const _1: Self = Self::new(1);
6587    }
6588}
6589#[doc(hidden)]
6590#[derive(Copy, Clone, Eq, PartialEq)]
6591pub struct Vrtcmpcr_SPEC;
6592impl crate::sealed::RegSpec for Vrtcmpcr_SPEC {
6593    type DataType = u8;
6594}
6595
6596#[doc = "VRTC Comparator Control Register"]
6597pub type Vrtcmpcr = crate::RegValueT<Vrtcmpcr_SPEC>;
6598
6599impl Vrtcmpcr {
6600    #[doc = "VRTC Pin Low Voltage Detect Circuit Output Enable"]
6601    #[inline(always)]
6602    pub fn cmpe(
6603        self,
6604    ) -> crate::common::RegisterField<
6605        0,
6606        0x1,
6607        1,
6608        0,
6609        vrtcmpcr::Cmpe,
6610        vrtcmpcr::Cmpe,
6611        Vrtcmpcr_SPEC,
6612        crate::common::RW,
6613    > {
6614        crate::common::RegisterField::<
6615            0,
6616            0x1,
6617            1,
6618            0,
6619            vrtcmpcr::Cmpe,
6620            vrtcmpcr::Cmpe,
6621            Vrtcmpcr_SPEC,
6622            crate::common::RW,
6623        >::from_register(self, 0)
6624    }
6625}
6626impl ::core::default::Default for Vrtcmpcr {
6627    #[inline(always)]
6628    fn default() -> Vrtcmpcr {
6629        <crate::RegValueT<Vrtcmpcr_SPEC> as RegisterValue<_>>::new(0)
6630    }
6631}
6632pub mod vrtcmpcr {
6633
6634    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6635    pub struct Cmpe_SPEC;
6636    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
6637    impl Cmpe {
6638        #[doc = "VRTC pin low voltage detect circuit output disabled"]
6639        pub const _0: Self = Self::new(0);
6640
6641        #[doc = "VRTC pin low voltage detect circuit output enabled"]
6642        pub const _1: Self = Self::new(1);
6643    }
6644}
6645#[doc(hidden)]
6646#[derive(Copy, Clone, Eq, PartialEq)]
6647pub struct Vrtlvdicr_SPEC;
6648impl crate::sealed::RegSpec for Vrtlvdicr_SPEC {
6649    type DataType = u8;
6650}
6651
6652#[doc = "VRTC Pin Low Voltage Detect Interrupt Control Register"]
6653pub type Vrtlvdicr = crate::RegValueT<Vrtlvdicr_SPEC>;
6654
6655impl Vrtlvdicr {
6656    #[doc = "VRTC Pin Low Voltage Detect Interrupt Enable"]
6657    #[inline(always)]
6658    pub fn ie(
6659        self,
6660    ) -> crate::common::RegisterField<
6661        0,
6662        0x1,
6663        1,
6664        0,
6665        vrtlvdicr::Ie,
6666        vrtlvdicr::Ie,
6667        Vrtlvdicr_SPEC,
6668        crate::common::RW,
6669    > {
6670        crate::common::RegisterField::<
6671            0,
6672            0x1,
6673            1,
6674            0,
6675            vrtlvdicr::Ie,
6676            vrtlvdicr::Ie,
6677            Vrtlvdicr_SPEC,
6678            crate::common::RW,
6679        >::from_register(self, 0)
6680    }
6681
6682    #[doc = "VRTC Pin Low Voltage Detect Interrupt Generation Condition Select"]
6683    #[inline(always)]
6684    pub fn idtsel(
6685        self,
6686    ) -> crate::common::RegisterField<
6687        4,
6688        0x3,
6689        1,
6690        0,
6691        vrtlvdicr::Idtsel,
6692        vrtlvdicr::Idtsel,
6693        Vrtlvdicr_SPEC,
6694        crate::common::RW,
6695    > {
6696        crate::common::RegisterField::<
6697            4,
6698            0x3,
6699            1,
6700            0,
6701            vrtlvdicr::Idtsel,
6702            vrtlvdicr::Idtsel,
6703            Vrtlvdicr_SPEC,
6704            crate::common::RW,
6705        >::from_register(self, 0)
6706    }
6707}
6708impl ::core::default::Default for Vrtlvdicr {
6709    #[inline(always)]
6710    fn default() -> Vrtlvdicr {
6711        <crate::RegValueT<Vrtlvdicr_SPEC> as RegisterValue<_>>::new(16)
6712    }
6713}
6714pub mod vrtlvdicr {
6715
6716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6717    pub struct Ie_SPEC;
6718    pub type Ie = crate::EnumBitfieldStruct<u8, Ie_SPEC>;
6719    impl Ie {
6720        #[doc = "VRTC pin low voltage detection interrupt disabled"]
6721        pub const _0: Self = Self::new(0);
6722
6723        #[doc = "VRTC pin low voltage detection interrupt enabled"]
6724        pub const _1: Self = Self::new(1);
6725    }
6726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6727    pub struct Idtsel_SPEC;
6728    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
6729    impl Idtsel {
6730        #[doc = "When VRTC > Vdet_vrtc (rise) is detected"]
6731        pub const _00: Self = Self::new(0);
6732
6733        #[doc = "When VRTC < Vdet_vrtc (fall) is detected"]
6734        pub const _01: Self = Self::new(1);
6735
6736        #[doc = "When fall and rise are detected"]
6737        pub const _10: Self = Self::new(2);
6738
6739        #[doc = "Settings prohibited"]
6740        pub const _11: Self = Self::new(3);
6741    }
6742}
6743#[doc(hidden)]
6744#[derive(Copy, Clone, Eq, PartialEq)]
6745pub struct Exlvdcr_SPEC;
6746impl crate::sealed::RegSpec for Exlvdcr_SPEC {
6747    type DataType = u8;
6748}
6749
6750#[doc = "EXLVD Circuit Control Register"]
6751pub type Exlvdcr = crate::RegValueT<Exlvdcr_SPEC>;
6752
6753impl Exlvdcr {
6754    #[doc = "EXLVD Pin Low Voltage Detect Enable"]
6755    #[inline(always)]
6756    pub fn lvde(
6757        self,
6758    ) -> crate::common::RegisterField<
6759        4,
6760        0x1,
6761        1,
6762        0,
6763        exlvdcr::Lvde,
6764        exlvdcr::Lvde,
6765        Exlvdcr_SPEC,
6766        crate::common::RW,
6767    > {
6768        crate::common::RegisterField::<
6769            4,
6770            0x1,
6771            1,
6772            0,
6773            exlvdcr::Lvde,
6774            exlvdcr::Lvde,
6775            Exlvdcr_SPEC,
6776            crate::common::RW,
6777        >::from_register(self, 0)
6778    }
6779}
6780impl ::core::default::Default for Exlvdcr {
6781    #[inline(always)]
6782    fn default() -> Exlvdcr {
6783        <crate::RegValueT<Exlvdcr_SPEC> as RegisterValue<_>>::new(0)
6784    }
6785}
6786pub mod exlvdcr {
6787
6788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6789    pub struct Lvde_SPEC;
6790    pub type Lvde = crate::EnumBitfieldStruct<u8, Lvde_SPEC>;
6791    impl Lvde {
6792        #[doc = "EXLVD pin low voltage detection disabled"]
6793        pub const _0: Self = Self::new(0);
6794
6795        #[doc = "EXLVD pin low voltage detection enabled"]
6796        pub const _1: Self = Self::new(1);
6797    }
6798}
6799#[doc(hidden)]
6800#[derive(Copy, Clone, Eq, PartialEq)]
6801pub struct Exlvdsr_SPEC;
6802impl crate::sealed::RegSpec for Exlvdsr_SPEC {
6803    type DataType = u8;
6804}
6805
6806#[doc = "EXLVD Circuit Status Register"]
6807pub type Exlvdsr = crate::RegValueT<Exlvdsr_SPEC>;
6808
6809impl Exlvdsr {
6810    #[doc = "EXLVD pin Low Voltage Detect Flag"]
6811    #[inline(always)]
6812    pub fn det(
6813        self,
6814    ) -> crate::common::RegisterField<
6815        1,
6816        0x1,
6817        1,
6818        0,
6819        exlvdsr::Det,
6820        exlvdsr::Det,
6821        Exlvdsr_SPEC,
6822        crate::common::RW,
6823    > {
6824        crate::common::RegisterField::<
6825            1,
6826            0x1,
6827            1,
6828            0,
6829            exlvdsr::Det,
6830            exlvdsr::Det,
6831            Exlvdsr_SPEC,
6832            crate::common::RW,
6833        >::from_register(self, 0)
6834    }
6835
6836    #[doc = "EXLVD pin Low Voltage Monitor Flag"]
6837    #[inline(always)]
6838    pub fn mon(
6839        self,
6840    ) -> crate::common::RegisterField<
6841        5,
6842        0x1,
6843        1,
6844        0,
6845        exlvdsr::Mon,
6846        exlvdsr::Mon,
6847        Exlvdsr_SPEC,
6848        crate::common::R,
6849    > {
6850        crate::common::RegisterField::<
6851            5,
6852            0x1,
6853            1,
6854            0,
6855            exlvdsr::Mon,
6856            exlvdsr::Mon,
6857            Exlvdsr_SPEC,
6858            crate::common::R,
6859        >::from_register(self, 0)
6860    }
6861}
6862impl ::core::default::Default for Exlvdsr {
6863    #[inline(always)]
6864    fn default() -> Exlvdsr {
6865        <crate::RegValueT<Exlvdsr_SPEC> as RegisterValue<_>>::new(32)
6866    }
6867}
6868pub mod exlvdsr {
6869
6870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6871    pub struct Det_SPEC;
6872    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
6873    impl Det {
6874        #[doc = "EXLVD pin low voltage not detected"]
6875        pub const _0: Self = Self::new(0);
6876
6877        #[doc = "EXLVD pin low voltage detected"]
6878        pub const _1: Self = Self::new(1);
6879    }
6880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6881    pub struct Mon_SPEC;
6882    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
6883    impl Mon {
6884        #[doc = "EXLVD < Vdet_exlvd"]
6885        pub const _0: Self = Self::new(0);
6886
6887        #[doc = "EXLVD ≥ Vdet_exlvd or MON is disabled"]
6888        pub const _1: Self = Self::new(1);
6889    }
6890}
6891#[doc(hidden)]
6892#[derive(Copy, Clone, Eq, PartialEq)]
6893pub struct Exlvdcmpcr_SPEC;
6894impl crate::sealed::RegSpec for Exlvdcmpcr_SPEC {
6895    type DataType = u8;
6896}
6897
6898#[doc = "EXLVD Comparator Control Register"]
6899pub type Exlvdcmpcr = crate::RegValueT<Exlvdcmpcr_SPEC>;
6900
6901impl Exlvdcmpcr {
6902    #[doc = "EXLVD Pin Low Voltage Detect Circuit Output Enable"]
6903    #[inline(always)]
6904    pub fn cmpe(
6905        self,
6906    ) -> crate::common::RegisterField<
6907        0,
6908        0x1,
6909        1,
6910        0,
6911        exlvdcmpcr::Cmpe,
6912        exlvdcmpcr::Cmpe,
6913        Exlvdcmpcr_SPEC,
6914        crate::common::RW,
6915    > {
6916        crate::common::RegisterField::<
6917            0,
6918            0x1,
6919            1,
6920            0,
6921            exlvdcmpcr::Cmpe,
6922            exlvdcmpcr::Cmpe,
6923            Exlvdcmpcr_SPEC,
6924            crate::common::RW,
6925        >::from_register(self, 0)
6926    }
6927}
6928impl ::core::default::Default for Exlvdcmpcr {
6929    #[inline(always)]
6930    fn default() -> Exlvdcmpcr {
6931        <crate::RegValueT<Exlvdcmpcr_SPEC> as RegisterValue<_>>::new(0)
6932    }
6933}
6934pub mod exlvdcmpcr {
6935
6936    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6937    pub struct Cmpe_SPEC;
6938    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
6939    impl Cmpe {
6940        #[doc = "EXLVD pin low voltage detect circuit output disabled"]
6941        pub const _0: Self = Self::new(0);
6942
6943        #[doc = "EXLVD pin low voltage detect circuit output enabled"]
6944        pub const _1: Self = Self::new(1);
6945    }
6946}
6947#[doc(hidden)]
6948#[derive(Copy, Clone, Eq, PartialEq)]
6949pub struct Exlvdicr_SPEC;
6950impl crate::sealed::RegSpec for Exlvdicr_SPEC {
6951    type DataType = u8;
6952}
6953
6954#[doc = "EXLVD Pin Low Voltage Detect Interrupt Control Register"]
6955pub type Exlvdicr = crate::RegValueT<Exlvdicr_SPEC>;
6956
6957impl Exlvdicr {
6958    #[doc = "EXLVD Pin Low Voltage Detect Interrupt Enable"]
6959    #[inline(always)]
6960    pub fn ie(
6961        self,
6962    ) -> crate::common::RegisterField<
6963        0,
6964        0x1,
6965        1,
6966        0,
6967        exlvdicr::Ie,
6968        exlvdicr::Ie,
6969        Exlvdicr_SPEC,
6970        crate::common::RW,
6971    > {
6972        crate::common::RegisterField::<
6973            0,
6974            0x1,
6975            1,
6976            0,
6977            exlvdicr::Ie,
6978            exlvdicr::Ie,
6979            Exlvdicr_SPEC,
6980            crate::common::RW,
6981        >::from_register(self, 0)
6982    }
6983
6984    #[doc = "EXLVD Pin Low Voltage Detect Interrupt Generation Condition Select"]
6985    #[inline(always)]
6986    pub fn idtsel(
6987        self,
6988    ) -> crate::common::RegisterField<
6989        4,
6990        0x3,
6991        1,
6992        0,
6993        exlvdicr::Idtsel,
6994        exlvdicr::Idtsel,
6995        Exlvdicr_SPEC,
6996        crate::common::RW,
6997    > {
6998        crate::common::RegisterField::<
6999            4,
7000            0x3,
7001            1,
7002            0,
7003            exlvdicr::Idtsel,
7004            exlvdicr::Idtsel,
7005            Exlvdicr_SPEC,
7006            crate::common::RW,
7007        >::from_register(self, 0)
7008    }
7009}
7010impl ::core::default::Default for Exlvdicr {
7011    #[inline(always)]
7012    fn default() -> Exlvdicr {
7013        <crate::RegValueT<Exlvdicr_SPEC> as RegisterValue<_>>::new(16)
7014    }
7015}
7016pub mod exlvdicr {
7017
7018    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7019    pub struct Ie_SPEC;
7020    pub type Ie = crate::EnumBitfieldStruct<u8, Ie_SPEC>;
7021    impl Ie {
7022        #[doc = "EXLVD pin low voltage detection interrupt disabled"]
7023        pub const _0: Self = Self::new(0);
7024
7025        #[doc = "EXLVD pin low voltage detection interrupt enabled"]
7026        pub const _1: Self = Self::new(1);
7027    }
7028    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7029    pub struct Idtsel_SPEC;
7030    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
7031    impl Idtsel {
7032        #[doc = "When EXLVD > Vdet_exlvd (rise) is detected"]
7033        pub const _00: Self = Self::new(0);
7034
7035        #[doc = "When EXLVD < Vdet_exlvd (fall) is detected"]
7036        pub const _01: Self = Self::new(1);
7037
7038        #[doc = "When fall and rise are detected"]
7039        pub const _10: Self = Self::new(2);
7040
7041        #[doc = "Settings prohibited"]
7042        pub const _11: Self = Self::new(3);
7043    }
7044}