ra2a1/sci1/
dccr.rs

1#[doc = "Register `DCCR` reader"]
2pub struct R(crate::R<DCCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DCCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DCCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DCCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DCCR` writer"]
17pub struct W(crate::W<DCCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DCCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DCCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DCCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DCMF` reader - Data Compare Match Flag\n\nThe field is **modified** in some way after a read operation."]
38pub type DCMF_R = crate::BitReader<DCMF_A>;
39#[doc = "Data Compare Match Flag\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum DCMF_A {
42    #[doc = "0: No matched"]
43    _0 = 0,
44    #[doc = "1: Matched"]
45    _1 = 1,
46}
47impl From<DCMF_A> for bool {
48    #[inline(always)]
49    fn from(variant: DCMF_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl DCMF_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> DCMF_A {
57        match self.bits {
58            false => DCMF_A::_0,
59            true => DCMF_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == DCMF_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == DCMF_A::_1
71    }
72}
73#[doc = "Field `DCMF` writer - Data Compare Match Flag"]
74pub type DCMF_W<'a, const O: u8> = crate::BitWriter0C<'a, u8, DCCR_SPEC, DCMF_A, O>;
75impl<'a, const O: u8> DCMF_W<'a, O> {
76    #[doc = "No matched"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(DCMF_A::_0)
80    }
81    #[doc = "Matched"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(DCMF_A::_1)
85    }
86}
87#[doc = "Field `DPER` reader - Data Compare Match Parity Error Flag\n\nThe field is **modified** in some way after a read operation."]
88pub type DPER_R = crate::BitReader<DPER_A>;
89#[doc = "Data Compare Match Parity Error Flag\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum DPER_A {
92    #[doc = "0: No parity error occurred"]
93    _0 = 0,
94    #[doc = "1: A parity error has occurred"]
95    _1 = 1,
96}
97impl From<DPER_A> for bool {
98    #[inline(always)]
99    fn from(variant: DPER_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl DPER_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> DPER_A {
107        match self.bits {
108            false => DPER_A::_0,
109            true => DPER_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == DPER_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == DPER_A::_1
121    }
122}
123#[doc = "Field `DPER` writer - Data Compare Match Parity Error Flag"]
124pub type DPER_W<'a, const O: u8> = crate::BitWriter0C<'a, u8, DCCR_SPEC, DPER_A, O>;
125impl<'a, const O: u8> DPER_W<'a, O> {
126    #[doc = "No parity error occurred"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(DPER_A::_0)
130    }
131    #[doc = "A parity error has occurred"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(DPER_A::_1)
135    }
136}
137#[doc = "Field `DFER` reader - Data Compare Match Framing Error Flag\n\nThe field is **modified** in some way after a read operation."]
138pub type DFER_R = crate::BitReader<DFER_A>;
139#[doc = "Data Compare Match Framing Error Flag\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum DFER_A {
142    #[doc = "0: No framing error occurred"]
143    _0 = 0,
144    #[doc = "1: A framing error has occurred"]
145    _1 = 1,
146}
147impl From<DFER_A> for bool {
148    #[inline(always)]
149    fn from(variant: DFER_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl DFER_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> DFER_A {
157        match self.bits {
158            false => DFER_A::_0,
159            true => DFER_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == DFER_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == DFER_A::_1
171    }
172}
173#[doc = "Field `DFER` writer - Data Compare Match Framing Error Flag"]
174pub type DFER_W<'a, const O: u8> = crate::BitWriter0C<'a, u8, DCCR_SPEC, DFER_A, O>;
175impl<'a, const O: u8> DFER_W<'a, O> {
176    #[doc = "No framing error occurred"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(DFER_A::_0)
180    }
181    #[doc = "A framing error has occurred"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(DFER_A::_1)
185    }
186}
187#[doc = "Field `IDSEL` reader - ID frame select Bit(Valid only in asynchronous mode(including multi-processor)"]
188pub type IDSEL_R = crate::BitReader<IDSEL_A>;
189#[doc = "ID frame select Bit(Valid only in asynchronous mode(including multi-processor)\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum IDSEL_A {
192    #[doc = "0: Always compare data regardless of the value of the MPB bit."]
193    _0 = 0,
194    #[doc = "1: Compare data when the MPB bit is 1 (ID frame) only."]
195    _1 = 1,
196}
197impl From<IDSEL_A> for bool {
198    #[inline(always)]
199    fn from(variant: IDSEL_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl IDSEL_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> IDSEL_A {
207        match self.bits {
208            false => IDSEL_A::_0,
209            true => IDSEL_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == IDSEL_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == IDSEL_A::_1
221    }
222}
223#[doc = "Field `IDSEL` writer - ID frame select Bit(Valid only in asynchronous mode(including multi-processor)"]
224pub type IDSEL_W<'a, const O: u8> = crate::BitWriter<'a, u8, DCCR_SPEC, IDSEL_A, O>;
225impl<'a, const O: u8> IDSEL_W<'a, O> {
226    #[doc = "Always compare data regardless of the value of the MPB bit."]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(IDSEL_A::_0)
230    }
231    #[doc = "Compare data when the MPB bit is 1 (ID frame) only."]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(IDSEL_A::_1)
235    }
236}
237#[doc = "Field `DCME` reader - Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)"]
238pub type DCME_R = crate::BitReader<DCME_A>;
239#[doc = "Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum DCME_A {
242    #[doc = "0: Address match function is disabled."]
243    _0 = 0,
244    #[doc = "1: Address match function is enabled"]
245    _1 = 1,
246}
247impl From<DCME_A> for bool {
248    #[inline(always)]
249    fn from(variant: DCME_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl DCME_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> DCME_A {
257        match self.bits {
258            false => DCME_A::_0,
259            true => DCME_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == DCME_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == DCME_A::_1
271    }
272}
273#[doc = "Field `DCME` writer - Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)"]
274pub type DCME_W<'a, const O: u8> = crate::BitWriter<'a, u8, DCCR_SPEC, DCME_A, O>;
275impl<'a, const O: u8> DCME_W<'a, O> {
276    #[doc = "Address match function is disabled."]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(DCME_A::_0)
280    }
281    #[doc = "Address match function is enabled"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(DCME_A::_1)
285    }
286}
287impl R {
288    #[doc = "Bit 0 - Data Compare Match Flag"]
289    #[inline(always)]
290    pub fn dcmf(&self) -> DCMF_R {
291        DCMF_R::new((self.bits & 1) != 0)
292    }
293    #[doc = "Bit 3 - Data Compare Match Parity Error Flag"]
294    #[inline(always)]
295    pub fn dper(&self) -> DPER_R {
296        DPER_R::new(((self.bits >> 3) & 1) != 0)
297    }
298    #[doc = "Bit 4 - Data Compare Match Framing Error Flag"]
299    #[inline(always)]
300    pub fn dfer(&self) -> DFER_R {
301        DFER_R::new(((self.bits >> 4) & 1) != 0)
302    }
303    #[doc = "Bit 6 - ID frame select Bit(Valid only in asynchronous mode(including multi-processor)"]
304    #[inline(always)]
305    pub fn idsel(&self) -> IDSEL_R {
306        IDSEL_R::new(((self.bits >> 6) & 1) != 0)
307    }
308    #[doc = "Bit 7 - Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)"]
309    #[inline(always)]
310    pub fn dcme(&self) -> DCME_R {
311        DCME_R::new(((self.bits >> 7) & 1) != 0)
312    }
313}
314impl W {
315    #[doc = "Bit 0 - Data Compare Match Flag"]
316    #[inline(always)]
317    #[must_use]
318    pub fn dcmf(&mut self) -> DCMF_W<0> {
319        DCMF_W::new(self)
320    }
321    #[doc = "Bit 3 - Data Compare Match Parity Error Flag"]
322    #[inline(always)]
323    #[must_use]
324    pub fn dper(&mut self) -> DPER_W<3> {
325        DPER_W::new(self)
326    }
327    #[doc = "Bit 4 - Data Compare Match Framing Error Flag"]
328    #[inline(always)]
329    #[must_use]
330    pub fn dfer(&mut self) -> DFER_W<4> {
331        DFER_W::new(self)
332    }
333    #[doc = "Bit 6 - ID frame select Bit(Valid only in asynchronous mode(including multi-processor)"]
334    #[inline(always)]
335    #[must_use]
336    pub fn idsel(&mut self) -> IDSEL_W<6> {
337        IDSEL_W::new(self)
338    }
339    #[doc = "Bit 7 - Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)"]
340    #[inline(always)]
341    #[must_use]
342    pub fn dcme(&mut self) -> DCME_W<7> {
343        DCME_W::new(self)
344    }
345    #[doc = "Writes raw bits to the register."]
346    #[inline(always)]
347    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
348        self.0.bits(bits);
349        self
350    }
351}
352#[doc = "Data Compare Match Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dccr](index.html) module"]
353pub struct DCCR_SPEC;
354impl crate::RegisterSpec for DCCR_SPEC {
355    type Ux = u8;
356}
357#[doc = "`read()` method returns [dccr::R](R) reader structure"]
358impl crate::Readable for DCCR_SPEC {
359    type Reader = R;
360}
361#[doc = "`write(|w| ..)` method takes [dccr::W](W) writer structure"]
362impl crate::Writable for DCCR_SPEC {
363    type Writer = W;
364    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x19;
365    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
366}
367#[doc = "`reset()` method sets DCCR to value 0x40"]
368impl crate::Resettable for DCCR_SPEC {
369    const RESET_VALUE: Self::Ux = 0x40;
370}
ra2a1/sci1/dccr.rs

ra2a1/sci1/
dccr.rs
