1#[doc = "Register `ICSER` reader"]
2pub struct R(crate::R<ICSER_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ICSER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ICSER_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ICSER_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ICSER` writer"]
17pub struct W(crate::W<ICSER_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ICSER_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ICSER_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ICSER_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SAR0E` reader - Slave Address Register 0 Enable"]
38pub type SAR0E_R = crate::BitReader<SAR0E_A>;
39#[doc = "Slave Address Register 0 Enable\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SAR0E_A {
42 #[doc = "0: Slave address in SARL0 and SARU0 is disabled."]
43 _0 = 0,
44 #[doc = "1: Slave address in SARL0 and SARU0 is enabled."]
45 _1 = 1,
46}
47impl From<SAR0E_A> for bool {
48 #[inline(always)]
49 fn from(variant: SAR0E_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl SAR0E_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> SAR0E_A {
57 match self.bits {
58 false => SAR0E_A::_0,
59 true => SAR0E_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == SAR0E_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == SAR0E_A::_1
71 }
72}
73#[doc = "Field `SAR0E` writer - Slave Address Register 0 Enable"]
74pub type SAR0E_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, SAR0E_A, O>;
75impl<'a, const O: u8> SAR0E_W<'a, O> {
76 #[doc = "Slave address in SARL0 and SARU0 is disabled."]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(SAR0E_A::_0)
80 }
81 #[doc = "Slave address in SARL0 and SARU0 is enabled."]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(SAR0E_A::_1)
85 }
86}
87#[doc = "Field `SAR1E` reader - Slave Address Register 1 Enable"]
88pub type SAR1E_R = crate::BitReader<SAR1E_A>;
89#[doc = "Slave Address Register 1 Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum SAR1E_A {
92 #[doc = "0: Slave address in SARL1 and SARU1 is disabled."]
93 _0 = 0,
94 #[doc = "1: Slave address in SARL1 and SARU1 is enabled."]
95 _1 = 1,
96}
97impl From<SAR1E_A> for bool {
98 #[inline(always)]
99 fn from(variant: SAR1E_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl SAR1E_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> SAR1E_A {
107 match self.bits {
108 false => SAR1E_A::_0,
109 true => SAR1E_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == SAR1E_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == SAR1E_A::_1
121 }
122}
123#[doc = "Field `SAR1E` writer - Slave Address Register 1 Enable"]
124pub type SAR1E_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, SAR1E_A, O>;
125impl<'a, const O: u8> SAR1E_W<'a, O> {
126 #[doc = "Slave address in SARL1 and SARU1 is disabled."]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(SAR1E_A::_0)
130 }
131 #[doc = "Slave address in SARL1 and SARU1 is enabled."]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(SAR1E_A::_1)
135 }
136}
137#[doc = "Field `SAR2E` reader - Slave Address Register 2 Enable"]
138pub type SAR2E_R = crate::BitReader<SAR2E_A>;
139#[doc = "Slave Address Register 2 Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum SAR2E_A {
142 #[doc = "0: Slave address in SARL2 and SARU2 is disabled."]
143 _0 = 0,
144 #[doc = "1: Slave address in SARL2 and SARU2 is enabled"]
145 _1 = 1,
146}
147impl From<SAR2E_A> for bool {
148 #[inline(always)]
149 fn from(variant: SAR2E_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl SAR2E_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> SAR2E_A {
157 match self.bits {
158 false => SAR2E_A::_0,
159 true => SAR2E_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == SAR2E_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == SAR2E_A::_1
171 }
172}
173#[doc = "Field `SAR2E` writer - Slave Address Register 2 Enable"]
174pub type SAR2E_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, SAR2E_A, O>;
175impl<'a, const O: u8> SAR2E_W<'a, O> {
176 #[doc = "Slave address in SARL2 and SARU2 is disabled."]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(SAR2E_A::_0)
180 }
181 #[doc = "Slave address in SARL2 and SARU2 is enabled"]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(SAR2E_A::_1)
185 }
186}
187#[doc = "Field `GCAE` reader - General Call Address Enable"]
188pub type GCAE_R = crate::BitReader<GCAE_A>;
189#[doc = "General Call Address Enable\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum GCAE_A {
192 #[doc = "0: General call address detection is disabled."]
193 _0 = 0,
194 #[doc = "1: General call address detection is enabled."]
195 _1 = 1,
196}
197impl From<GCAE_A> for bool {
198 #[inline(always)]
199 fn from(variant: GCAE_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl GCAE_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> GCAE_A {
207 match self.bits {
208 false => GCAE_A::_0,
209 true => GCAE_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == GCAE_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == GCAE_A::_1
221 }
222}
223#[doc = "Field `GCAE` writer - General Call Address Enable"]
224pub type GCAE_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, GCAE_A, O>;
225impl<'a, const O: u8> GCAE_W<'a, O> {
226 #[doc = "General call address detection is disabled."]
227 #[inline(always)]
228 pub fn _0(self) -> &'a mut W {
229 self.variant(GCAE_A::_0)
230 }
231 #[doc = "General call address detection is enabled."]
232 #[inline(always)]
233 pub fn _1(self) -> &'a mut W {
234 self.variant(GCAE_A::_1)
235 }
236}
237#[doc = "Field `DIDE` reader - Device-ID Address Detection Enable"]
238pub type DIDE_R = crate::BitReader<DIDE_A>;
239#[doc = "Device-ID Address Detection Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum DIDE_A {
242 #[doc = "0: Device-ID address detection is disabled."]
243 _0 = 0,
244 #[doc = "1: Device-ID address detection is enabled."]
245 _1 = 1,
246}
247impl From<DIDE_A> for bool {
248 #[inline(always)]
249 fn from(variant: DIDE_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl DIDE_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> DIDE_A {
257 match self.bits {
258 false => DIDE_A::_0,
259 true => DIDE_A::_1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `_0`"]
263 #[inline(always)]
264 pub fn is_0(&self) -> bool {
265 *self == DIDE_A::_0
266 }
267 #[doc = "Checks if the value of the field is `_1`"]
268 #[inline(always)]
269 pub fn is_1(&self) -> bool {
270 *self == DIDE_A::_1
271 }
272}
273#[doc = "Field `DIDE` writer - Device-ID Address Detection Enable"]
274pub type DIDE_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, DIDE_A, O>;
275impl<'a, const O: u8> DIDE_W<'a, O> {
276 #[doc = "Device-ID address detection is disabled."]
277 #[inline(always)]
278 pub fn _0(self) -> &'a mut W {
279 self.variant(DIDE_A::_0)
280 }
281 #[doc = "Device-ID address detection is enabled."]
282 #[inline(always)]
283 pub fn _1(self) -> &'a mut W {
284 self.variant(DIDE_A::_1)
285 }
286}
287#[doc = "Field `HOAE` reader - Host Address Enable"]
288pub type HOAE_R = crate::BitReader<HOAE_A>;
289#[doc = "Host Address Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum HOAE_A {
292 #[doc = "0: Host address detection is disabled."]
293 _0 = 0,
294 #[doc = "1: Host address detection is enabled."]
295 _1 = 1,
296}
297impl From<HOAE_A> for bool {
298 #[inline(always)]
299 fn from(variant: HOAE_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl HOAE_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> HOAE_A {
307 match self.bits {
308 false => HOAE_A::_0,
309 true => HOAE_A::_1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `_0`"]
313 #[inline(always)]
314 pub fn is_0(&self) -> bool {
315 *self == HOAE_A::_0
316 }
317 #[doc = "Checks if the value of the field is `_1`"]
318 #[inline(always)]
319 pub fn is_1(&self) -> bool {
320 *self == HOAE_A::_1
321 }
322}
323#[doc = "Field `HOAE` writer - Host Address Enable"]
324pub type HOAE_W<'a, const O: u8> = crate::BitWriter<'a, u8, ICSER_SPEC, HOAE_A, O>;
325impl<'a, const O: u8> HOAE_W<'a, O> {
326 #[doc = "Host address detection is disabled."]
327 #[inline(always)]
328 pub fn _0(self) -> &'a mut W {
329 self.variant(HOAE_A::_0)
330 }
331 #[doc = "Host address detection is enabled."]
332 #[inline(always)]
333 pub fn _1(self) -> &'a mut W {
334 self.variant(HOAE_A::_1)
335 }
336}
337impl R {
338 #[doc = "Bit 0 - Slave Address Register 0 Enable"]
339 #[inline(always)]
340 pub fn sar0e(&self) -> SAR0E_R {
341 SAR0E_R::new((self.bits & 1) != 0)
342 }
343 #[doc = "Bit 1 - Slave Address Register 1 Enable"]
344 #[inline(always)]
345 pub fn sar1e(&self) -> SAR1E_R {
346 SAR1E_R::new(((self.bits >> 1) & 1) != 0)
347 }
348 #[doc = "Bit 2 - Slave Address Register 2 Enable"]
349 #[inline(always)]
350 pub fn sar2e(&self) -> SAR2E_R {
351 SAR2E_R::new(((self.bits >> 2) & 1) != 0)
352 }
353 #[doc = "Bit 3 - General Call Address Enable"]
354 #[inline(always)]
355 pub fn gcae(&self) -> GCAE_R {
356 GCAE_R::new(((self.bits >> 3) & 1) != 0)
357 }
358 #[doc = "Bit 5 - Device-ID Address Detection Enable"]
359 #[inline(always)]
360 pub fn dide(&self) -> DIDE_R {
361 DIDE_R::new(((self.bits >> 5) & 1) != 0)
362 }
363 #[doc = "Bit 7 - Host Address Enable"]
364 #[inline(always)]
365 pub fn hoae(&self) -> HOAE_R {
366 HOAE_R::new(((self.bits >> 7) & 1) != 0)
367 }
368}
369impl W {
370 #[doc = "Bit 0 - Slave Address Register 0 Enable"]
371 #[inline(always)]
372 #[must_use]
373 pub fn sar0e(&mut self) -> SAR0E_W<0> {
374 SAR0E_W::new(self)
375 }
376 #[doc = "Bit 1 - Slave Address Register 1 Enable"]
377 #[inline(always)]
378 #[must_use]
379 pub fn sar1e(&mut self) -> SAR1E_W<1> {
380 SAR1E_W::new(self)
381 }
382 #[doc = "Bit 2 - Slave Address Register 2 Enable"]
383 #[inline(always)]
384 #[must_use]
385 pub fn sar2e(&mut self) -> SAR2E_W<2> {
386 SAR2E_W::new(self)
387 }
388 #[doc = "Bit 3 - General Call Address Enable"]
389 #[inline(always)]
390 #[must_use]
391 pub fn gcae(&mut self) -> GCAE_W<3> {
392 GCAE_W::new(self)
393 }
394 #[doc = "Bit 5 - Device-ID Address Detection Enable"]
395 #[inline(always)]
396 #[must_use]
397 pub fn dide(&mut self) -> DIDE_W<5> {
398 DIDE_W::new(self)
399 }
400 #[doc = "Bit 7 - Host Address Enable"]
401 #[inline(always)]
402 #[must_use]
403 pub fn hoae(&mut self) -> HOAE_W<7> {
404 HOAE_W::new(self)
405 }
406 #[doc = "Writes raw bits to the register."]
407 #[inline(always)]
408 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
409 self.0.bits(bits);
410 self
411 }
412}
413#[doc = "I2C Bus Status Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icser](index.html) module"]
414pub struct ICSER_SPEC;
415impl crate::RegisterSpec for ICSER_SPEC {
416 type Ux = u8;
417}
418#[doc = "`read()` method returns [icser::R](R) reader structure"]
419impl crate::Readable for ICSER_SPEC {
420 type Reader = R;
421}
422#[doc = "`write(|w| ..)` method takes [icser::W](W) writer structure"]
423impl crate::Writable for ICSER_SPEC {
424 type Writer = W;
425 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
426 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
427}
428#[doc = "`reset()` method sets ICSER to value 0x09"]
429impl crate::Resettable for ICSER_SPEC {
430 const RESET_VALUE: Self::Ux = 0x09;
431}