ra2a1/usbfs/
intenb0.rs

1#[doc = "Register `INTENB0` reader"]
2pub struct R(crate::R<INTENB0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENB0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENB0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENB0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENB0` writer"]
17pub struct W(crate::W<INTENB0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENB0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENB0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENB0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BRDYE` reader - Buffer Ready Interrupt Enable"]
38pub type BRDYE_R = crate::BitReader<BRDYE_A>;
39#[doc = "Buffer Ready Interrupt Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum BRDYE_A {
42    #[doc = "0: Interrupt output disabled"]
43    _0 = 0,
44    #[doc = "1: Interrupt output enabled"]
45    _1 = 1,
46}
47impl From<BRDYE_A> for bool {
48    #[inline(always)]
49    fn from(variant: BRDYE_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl BRDYE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> BRDYE_A {
57        match self.bits {
58            false => BRDYE_A::_0,
59            true => BRDYE_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == BRDYE_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == BRDYE_A::_1
71    }
72}
73#[doc = "Field `BRDYE` writer - Buffer Ready Interrupt Enable"]
74pub type BRDYE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, BRDYE_A, O>;
75impl<'a, const O: u8> BRDYE_W<'a, O> {
76    #[doc = "Interrupt output disabled"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(BRDYE_A::_0)
80    }
81    #[doc = "Interrupt output enabled"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(BRDYE_A::_1)
85    }
86}
87#[doc = "Field `NRDYE` reader - Buffer Not Ready Response Interrupt Enable"]
88pub type NRDYE_R = crate::BitReader<NRDYE_A>;
89#[doc = "Buffer Not Ready Response Interrupt Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum NRDYE_A {
92    #[doc = "0: Interrupt output disabled"]
93    _0 = 0,
94    #[doc = "1: Interrupt output enabled"]
95    _1 = 1,
96}
97impl From<NRDYE_A> for bool {
98    #[inline(always)]
99    fn from(variant: NRDYE_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl NRDYE_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> NRDYE_A {
107        match self.bits {
108            false => NRDYE_A::_0,
109            true => NRDYE_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == NRDYE_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == NRDYE_A::_1
121    }
122}
123#[doc = "Field `NRDYE` writer - Buffer Not Ready Response Interrupt Enable"]
124pub type NRDYE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, NRDYE_A, O>;
125impl<'a, const O: u8> NRDYE_W<'a, O> {
126    #[doc = "Interrupt output disabled"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(NRDYE_A::_0)
130    }
131    #[doc = "Interrupt output enabled"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(NRDYE_A::_1)
135    }
136}
137#[doc = "Field `BEMPE` reader - Buffer Empty Interrupt Enable"]
138pub type BEMPE_R = crate::BitReader<BEMPE_A>;
139#[doc = "Buffer Empty Interrupt Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum BEMPE_A {
142    #[doc = "0: Interrupt output disabled"]
143    _0 = 0,
144    #[doc = "1: Interrupt output enabled"]
145    _1 = 1,
146}
147impl From<BEMPE_A> for bool {
148    #[inline(always)]
149    fn from(variant: BEMPE_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl BEMPE_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> BEMPE_A {
157        match self.bits {
158            false => BEMPE_A::_0,
159            true => BEMPE_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == BEMPE_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == BEMPE_A::_1
171    }
172}
173#[doc = "Field `BEMPE` writer - Buffer Empty Interrupt Enable"]
174pub type BEMPE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, BEMPE_A, O>;
175impl<'a, const O: u8> BEMPE_W<'a, O> {
176    #[doc = "Interrupt output disabled"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(BEMPE_A::_0)
180    }
181    #[doc = "Interrupt output enabled"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(BEMPE_A::_1)
185    }
186}
187#[doc = "Field `CTRE` reader - Control Transfer Stage Transition Interrupt Enable"]
188pub type CTRE_R = crate::BitReader<CTRE_A>;
189#[doc = "Control Transfer Stage Transition Interrupt Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum CTRE_A {
192    #[doc = "0: Interrupt output disabled"]
193    _0 = 0,
194    #[doc = "1: Interrupt output enabled"]
195    _1 = 1,
196}
197impl From<CTRE_A> for bool {
198    #[inline(always)]
199    fn from(variant: CTRE_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl CTRE_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> CTRE_A {
207        match self.bits {
208            false => CTRE_A::_0,
209            true => CTRE_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == CTRE_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == CTRE_A::_1
221    }
222}
223#[doc = "Field `CTRE` writer - Control Transfer Stage Transition Interrupt Enable"]
224pub type CTRE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, CTRE_A, O>;
225impl<'a, const O: u8> CTRE_W<'a, O> {
226    #[doc = "Interrupt output disabled"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(CTRE_A::_0)
230    }
231    #[doc = "Interrupt output enabled"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(CTRE_A::_1)
235    }
236}
237#[doc = "Field `DVSE` reader - Device State Transition Interrupt Enable"]
238pub type DVSE_R = crate::BitReader<DVSE_A>;
239#[doc = "Device State Transition Interrupt Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum DVSE_A {
242    #[doc = "0: Interrupt output disabled"]
243    _0 = 0,
244    #[doc = "1: Interrupt output enabled"]
245    _1 = 1,
246}
247impl From<DVSE_A> for bool {
248    #[inline(always)]
249    fn from(variant: DVSE_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl DVSE_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> DVSE_A {
257        match self.bits {
258            false => DVSE_A::_0,
259            true => DVSE_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == DVSE_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == DVSE_A::_1
271    }
272}
273#[doc = "Field `DVSE` writer - Device State Transition Interrupt Enable"]
274pub type DVSE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, DVSE_A, O>;
275impl<'a, const O: u8> DVSE_W<'a, O> {
276    #[doc = "Interrupt output disabled"]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(DVSE_A::_0)
280    }
281    #[doc = "Interrupt output enabled"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(DVSE_A::_1)
285    }
286}
287#[doc = "Field `SOFE` reader - Frame Number Update Interrupt Enable"]
288pub type SOFE_R = crate::BitReader<SOFE_A>;
289#[doc = "Frame Number Update Interrupt Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum SOFE_A {
292    #[doc = "0: Interrupt output disabled"]
293    _0 = 0,
294    #[doc = "1: Interrupt output enabled"]
295    _1 = 1,
296}
297impl From<SOFE_A> for bool {
298    #[inline(always)]
299    fn from(variant: SOFE_A) -> Self {
300        variant as u8 != 0
301    }
302}
303impl SOFE_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> SOFE_A {
307        match self.bits {
308            false => SOFE_A::_0,
309            true => SOFE_A::_1,
310        }
311    }
312    #[doc = "Checks if the value of the field is `_0`"]
313    #[inline(always)]
314    pub fn is_0(&self) -> bool {
315        *self == SOFE_A::_0
316    }
317    #[doc = "Checks if the value of the field is `_1`"]
318    #[inline(always)]
319    pub fn is_1(&self) -> bool {
320        *self == SOFE_A::_1
321    }
322}
323#[doc = "Field `SOFE` writer - Frame Number Update Interrupt Enable"]
324pub type SOFE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, SOFE_A, O>;
325impl<'a, const O: u8> SOFE_W<'a, O> {
326    #[doc = "Interrupt output disabled"]
327    #[inline(always)]
328    pub fn _0(self) -> &'a mut W {
329        self.variant(SOFE_A::_0)
330    }
331    #[doc = "Interrupt output enabled"]
332    #[inline(always)]
333    pub fn _1(self) -> &'a mut W {
334        self.variant(SOFE_A::_1)
335    }
336}
337#[doc = "Field `RSME` reader - Resume Interrupt Enable"]
338pub type RSME_R = crate::BitReader<RSME_A>;
339#[doc = "Resume Interrupt Enable\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum RSME_A {
342    #[doc = "0: Interrupt output disabled"]
343    _0 = 0,
344    #[doc = "1: Interrupt output enabled"]
345    _1 = 1,
346}
347impl From<RSME_A> for bool {
348    #[inline(always)]
349    fn from(variant: RSME_A) -> Self {
350        variant as u8 != 0
351    }
352}
353impl RSME_R {
354    #[doc = "Get enumerated values variant"]
355    #[inline(always)]
356    pub fn variant(&self) -> RSME_A {
357        match self.bits {
358            false => RSME_A::_0,
359            true => RSME_A::_1,
360        }
361    }
362    #[doc = "Checks if the value of the field is `_0`"]
363    #[inline(always)]
364    pub fn is_0(&self) -> bool {
365        *self == RSME_A::_0
366    }
367    #[doc = "Checks if the value of the field is `_1`"]
368    #[inline(always)]
369    pub fn is_1(&self) -> bool {
370        *self == RSME_A::_1
371    }
372}
373#[doc = "Field `RSME` writer - Resume Interrupt Enable"]
374pub type RSME_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, RSME_A, O>;
375impl<'a, const O: u8> RSME_W<'a, O> {
376    #[doc = "Interrupt output disabled"]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(RSME_A::_0)
380    }
381    #[doc = "Interrupt output enabled"]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(RSME_A::_1)
385    }
386}
387#[doc = "Field `VBSE` reader - VBUS Interrupt Enable"]
388pub type VBSE_R = crate::BitReader<VBSE_A>;
389#[doc = "VBUS Interrupt Enable\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum VBSE_A {
392    #[doc = "0: Interrupt output disabled"]
393    _0 = 0,
394    #[doc = "1: Interrupt output enabled"]
395    _1 = 1,
396}
397impl From<VBSE_A> for bool {
398    #[inline(always)]
399    fn from(variant: VBSE_A) -> Self {
400        variant as u8 != 0
401    }
402}
403impl VBSE_R {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub fn variant(&self) -> VBSE_A {
407        match self.bits {
408            false => VBSE_A::_0,
409            true => VBSE_A::_1,
410        }
411    }
412    #[doc = "Checks if the value of the field is `_0`"]
413    #[inline(always)]
414    pub fn is_0(&self) -> bool {
415        *self == VBSE_A::_0
416    }
417    #[doc = "Checks if the value of the field is `_1`"]
418    #[inline(always)]
419    pub fn is_1(&self) -> bool {
420        *self == VBSE_A::_1
421    }
422}
423#[doc = "Field `VBSE` writer - VBUS Interrupt Enable"]
424pub type VBSE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB0_SPEC, VBSE_A, O>;
425impl<'a, const O: u8> VBSE_W<'a, O> {
426    #[doc = "Interrupt output disabled"]
427    #[inline(always)]
428    pub fn _0(self) -> &'a mut W {
429        self.variant(VBSE_A::_0)
430    }
431    #[doc = "Interrupt output enabled"]
432    #[inline(always)]
433    pub fn _1(self) -> &'a mut W {
434        self.variant(VBSE_A::_1)
435    }
436}
437impl R {
438    #[doc = "Bit 8 - Buffer Ready Interrupt Enable"]
439    #[inline(always)]
440    pub fn brdye(&self) -> BRDYE_R {
441        BRDYE_R::new(((self.bits >> 8) & 1) != 0)
442    }
443    #[doc = "Bit 9 - Buffer Not Ready Response Interrupt Enable"]
444    #[inline(always)]
445    pub fn nrdye(&self) -> NRDYE_R {
446        NRDYE_R::new(((self.bits >> 9) & 1) != 0)
447    }
448    #[doc = "Bit 10 - Buffer Empty Interrupt Enable"]
449    #[inline(always)]
450    pub fn bempe(&self) -> BEMPE_R {
451        BEMPE_R::new(((self.bits >> 10) & 1) != 0)
452    }
453    #[doc = "Bit 11 - Control Transfer Stage Transition Interrupt Enable"]
454    #[inline(always)]
455    pub fn ctre(&self) -> CTRE_R {
456        CTRE_R::new(((self.bits >> 11) & 1) != 0)
457    }
458    #[doc = "Bit 12 - Device State Transition Interrupt Enable"]
459    #[inline(always)]
460    pub fn dvse(&self) -> DVSE_R {
461        DVSE_R::new(((self.bits >> 12) & 1) != 0)
462    }
463    #[doc = "Bit 13 - Frame Number Update Interrupt Enable"]
464    #[inline(always)]
465    pub fn sofe(&self) -> SOFE_R {
466        SOFE_R::new(((self.bits >> 13) & 1) != 0)
467    }
468    #[doc = "Bit 14 - Resume Interrupt Enable"]
469    #[inline(always)]
470    pub fn rsme(&self) -> RSME_R {
471        RSME_R::new(((self.bits >> 14) & 1) != 0)
472    }
473    #[doc = "Bit 15 - VBUS Interrupt Enable"]
474    #[inline(always)]
475    pub fn vbse(&self) -> VBSE_R {
476        VBSE_R::new(((self.bits >> 15) & 1) != 0)
477    }
478}
479impl W {
480    #[doc = "Bit 8 - Buffer Ready Interrupt Enable"]
481    #[inline(always)]
482    #[must_use]
483    pub fn brdye(&mut self) -> BRDYE_W<8> {
484        BRDYE_W::new(self)
485    }
486    #[doc = "Bit 9 - Buffer Not Ready Response Interrupt Enable"]
487    #[inline(always)]
488    #[must_use]
489    pub fn nrdye(&mut self) -> NRDYE_W<9> {
490        NRDYE_W::new(self)
491    }
492    #[doc = "Bit 10 - Buffer Empty Interrupt Enable"]
493    #[inline(always)]
494    #[must_use]
495    pub fn bempe(&mut self) -> BEMPE_W<10> {
496        BEMPE_W::new(self)
497    }
498    #[doc = "Bit 11 - Control Transfer Stage Transition Interrupt Enable"]
499    #[inline(always)]
500    #[must_use]
501    pub fn ctre(&mut self) -> CTRE_W<11> {
502        CTRE_W::new(self)
503    }
504    #[doc = "Bit 12 - Device State Transition Interrupt Enable"]
505    #[inline(always)]
506    #[must_use]
507    pub fn dvse(&mut self) -> DVSE_W<12> {
508        DVSE_W::new(self)
509    }
510    #[doc = "Bit 13 - Frame Number Update Interrupt Enable"]
511    #[inline(always)]
512    #[must_use]
513    pub fn sofe(&mut self) -> SOFE_W<13> {
514        SOFE_W::new(self)
515    }
516    #[doc = "Bit 14 - Resume Interrupt Enable"]
517    #[inline(always)]
518    #[must_use]
519    pub fn rsme(&mut self) -> RSME_W<14> {
520        RSME_W::new(self)
521    }
522    #[doc = "Bit 15 - VBUS Interrupt Enable"]
523    #[inline(always)]
524    #[must_use]
525    pub fn vbse(&mut self) -> VBSE_W<15> {
526        VBSE_W::new(self)
527    }
528    #[doc = "Writes raw bits to the register."]
529    #[inline(always)]
530    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
531        self.0.bits(bits);
532        self
533    }
534}
535#[doc = "Interrupt Enable Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenb0](index.html) module"]
536pub struct INTENB0_SPEC;
537impl crate::RegisterSpec for INTENB0_SPEC {
538    type Ux = u16;
539}
540#[doc = "`read()` method returns [intenb0::R](R) reader structure"]
541impl crate::Readable for INTENB0_SPEC {
542    type Reader = R;
543}
544#[doc = "`write(|w| ..)` method takes [intenb0::W](W) writer structure"]
545impl crate::Writable for INTENB0_SPEC {
546    type Writer = W;
547    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
548    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
549}
550#[doc = "`reset()` method sets INTENB0 to value 0"]
551impl crate::Resettable for INTENB0_SPEC {
552    const RESET_VALUE: Self::Ux = 0;
553}
ra2a1/usbfs/intenb0.rs

ra2a1/usbfs/
intenb0.rs
