ra2a1/ctsu/
ctsuchtrc0.rs

1#[doc = "Register `CTSUCHTRC0` reader"]
2pub struct R(crate::R<CTSUCHTRC0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTSUCHTRC0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTSUCHTRC0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTSUCHTRC0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTSUCHTRC0` writer"]
17pub struct W(crate::W<CTSUCHTRC0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTSUCHTRC0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTSUCHTRC0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTSUCHTRC0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CTSUCHTRC0` reader - CTSU Channel Transmit/Receive Control 0"]
38pub type CTSUCHTRC0_R = crate::FieldReader<u8, CTSUCHTRC0_A>;
39#[doc = "CTSU Channel Transmit/Receive Control 0\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CTSUCHTRC0_A {
43    #[doc = "0: Reception"]
44    _0 = 0,
45    #[doc = "1: Transmission"]
46    _1 = 1,
47}
48impl From<CTSUCHTRC0_A> for u8 {
49    #[inline(always)]
50    fn from(variant: CTSUCHTRC0_A) -> Self {
51        variant as _
52    }
53}
54impl CTSUCHTRC0_R {
55    #[doc = "Get enumerated values variant"]
56    #[inline(always)]
57    pub fn variant(&self) -> Option<CTSUCHTRC0_A> {
58        match self.bits {
59            0 => Some(CTSUCHTRC0_A::_0),
60            1 => Some(CTSUCHTRC0_A::_1),
61            _ => None,
62        }
63    }
64    #[doc = "Checks if the value of the field is `_0`"]
65    #[inline(always)]
66    pub fn is_0(&self) -> bool {
67        *self == CTSUCHTRC0_A::_0
68    }
69    #[doc = "Checks if the value of the field is `_1`"]
70    #[inline(always)]
71    pub fn is_1(&self) -> bool {
72        *self == CTSUCHTRC0_A::_1
73    }
74}
75#[doc = "Field `CTSUCHTRC0` writer - CTSU Channel Transmit/Receive Control 0"]
76pub type CTSUCHTRC0_W<'a, const O: u8> =
77    crate::FieldWriter<'a, u8, CTSUCHTRC0_SPEC, u8, CTSUCHTRC0_A, 8, O>;
78impl<'a, const O: u8> CTSUCHTRC0_W<'a, O> {
79    #[doc = "Reception"]
80    #[inline(always)]
81    pub fn _0(self) -> &'a mut W {
82        self.variant(CTSUCHTRC0_A::_0)
83    }
84    #[doc = "Transmission"]
85    #[inline(always)]
86    pub fn _1(self) -> &'a mut W {
87        self.variant(CTSUCHTRC0_A::_1)
88    }
89}
90impl R {
91    #[doc = "Bits 0:7 - CTSU Channel Transmit/Receive Control 0"]
92    #[inline(always)]
93    pub fn ctsuchtrc0(&self) -> CTSUCHTRC0_R {
94        CTSUCHTRC0_R::new(self.bits)
95    }
96}
97impl W {
98    #[doc = "Bits 0:7 - CTSU Channel Transmit/Receive Control 0"]
99    #[inline(always)]
100    #[must_use]
101    pub fn ctsuchtrc0(&mut self) -> CTSUCHTRC0_W<0> {
102        CTSUCHTRC0_W::new(self)
103    }
104    #[doc = "Writes raw bits to the register."]
105    #[inline(always)]
106    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
107        self.0.bits(bits);
108        self
109    }
110}
111#[doc = "CTSU Channel Transmit/Receive Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctsuchtrc0](index.html) module"]
112pub struct CTSUCHTRC0_SPEC;
113impl crate::RegisterSpec for CTSUCHTRC0_SPEC {
114    type Ux = u8;
115}
116#[doc = "`read()` method returns [ctsuchtrc0::R](R) reader structure"]
117impl crate::Readable for CTSUCHTRC0_SPEC {
118    type Reader = R;
119}
120#[doc = "`write(|w| ..)` method takes [ctsuchtrc0::W](W) writer structure"]
121impl crate::Writable for CTSUCHTRC0_SPEC {
122    type Writer = W;
123    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
124    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
125}
126#[doc = "`reset()` method sets CTSUCHTRC0 to value 0"]
127impl crate::Resettable for CTSUCHTRC0_SPEC {
128    const RESET_VALUE: Self::Ux = 0;
129}
ra2a1/ctsu/ctsuchtrc0.rs

ra2a1/ctsu/
ctsuchtrc0.rs
