ra2a1_pac/
usbfs.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"USB 2.0 FS Module"]
28unsafe impl ::core::marker::Send for super::Usbfs {}
29unsafe impl ::core::marker::Sync for super::Usbfs {}
30impl super::Usbfs {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "System Configuration Control Register"]
38    #[inline(always)]
39    pub const fn syscfg(
40        &self,
41    ) -> &'static crate::common::Reg<self::Syscfg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Syscfg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "System Configuration Status Register 0"]
50    #[inline(always)]
51    pub const fn syssts0(
52        &self,
53    ) -> &'static crate::common::Reg<self::Syssts0_SPEC, crate::common::R> {
54        unsafe {
55            crate::common::Reg::<self::Syssts0_SPEC, crate::common::R>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "Device State Control Register 0"]
62    #[inline(always)]
63    pub const fn dvstctr0(
64        &self,
65    ) -> &'static crate::common::Reg<self::Dvstctr0_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Dvstctr0_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(8usize),
69            )
70        }
71    }
72
73    #[doc = "CFIFO Port Register"]
74    #[inline(always)]
75    pub const fn cfifo(&self) -> &'static crate::common::Reg<self::Cfifo_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Cfifo_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(20usize),
79            )
80        }
81    }
82
83    #[doc = "CFIFO Port Register L"]
84    #[inline(always)]
85    pub const fn cfifol(
86        &self,
87    ) -> &'static crate::common::Reg<self::Cfifol_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Cfifol_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(20usize),
91            )
92        }
93    }
94
95    #[doc = "CFIFO Port Select Register"]
96    #[inline(always)]
97    pub const fn cfifosel(
98        &self,
99    ) -> &'static crate::common::Reg<self::Cfifosel_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Cfifosel_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(32usize),
103            )
104        }
105    }
106
107    #[doc = "CFIFO Port Control Register"]
108    #[inline(always)]
109    pub const fn cfifoctr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Cfifoctr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Cfifoctr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(34usize),
115            )
116        }
117    }
118
119    #[doc = "Interrupt Enable Register 0"]
120    #[inline(always)]
121    pub const fn intenb0(
122        &self,
123    ) -> &'static crate::common::Reg<self::Intenb0_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Intenb0_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(48usize),
127            )
128        }
129    }
130
131    #[doc = "BRDY Interrupt Enable Register"]
132    #[inline(always)]
133    pub const fn brdyenb(
134        &self,
135    ) -> &'static crate::common::Reg<self::Brdyenb_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Brdyenb_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(54usize),
139            )
140        }
141    }
142
143    #[doc = "NRDY Interrupt Enable Register"]
144    #[inline(always)]
145    pub const fn nrdyenb(
146        &self,
147    ) -> &'static crate::common::Reg<self::Nrdyenb_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Nrdyenb_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(56usize),
151            )
152        }
153    }
154
155    #[doc = "BEMP Interrupt Enable Register"]
156    #[inline(always)]
157    pub const fn bempenb(
158        &self,
159    ) -> &'static crate::common::Reg<self::Bempenb_SPEC, crate::common::RW> {
160        unsafe {
161            crate::common::Reg::<self::Bempenb_SPEC, crate::common::RW>::from_ptr(
162                self._svd2pac_as_ptr().add(58usize),
163            )
164        }
165    }
166
167    #[doc = "SOF Output Configuration Register"]
168    #[inline(always)]
169    pub const fn sofcfg(
170        &self,
171    ) -> &'static crate::common::Reg<self::Sofcfg_SPEC, crate::common::RW> {
172        unsafe {
173            crate::common::Reg::<self::Sofcfg_SPEC, crate::common::RW>::from_ptr(
174                self._svd2pac_as_ptr().add(60usize),
175            )
176        }
177    }
178
179    #[doc = "Interrupt Status Register 0"]
180    #[inline(always)]
181    pub const fn intsts0(
182        &self,
183    ) -> &'static crate::common::Reg<self::Intsts0_SPEC, crate::common::RW> {
184        unsafe {
185            crate::common::Reg::<self::Intsts0_SPEC, crate::common::RW>::from_ptr(
186                self._svd2pac_as_ptr().add(64usize),
187            )
188        }
189    }
190
191    #[doc = "BRDY Interrupt Status Register"]
192    #[inline(always)]
193    pub const fn brdysts(
194        &self,
195    ) -> &'static crate::common::Reg<self::Brdysts_SPEC, crate::common::RW> {
196        unsafe {
197            crate::common::Reg::<self::Brdysts_SPEC, crate::common::RW>::from_ptr(
198                self._svd2pac_as_ptr().add(70usize),
199            )
200        }
201    }
202
203    #[doc = "NRDY Interrupt Status Register"]
204    #[inline(always)]
205    pub const fn nrdysts(
206        &self,
207    ) -> &'static crate::common::Reg<self::Nrdysts_SPEC, crate::common::RW> {
208        unsafe {
209            crate::common::Reg::<self::Nrdysts_SPEC, crate::common::RW>::from_ptr(
210                self._svd2pac_as_ptr().add(72usize),
211            )
212        }
213    }
214
215    #[doc = "BEMP Interrupt Status Register"]
216    #[inline(always)]
217    pub const fn bempsts(
218        &self,
219    ) -> &'static crate::common::Reg<self::Bempsts_SPEC, crate::common::RW> {
220        unsafe {
221            crate::common::Reg::<self::Bempsts_SPEC, crate::common::RW>::from_ptr(
222                self._svd2pac_as_ptr().add(74usize),
223            )
224        }
225    }
226
227    #[doc = "Frame Number Register"]
228    #[inline(always)]
229    pub const fn frmnum(
230        &self,
231    ) -> &'static crate::common::Reg<self::Frmnum_SPEC, crate::common::RW> {
232        unsafe {
233            crate::common::Reg::<self::Frmnum_SPEC, crate::common::RW>::from_ptr(
234                self._svd2pac_as_ptr().add(76usize),
235            )
236        }
237    }
238
239    #[doc = "USB Request Type Register"]
240    #[inline(always)]
241    pub const fn usbreq(&self) -> &'static crate::common::Reg<self::Usbreq_SPEC, crate::common::R> {
242        unsafe {
243            crate::common::Reg::<self::Usbreq_SPEC, crate::common::R>::from_ptr(
244                self._svd2pac_as_ptr().add(84usize),
245            )
246        }
247    }
248
249    #[doc = "USB Request Value Register"]
250    #[inline(always)]
251    pub const fn usbval(&self) -> &'static crate::common::Reg<self::Usbval_SPEC, crate::common::R> {
252        unsafe {
253            crate::common::Reg::<self::Usbval_SPEC, crate::common::R>::from_ptr(
254                self._svd2pac_as_ptr().add(86usize),
255            )
256        }
257    }
258
259    #[doc = "USB Request Index Register"]
260    #[inline(always)]
261    pub const fn usbindx(
262        &self,
263    ) -> &'static crate::common::Reg<self::Usbindx_SPEC, crate::common::R> {
264        unsafe {
265            crate::common::Reg::<self::Usbindx_SPEC, crate::common::R>::from_ptr(
266                self._svd2pac_as_ptr().add(88usize),
267            )
268        }
269    }
270
271    #[doc = "USB Request Length Register"]
272    #[inline(always)]
273    pub const fn usbleng(
274        &self,
275    ) -> &'static crate::common::Reg<self::Usbleng_SPEC, crate::common::R> {
276        unsafe {
277            crate::common::Reg::<self::Usbleng_SPEC, crate::common::R>::from_ptr(
278                self._svd2pac_as_ptr().add(90usize),
279            )
280        }
281    }
282
283    #[doc = "DCP Configuration Register"]
284    #[inline(always)]
285    pub const fn dcpcfg(
286        &self,
287    ) -> &'static crate::common::Reg<self::Dcpcfg_SPEC, crate::common::RW> {
288        unsafe {
289            crate::common::Reg::<self::Dcpcfg_SPEC, crate::common::RW>::from_ptr(
290                self._svd2pac_as_ptr().add(92usize),
291            )
292        }
293    }
294
295    #[doc = "DCP Maximum Packet Size Register"]
296    #[inline(always)]
297    pub const fn dcpmaxp(
298        &self,
299    ) -> &'static crate::common::Reg<self::Dcpmaxp_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Dcpmaxp_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(94usize),
303            )
304        }
305    }
306
307    #[doc = "DCP Control Register"]
308    #[inline(always)]
309    pub const fn dcpctr(
310        &self,
311    ) -> &'static crate::common::Reg<self::Dcpctr_SPEC, crate::common::RW> {
312        unsafe {
313            crate::common::Reg::<self::Dcpctr_SPEC, crate::common::RW>::from_ptr(
314                self._svd2pac_as_ptr().add(96usize),
315            )
316        }
317    }
318
319    #[doc = "Pipe Window Select Register"]
320    #[inline(always)]
321    pub const fn pipesel(
322        &self,
323    ) -> &'static crate::common::Reg<self::Pipesel_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Pipesel_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(100usize),
327            )
328        }
329    }
330
331    #[doc = "Pipe Configuration Register"]
332    #[inline(always)]
333    pub const fn pipecfg(
334        &self,
335    ) -> &'static crate::common::Reg<self::Pipecfg_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Pipecfg_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(104usize),
339            )
340        }
341    }
342
343    #[doc = "Pipe Maximum Packet Size Register"]
344    #[inline(always)]
345    pub const fn pipemaxp(
346        &self,
347    ) -> &'static crate::common::Reg<self::Pipemaxp_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Pipemaxp_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(108usize),
351            )
352        }
353    }
354
355    #[doc = "Pipe %s Control Register"]
356    #[inline(always)]
357    pub const fn pipectr(
358        &self,
359    ) -> &'static crate::common::ClusterRegisterArray<
360        crate::common::Reg<self::Pipectr_SPEC, crate::common::RW>,
361        2,
362        0x2,
363    > {
364        unsafe {
365            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x7ausize))
366        }
367    }
368    #[inline(always)]
369    pub const fn pipe6ctr(
370        &self,
371    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
372        unsafe {
373            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
374                self._svd2pac_as_ptr().add(0x7ausize),
375            )
376        }
377    }
378    #[inline(always)]
379    pub const fn pipe7ctr(
380        &self,
381    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
382        unsafe {
383            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
384                self._svd2pac_as_ptr().add(0x7cusize),
385            )
386        }
387    }
388
389    #[doc = "Pipe %s Transaction Counter Enable Register"]
390    #[inline(always)]
391    pub const fn pipetre(
392        &self,
393    ) -> &'static crate::common::ClusterRegisterArray<
394        crate::common::Reg<self::Pipetre_SPEC, crate::common::RW>,
395        2,
396        0x4,
397    > {
398        unsafe {
399            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x9cusize))
400        }
401    }
402    #[inline(always)]
403    pub const fn pipe4tre(
404        &self,
405    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
406        unsafe {
407            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
408                self._svd2pac_as_ptr().add(0x9cusize),
409            )
410        }
411    }
412    #[inline(always)]
413    pub const fn pipe5tre(
414        &self,
415    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
416        unsafe {
417            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
418                self._svd2pac_as_ptr().add(0xa0usize),
419            )
420        }
421    }
422
423    #[doc = "Pipe %s Transaction Counter Register"]
424    #[inline(always)]
425    pub const fn pipetrn(
426        &self,
427    ) -> &'static crate::common::ClusterRegisterArray<
428        crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW>,
429        2,
430        0x4,
431    > {
432        unsafe {
433            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x9eusize))
434        }
435    }
436    #[inline(always)]
437    pub const fn pipe4trn(
438        &self,
439    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
440        unsafe {
441            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
442                self._svd2pac_as_ptr().add(0x9eusize),
443            )
444        }
445    }
446    #[inline(always)]
447    pub const fn pipe5trn(
448        &self,
449    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(0xa2usize),
453            )
454        }
455    }
456
457    #[doc = "USB Module Control Register"]
458    #[inline(always)]
459    pub const fn usbmc(&self) -> &'static crate::common::Reg<self::Usbmc_SPEC, crate::common::RW> {
460        unsafe {
461            crate::common::Reg::<self::Usbmc_SPEC, crate::common::RW>::from_ptr(
462                self._svd2pac_as_ptr().add(204usize),
463            )
464        }
465    }
466
467    #[doc = "BC Control Register 0"]
468    #[inline(always)]
469    pub const fn usbbcctrl0(
470        &self,
471    ) -> &'static crate::common::Reg<self::Usbbcctrl0_SPEC, crate::common::RW> {
472        unsafe {
473            crate::common::Reg::<self::Usbbcctrl0_SPEC, crate::common::RW>::from_ptr(
474                self._svd2pac_as_ptr().add(176usize),
475            )
476        }
477    }
478
479    #[doc = "USB Clock Selection Register"]
480    #[inline(always)]
481    pub const fn ucksel(
482        &self,
483    ) -> &'static crate::common::Reg<self::Ucksel_SPEC, crate::common::RW> {
484        unsafe {
485            crate::common::Reg::<self::Ucksel_SPEC, crate::common::RW>::from_ptr(
486                self._svd2pac_as_ptr().add(196usize),
487            )
488        }
489    }
490}
491#[doc(hidden)]
492#[derive(Copy, Clone, Eq, PartialEq)]
493pub struct Syscfg_SPEC;
494impl crate::sealed::RegSpec for Syscfg_SPEC {
495    type DataType = u16;
496}
497
498#[doc = "System Configuration Control Register"]
499pub type Syscfg = crate::RegValueT<Syscfg_SPEC>;
500
501impl Syscfg {
502    #[doc = "USB Clock Enable"]
503    #[inline(always)]
504    pub fn scke(
505        self,
506    ) -> crate::common::RegisterField<
507        10,
508        0x1,
509        1,
510        0,
511        syscfg::Scke,
512        syscfg::Scke,
513        Syscfg_SPEC,
514        crate::common::RW,
515    > {
516        crate::common::RegisterField::<
517            10,
518            0x1,
519            1,
520            0,
521            syscfg::Scke,
522            syscfg::Scke,
523            Syscfg_SPEC,
524            crate::common::RW,
525        >::from_register(self, 0)
526    }
527
528    #[doc = "CNEN Single End Receiver Enable"]
529    #[inline(always)]
530    pub fn cnen(
531        self,
532    ) -> crate::common::RegisterField<
533        8,
534        0x1,
535        1,
536        0,
537        syscfg::Cnen,
538        syscfg::Cnen,
539        Syscfg_SPEC,
540        crate::common::RW,
541    > {
542        crate::common::RegisterField::<
543            8,
544            0x1,
545            1,
546            0,
547            syscfg::Cnen,
548            syscfg::Cnen,
549            Syscfg_SPEC,
550            crate::common::RW,
551        >::from_register(self, 0)
552    }
553
554    #[doc = "D+ Line Resistor Control"]
555    #[inline(always)]
556    pub fn dprpu(
557        self,
558    ) -> crate::common::RegisterField<
559        4,
560        0x1,
561        1,
562        0,
563        syscfg::Dprpu,
564        syscfg::Dprpu,
565        Syscfg_SPEC,
566        crate::common::RW,
567    > {
568        crate::common::RegisterField::<
569            4,
570            0x1,
571            1,
572            0,
573            syscfg::Dprpu,
574            syscfg::Dprpu,
575            Syscfg_SPEC,
576            crate::common::RW,
577        >::from_register(self, 0)
578    }
579
580    #[doc = "D- Line Resistor Control"]
581    #[inline(always)]
582    pub fn dmrpu(
583        self,
584    ) -> crate::common::RegisterField<
585        3,
586        0x1,
587        1,
588        0,
589        syscfg::Dmrpu,
590        syscfg::Dmrpu,
591        Syscfg_SPEC,
592        crate::common::RW,
593    > {
594        crate::common::RegisterField::<
595            3,
596            0x1,
597            1,
598            0,
599            syscfg::Dmrpu,
600            syscfg::Dmrpu,
601            Syscfg_SPEC,
602            crate::common::RW,
603        >::from_register(self, 0)
604    }
605
606    #[doc = "These bits are read as 00. The write value should be 00."]
607    #[inline(always)]
608    pub fn reserved(
609        self,
610    ) -> crate::common::RegisterField<1, 0x3, 1, 0, u8, u8, Syscfg_SPEC, crate::common::RW> {
611        crate::common::RegisterField::<1,0x3,1,0,u8,u8,Syscfg_SPEC,crate::common::RW>::from_register(self,0)
612    }
613
614    #[doc = "USB Operation Enable"]
615    #[inline(always)]
616    pub fn usbe(
617        self,
618    ) -> crate::common::RegisterField<
619        0,
620        0x1,
621        1,
622        0,
623        syscfg::Usbe,
624        syscfg::Usbe,
625        Syscfg_SPEC,
626        crate::common::RW,
627    > {
628        crate::common::RegisterField::<
629            0,
630            0x1,
631            1,
632            0,
633            syscfg::Usbe,
634            syscfg::Usbe,
635            Syscfg_SPEC,
636            crate::common::RW,
637        >::from_register(self, 0)
638    }
639}
640impl ::core::default::Default for Syscfg {
641    #[inline(always)]
642    fn default() -> Syscfg {
643        <crate::RegValueT<Syscfg_SPEC> as RegisterValue<_>>::new(0)
644    }
645}
646pub mod syscfg {
647
648    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
649    pub struct Scke_SPEC;
650    pub type Scke = crate::EnumBitfieldStruct<u8, Scke_SPEC>;
651    impl Scke {
652        #[doc = "Stops supplying the clock signal to the USB."]
653        pub const _0: Self = Self::new(0);
654
655        #[doc = "Enables supplying the clock signal to the USB."]
656        pub const _1: Self = Self::new(1);
657    }
658    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
659    pub struct Cnen_SPEC;
660    pub type Cnen = crate::EnumBitfieldStruct<u8, Cnen_SPEC>;
661    impl Cnen {
662        #[doc = "Single end receiver operation is disabled."]
663        pub const _0: Self = Self::new(0);
664
665        #[doc = "Single end receiver operation is enabled."]
666        pub const _1: Self = Self::new(1);
667    }
668    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
669    pub struct Dprpu_SPEC;
670    pub type Dprpu = crate::EnumBitfieldStruct<u8, Dprpu_SPEC>;
671    impl Dprpu {
672        #[doc = "Pulling up the line is disabled."]
673        pub const _0: Self = Self::new(0);
674
675        #[doc = "Pulling up the line is enabled."]
676        pub const _1: Self = Self::new(1);
677    }
678    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
679    pub struct Dmrpu_SPEC;
680    pub type Dmrpu = crate::EnumBitfieldStruct<u8, Dmrpu_SPEC>;
681    impl Dmrpu {
682        #[doc = "Pulling up the line is disabled."]
683        pub const _0: Self = Self::new(0);
684
685        #[doc = "Pulling up the line is enabled."]
686        pub const _1: Self = Self::new(1);
687    }
688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689    pub struct Usbe_SPEC;
690    pub type Usbe = crate::EnumBitfieldStruct<u8, Usbe_SPEC>;
691    impl Usbe {
692        #[doc = "USB operation is disabled."]
693        pub const _0: Self = Self::new(0);
694
695        #[doc = "USB operation is enabled."]
696        pub const _1: Self = Self::new(1);
697    }
698}
699#[doc(hidden)]
700#[derive(Copy, Clone, Eq, PartialEq)]
701pub struct Syssts0_SPEC;
702impl crate::sealed::RegSpec for Syssts0_SPEC {
703    type DataType = u16;
704}
705
706#[doc = "System Configuration Status Register 0"]
707pub type Syssts0 = crate::RegValueT<Syssts0_SPEC>;
708
709impl Syssts0 {
710    #[doc = "These bits are read as 00000000000000."]
711    #[inline(always)]
712    pub fn reserved(
713        self,
714    ) -> crate::common::RegisterField<2, 0x3fff, 1, 0, u16, u16, Syssts0_SPEC, crate::common::R>
715    {
716        crate::common::RegisterField::<2,0x3fff,1,0,u16,u16,Syssts0_SPEC,crate::common::R>::from_register(self,0)
717    }
718
719    #[doc = "USB Data Line Status Monitor"]
720    #[inline(always)]
721    pub fn lnst(
722        self,
723    ) -> crate::common::RegisterField<
724        0,
725        0x3,
726        1,
727        0,
728        syssts0::Lnst,
729        syssts0::Lnst,
730        Syssts0_SPEC,
731        crate::common::R,
732    > {
733        crate::common::RegisterField::<
734            0,
735            0x3,
736            1,
737            0,
738            syssts0::Lnst,
739            syssts0::Lnst,
740            Syssts0_SPEC,
741            crate::common::R,
742        >::from_register(self, 0)
743    }
744}
745impl ::core::default::Default for Syssts0 {
746    #[inline(always)]
747    fn default() -> Syssts0 {
748        <crate::RegValueT<Syssts0_SPEC> as RegisterValue<_>>::new(0)
749    }
750}
751pub mod syssts0 {
752
753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
754    pub struct Lnst_SPEC;
755    pub type Lnst = crate::EnumBitfieldStruct<u8, Lnst_SPEC>;
756    impl Lnst {
757        #[doc = "SE0"]
758        pub const _00: Self = Self::new(0);
759
760        #[doc = "J-State"]
761        pub const _01: Self = Self::new(1);
762
763        #[doc = "K-State"]
764        pub const _10: Self = Self::new(2);
765
766        #[doc = "SE1"]
767        pub const _11: Self = Self::new(3);
768    }
769}
770#[doc(hidden)]
771#[derive(Copy, Clone, Eq, PartialEq)]
772pub struct Dvstctr0_SPEC;
773impl crate::sealed::RegSpec for Dvstctr0_SPEC {
774    type DataType = u16;
775}
776
777#[doc = "Device State Control Register 0"]
778pub type Dvstctr0 = crate::RegValueT<Dvstctr0_SPEC>;
779
780impl Dvstctr0 {
781    #[doc = "Wakeup Detection Enable"]
782    #[inline(always)]
783    pub fn wkup(
784        self,
785    ) -> crate::common::RegisterField<
786        8,
787        0x1,
788        1,
789        0,
790        dvstctr0::Wkup,
791        dvstctr0::Wkup,
792        Dvstctr0_SPEC,
793        crate::common::RW,
794    > {
795        crate::common::RegisterField::<
796            8,
797            0x1,
798            1,
799            0,
800            dvstctr0::Wkup,
801            dvstctr0::Wkup,
802            Dvstctr0_SPEC,
803            crate::common::RW,
804        >::from_register(self, 0)
805    }
806
807    #[doc = "These bits are read as 00000. The write value should be 00000."]
808    #[inline(always)]
809    pub fn reserved(
810        self,
811    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Dvstctr0_SPEC, crate::common::RW> {
812        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Dvstctr0_SPEC,crate::common::RW>::from_register(self,0)
813    }
814
815    #[doc = "USB Bus Reset Status"]
816    #[inline(always)]
817    pub fn rhst(
818        self,
819    ) -> crate::common::RegisterField<
820        0,
821        0x7,
822        1,
823        0,
824        dvstctr0::Rhst,
825        dvstctr0::Rhst,
826        Dvstctr0_SPEC,
827        crate::common::R,
828    > {
829        crate::common::RegisterField::<
830            0,
831            0x7,
832            1,
833            0,
834            dvstctr0::Rhst,
835            dvstctr0::Rhst,
836            Dvstctr0_SPEC,
837            crate::common::R,
838        >::from_register(self, 0)
839    }
840}
841impl ::core::default::Default for Dvstctr0 {
842    #[inline(always)]
843    fn default() -> Dvstctr0 {
844        <crate::RegValueT<Dvstctr0_SPEC> as RegisterValue<_>>::new(0)
845    }
846}
847pub mod dvstctr0 {
848
849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
850    pub struct Wkup_SPEC;
851    pub type Wkup = crate::EnumBitfieldStruct<u8, Wkup_SPEC>;
852    impl Wkup {
853        #[doc = "Remote wakeup signal is not output."]
854        pub const _0: Self = Self::new(0);
855
856        #[doc = "Remote wakeup signal is output."]
857        pub const _1: Self = Self::new(1);
858    }
859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
860    pub struct Rhst_SPEC;
861    pub type Rhst = crate::EnumBitfieldStruct<u8, Rhst_SPEC>;
862    impl Rhst {
863        #[doc = "Communication speed not determined"]
864        pub const _000: Self = Self::new(0);
865
866        #[doc = "USB bus reset in progress or low-speed connection"]
867        pub const _001: Self = Self::new(1);
868
869        #[doc = "USB bus reset in progress or full-speed connection"]
870        pub const _010: Self = Self::new(2);
871    }
872}
873#[doc(hidden)]
874#[derive(Copy, Clone, Eq, PartialEq)]
875pub struct Cfifo_SPEC;
876impl crate::sealed::RegSpec for Cfifo_SPEC {
877    type DataType = u16;
878}
879
880#[doc = "CFIFO Port Register"]
881pub type Cfifo = crate::RegValueT<Cfifo_SPEC>;
882
883impl Cfifo {
884    #[doc = "FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits."]
885    #[inline(always)]
886    pub fn fifoport(
887        self,
888    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cfifo_SPEC, crate::common::RW>
889    {
890        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cfifo_SPEC,crate::common::RW>::from_register(self,0)
891    }
892}
893impl ::core::default::Default for Cfifo {
894    #[inline(always)]
895    fn default() -> Cfifo {
896        <crate::RegValueT<Cfifo_SPEC> as RegisterValue<_>>::new(0)
897    }
898}
899
900#[doc(hidden)]
901#[derive(Copy, Clone, Eq, PartialEq)]
902pub struct Cfifol_SPEC;
903impl crate::sealed::RegSpec for Cfifol_SPEC {
904    type DataType = u8;
905}
906
907#[doc = "CFIFO Port Register L"]
908pub type Cfifol = crate::RegValueT<Cfifol_SPEC>;
909
910impl NoBitfieldReg<Cfifol_SPEC> for Cfifol {}
911impl ::core::default::Default for Cfifol {
912    #[inline(always)]
913    fn default() -> Cfifol {
914        <crate::RegValueT<Cfifol_SPEC> as RegisterValue<_>>::new(0)
915    }
916}
917
918#[doc(hidden)]
919#[derive(Copy, Clone, Eq, PartialEq)]
920pub struct Cfifosel_SPEC;
921impl crate::sealed::RegSpec for Cfifosel_SPEC {
922    type DataType = u16;
923}
924
925#[doc = "CFIFO Port Select Register"]
926pub type Cfifosel = crate::RegValueT<Cfifosel_SPEC>;
927
928impl Cfifosel {
929    #[doc = "Read Count Mode"]
930    #[inline(always)]
931    pub fn rcnt(
932        self,
933    ) -> crate::common::RegisterField<
934        15,
935        0x1,
936        1,
937        0,
938        cfifosel::Rcnt,
939        cfifosel::Rcnt,
940        Cfifosel_SPEC,
941        crate::common::RW,
942    > {
943        crate::common::RegisterField::<
944            15,
945            0x1,
946            1,
947            0,
948            cfifosel::Rcnt,
949            cfifosel::Rcnt,
950            Cfifosel_SPEC,
951            crate::common::RW,
952        >::from_register(self, 0)
953    }
954
955    #[doc = "Buffer Pointer Rewind"]
956    #[inline(always)]
957    pub fn rew(
958        self,
959    ) -> crate::common::RegisterField<
960        14,
961        0x1,
962        1,
963        0,
964        cfifosel::Rew,
965        cfifosel::Rew,
966        Cfifosel_SPEC,
967        crate::common::W,
968    > {
969        crate::common::RegisterField::<
970            14,
971            0x1,
972            1,
973            0,
974            cfifosel::Rew,
975            cfifosel::Rew,
976            Cfifosel_SPEC,
977            crate::common::W,
978        >::from_register(self, 0)
979    }
980
981    #[doc = "CFIFO Port Access Bit Width"]
982    #[inline(always)]
983    pub fn mbw(
984        self,
985    ) -> crate::common::RegisterField<
986        10,
987        0x1,
988        1,
989        0,
990        cfifosel::Mbw,
991        cfifosel::Mbw,
992        Cfifosel_SPEC,
993        crate::common::RW,
994    > {
995        crate::common::RegisterField::<
996            10,
997            0x1,
998            1,
999            0,
1000            cfifosel::Mbw,
1001            cfifosel::Mbw,
1002            Cfifosel_SPEC,
1003            crate::common::RW,
1004        >::from_register(self, 0)
1005    }
1006
1007    #[doc = "CFIFO Port Endian Control"]
1008    #[inline(always)]
1009    pub fn bigend(
1010        self,
1011    ) -> crate::common::RegisterField<
1012        8,
1013        0x1,
1014        1,
1015        0,
1016        cfifosel::Bigend,
1017        cfifosel::Bigend,
1018        Cfifosel_SPEC,
1019        crate::common::RW,
1020    > {
1021        crate::common::RegisterField::<
1022            8,
1023            0x1,
1024            1,
1025            0,
1026            cfifosel::Bigend,
1027            cfifosel::Bigend,
1028            Cfifosel_SPEC,
1029            crate::common::RW,
1030        >::from_register(self, 0)
1031    }
1032
1033    #[doc = "CFIFO Port Access Direction When DCP is Selected"]
1034    #[inline(always)]
1035    pub fn isel(
1036        self,
1037    ) -> crate::common::RegisterField<
1038        5,
1039        0x1,
1040        1,
1041        0,
1042        cfifosel::Isel,
1043        cfifosel::Isel,
1044        Cfifosel_SPEC,
1045        crate::common::RW,
1046    > {
1047        crate::common::RegisterField::<
1048            5,
1049            0x1,
1050            1,
1051            0,
1052            cfifosel::Isel,
1053            cfifosel::Isel,
1054            Cfifosel_SPEC,
1055            crate::common::RW,
1056        >::from_register(self, 0)
1057    }
1058
1059    #[doc = "This bit is read as 0. The write value should be 0."]
1060    #[inline(always)]
1061    pub fn reserved(
1062        self,
1063    ) -> crate::common::RegisterFieldBool<4, 1, 0, Cfifosel_SPEC, crate::common::RW> {
1064        crate::common::RegisterFieldBool::<4, 1, 0, Cfifosel_SPEC, crate::common::RW>::from_register(
1065            self, 0,
1066        )
1067    }
1068
1069    #[doc = "CFIFO Port Access Pipe Specification"]
1070    #[inline(always)]
1071    pub fn curpipe(
1072        self,
1073    ) -> crate::common::RegisterField<
1074        0,
1075        0xf,
1076        1,
1077        0,
1078        cfifosel::Curpipe,
1079        cfifosel::Curpipe,
1080        Cfifosel_SPEC,
1081        crate::common::RW,
1082    > {
1083        crate::common::RegisterField::<
1084            0,
1085            0xf,
1086            1,
1087            0,
1088            cfifosel::Curpipe,
1089            cfifosel::Curpipe,
1090            Cfifosel_SPEC,
1091            crate::common::RW,
1092        >::from_register(self, 0)
1093    }
1094}
1095impl ::core::default::Default for Cfifosel {
1096    #[inline(always)]
1097    fn default() -> Cfifosel {
1098        <crate::RegValueT<Cfifosel_SPEC> as RegisterValue<_>>::new(0)
1099    }
1100}
1101pub mod cfifosel {
1102
1103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1104    pub struct Rcnt_SPEC;
1105    pub type Rcnt = crate::EnumBitfieldStruct<u8, Rcnt_SPEC>;
1106    impl Rcnt {
1107        #[doc = "The DTLN\\[8:0\\] bits (CFIFOCRT.DTLN\\[8:0\\], D0FIFOCRT.DTLN\\[8:0\\], D1FIFOCRT.DTLN\\[8:0\\]) are cleared when all of the receive data has been read from the CFIFO.(In double buffer mode, the DTLN\\[8:0\\] bit value is cleared when all the data has been read from only a single plane.)"]
1108        pub const _0: Self = Self::new(0);
1109
1110        #[doc = "The DTLN\\[8:0\\] bits are decremented each time the receive data is read from the CFIFO."]
1111        pub const _1: Self = Self::new(1);
1112    }
1113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1114    pub struct Rew_SPEC;
1115    pub type Rew = crate::EnumBitfieldStruct<u8, Rew_SPEC>;
1116    impl Rew {
1117        #[doc = "The buffer pointer is not rewound."]
1118        pub const _0: Self = Self::new(0);
1119
1120        #[doc = "The buffer pointer is rewound."]
1121        pub const _1: Self = Self::new(1);
1122    }
1123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1124    pub struct Mbw_SPEC;
1125    pub type Mbw = crate::EnumBitfieldStruct<u8, Mbw_SPEC>;
1126    impl Mbw {
1127        #[doc = "8-bit width"]
1128        pub const _0: Self = Self::new(0);
1129
1130        #[doc = "16-bit width"]
1131        pub const _1: Self = Self::new(1);
1132    }
1133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1134    pub struct Bigend_SPEC;
1135    pub type Bigend = crate::EnumBitfieldStruct<u8, Bigend_SPEC>;
1136    impl Bigend {
1137        #[doc = "Little endian"]
1138        pub const _0: Self = Self::new(0);
1139
1140        #[doc = "Big endian"]
1141        pub const _1: Self = Self::new(1);
1142    }
1143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1144    pub struct Isel_SPEC;
1145    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
1146    impl Isel {
1147        #[doc = "Reading from the buffer memory is selected"]
1148        pub const _0: Self = Self::new(0);
1149
1150        #[doc = "Writing to the buffer memory is selected"]
1151        pub const _1: Self = Self::new(1);
1152    }
1153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1154    pub struct Curpipe_SPEC;
1155    pub type Curpipe = crate::EnumBitfieldStruct<u8, Curpipe_SPEC>;
1156    impl Curpipe {
1157        #[doc = "DCP(Defaultcontrolpipe)"]
1158        pub const _0000: Self = Self::new(0);
1159
1160        #[doc = "Pipe1"]
1161        pub const _0001: Self = Self::new(1);
1162
1163        #[doc = "Pipe2"]
1164        pub const _0010: Self = Self::new(2);
1165
1166        #[doc = "Pipe3"]
1167        pub const _0011: Self = Self::new(3);
1168
1169        #[doc = "Pipe4"]
1170        pub const _0100: Self = Self::new(4);
1171
1172        #[doc = "Pipe5"]
1173        pub const _0101: Self = Self::new(5);
1174
1175        #[doc = "Pipe6"]
1176        pub const _0110: Self = Self::new(6);
1177
1178        #[doc = "Pipe7"]
1179        pub const _0111: Self = Self::new(7);
1180
1181        #[doc = "Pipe8"]
1182        pub const _1000: Self = Self::new(8);
1183
1184        #[doc = "Pipe9"]
1185        pub const _1001: Self = Self::new(9);
1186    }
1187}
1188#[doc(hidden)]
1189#[derive(Copy, Clone, Eq, PartialEq)]
1190pub struct Cfifoctr_SPEC;
1191impl crate::sealed::RegSpec for Cfifoctr_SPEC {
1192    type DataType = u16;
1193}
1194
1195#[doc = "CFIFO Port Control Register"]
1196pub type Cfifoctr = crate::RegValueT<Cfifoctr_SPEC>;
1197
1198impl Cfifoctr {
1199    #[doc = "Buffer Memory Valid Flag"]
1200    #[inline(always)]
1201    pub fn bval(
1202        self,
1203    ) -> crate::common::RegisterField<
1204        15,
1205        0x1,
1206        1,
1207        0,
1208        cfifoctr::Bval,
1209        cfifoctr::Bval,
1210        Cfifoctr_SPEC,
1211        crate::common::RW,
1212    > {
1213        crate::common::RegisterField::<
1214            15,
1215            0x1,
1216            1,
1217            0,
1218            cfifoctr::Bval,
1219            cfifoctr::Bval,
1220            Cfifoctr_SPEC,
1221            crate::common::RW,
1222        >::from_register(self, 0)
1223    }
1224
1225    #[doc = "CPU Buffer Clear"]
1226    #[inline(always)]
1227    pub fn bclr(
1228        self,
1229    ) -> crate::common::RegisterField<
1230        14,
1231        0x1,
1232        1,
1233        0,
1234        cfifoctr::Bclr,
1235        cfifoctr::Bclr,
1236        Cfifoctr_SPEC,
1237        crate::common::W,
1238    > {
1239        crate::common::RegisterField::<
1240            14,
1241            0x1,
1242            1,
1243            0,
1244            cfifoctr::Bclr,
1245            cfifoctr::Bclr,
1246            Cfifoctr_SPEC,
1247            crate::common::W,
1248        >::from_register(self, 0)
1249    }
1250
1251    #[doc = "FIFO Port Ready"]
1252    #[inline(always)]
1253    pub fn frdy(
1254        self,
1255    ) -> crate::common::RegisterField<
1256        13,
1257        0x1,
1258        1,
1259        0,
1260        cfifoctr::Frdy,
1261        cfifoctr::Frdy,
1262        Cfifoctr_SPEC,
1263        crate::common::R,
1264    > {
1265        crate::common::RegisterField::<
1266            13,
1267            0x1,
1268            1,
1269            0,
1270            cfifoctr::Frdy,
1271            cfifoctr::Frdy,
1272            Cfifoctr_SPEC,
1273            crate::common::R,
1274        >::from_register(self, 0)
1275    }
1276
1277    #[doc = "These bits are read as 0000. The write value should be 0000."]
1278    #[inline(always)]
1279    pub fn reserved(
1280        self,
1281    ) -> crate::common::RegisterField<9, 0xf, 1, 0, u8, u8, Cfifoctr_SPEC, crate::common::RW> {
1282        crate::common::RegisterField::<9,0xf,1,0,u8,u8,Cfifoctr_SPEC,crate::common::RW>::from_register(self,0)
1283    }
1284
1285    #[doc = "Receive Data LengthIndicates the length of the receive data."]
1286    #[inline(always)]
1287    pub fn dtln(
1288        self,
1289    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Cfifoctr_SPEC, crate::common::R>
1290    {
1291        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Cfifoctr_SPEC,crate::common::R>::from_register(self,0)
1292    }
1293}
1294impl ::core::default::Default for Cfifoctr {
1295    #[inline(always)]
1296    fn default() -> Cfifoctr {
1297        <crate::RegValueT<Cfifoctr_SPEC> as RegisterValue<_>>::new(0)
1298    }
1299}
1300pub mod cfifoctr {
1301
1302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1303    pub struct Bval_SPEC;
1304    pub type Bval = crate::EnumBitfieldStruct<u8, Bval_SPEC>;
1305    impl Bval {
1306        #[doc = "Invalid"]
1307        pub const _0: Self = Self::new(0);
1308
1309        #[doc = "Writing ended"]
1310        pub const _1: Self = Self::new(1);
1311    }
1312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1313    pub struct Bclr_SPEC;
1314    pub type Bclr = crate::EnumBitfieldStruct<u8, Bclr_SPEC>;
1315    impl Bclr {
1316        #[doc = "Invalid"]
1317        pub const _0: Self = Self::new(0);
1318
1319        #[doc = "Clears the buffer memory on the CPU side"]
1320        pub const _1: Self = Self::new(1);
1321    }
1322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1323    pub struct Frdy_SPEC;
1324    pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
1325    impl Frdy {
1326        #[doc = "FIFO port access is disabled."]
1327        pub const _0: Self = Self::new(0);
1328
1329        #[doc = "FIFO port access is enabled."]
1330        pub const _1: Self = Self::new(1);
1331    }
1332}
1333#[doc(hidden)]
1334#[derive(Copy, Clone, Eq, PartialEq)]
1335pub struct Intenb0_SPEC;
1336impl crate::sealed::RegSpec for Intenb0_SPEC {
1337    type DataType = u16;
1338}
1339
1340#[doc = "Interrupt Enable Register 0"]
1341pub type Intenb0 = crate::RegValueT<Intenb0_SPEC>;
1342
1343impl Intenb0 {
1344    #[doc = "VBUS Interrupt Enable"]
1345    #[inline(always)]
1346    pub fn vbse(
1347        self,
1348    ) -> crate::common::RegisterField<
1349        15,
1350        0x1,
1351        1,
1352        0,
1353        intenb0::Vbse,
1354        intenb0::Vbse,
1355        Intenb0_SPEC,
1356        crate::common::RW,
1357    > {
1358        crate::common::RegisterField::<
1359            15,
1360            0x1,
1361            1,
1362            0,
1363            intenb0::Vbse,
1364            intenb0::Vbse,
1365            Intenb0_SPEC,
1366            crate::common::RW,
1367        >::from_register(self, 0)
1368    }
1369
1370    #[doc = "Resume Interrupt Enable"]
1371    #[inline(always)]
1372    pub fn rsme(
1373        self,
1374    ) -> crate::common::RegisterField<
1375        14,
1376        0x1,
1377        1,
1378        0,
1379        intenb0::Rsme,
1380        intenb0::Rsme,
1381        Intenb0_SPEC,
1382        crate::common::RW,
1383    > {
1384        crate::common::RegisterField::<
1385            14,
1386            0x1,
1387            1,
1388            0,
1389            intenb0::Rsme,
1390            intenb0::Rsme,
1391            Intenb0_SPEC,
1392            crate::common::RW,
1393        >::from_register(self, 0)
1394    }
1395
1396    #[doc = "Frame Number Update Interrupt Enable"]
1397    #[inline(always)]
1398    pub fn sofe(
1399        self,
1400    ) -> crate::common::RegisterField<
1401        13,
1402        0x1,
1403        1,
1404        0,
1405        intenb0::Sofe,
1406        intenb0::Sofe,
1407        Intenb0_SPEC,
1408        crate::common::RW,
1409    > {
1410        crate::common::RegisterField::<
1411            13,
1412            0x1,
1413            1,
1414            0,
1415            intenb0::Sofe,
1416            intenb0::Sofe,
1417            Intenb0_SPEC,
1418            crate::common::RW,
1419        >::from_register(self, 0)
1420    }
1421
1422    #[doc = "Device State Transition Interrupt Enable"]
1423    #[inline(always)]
1424    pub fn dvse(
1425        self,
1426    ) -> crate::common::RegisterField<
1427        12,
1428        0x1,
1429        1,
1430        0,
1431        intenb0::Dvse,
1432        intenb0::Dvse,
1433        Intenb0_SPEC,
1434        crate::common::RW,
1435    > {
1436        crate::common::RegisterField::<
1437            12,
1438            0x1,
1439            1,
1440            0,
1441            intenb0::Dvse,
1442            intenb0::Dvse,
1443            Intenb0_SPEC,
1444            crate::common::RW,
1445        >::from_register(self, 0)
1446    }
1447
1448    #[doc = "Control Transfer Stage Transition Interrupt Enable"]
1449    #[inline(always)]
1450    pub fn ctre(
1451        self,
1452    ) -> crate::common::RegisterField<
1453        11,
1454        0x1,
1455        1,
1456        0,
1457        intenb0::Ctre,
1458        intenb0::Ctre,
1459        Intenb0_SPEC,
1460        crate::common::RW,
1461    > {
1462        crate::common::RegisterField::<
1463            11,
1464            0x1,
1465            1,
1466            0,
1467            intenb0::Ctre,
1468            intenb0::Ctre,
1469            Intenb0_SPEC,
1470            crate::common::RW,
1471        >::from_register(self, 0)
1472    }
1473
1474    #[doc = "Buffer Empty Interrupt Enable"]
1475    #[inline(always)]
1476    pub fn bempe(
1477        self,
1478    ) -> crate::common::RegisterField<
1479        10,
1480        0x1,
1481        1,
1482        0,
1483        intenb0::Bempe,
1484        intenb0::Bempe,
1485        Intenb0_SPEC,
1486        crate::common::RW,
1487    > {
1488        crate::common::RegisterField::<
1489            10,
1490            0x1,
1491            1,
1492            0,
1493            intenb0::Bempe,
1494            intenb0::Bempe,
1495            Intenb0_SPEC,
1496            crate::common::RW,
1497        >::from_register(self, 0)
1498    }
1499
1500    #[doc = "Buffer Not Ready Response Interrupt Enable"]
1501    #[inline(always)]
1502    pub fn nrdye(
1503        self,
1504    ) -> crate::common::RegisterField<
1505        9,
1506        0x1,
1507        1,
1508        0,
1509        intenb0::Nrdye,
1510        intenb0::Nrdye,
1511        Intenb0_SPEC,
1512        crate::common::RW,
1513    > {
1514        crate::common::RegisterField::<
1515            9,
1516            0x1,
1517            1,
1518            0,
1519            intenb0::Nrdye,
1520            intenb0::Nrdye,
1521            Intenb0_SPEC,
1522            crate::common::RW,
1523        >::from_register(self, 0)
1524    }
1525
1526    #[doc = "Buffer Ready Interrupt Enable"]
1527    #[inline(always)]
1528    pub fn brdye(
1529        self,
1530    ) -> crate::common::RegisterField<
1531        8,
1532        0x1,
1533        1,
1534        0,
1535        intenb0::Brdye,
1536        intenb0::Brdye,
1537        Intenb0_SPEC,
1538        crate::common::RW,
1539    > {
1540        crate::common::RegisterField::<
1541            8,
1542            0x1,
1543            1,
1544            0,
1545            intenb0::Brdye,
1546            intenb0::Brdye,
1547            Intenb0_SPEC,
1548            crate::common::RW,
1549        >::from_register(self, 0)
1550    }
1551
1552    #[doc = "These bits are read as 00000000. The write value should be 00000000."]
1553    #[inline(always)]
1554    pub fn reserved(
1555        self,
1556    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Intenb0_SPEC, crate::common::RW> {
1557        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Intenb0_SPEC,crate::common::RW>::from_register(self,0)
1558    }
1559}
1560impl ::core::default::Default for Intenb0 {
1561    #[inline(always)]
1562    fn default() -> Intenb0 {
1563        <crate::RegValueT<Intenb0_SPEC> as RegisterValue<_>>::new(0)
1564    }
1565}
1566pub mod intenb0 {
1567
1568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1569    pub struct Vbse_SPEC;
1570    pub type Vbse = crate::EnumBitfieldStruct<u8, Vbse_SPEC>;
1571    impl Vbse {
1572        #[doc = "Interrupt output disabled"]
1573        pub const _0: Self = Self::new(0);
1574
1575        #[doc = "Interrupt output enabled"]
1576        pub const _1: Self = Self::new(1);
1577    }
1578    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1579    pub struct Rsme_SPEC;
1580    pub type Rsme = crate::EnumBitfieldStruct<u8, Rsme_SPEC>;
1581    impl Rsme {
1582        #[doc = "Interrupt output disabled"]
1583        pub const _0: Self = Self::new(0);
1584
1585        #[doc = "Interrupt output enabled"]
1586        pub const _1: Self = Self::new(1);
1587    }
1588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1589    pub struct Sofe_SPEC;
1590    pub type Sofe = crate::EnumBitfieldStruct<u8, Sofe_SPEC>;
1591    impl Sofe {
1592        #[doc = "Interrupt output disabled"]
1593        pub const _0: Self = Self::new(0);
1594
1595        #[doc = "Interrupt output enabled"]
1596        pub const _1: Self = Self::new(1);
1597    }
1598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1599    pub struct Dvse_SPEC;
1600    pub type Dvse = crate::EnumBitfieldStruct<u8, Dvse_SPEC>;
1601    impl Dvse {
1602        #[doc = "Interrupt output disabled"]
1603        pub const _0: Self = Self::new(0);
1604
1605        #[doc = "Interrupt output enabled"]
1606        pub const _1: Self = Self::new(1);
1607    }
1608    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1609    pub struct Ctre_SPEC;
1610    pub type Ctre = crate::EnumBitfieldStruct<u8, Ctre_SPEC>;
1611    impl Ctre {
1612        #[doc = "Interrupt output disabled"]
1613        pub const _0: Self = Self::new(0);
1614
1615        #[doc = "Interrupt output enabled"]
1616        pub const _1: Self = Self::new(1);
1617    }
1618    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1619    pub struct Bempe_SPEC;
1620    pub type Bempe = crate::EnumBitfieldStruct<u8, Bempe_SPEC>;
1621    impl Bempe {
1622        #[doc = "Interrupt output disabled"]
1623        pub const _0: Self = Self::new(0);
1624
1625        #[doc = "Interrupt output enabled"]
1626        pub const _1: Self = Self::new(1);
1627    }
1628    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1629    pub struct Nrdye_SPEC;
1630    pub type Nrdye = crate::EnumBitfieldStruct<u8, Nrdye_SPEC>;
1631    impl Nrdye {
1632        #[doc = "Interrupt output disabled"]
1633        pub const _0: Self = Self::new(0);
1634
1635        #[doc = "Interrupt output enabled"]
1636        pub const _1: Self = Self::new(1);
1637    }
1638    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1639    pub struct Brdye_SPEC;
1640    pub type Brdye = crate::EnumBitfieldStruct<u8, Brdye_SPEC>;
1641    impl Brdye {
1642        #[doc = "Interrupt output disabled"]
1643        pub const _0: Self = Self::new(0);
1644
1645        #[doc = "Interrupt output enabled"]
1646        pub const _1: Self = Self::new(1);
1647    }
1648}
1649#[doc(hidden)]
1650#[derive(Copy, Clone, Eq, PartialEq)]
1651pub struct Brdyenb_SPEC;
1652impl crate::sealed::RegSpec for Brdyenb_SPEC {
1653    type DataType = u16;
1654}
1655
1656#[doc = "BRDY Interrupt Enable Register"]
1657pub type Brdyenb = crate::RegValueT<Brdyenb_SPEC>;
1658
1659impl Brdyenb {
1660    #[doc = "These bits are read as 000000. The write value should be 000000."]
1661    #[inline(always)]
1662    pub fn reserved(
1663        self,
1664    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Brdyenb_SPEC, crate::common::RW> {
1665        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Brdyenb_SPEC,crate::common::RW>::from_register(self,0)
1666    }
1667
1668    #[doc = "BRDY Interrupt Enable for PIPE9"]
1669    #[inline(always)]
1670    pub fn pipe9brdye(
1671        self,
1672    ) -> crate::common::RegisterField<
1673        9,
1674        0x1,
1675        1,
1676        0,
1677        brdyenb::Pipe9Brdye,
1678        brdyenb::Pipe9Brdye,
1679        Brdyenb_SPEC,
1680        crate::common::RW,
1681    > {
1682        crate::common::RegisterField::<
1683            9,
1684            0x1,
1685            1,
1686            0,
1687            brdyenb::Pipe9Brdye,
1688            brdyenb::Pipe9Brdye,
1689            Brdyenb_SPEC,
1690            crate::common::RW,
1691        >::from_register(self, 0)
1692    }
1693
1694    #[doc = "BRDY Interrupt Enable for PIPE8"]
1695    #[inline(always)]
1696    pub fn pipe8brdye(
1697        self,
1698    ) -> crate::common::RegisterField<
1699        8,
1700        0x1,
1701        1,
1702        0,
1703        brdyenb::Pipe8Brdye,
1704        brdyenb::Pipe8Brdye,
1705        Brdyenb_SPEC,
1706        crate::common::RW,
1707    > {
1708        crate::common::RegisterField::<
1709            8,
1710            0x1,
1711            1,
1712            0,
1713            brdyenb::Pipe8Brdye,
1714            brdyenb::Pipe8Brdye,
1715            Brdyenb_SPEC,
1716            crate::common::RW,
1717        >::from_register(self, 0)
1718    }
1719
1720    #[doc = "BRDY Interrupt Enable for PIPE7"]
1721    #[inline(always)]
1722    pub fn pipe7brdye(
1723        self,
1724    ) -> crate::common::RegisterField<
1725        7,
1726        0x1,
1727        1,
1728        0,
1729        brdyenb::Pipe7Brdye,
1730        brdyenb::Pipe7Brdye,
1731        Brdyenb_SPEC,
1732        crate::common::RW,
1733    > {
1734        crate::common::RegisterField::<
1735            7,
1736            0x1,
1737            1,
1738            0,
1739            brdyenb::Pipe7Brdye,
1740            brdyenb::Pipe7Brdye,
1741            Brdyenb_SPEC,
1742            crate::common::RW,
1743        >::from_register(self, 0)
1744    }
1745
1746    #[doc = "BRDY Interrupt Enable for PIPE6"]
1747    #[inline(always)]
1748    pub fn pipe6brdye(
1749        self,
1750    ) -> crate::common::RegisterField<
1751        6,
1752        0x1,
1753        1,
1754        0,
1755        brdyenb::Pipe6Brdye,
1756        brdyenb::Pipe6Brdye,
1757        Brdyenb_SPEC,
1758        crate::common::RW,
1759    > {
1760        crate::common::RegisterField::<
1761            6,
1762            0x1,
1763            1,
1764            0,
1765            brdyenb::Pipe6Brdye,
1766            brdyenb::Pipe6Brdye,
1767            Brdyenb_SPEC,
1768            crate::common::RW,
1769        >::from_register(self, 0)
1770    }
1771
1772    #[doc = "BRDY Interrupt Enable for PIPE5"]
1773    #[inline(always)]
1774    pub fn pipe5brdye(
1775        self,
1776    ) -> crate::common::RegisterField<
1777        5,
1778        0x1,
1779        1,
1780        0,
1781        brdyenb::Pipe5Brdye,
1782        brdyenb::Pipe5Brdye,
1783        Brdyenb_SPEC,
1784        crate::common::RW,
1785    > {
1786        crate::common::RegisterField::<
1787            5,
1788            0x1,
1789            1,
1790            0,
1791            brdyenb::Pipe5Brdye,
1792            brdyenb::Pipe5Brdye,
1793            Brdyenb_SPEC,
1794            crate::common::RW,
1795        >::from_register(self, 0)
1796    }
1797
1798    #[doc = "BRDY Interrupt Enable for PIPE4"]
1799    #[inline(always)]
1800    pub fn pipe4brdye(
1801        self,
1802    ) -> crate::common::RegisterField<
1803        4,
1804        0x1,
1805        1,
1806        0,
1807        brdyenb::Pipe4Brdye,
1808        brdyenb::Pipe4Brdye,
1809        Brdyenb_SPEC,
1810        crate::common::RW,
1811    > {
1812        crate::common::RegisterField::<
1813            4,
1814            0x1,
1815            1,
1816            0,
1817            brdyenb::Pipe4Brdye,
1818            brdyenb::Pipe4Brdye,
1819            Brdyenb_SPEC,
1820            crate::common::RW,
1821        >::from_register(self, 0)
1822    }
1823
1824    #[doc = "BRDY Interrupt Enable for PIPE3"]
1825    #[inline(always)]
1826    pub fn pipe3brdye(
1827        self,
1828    ) -> crate::common::RegisterField<
1829        3,
1830        0x1,
1831        1,
1832        0,
1833        brdyenb::Pipe3Brdye,
1834        brdyenb::Pipe3Brdye,
1835        Brdyenb_SPEC,
1836        crate::common::RW,
1837    > {
1838        crate::common::RegisterField::<
1839            3,
1840            0x1,
1841            1,
1842            0,
1843            brdyenb::Pipe3Brdye,
1844            brdyenb::Pipe3Brdye,
1845            Brdyenb_SPEC,
1846            crate::common::RW,
1847        >::from_register(self, 0)
1848    }
1849
1850    #[doc = "BRDY Interrupt Enable for PIPE2"]
1851    #[inline(always)]
1852    pub fn pipe2brdye(
1853        self,
1854    ) -> crate::common::RegisterField<
1855        2,
1856        0x1,
1857        1,
1858        0,
1859        brdyenb::Pipe2Brdye,
1860        brdyenb::Pipe2Brdye,
1861        Brdyenb_SPEC,
1862        crate::common::RW,
1863    > {
1864        crate::common::RegisterField::<
1865            2,
1866            0x1,
1867            1,
1868            0,
1869            brdyenb::Pipe2Brdye,
1870            brdyenb::Pipe2Brdye,
1871            Brdyenb_SPEC,
1872            crate::common::RW,
1873        >::from_register(self, 0)
1874    }
1875
1876    #[doc = "BRDY Interrupt Enable for PIPE1"]
1877    #[inline(always)]
1878    pub fn pipe1brdye(
1879        self,
1880    ) -> crate::common::RegisterField<
1881        1,
1882        0x1,
1883        1,
1884        0,
1885        brdyenb::Pipe1Brdye,
1886        brdyenb::Pipe1Brdye,
1887        Brdyenb_SPEC,
1888        crate::common::RW,
1889    > {
1890        crate::common::RegisterField::<
1891            1,
1892            0x1,
1893            1,
1894            0,
1895            brdyenb::Pipe1Brdye,
1896            brdyenb::Pipe1Brdye,
1897            Brdyenb_SPEC,
1898            crate::common::RW,
1899        >::from_register(self, 0)
1900    }
1901
1902    #[doc = "BRDY Interrupt Enable for PIPE0"]
1903    #[inline(always)]
1904    pub fn pipe0brdye(
1905        self,
1906    ) -> crate::common::RegisterField<
1907        0,
1908        0x1,
1909        1,
1910        0,
1911        brdyenb::Pipe0Brdye,
1912        brdyenb::Pipe0Brdye,
1913        Brdyenb_SPEC,
1914        crate::common::RW,
1915    > {
1916        crate::common::RegisterField::<
1917            0,
1918            0x1,
1919            1,
1920            0,
1921            brdyenb::Pipe0Brdye,
1922            brdyenb::Pipe0Brdye,
1923            Brdyenb_SPEC,
1924            crate::common::RW,
1925        >::from_register(self, 0)
1926    }
1927}
1928impl ::core::default::Default for Brdyenb {
1929    #[inline(always)]
1930    fn default() -> Brdyenb {
1931        <crate::RegValueT<Brdyenb_SPEC> as RegisterValue<_>>::new(0)
1932    }
1933}
1934pub mod brdyenb {
1935
1936    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1937    pub struct Pipe9Brdye_SPEC;
1938    pub type Pipe9Brdye = crate::EnumBitfieldStruct<u8, Pipe9Brdye_SPEC>;
1939    impl Pipe9Brdye {
1940        #[doc = "Interrupt output disabled"]
1941        pub const _0: Self = Self::new(0);
1942
1943        #[doc = "Interrupt output enabled"]
1944        pub const _1: Self = Self::new(1);
1945    }
1946    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1947    pub struct Pipe8Brdye_SPEC;
1948    pub type Pipe8Brdye = crate::EnumBitfieldStruct<u8, Pipe8Brdye_SPEC>;
1949    impl Pipe8Brdye {
1950        #[doc = "Interrupt output disabled"]
1951        pub const _0: Self = Self::new(0);
1952
1953        #[doc = "Interrupt output enabled"]
1954        pub const _1: Self = Self::new(1);
1955    }
1956    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1957    pub struct Pipe7Brdye_SPEC;
1958    pub type Pipe7Brdye = crate::EnumBitfieldStruct<u8, Pipe7Brdye_SPEC>;
1959    impl Pipe7Brdye {
1960        #[doc = "Interrupt output disabled"]
1961        pub const _0: Self = Self::new(0);
1962
1963        #[doc = "Interrupt output enabled"]
1964        pub const _1: Self = Self::new(1);
1965    }
1966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1967    pub struct Pipe6Brdye_SPEC;
1968    pub type Pipe6Brdye = crate::EnumBitfieldStruct<u8, Pipe6Brdye_SPEC>;
1969    impl Pipe6Brdye {
1970        #[doc = "Interrupt output disabled"]
1971        pub const _0: Self = Self::new(0);
1972
1973        #[doc = "Interrupt output enabled"]
1974        pub const _1: Self = Self::new(1);
1975    }
1976    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1977    pub struct Pipe5Brdye_SPEC;
1978    pub type Pipe5Brdye = crate::EnumBitfieldStruct<u8, Pipe5Brdye_SPEC>;
1979    impl Pipe5Brdye {
1980        #[doc = "Interrupt output disabled"]
1981        pub const _0: Self = Self::new(0);
1982
1983        #[doc = "Interrupt output enabled"]
1984        pub const _1: Self = Self::new(1);
1985    }
1986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1987    pub struct Pipe4Brdye_SPEC;
1988    pub type Pipe4Brdye = crate::EnumBitfieldStruct<u8, Pipe4Brdye_SPEC>;
1989    impl Pipe4Brdye {
1990        #[doc = "Interrupt output disabled"]
1991        pub const _0: Self = Self::new(0);
1992
1993        #[doc = "Interrupt output enabled"]
1994        pub const _1: Self = Self::new(1);
1995    }
1996    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1997    pub struct Pipe3Brdye_SPEC;
1998    pub type Pipe3Brdye = crate::EnumBitfieldStruct<u8, Pipe3Brdye_SPEC>;
1999    impl Pipe3Brdye {
2000        #[doc = "Interrupt output disabled"]
2001        pub const _0: Self = Self::new(0);
2002
2003        #[doc = "Interrupt output enabled"]
2004        pub const _1: Self = Self::new(1);
2005    }
2006    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2007    pub struct Pipe2Brdye_SPEC;
2008    pub type Pipe2Brdye = crate::EnumBitfieldStruct<u8, Pipe2Brdye_SPEC>;
2009    impl Pipe2Brdye {
2010        #[doc = "Interrupt output disabled"]
2011        pub const _0: Self = Self::new(0);
2012
2013        #[doc = "Interrupt output enabled"]
2014        pub const _1: Self = Self::new(1);
2015    }
2016    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2017    pub struct Pipe1Brdye_SPEC;
2018    pub type Pipe1Brdye = crate::EnumBitfieldStruct<u8, Pipe1Brdye_SPEC>;
2019    impl Pipe1Brdye {
2020        #[doc = "Interrupt output disabled"]
2021        pub const _0: Self = Self::new(0);
2022
2023        #[doc = "Interrupt output enabled"]
2024        pub const _1: Self = Self::new(1);
2025    }
2026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2027    pub struct Pipe0Brdye_SPEC;
2028    pub type Pipe0Brdye = crate::EnumBitfieldStruct<u8, Pipe0Brdye_SPEC>;
2029    impl Pipe0Brdye {
2030        #[doc = "Interrupt output disabled"]
2031        pub const _0: Self = Self::new(0);
2032
2033        #[doc = "Interrupt output enabled"]
2034        pub const _1: Self = Self::new(1);
2035    }
2036}
2037#[doc(hidden)]
2038#[derive(Copy, Clone, Eq, PartialEq)]
2039pub struct Nrdyenb_SPEC;
2040impl crate::sealed::RegSpec for Nrdyenb_SPEC {
2041    type DataType = u16;
2042}
2043
2044#[doc = "NRDY Interrupt Enable Register"]
2045pub type Nrdyenb = crate::RegValueT<Nrdyenb_SPEC>;
2046
2047impl Nrdyenb {
2048    #[doc = "These bits are read as 000000. The write value should be 000000."]
2049    #[inline(always)]
2050    pub fn reserved(
2051        self,
2052    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Nrdyenb_SPEC, crate::common::RW> {
2053        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Nrdyenb_SPEC,crate::common::RW>::from_register(self,0)
2054    }
2055
2056    #[doc = "NRDY Interrupt Enable for PIPE9"]
2057    #[inline(always)]
2058    pub fn pipe9nrdye(
2059        self,
2060    ) -> crate::common::RegisterField<
2061        9,
2062        0x1,
2063        1,
2064        0,
2065        nrdyenb::Pipe9Nrdye,
2066        nrdyenb::Pipe9Nrdye,
2067        Nrdyenb_SPEC,
2068        crate::common::RW,
2069    > {
2070        crate::common::RegisterField::<
2071            9,
2072            0x1,
2073            1,
2074            0,
2075            nrdyenb::Pipe9Nrdye,
2076            nrdyenb::Pipe9Nrdye,
2077            Nrdyenb_SPEC,
2078            crate::common::RW,
2079        >::from_register(self, 0)
2080    }
2081
2082    #[doc = "NRDY Interrupt Enable for PIPE8"]
2083    #[inline(always)]
2084    pub fn pipe8nrdye(
2085        self,
2086    ) -> crate::common::RegisterField<
2087        8,
2088        0x1,
2089        1,
2090        0,
2091        nrdyenb::Pipe8Nrdye,
2092        nrdyenb::Pipe8Nrdye,
2093        Nrdyenb_SPEC,
2094        crate::common::RW,
2095    > {
2096        crate::common::RegisterField::<
2097            8,
2098            0x1,
2099            1,
2100            0,
2101            nrdyenb::Pipe8Nrdye,
2102            nrdyenb::Pipe8Nrdye,
2103            Nrdyenb_SPEC,
2104            crate::common::RW,
2105        >::from_register(self, 0)
2106    }
2107
2108    #[doc = "NRDY Interrupt Enable for PIPE7"]
2109    #[inline(always)]
2110    pub fn pipe7nrdye(
2111        self,
2112    ) -> crate::common::RegisterField<
2113        7,
2114        0x1,
2115        1,
2116        0,
2117        nrdyenb::Pipe7Nrdye,
2118        nrdyenb::Pipe7Nrdye,
2119        Nrdyenb_SPEC,
2120        crate::common::RW,
2121    > {
2122        crate::common::RegisterField::<
2123            7,
2124            0x1,
2125            1,
2126            0,
2127            nrdyenb::Pipe7Nrdye,
2128            nrdyenb::Pipe7Nrdye,
2129            Nrdyenb_SPEC,
2130            crate::common::RW,
2131        >::from_register(self, 0)
2132    }
2133
2134    #[doc = "NRDY Interrupt Enable for PIPE6"]
2135    #[inline(always)]
2136    pub fn pipe6nrdye(
2137        self,
2138    ) -> crate::common::RegisterField<
2139        6,
2140        0x1,
2141        1,
2142        0,
2143        nrdyenb::Pipe6Nrdye,
2144        nrdyenb::Pipe6Nrdye,
2145        Nrdyenb_SPEC,
2146        crate::common::RW,
2147    > {
2148        crate::common::RegisterField::<
2149            6,
2150            0x1,
2151            1,
2152            0,
2153            nrdyenb::Pipe6Nrdye,
2154            nrdyenb::Pipe6Nrdye,
2155            Nrdyenb_SPEC,
2156            crate::common::RW,
2157        >::from_register(self, 0)
2158    }
2159
2160    #[doc = "NRDY Interrupt Enable for PIPE5"]
2161    #[inline(always)]
2162    pub fn pipe5nrdye(
2163        self,
2164    ) -> crate::common::RegisterField<
2165        5,
2166        0x1,
2167        1,
2168        0,
2169        nrdyenb::Pipe5Nrdye,
2170        nrdyenb::Pipe5Nrdye,
2171        Nrdyenb_SPEC,
2172        crate::common::RW,
2173    > {
2174        crate::common::RegisterField::<
2175            5,
2176            0x1,
2177            1,
2178            0,
2179            nrdyenb::Pipe5Nrdye,
2180            nrdyenb::Pipe5Nrdye,
2181            Nrdyenb_SPEC,
2182            crate::common::RW,
2183        >::from_register(self, 0)
2184    }
2185
2186    #[doc = "NRDY Interrupt Enable for PIPE4"]
2187    #[inline(always)]
2188    pub fn pipe4nrdye(
2189        self,
2190    ) -> crate::common::RegisterField<
2191        4,
2192        0x1,
2193        1,
2194        0,
2195        nrdyenb::Pipe4Nrdye,
2196        nrdyenb::Pipe4Nrdye,
2197        Nrdyenb_SPEC,
2198        crate::common::RW,
2199    > {
2200        crate::common::RegisterField::<
2201            4,
2202            0x1,
2203            1,
2204            0,
2205            nrdyenb::Pipe4Nrdye,
2206            nrdyenb::Pipe4Nrdye,
2207            Nrdyenb_SPEC,
2208            crate::common::RW,
2209        >::from_register(self, 0)
2210    }
2211
2212    #[doc = "NRDY Interrupt Enable for PIPE3"]
2213    #[inline(always)]
2214    pub fn pipe3nrdye(
2215        self,
2216    ) -> crate::common::RegisterField<
2217        3,
2218        0x1,
2219        1,
2220        0,
2221        nrdyenb::Pipe3Nrdye,
2222        nrdyenb::Pipe3Nrdye,
2223        Nrdyenb_SPEC,
2224        crate::common::RW,
2225    > {
2226        crate::common::RegisterField::<
2227            3,
2228            0x1,
2229            1,
2230            0,
2231            nrdyenb::Pipe3Nrdye,
2232            nrdyenb::Pipe3Nrdye,
2233            Nrdyenb_SPEC,
2234            crate::common::RW,
2235        >::from_register(self, 0)
2236    }
2237
2238    #[doc = "NRDY Interrupt Enable for PIPE2"]
2239    #[inline(always)]
2240    pub fn pipe2nrdye(
2241        self,
2242    ) -> crate::common::RegisterField<
2243        2,
2244        0x1,
2245        1,
2246        0,
2247        nrdyenb::Pipe2Nrdye,
2248        nrdyenb::Pipe2Nrdye,
2249        Nrdyenb_SPEC,
2250        crate::common::RW,
2251    > {
2252        crate::common::RegisterField::<
2253            2,
2254            0x1,
2255            1,
2256            0,
2257            nrdyenb::Pipe2Nrdye,
2258            nrdyenb::Pipe2Nrdye,
2259            Nrdyenb_SPEC,
2260            crate::common::RW,
2261        >::from_register(self, 0)
2262    }
2263
2264    #[doc = "NRDY Interrupt Enable for PIPE1"]
2265    #[inline(always)]
2266    pub fn pipe1nrdye(
2267        self,
2268    ) -> crate::common::RegisterField<
2269        1,
2270        0x1,
2271        1,
2272        0,
2273        nrdyenb::Pipe1Nrdye,
2274        nrdyenb::Pipe1Nrdye,
2275        Nrdyenb_SPEC,
2276        crate::common::RW,
2277    > {
2278        crate::common::RegisterField::<
2279            1,
2280            0x1,
2281            1,
2282            0,
2283            nrdyenb::Pipe1Nrdye,
2284            nrdyenb::Pipe1Nrdye,
2285            Nrdyenb_SPEC,
2286            crate::common::RW,
2287        >::from_register(self, 0)
2288    }
2289
2290    #[doc = "NRDY Interrupt Enable for PIPE0"]
2291    #[inline(always)]
2292    pub fn pipe0nrdye(
2293        self,
2294    ) -> crate::common::RegisterField<
2295        0,
2296        0x1,
2297        1,
2298        0,
2299        nrdyenb::Pipe0Nrdye,
2300        nrdyenb::Pipe0Nrdye,
2301        Nrdyenb_SPEC,
2302        crate::common::RW,
2303    > {
2304        crate::common::RegisterField::<
2305            0,
2306            0x1,
2307            1,
2308            0,
2309            nrdyenb::Pipe0Nrdye,
2310            nrdyenb::Pipe0Nrdye,
2311            Nrdyenb_SPEC,
2312            crate::common::RW,
2313        >::from_register(self, 0)
2314    }
2315}
2316impl ::core::default::Default for Nrdyenb {
2317    #[inline(always)]
2318    fn default() -> Nrdyenb {
2319        <crate::RegValueT<Nrdyenb_SPEC> as RegisterValue<_>>::new(0)
2320    }
2321}
2322pub mod nrdyenb {
2323
2324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2325    pub struct Pipe9Nrdye_SPEC;
2326    pub type Pipe9Nrdye = crate::EnumBitfieldStruct<u8, Pipe9Nrdye_SPEC>;
2327    impl Pipe9Nrdye {
2328        #[doc = "Interrupt output disabled"]
2329        pub const _0: Self = Self::new(0);
2330
2331        #[doc = "Interrupt output enabled"]
2332        pub const _1: Self = Self::new(1);
2333    }
2334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2335    pub struct Pipe8Nrdye_SPEC;
2336    pub type Pipe8Nrdye = crate::EnumBitfieldStruct<u8, Pipe8Nrdye_SPEC>;
2337    impl Pipe8Nrdye {
2338        #[doc = "Interrupt output disabled"]
2339        pub const _0: Self = Self::new(0);
2340
2341        #[doc = "Interrupt output enabled"]
2342        pub const _1: Self = Self::new(1);
2343    }
2344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2345    pub struct Pipe7Nrdye_SPEC;
2346    pub type Pipe7Nrdye = crate::EnumBitfieldStruct<u8, Pipe7Nrdye_SPEC>;
2347    impl Pipe7Nrdye {
2348        #[doc = "Interrupt output disabled"]
2349        pub const _0: Self = Self::new(0);
2350
2351        #[doc = "Interrupt output enabled"]
2352        pub const _1: Self = Self::new(1);
2353    }
2354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2355    pub struct Pipe6Nrdye_SPEC;
2356    pub type Pipe6Nrdye = crate::EnumBitfieldStruct<u8, Pipe6Nrdye_SPEC>;
2357    impl Pipe6Nrdye {
2358        #[doc = "Interrupt output disabled"]
2359        pub const _0: Self = Self::new(0);
2360
2361        #[doc = "Interrupt output enabled"]
2362        pub const _1: Self = Self::new(1);
2363    }
2364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2365    pub struct Pipe5Nrdye_SPEC;
2366    pub type Pipe5Nrdye = crate::EnumBitfieldStruct<u8, Pipe5Nrdye_SPEC>;
2367    impl Pipe5Nrdye {
2368        #[doc = "Interrupt output disabled"]
2369        pub const _0: Self = Self::new(0);
2370
2371        #[doc = "Interrupt output enabled"]
2372        pub const _1: Self = Self::new(1);
2373    }
2374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2375    pub struct Pipe4Nrdye_SPEC;
2376    pub type Pipe4Nrdye = crate::EnumBitfieldStruct<u8, Pipe4Nrdye_SPEC>;
2377    impl Pipe4Nrdye {
2378        #[doc = "Interrupt output disabled"]
2379        pub const _0: Self = Self::new(0);
2380
2381        #[doc = "Interrupt output enabled"]
2382        pub const _1: Self = Self::new(1);
2383    }
2384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2385    pub struct Pipe3Nrdye_SPEC;
2386    pub type Pipe3Nrdye = crate::EnumBitfieldStruct<u8, Pipe3Nrdye_SPEC>;
2387    impl Pipe3Nrdye {
2388        #[doc = "Interrupt output disabled"]
2389        pub const _0: Self = Self::new(0);
2390
2391        #[doc = "Interrupt output enabled"]
2392        pub const _1: Self = Self::new(1);
2393    }
2394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2395    pub struct Pipe2Nrdye_SPEC;
2396    pub type Pipe2Nrdye = crate::EnumBitfieldStruct<u8, Pipe2Nrdye_SPEC>;
2397    impl Pipe2Nrdye {
2398        #[doc = "Interrupt output disabled"]
2399        pub const _0: Self = Self::new(0);
2400
2401        #[doc = "Interrupt output enabled"]
2402        pub const _1: Self = Self::new(1);
2403    }
2404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2405    pub struct Pipe1Nrdye_SPEC;
2406    pub type Pipe1Nrdye = crate::EnumBitfieldStruct<u8, Pipe1Nrdye_SPEC>;
2407    impl Pipe1Nrdye {
2408        #[doc = "Interrupt output disabled"]
2409        pub const _0: Self = Self::new(0);
2410
2411        #[doc = "Interrupt output enabled"]
2412        pub const _1: Self = Self::new(1);
2413    }
2414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2415    pub struct Pipe0Nrdye_SPEC;
2416    pub type Pipe0Nrdye = crate::EnumBitfieldStruct<u8, Pipe0Nrdye_SPEC>;
2417    impl Pipe0Nrdye {
2418        #[doc = "Interrupt output disabled"]
2419        pub const _0: Self = Self::new(0);
2420
2421        #[doc = "Interrupt output enabled"]
2422        pub const _1: Self = Self::new(1);
2423    }
2424}
2425#[doc(hidden)]
2426#[derive(Copy, Clone, Eq, PartialEq)]
2427pub struct Bempenb_SPEC;
2428impl crate::sealed::RegSpec for Bempenb_SPEC {
2429    type DataType = u16;
2430}
2431
2432#[doc = "BEMP Interrupt Enable Register"]
2433pub type Bempenb = crate::RegValueT<Bempenb_SPEC>;
2434
2435impl Bempenb {
2436    #[doc = "These bits are read as 000000. The write value should be 000000."]
2437    #[inline(always)]
2438    pub fn reserved(
2439        self,
2440    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Bempenb_SPEC, crate::common::RW> {
2441        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Bempenb_SPEC,crate::common::RW>::from_register(self,0)
2442    }
2443
2444    #[doc = "BEMP Interrupt Enable for PIPE9"]
2445    #[inline(always)]
2446    pub fn pipe9bempe(
2447        self,
2448    ) -> crate::common::RegisterField<
2449        9,
2450        0x1,
2451        1,
2452        0,
2453        bempenb::Pipe9Bempe,
2454        bempenb::Pipe9Bempe,
2455        Bempenb_SPEC,
2456        crate::common::RW,
2457    > {
2458        crate::common::RegisterField::<
2459            9,
2460            0x1,
2461            1,
2462            0,
2463            bempenb::Pipe9Bempe,
2464            bempenb::Pipe9Bempe,
2465            Bempenb_SPEC,
2466            crate::common::RW,
2467        >::from_register(self, 0)
2468    }
2469
2470    #[doc = "BEMP Interrupt Enable for PIPE8"]
2471    #[inline(always)]
2472    pub fn pipe8bempe(
2473        self,
2474    ) -> crate::common::RegisterField<
2475        8,
2476        0x1,
2477        1,
2478        0,
2479        bempenb::Pipe8Bempe,
2480        bempenb::Pipe8Bempe,
2481        Bempenb_SPEC,
2482        crate::common::RW,
2483    > {
2484        crate::common::RegisterField::<
2485            8,
2486            0x1,
2487            1,
2488            0,
2489            bempenb::Pipe8Bempe,
2490            bempenb::Pipe8Bempe,
2491            Bempenb_SPEC,
2492            crate::common::RW,
2493        >::from_register(self, 0)
2494    }
2495
2496    #[doc = "BEMP Interrupt Enable for PIPE7"]
2497    #[inline(always)]
2498    pub fn pipe7bempe(
2499        self,
2500    ) -> crate::common::RegisterField<
2501        7,
2502        0x1,
2503        1,
2504        0,
2505        bempenb::Pipe7Bempe,
2506        bempenb::Pipe7Bempe,
2507        Bempenb_SPEC,
2508        crate::common::RW,
2509    > {
2510        crate::common::RegisterField::<
2511            7,
2512            0x1,
2513            1,
2514            0,
2515            bempenb::Pipe7Bempe,
2516            bempenb::Pipe7Bempe,
2517            Bempenb_SPEC,
2518            crate::common::RW,
2519        >::from_register(self, 0)
2520    }
2521
2522    #[doc = "BEMP Interrupt Enable for PIPE6"]
2523    #[inline(always)]
2524    pub fn pipe6bempe(
2525        self,
2526    ) -> crate::common::RegisterField<
2527        6,
2528        0x1,
2529        1,
2530        0,
2531        bempenb::Pipe6Bempe,
2532        bempenb::Pipe6Bempe,
2533        Bempenb_SPEC,
2534        crate::common::RW,
2535    > {
2536        crate::common::RegisterField::<
2537            6,
2538            0x1,
2539            1,
2540            0,
2541            bempenb::Pipe6Bempe,
2542            bempenb::Pipe6Bempe,
2543            Bempenb_SPEC,
2544            crate::common::RW,
2545        >::from_register(self, 0)
2546    }
2547
2548    #[doc = "BEMP Interrupt Enable for PIPE5"]
2549    #[inline(always)]
2550    pub fn pipe5bempe(
2551        self,
2552    ) -> crate::common::RegisterField<
2553        5,
2554        0x1,
2555        1,
2556        0,
2557        bempenb::Pipe5Bempe,
2558        bempenb::Pipe5Bempe,
2559        Bempenb_SPEC,
2560        crate::common::RW,
2561    > {
2562        crate::common::RegisterField::<
2563            5,
2564            0x1,
2565            1,
2566            0,
2567            bempenb::Pipe5Bempe,
2568            bempenb::Pipe5Bempe,
2569            Bempenb_SPEC,
2570            crate::common::RW,
2571        >::from_register(self, 0)
2572    }
2573
2574    #[doc = "BEMP Interrupt Enable for PIPE4"]
2575    #[inline(always)]
2576    pub fn pipe4bempe(
2577        self,
2578    ) -> crate::common::RegisterField<
2579        4,
2580        0x1,
2581        1,
2582        0,
2583        bempenb::Pipe4Bempe,
2584        bempenb::Pipe4Bempe,
2585        Bempenb_SPEC,
2586        crate::common::RW,
2587    > {
2588        crate::common::RegisterField::<
2589            4,
2590            0x1,
2591            1,
2592            0,
2593            bempenb::Pipe4Bempe,
2594            bempenb::Pipe4Bempe,
2595            Bempenb_SPEC,
2596            crate::common::RW,
2597        >::from_register(self, 0)
2598    }
2599
2600    #[doc = "BEMP Interrupt Enable for PIPE3"]
2601    #[inline(always)]
2602    pub fn pipe3bempe(
2603        self,
2604    ) -> crate::common::RegisterField<
2605        3,
2606        0x1,
2607        1,
2608        0,
2609        bempenb::Pipe3Bempe,
2610        bempenb::Pipe3Bempe,
2611        Bempenb_SPEC,
2612        crate::common::RW,
2613    > {
2614        crate::common::RegisterField::<
2615            3,
2616            0x1,
2617            1,
2618            0,
2619            bempenb::Pipe3Bempe,
2620            bempenb::Pipe3Bempe,
2621            Bempenb_SPEC,
2622            crate::common::RW,
2623        >::from_register(self, 0)
2624    }
2625
2626    #[doc = "BEMP Interrupt Enable for PIPE2"]
2627    #[inline(always)]
2628    pub fn pipe2bempe(
2629        self,
2630    ) -> crate::common::RegisterField<
2631        2,
2632        0x1,
2633        1,
2634        0,
2635        bempenb::Pipe2Bempe,
2636        bempenb::Pipe2Bempe,
2637        Bempenb_SPEC,
2638        crate::common::RW,
2639    > {
2640        crate::common::RegisterField::<
2641            2,
2642            0x1,
2643            1,
2644            0,
2645            bempenb::Pipe2Bempe,
2646            bempenb::Pipe2Bempe,
2647            Bempenb_SPEC,
2648            crate::common::RW,
2649        >::from_register(self, 0)
2650    }
2651
2652    #[doc = "BEMP Interrupt Enable for PIPE1"]
2653    #[inline(always)]
2654    pub fn pipe1bempe(
2655        self,
2656    ) -> crate::common::RegisterField<
2657        1,
2658        0x1,
2659        1,
2660        0,
2661        bempenb::Pipe1Bempe,
2662        bempenb::Pipe1Bempe,
2663        Bempenb_SPEC,
2664        crate::common::RW,
2665    > {
2666        crate::common::RegisterField::<
2667            1,
2668            0x1,
2669            1,
2670            0,
2671            bempenb::Pipe1Bempe,
2672            bempenb::Pipe1Bempe,
2673            Bempenb_SPEC,
2674            crate::common::RW,
2675        >::from_register(self, 0)
2676    }
2677
2678    #[doc = "BEMP Interrupt Enable for PIPE0"]
2679    #[inline(always)]
2680    pub fn pipe0bempe(
2681        self,
2682    ) -> crate::common::RegisterField<
2683        0,
2684        0x1,
2685        1,
2686        0,
2687        bempenb::Pipe0Bempe,
2688        bempenb::Pipe0Bempe,
2689        Bempenb_SPEC,
2690        crate::common::RW,
2691    > {
2692        crate::common::RegisterField::<
2693            0,
2694            0x1,
2695            1,
2696            0,
2697            bempenb::Pipe0Bempe,
2698            bempenb::Pipe0Bempe,
2699            Bempenb_SPEC,
2700            crate::common::RW,
2701        >::from_register(self, 0)
2702    }
2703}
2704impl ::core::default::Default for Bempenb {
2705    #[inline(always)]
2706    fn default() -> Bempenb {
2707        <crate::RegValueT<Bempenb_SPEC> as RegisterValue<_>>::new(0)
2708    }
2709}
2710pub mod bempenb {
2711
2712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2713    pub struct Pipe9Bempe_SPEC;
2714    pub type Pipe9Bempe = crate::EnumBitfieldStruct<u8, Pipe9Bempe_SPEC>;
2715    impl Pipe9Bempe {
2716        #[doc = "Interrupt output disabled"]
2717        pub const _0: Self = Self::new(0);
2718
2719        #[doc = "Interrupt output enabled"]
2720        pub const _1: Self = Self::new(1);
2721    }
2722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2723    pub struct Pipe8Bempe_SPEC;
2724    pub type Pipe8Bempe = crate::EnumBitfieldStruct<u8, Pipe8Bempe_SPEC>;
2725    impl Pipe8Bempe {
2726        #[doc = "Interrupt output disabled"]
2727        pub const _0: Self = Self::new(0);
2728
2729        #[doc = "Interrupt output enabled"]
2730        pub const _1: Self = Self::new(1);
2731    }
2732    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2733    pub struct Pipe7Bempe_SPEC;
2734    pub type Pipe7Bempe = crate::EnumBitfieldStruct<u8, Pipe7Bempe_SPEC>;
2735    impl Pipe7Bempe {
2736        #[doc = "Interrupt output disabled"]
2737        pub const _0: Self = Self::new(0);
2738
2739        #[doc = "Interrupt output enabled"]
2740        pub const _1: Self = Self::new(1);
2741    }
2742    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2743    pub struct Pipe6Bempe_SPEC;
2744    pub type Pipe6Bempe = crate::EnumBitfieldStruct<u8, Pipe6Bempe_SPEC>;
2745    impl Pipe6Bempe {
2746        #[doc = "Interrupt output disabled"]
2747        pub const _0: Self = Self::new(0);
2748
2749        #[doc = "Interrupt output enabled"]
2750        pub const _1: Self = Self::new(1);
2751    }
2752    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2753    pub struct Pipe5Bempe_SPEC;
2754    pub type Pipe5Bempe = crate::EnumBitfieldStruct<u8, Pipe5Bempe_SPEC>;
2755    impl Pipe5Bempe {
2756        #[doc = "Interrupt output disabled"]
2757        pub const _0: Self = Self::new(0);
2758
2759        #[doc = "Interrupt output enabled"]
2760        pub const _1: Self = Self::new(1);
2761    }
2762    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2763    pub struct Pipe4Bempe_SPEC;
2764    pub type Pipe4Bempe = crate::EnumBitfieldStruct<u8, Pipe4Bempe_SPEC>;
2765    impl Pipe4Bempe {
2766        #[doc = "Interrupt output disabled"]
2767        pub const _0: Self = Self::new(0);
2768
2769        #[doc = "Interrupt output enabled"]
2770        pub const _1: Self = Self::new(1);
2771    }
2772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2773    pub struct Pipe3Bempe_SPEC;
2774    pub type Pipe3Bempe = crate::EnumBitfieldStruct<u8, Pipe3Bempe_SPEC>;
2775    impl Pipe3Bempe {
2776        #[doc = "Interrupt output disabled"]
2777        pub const _0: Self = Self::new(0);
2778
2779        #[doc = "Interrupt output enabled"]
2780        pub const _1: Self = Self::new(1);
2781    }
2782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2783    pub struct Pipe2Bempe_SPEC;
2784    pub type Pipe2Bempe = crate::EnumBitfieldStruct<u8, Pipe2Bempe_SPEC>;
2785    impl Pipe2Bempe {
2786        #[doc = "Interrupt output disabled"]
2787        pub const _0: Self = Self::new(0);
2788
2789        #[doc = "Interrupt output enabled"]
2790        pub const _1: Self = Self::new(1);
2791    }
2792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2793    pub struct Pipe1Bempe_SPEC;
2794    pub type Pipe1Bempe = crate::EnumBitfieldStruct<u8, Pipe1Bempe_SPEC>;
2795    impl Pipe1Bempe {
2796        #[doc = "Interrupt output disabled"]
2797        pub const _0: Self = Self::new(0);
2798
2799        #[doc = "Interrupt output enabled"]
2800        pub const _1: Self = Self::new(1);
2801    }
2802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2803    pub struct Pipe0Bempe_SPEC;
2804    pub type Pipe0Bempe = crate::EnumBitfieldStruct<u8, Pipe0Bempe_SPEC>;
2805    impl Pipe0Bempe {
2806        #[doc = "Interrupt output disabled"]
2807        pub const _0: Self = Self::new(0);
2808
2809        #[doc = "Interrupt output enabled"]
2810        pub const _1: Self = Self::new(1);
2811    }
2812}
2813#[doc(hidden)]
2814#[derive(Copy, Clone, Eq, PartialEq)]
2815pub struct Sofcfg_SPEC;
2816impl crate::sealed::RegSpec for Sofcfg_SPEC {
2817    type DataType = u16;
2818}
2819
2820#[doc = "SOF Output Configuration Register"]
2821pub type Sofcfg = crate::RegValueT<Sofcfg_SPEC>;
2822
2823impl Sofcfg {
2824    #[doc = "Transaction-Enabled Time Select"]
2825    #[inline(always)]
2826    pub fn trnensel(
2827        self,
2828    ) -> crate::common::RegisterField<
2829        8,
2830        0x1,
2831        1,
2832        0,
2833        sofcfg::Trnensel,
2834        sofcfg::Trnensel,
2835        Sofcfg_SPEC,
2836        crate::common::RW,
2837    > {
2838        crate::common::RegisterField::<
2839            8,
2840            0x1,
2841            1,
2842            0,
2843            sofcfg::Trnensel,
2844            sofcfg::Trnensel,
2845            Sofcfg_SPEC,
2846            crate::common::RW,
2847        >::from_register(self, 0)
2848    }
2849
2850    #[doc = "BRDY Interrupt Status Clear Timing"]
2851    #[inline(always)]
2852    pub fn brdym(
2853        self,
2854    ) -> crate::common::RegisterField<
2855        6,
2856        0x1,
2857        1,
2858        0,
2859        sofcfg::Brdym,
2860        sofcfg::Brdym,
2861        Sofcfg_SPEC,
2862        crate::common::RW,
2863    > {
2864        crate::common::RegisterField::<
2865            6,
2866            0x1,
2867            1,
2868            0,
2869            sofcfg::Brdym,
2870            sofcfg::Brdym,
2871            Sofcfg_SPEC,
2872            crate::common::RW,
2873        >::from_register(self, 0)
2874    }
2875
2876    #[doc = "Edge Interrupt Output Status Monitor"]
2877    #[inline(always)]
2878    pub fn edgests(
2879        self,
2880    ) -> crate::common::RegisterField<
2881        4,
2882        0x1,
2883        1,
2884        0,
2885        sofcfg::Edgests,
2886        sofcfg::Edgests,
2887        Sofcfg_SPEC,
2888        crate::common::R,
2889    > {
2890        crate::common::RegisterField::<
2891            4,
2892            0x1,
2893            1,
2894            0,
2895            sofcfg::Edgests,
2896            sofcfg::Edgests,
2897            Sofcfg_SPEC,
2898            crate::common::R,
2899        >::from_register(self, 0)
2900    }
2901
2902    #[doc = "These bits are read as 0000. The write value should be 0000."]
2903    #[inline(always)]
2904    pub fn reserved(
2905        self,
2906    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Sofcfg_SPEC, crate::common::RW> {
2907        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Sofcfg_SPEC,crate::common::RW>::from_register(self,0)
2908    }
2909}
2910impl ::core::default::Default for Sofcfg {
2911    #[inline(always)]
2912    fn default() -> Sofcfg {
2913        <crate::RegValueT<Sofcfg_SPEC> as RegisterValue<_>>::new(0)
2914    }
2915}
2916pub mod sofcfg {
2917
2918    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2919    pub struct Trnensel_SPEC;
2920    pub type Trnensel = crate::EnumBitfieldStruct<u8, Trnensel_SPEC>;
2921    impl Trnensel {
2922        #[doc = "For non-low-speed communication"]
2923        pub const _0: Self = Self::new(0);
2924
2925        #[doc = "For low-speed communication"]
2926        pub const _1: Self = Self::new(1);
2927    }
2928    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2929    pub struct Brdym_SPEC;
2930    pub type Brdym = crate::EnumBitfieldStruct<u8, Brdym_SPEC>;
2931    impl Brdym {
2932        #[doc = "Software clears the status."]
2933        pub const _0: Self = Self::new(0);
2934
2935        #[doc = "The USB clears the status when data has been read from the FIFO buffer or data has been written to the FIFO buffer."]
2936        pub const _1: Self = Self::new(1);
2937    }
2938    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2939    pub struct Edgests_SPEC;
2940    pub type Edgests = crate::EnumBitfieldStruct<u8, Edgests_SPEC>;
2941    impl Edgests {
2942        #[doc = "before stopping the clock supply to the USB module"]
2943        pub const _0: Self = Self::new(0);
2944
2945        #[doc = "the edge interrupt output signal is in the middle of the edge processing"]
2946        pub const _1: Self = Self::new(1);
2947    }
2948}
2949#[doc(hidden)]
2950#[derive(Copy, Clone, Eq, PartialEq)]
2951pub struct Intsts0_SPEC;
2952impl crate::sealed::RegSpec for Intsts0_SPEC {
2953    type DataType = u16;
2954}
2955
2956#[doc = "Interrupt Status Register 0"]
2957pub type Intsts0 = crate::RegValueT<Intsts0_SPEC>;
2958
2959impl Intsts0 {
2960    #[doc = "VBUS Interrupt Status"]
2961    #[inline(always)]
2962    pub fn vbint(
2963        self,
2964    ) -> crate::common::RegisterField<
2965        15,
2966        0x1,
2967        1,
2968        0,
2969        intsts0::Vbint,
2970        intsts0::Vbint,
2971        Intsts0_SPEC,
2972        crate::common::RW,
2973    > {
2974        crate::common::RegisterField::<
2975            15,
2976            0x1,
2977            1,
2978            0,
2979            intsts0::Vbint,
2980            intsts0::Vbint,
2981            Intsts0_SPEC,
2982            crate::common::RW,
2983        >::from_register(self, 0)
2984    }
2985
2986    #[doc = "Resume Interrupt Status"]
2987    #[inline(always)]
2988    pub fn resm(
2989        self,
2990    ) -> crate::common::RegisterField<
2991        14,
2992        0x1,
2993        1,
2994        0,
2995        intsts0::Resm,
2996        intsts0::Resm,
2997        Intsts0_SPEC,
2998        crate::common::RW,
2999    > {
3000        crate::common::RegisterField::<
3001            14,
3002            0x1,
3003            1,
3004            0,
3005            intsts0::Resm,
3006            intsts0::Resm,
3007            Intsts0_SPEC,
3008            crate::common::RW,
3009        >::from_register(self, 0)
3010    }
3011
3012    #[doc = "Frame Number Refresh Interrupt Status"]
3013    #[inline(always)]
3014    pub fn sofr(
3015        self,
3016    ) -> crate::common::RegisterField<
3017        13,
3018        0x1,
3019        1,
3020        0,
3021        intsts0::Sofr,
3022        intsts0::Sofr,
3023        Intsts0_SPEC,
3024        crate::common::RW,
3025    > {
3026        crate::common::RegisterField::<
3027            13,
3028            0x1,
3029            1,
3030            0,
3031            intsts0::Sofr,
3032            intsts0::Sofr,
3033            Intsts0_SPEC,
3034            crate::common::RW,
3035        >::from_register(self, 0)
3036    }
3037
3038    #[doc = "Device State Transition Interrupt Status"]
3039    #[inline(always)]
3040    pub fn dvst(
3041        self,
3042    ) -> crate::common::RegisterField<
3043        12,
3044        0x1,
3045        1,
3046        0,
3047        intsts0::Dvst,
3048        intsts0::Dvst,
3049        Intsts0_SPEC,
3050        crate::common::RW,
3051    > {
3052        crate::common::RegisterField::<
3053            12,
3054            0x1,
3055            1,
3056            0,
3057            intsts0::Dvst,
3058            intsts0::Dvst,
3059            Intsts0_SPEC,
3060            crate::common::RW,
3061        >::from_register(self, 0)
3062    }
3063
3064    #[doc = "Control Transfer Stage Transition Interrupt Status"]
3065    #[inline(always)]
3066    pub fn ctrt(
3067        self,
3068    ) -> crate::common::RegisterField<
3069        11,
3070        0x1,
3071        1,
3072        0,
3073        intsts0::Ctrt,
3074        intsts0::Ctrt,
3075        Intsts0_SPEC,
3076        crate::common::RW,
3077    > {
3078        crate::common::RegisterField::<
3079            11,
3080            0x1,
3081            1,
3082            0,
3083            intsts0::Ctrt,
3084            intsts0::Ctrt,
3085            Intsts0_SPEC,
3086            crate::common::RW,
3087        >::from_register(self, 0)
3088    }
3089
3090    #[doc = "Buffer Empty Interrupt Status"]
3091    #[inline(always)]
3092    pub fn bemp(
3093        self,
3094    ) -> crate::common::RegisterField<
3095        10,
3096        0x1,
3097        1,
3098        0,
3099        intsts0::Bemp,
3100        intsts0::Bemp,
3101        Intsts0_SPEC,
3102        crate::common::R,
3103    > {
3104        crate::common::RegisterField::<
3105            10,
3106            0x1,
3107            1,
3108            0,
3109            intsts0::Bemp,
3110            intsts0::Bemp,
3111            Intsts0_SPEC,
3112            crate::common::R,
3113        >::from_register(self, 0)
3114    }
3115
3116    #[doc = "Buffer Not Ready Interrupt Status"]
3117    #[inline(always)]
3118    pub fn nrdy(
3119        self,
3120    ) -> crate::common::RegisterField<
3121        9,
3122        0x1,
3123        1,
3124        0,
3125        intsts0::Nrdy,
3126        intsts0::Nrdy,
3127        Intsts0_SPEC,
3128        crate::common::R,
3129    > {
3130        crate::common::RegisterField::<
3131            9,
3132            0x1,
3133            1,
3134            0,
3135            intsts0::Nrdy,
3136            intsts0::Nrdy,
3137            Intsts0_SPEC,
3138            crate::common::R,
3139        >::from_register(self, 0)
3140    }
3141
3142    #[doc = "Buffer Ready Interrupt Status"]
3143    #[inline(always)]
3144    pub fn brdy(
3145        self,
3146    ) -> crate::common::RegisterField<
3147        8,
3148        0x1,
3149        1,
3150        0,
3151        intsts0::Brdy,
3152        intsts0::Brdy,
3153        Intsts0_SPEC,
3154        crate::common::R,
3155    > {
3156        crate::common::RegisterField::<
3157            8,
3158            0x1,
3159            1,
3160            0,
3161            intsts0::Brdy,
3162            intsts0::Brdy,
3163            Intsts0_SPEC,
3164            crate::common::R,
3165        >::from_register(self, 0)
3166    }
3167
3168    #[doc = "VBUS Input Status"]
3169    #[inline(always)]
3170    pub fn vbsts(
3171        self,
3172    ) -> crate::common::RegisterField<
3173        7,
3174        0x1,
3175        1,
3176        0,
3177        intsts0::Vbsts,
3178        intsts0::Vbsts,
3179        Intsts0_SPEC,
3180        crate::common::R,
3181    > {
3182        crate::common::RegisterField::<
3183            7,
3184            0x1,
3185            1,
3186            0,
3187            intsts0::Vbsts,
3188            intsts0::Vbsts,
3189            Intsts0_SPEC,
3190            crate::common::R,
3191        >::from_register(self, 0)
3192    }
3193
3194    #[doc = "Device State"]
3195    #[inline(always)]
3196    pub fn dvsq(
3197        self,
3198    ) -> crate::common::RegisterField<
3199        4,
3200        0x7,
3201        1,
3202        0,
3203        intsts0::Dvsq,
3204        intsts0::Dvsq,
3205        Intsts0_SPEC,
3206        crate::common::R,
3207    > {
3208        crate::common::RegisterField::<
3209            4,
3210            0x7,
3211            1,
3212            0,
3213            intsts0::Dvsq,
3214            intsts0::Dvsq,
3215            Intsts0_SPEC,
3216            crate::common::R,
3217        >::from_register(self, 0)
3218    }
3219
3220    #[doc = "USB Request Reception"]
3221    #[inline(always)]
3222    pub fn valid(
3223        self,
3224    ) -> crate::common::RegisterField<
3225        3,
3226        0x1,
3227        1,
3228        0,
3229        intsts0::Valid,
3230        intsts0::Valid,
3231        Intsts0_SPEC,
3232        crate::common::RW,
3233    > {
3234        crate::common::RegisterField::<
3235            3,
3236            0x1,
3237            1,
3238            0,
3239            intsts0::Valid,
3240            intsts0::Valid,
3241            Intsts0_SPEC,
3242            crate::common::RW,
3243        >::from_register(self, 0)
3244    }
3245
3246    #[doc = "Control Transfer Stage"]
3247    #[inline(always)]
3248    pub fn ctsq(
3249        self,
3250    ) -> crate::common::RegisterField<
3251        0,
3252        0x7,
3253        1,
3254        0,
3255        intsts0::Ctsq,
3256        intsts0::Ctsq,
3257        Intsts0_SPEC,
3258        crate::common::R,
3259    > {
3260        crate::common::RegisterField::<
3261            0,
3262            0x7,
3263            1,
3264            0,
3265            intsts0::Ctsq,
3266            intsts0::Ctsq,
3267            Intsts0_SPEC,
3268            crate::common::R,
3269        >::from_register(self, 0)
3270    }
3271}
3272impl ::core::default::Default for Intsts0 {
3273    #[inline(always)]
3274    fn default() -> Intsts0 {
3275        <crate::RegValueT<Intsts0_SPEC> as RegisterValue<_>>::new(0)
3276    }
3277}
3278pub mod intsts0 {
3279
3280    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3281    pub struct Vbint_SPEC;
3282    pub type Vbint = crate::EnumBitfieldStruct<u8, Vbint_SPEC>;
3283    impl Vbint {
3284        #[doc = "VBUS interrupts are not generated."]
3285        pub const _0: Self = Self::new(0);
3286
3287        #[doc = "VBUS interrupts are generated."]
3288        pub const _1: Self = Self::new(1);
3289    }
3290    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3291    pub struct Resm_SPEC;
3292    pub type Resm = crate::EnumBitfieldStruct<u8, Resm_SPEC>;
3293    impl Resm {
3294        #[doc = "Resume interrupts are not generated."]
3295        pub const _0: Self = Self::new(0);
3296
3297        #[doc = "Resume interrupts are generated."]
3298        pub const _1: Self = Self::new(1);
3299    }
3300    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3301    pub struct Sofr_SPEC;
3302    pub type Sofr = crate::EnumBitfieldStruct<u8, Sofr_SPEC>;
3303    impl Sofr {
3304        #[doc = "SOF interrupts are not generated."]
3305        pub const _0: Self = Self::new(0);
3306
3307        #[doc = "SOF interrupts are generated."]
3308        pub const _1: Self = Self::new(1);
3309    }
3310    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3311    pub struct Dvst_SPEC;
3312    pub type Dvst = crate::EnumBitfieldStruct<u8, Dvst_SPEC>;
3313    impl Dvst {
3314        #[doc = "Device state transition interrupts are not generated."]
3315        pub const _0: Self = Self::new(0);
3316
3317        #[doc = "Device state transition interrupts are generated."]
3318        pub const _1: Self = Self::new(1);
3319    }
3320    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3321    pub struct Ctrt_SPEC;
3322    pub type Ctrt = crate::EnumBitfieldStruct<u8, Ctrt_SPEC>;
3323    impl Ctrt {
3324        #[doc = "Control transfer stage transition interrupts are not generated."]
3325        pub const _0: Self = Self::new(0);
3326
3327        #[doc = "Control transfer stage transition interrupts are generated."]
3328        pub const _1: Self = Self::new(1);
3329    }
3330    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3331    pub struct Bemp_SPEC;
3332    pub type Bemp = crate::EnumBitfieldStruct<u8, Bemp_SPEC>;
3333    impl Bemp {
3334        #[doc = "BEMP interrupts are not generated."]
3335        pub const _0: Self = Self::new(0);
3336
3337        #[doc = "BEMP interrupts are generated."]
3338        pub const _1: Self = Self::new(1);
3339    }
3340    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3341    pub struct Nrdy_SPEC;
3342    pub type Nrdy = crate::EnumBitfieldStruct<u8, Nrdy_SPEC>;
3343    impl Nrdy {
3344        #[doc = "NRDY interrupts are not generated."]
3345        pub const _0: Self = Self::new(0);
3346
3347        #[doc = "NRDY interrupts are generated."]
3348        pub const _1: Self = Self::new(1);
3349    }
3350    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3351    pub struct Brdy_SPEC;
3352    pub type Brdy = crate::EnumBitfieldStruct<u8, Brdy_SPEC>;
3353    impl Brdy {
3354        #[doc = "BRDY interrupts are not generated."]
3355        pub const _0: Self = Self::new(0);
3356
3357        #[doc = "BRDY interrupts are generated."]
3358        pub const _1: Self = Self::new(1);
3359    }
3360    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3361    pub struct Vbsts_SPEC;
3362    pub type Vbsts = crate::EnumBitfieldStruct<u8, Vbsts_SPEC>;
3363    impl Vbsts {
3364        #[doc = "USB0_VBUS pin is low."]
3365        pub const _0: Self = Self::new(0);
3366
3367        #[doc = "USB0_VBUS pin is high."]
3368        pub const _1: Self = Self::new(1);
3369    }
3370    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3371    pub struct Dvsq_SPEC;
3372    pub type Dvsq = crate::EnumBitfieldStruct<u8, Dvsq_SPEC>;
3373    impl Dvsq {
3374        #[doc = "Powered state"]
3375        pub const _000: Self = Self::new(0);
3376
3377        #[doc = "Default state"]
3378        pub const _001: Self = Self::new(1);
3379
3380        #[doc = "Address state"]
3381        pub const _010: Self = Self::new(2);
3382
3383        #[doc = "Configured state"]
3384        pub const _011: Self = Self::new(3);
3385    }
3386    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3387    pub struct Valid_SPEC;
3388    pub type Valid = crate::EnumBitfieldStruct<u8, Valid_SPEC>;
3389    impl Valid {
3390        #[doc = "Setup packet is not received"]
3391        pub const _0: Self = Self::new(0);
3392
3393        #[doc = "Setup packet is received"]
3394        pub const _1: Self = Self::new(1);
3395    }
3396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3397    pub struct Ctsq_SPEC;
3398    pub type Ctsq = crate::EnumBitfieldStruct<u8, Ctsq_SPEC>;
3399    impl Ctsq {
3400        #[doc = "Idle or setup stage"]
3401        pub const _000: Self = Self::new(0);
3402
3403        #[doc = "Control read data stage"]
3404        pub const _001: Self = Self::new(1);
3405
3406        #[doc = "Control read status stage"]
3407        pub const _010: Self = Self::new(2);
3408
3409        #[doc = "Control write data stage"]
3410        pub const _011: Self = Self::new(3);
3411
3412        #[doc = "Control write status stage"]
3413        pub const _100: Self = Self::new(4);
3414
3415        #[doc = "Control write(nodata) status stage"]
3416        pub const _101: Self = Self::new(5);
3417
3418        #[doc = "Control transfer sequence error"]
3419        pub const _110: Self = Self::new(6);
3420    }
3421}
3422#[doc(hidden)]
3423#[derive(Copy, Clone, Eq, PartialEq)]
3424pub struct Brdysts_SPEC;
3425impl crate::sealed::RegSpec for Brdysts_SPEC {
3426    type DataType = u16;
3427}
3428
3429#[doc = "BRDY Interrupt Status Register"]
3430pub type Brdysts = crate::RegValueT<Brdysts_SPEC>;
3431
3432impl Brdysts {
3433    #[doc = "These bits are read as 000000. The write value should be 000000."]
3434    #[inline(always)]
3435    pub fn reserved(
3436        self,
3437    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Brdysts_SPEC, crate::common::RW> {
3438        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Brdysts_SPEC,crate::common::RW>::from_register(self,0)
3439    }
3440
3441    #[doc = "BRDY Interrupt Status for PIPE9"]
3442    #[inline(always)]
3443    pub fn pipe9brdy(
3444        self,
3445    ) -> crate::common::RegisterField<
3446        9,
3447        0x1,
3448        1,
3449        0,
3450        brdysts::Pipe9Brdy,
3451        brdysts::Pipe9Brdy,
3452        Brdysts_SPEC,
3453        crate::common::RW,
3454    > {
3455        crate::common::RegisterField::<
3456            9,
3457            0x1,
3458            1,
3459            0,
3460            brdysts::Pipe9Brdy,
3461            brdysts::Pipe9Brdy,
3462            Brdysts_SPEC,
3463            crate::common::RW,
3464        >::from_register(self, 0)
3465    }
3466
3467    #[doc = "BRDY Interrupt Status for PIPE8"]
3468    #[inline(always)]
3469    pub fn pipe8brdy(
3470        self,
3471    ) -> crate::common::RegisterField<
3472        8,
3473        0x1,
3474        1,
3475        0,
3476        brdysts::Pipe8Brdy,
3477        brdysts::Pipe8Brdy,
3478        Brdysts_SPEC,
3479        crate::common::RW,
3480    > {
3481        crate::common::RegisterField::<
3482            8,
3483            0x1,
3484            1,
3485            0,
3486            brdysts::Pipe8Brdy,
3487            brdysts::Pipe8Brdy,
3488            Brdysts_SPEC,
3489            crate::common::RW,
3490        >::from_register(self, 0)
3491    }
3492
3493    #[doc = "BRDY Interrupt Status for PIPE7"]
3494    #[inline(always)]
3495    pub fn pipe7brdy(
3496        self,
3497    ) -> crate::common::RegisterField<
3498        7,
3499        0x1,
3500        1,
3501        0,
3502        brdysts::Pipe7Brdy,
3503        brdysts::Pipe7Brdy,
3504        Brdysts_SPEC,
3505        crate::common::RW,
3506    > {
3507        crate::common::RegisterField::<
3508            7,
3509            0x1,
3510            1,
3511            0,
3512            brdysts::Pipe7Brdy,
3513            brdysts::Pipe7Brdy,
3514            Brdysts_SPEC,
3515            crate::common::RW,
3516        >::from_register(self, 0)
3517    }
3518
3519    #[doc = "BRDY Interrupt Status for PIPE6"]
3520    #[inline(always)]
3521    pub fn pipe6brdy(
3522        self,
3523    ) -> crate::common::RegisterField<
3524        6,
3525        0x1,
3526        1,
3527        0,
3528        brdysts::Pipe6Brdy,
3529        brdysts::Pipe6Brdy,
3530        Brdysts_SPEC,
3531        crate::common::RW,
3532    > {
3533        crate::common::RegisterField::<
3534            6,
3535            0x1,
3536            1,
3537            0,
3538            brdysts::Pipe6Brdy,
3539            brdysts::Pipe6Brdy,
3540            Brdysts_SPEC,
3541            crate::common::RW,
3542        >::from_register(self, 0)
3543    }
3544
3545    #[doc = "BRDY Interrupt Status for PIPE5"]
3546    #[inline(always)]
3547    pub fn pipe5brdy(
3548        self,
3549    ) -> crate::common::RegisterField<
3550        5,
3551        0x1,
3552        1,
3553        0,
3554        brdysts::Pipe5Brdy,
3555        brdysts::Pipe5Brdy,
3556        Brdysts_SPEC,
3557        crate::common::RW,
3558    > {
3559        crate::common::RegisterField::<
3560            5,
3561            0x1,
3562            1,
3563            0,
3564            brdysts::Pipe5Brdy,
3565            brdysts::Pipe5Brdy,
3566            Brdysts_SPEC,
3567            crate::common::RW,
3568        >::from_register(self, 0)
3569    }
3570
3571    #[doc = "BRDY Interrupt Status for PIPE4"]
3572    #[inline(always)]
3573    pub fn pipe4brdy(
3574        self,
3575    ) -> crate::common::RegisterField<
3576        4,
3577        0x1,
3578        1,
3579        0,
3580        brdysts::Pipe4Brdy,
3581        brdysts::Pipe4Brdy,
3582        Brdysts_SPEC,
3583        crate::common::RW,
3584    > {
3585        crate::common::RegisterField::<
3586            4,
3587            0x1,
3588            1,
3589            0,
3590            brdysts::Pipe4Brdy,
3591            brdysts::Pipe4Brdy,
3592            Brdysts_SPEC,
3593            crate::common::RW,
3594        >::from_register(self, 0)
3595    }
3596
3597    #[doc = "BRDY Interrupt Status for PIPE3"]
3598    #[inline(always)]
3599    pub fn pipe3brdy(
3600        self,
3601    ) -> crate::common::RegisterField<
3602        3,
3603        0x1,
3604        1,
3605        0,
3606        brdysts::Pipe3Brdy,
3607        brdysts::Pipe3Brdy,
3608        Brdysts_SPEC,
3609        crate::common::RW,
3610    > {
3611        crate::common::RegisterField::<
3612            3,
3613            0x1,
3614            1,
3615            0,
3616            brdysts::Pipe3Brdy,
3617            brdysts::Pipe3Brdy,
3618            Brdysts_SPEC,
3619            crate::common::RW,
3620        >::from_register(self, 0)
3621    }
3622
3623    #[doc = "BRDY Interrupt Status for PIPE2"]
3624    #[inline(always)]
3625    pub fn pipe2brdy(
3626        self,
3627    ) -> crate::common::RegisterField<
3628        2,
3629        0x1,
3630        1,
3631        0,
3632        brdysts::Pipe2Brdy,
3633        brdysts::Pipe2Brdy,
3634        Brdysts_SPEC,
3635        crate::common::RW,
3636    > {
3637        crate::common::RegisterField::<
3638            2,
3639            0x1,
3640            1,
3641            0,
3642            brdysts::Pipe2Brdy,
3643            brdysts::Pipe2Brdy,
3644            Brdysts_SPEC,
3645            crate::common::RW,
3646        >::from_register(self, 0)
3647    }
3648
3649    #[doc = "BRDY Interrupt Status for PIPE1"]
3650    #[inline(always)]
3651    pub fn pipe1brdy(
3652        self,
3653    ) -> crate::common::RegisterField<
3654        1,
3655        0x1,
3656        1,
3657        0,
3658        brdysts::Pipe1Brdy,
3659        brdysts::Pipe1Brdy,
3660        Brdysts_SPEC,
3661        crate::common::RW,
3662    > {
3663        crate::common::RegisterField::<
3664            1,
3665            0x1,
3666            1,
3667            0,
3668            brdysts::Pipe1Brdy,
3669            brdysts::Pipe1Brdy,
3670            Brdysts_SPEC,
3671            crate::common::RW,
3672        >::from_register(self, 0)
3673    }
3674
3675    #[doc = "BRDY Interrupt Status for PIPE0"]
3676    #[inline(always)]
3677    pub fn pipe0brdy(
3678        self,
3679    ) -> crate::common::RegisterField<
3680        0,
3681        0x1,
3682        1,
3683        0,
3684        brdysts::Pipe0Brdy,
3685        brdysts::Pipe0Brdy,
3686        Brdysts_SPEC,
3687        crate::common::RW,
3688    > {
3689        crate::common::RegisterField::<
3690            0,
3691            0x1,
3692            1,
3693            0,
3694            brdysts::Pipe0Brdy,
3695            brdysts::Pipe0Brdy,
3696            Brdysts_SPEC,
3697            crate::common::RW,
3698        >::from_register(self, 0)
3699    }
3700}
3701impl ::core::default::Default for Brdysts {
3702    #[inline(always)]
3703    fn default() -> Brdysts {
3704        <crate::RegValueT<Brdysts_SPEC> as RegisterValue<_>>::new(0)
3705    }
3706}
3707pub mod brdysts {
3708
3709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3710    pub struct Pipe9Brdy_SPEC;
3711    pub type Pipe9Brdy = crate::EnumBitfieldStruct<u8, Pipe9Brdy_SPEC>;
3712    impl Pipe9Brdy {
3713        #[doc = "Interrupts are not generated."]
3714        pub const _0: Self = Self::new(0);
3715
3716        #[doc = "Interrupts are generated."]
3717        pub const _1: Self = Self::new(1);
3718    }
3719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3720    pub struct Pipe8Brdy_SPEC;
3721    pub type Pipe8Brdy = crate::EnumBitfieldStruct<u8, Pipe8Brdy_SPEC>;
3722    impl Pipe8Brdy {
3723        #[doc = "Interrupts are not generated."]
3724        pub const _0: Self = Self::new(0);
3725
3726        #[doc = "Interrupts are generated."]
3727        pub const _1: Self = Self::new(1);
3728    }
3729    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3730    pub struct Pipe7Brdy_SPEC;
3731    pub type Pipe7Brdy = crate::EnumBitfieldStruct<u8, Pipe7Brdy_SPEC>;
3732    impl Pipe7Brdy {
3733        #[doc = "Interrupts are not generated."]
3734        pub const _0: Self = Self::new(0);
3735
3736        #[doc = "Interrupts are generated."]
3737        pub const _1: Self = Self::new(1);
3738    }
3739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3740    pub struct Pipe6Brdy_SPEC;
3741    pub type Pipe6Brdy = crate::EnumBitfieldStruct<u8, Pipe6Brdy_SPEC>;
3742    impl Pipe6Brdy {
3743        #[doc = "Interrupts are not generated."]
3744        pub const _0: Self = Self::new(0);
3745
3746        #[doc = "Interrupts are generated."]
3747        pub const _1: Self = Self::new(1);
3748    }
3749    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3750    pub struct Pipe5Brdy_SPEC;
3751    pub type Pipe5Brdy = crate::EnumBitfieldStruct<u8, Pipe5Brdy_SPEC>;
3752    impl Pipe5Brdy {
3753        #[doc = "Interrupts are not generated."]
3754        pub const _0: Self = Self::new(0);
3755
3756        #[doc = "Interrupts are generated."]
3757        pub const _1: Self = Self::new(1);
3758    }
3759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3760    pub struct Pipe4Brdy_SPEC;
3761    pub type Pipe4Brdy = crate::EnumBitfieldStruct<u8, Pipe4Brdy_SPEC>;
3762    impl Pipe4Brdy {
3763        #[doc = "Interrupts are not generated."]
3764        pub const _0: Self = Self::new(0);
3765
3766        #[doc = "Interrupts are generated."]
3767        pub const _1: Self = Self::new(1);
3768    }
3769    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3770    pub struct Pipe3Brdy_SPEC;
3771    pub type Pipe3Brdy = crate::EnumBitfieldStruct<u8, Pipe3Brdy_SPEC>;
3772    impl Pipe3Brdy {
3773        #[doc = "Interrupts are not generated."]
3774        pub const _0: Self = Self::new(0);
3775
3776        #[doc = "Interrupts are generated."]
3777        pub const _1: Self = Self::new(1);
3778    }
3779    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3780    pub struct Pipe2Brdy_SPEC;
3781    pub type Pipe2Brdy = crate::EnumBitfieldStruct<u8, Pipe2Brdy_SPEC>;
3782    impl Pipe2Brdy {
3783        #[doc = "Interrupts are not generated."]
3784        pub const _0: Self = Self::new(0);
3785
3786        #[doc = "Interrupts are generated."]
3787        pub const _1: Self = Self::new(1);
3788    }
3789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3790    pub struct Pipe1Brdy_SPEC;
3791    pub type Pipe1Brdy = crate::EnumBitfieldStruct<u8, Pipe1Brdy_SPEC>;
3792    impl Pipe1Brdy {
3793        #[doc = "Interrupts are not generated."]
3794        pub const _0: Self = Self::new(0);
3795
3796        #[doc = "Interrupts are generated."]
3797        pub const _1: Self = Self::new(1);
3798    }
3799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3800    pub struct Pipe0Brdy_SPEC;
3801    pub type Pipe0Brdy = crate::EnumBitfieldStruct<u8, Pipe0Brdy_SPEC>;
3802    impl Pipe0Brdy {
3803        #[doc = "Interrupts are not generated."]
3804        pub const _0: Self = Self::new(0);
3805
3806        #[doc = "Interrupts are generated."]
3807        pub const _1: Self = Self::new(1);
3808    }
3809}
3810#[doc(hidden)]
3811#[derive(Copy, Clone, Eq, PartialEq)]
3812pub struct Nrdysts_SPEC;
3813impl crate::sealed::RegSpec for Nrdysts_SPEC {
3814    type DataType = u16;
3815}
3816
3817#[doc = "NRDY Interrupt Status Register"]
3818pub type Nrdysts = crate::RegValueT<Nrdysts_SPEC>;
3819
3820impl Nrdysts {
3821    #[doc = "These bits are read as 000000. The write value should be 000000."]
3822    #[inline(always)]
3823    pub fn reserved(
3824        self,
3825    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Nrdysts_SPEC, crate::common::RW> {
3826        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Nrdysts_SPEC,crate::common::RW>::from_register(self,0)
3827    }
3828
3829    #[doc = "NRDY Interrupt Status for PIPE9"]
3830    #[inline(always)]
3831    pub fn pipe9nrdy(
3832        self,
3833    ) -> crate::common::RegisterField<
3834        9,
3835        0x1,
3836        1,
3837        0,
3838        nrdysts::Pipe9Nrdy,
3839        nrdysts::Pipe9Nrdy,
3840        Nrdysts_SPEC,
3841        crate::common::RW,
3842    > {
3843        crate::common::RegisterField::<
3844            9,
3845            0x1,
3846            1,
3847            0,
3848            nrdysts::Pipe9Nrdy,
3849            nrdysts::Pipe9Nrdy,
3850            Nrdysts_SPEC,
3851            crate::common::RW,
3852        >::from_register(self, 0)
3853    }
3854
3855    #[doc = "NRDY Interrupt Status for PIPE8"]
3856    #[inline(always)]
3857    pub fn pipe8nrdy(
3858        self,
3859    ) -> crate::common::RegisterField<
3860        8,
3861        0x1,
3862        1,
3863        0,
3864        nrdysts::Pipe8Nrdy,
3865        nrdysts::Pipe8Nrdy,
3866        Nrdysts_SPEC,
3867        crate::common::RW,
3868    > {
3869        crate::common::RegisterField::<
3870            8,
3871            0x1,
3872            1,
3873            0,
3874            nrdysts::Pipe8Nrdy,
3875            nrdysts::Pipe8Nrdy,
3876            Nrdysts_SPEC,
3877            crate::common::RW,
3878        >::from_register(self, 0)
3879    }
3880
3881    #[doc = "NRDY Interrupt Status for PIPE7"]
3882    #[inline(always)]
3883    pub fn pipe7nrdy(
3884        self,
3885    ) -> crate::common::RegisterField<
3886        7,
3887        0x1,
3888        1,
3889        0,
3890        nrdysts::Pipe7Nrdy,
3891        nrdysts::Pipe7Nrdy,
3892        Nrdysts_SPEC,
3893        crate::common::RW,
3894    > {
3895        crate::common::RegisterField::<
3896            7,
3897            0x1,
3898            1,
3899            0,
3900            nrdysts::Pipe7Nrdy,
3901            nrdysts::Pipe7Nrdy,
3902            Nrdysts_SPEC,
3903            crate::common::RW,
3904        >::from_register(self, 0)
3905    }
3906
3907    #[doc = "NRDY Interrupt Status for PIPE6"]
3908    #[inline(always)]
3909    pub fn pipe6nrdy(
3910        self,
3911    ) -> crate::common::RegisterField<
3912        6,
3913        0x1,
3914        1,
3915        0,
3916        nrdysts::Pipe6Nrdy,
3917        nrdysts::Pipe6Nrdy,
3918        Nrdysts_SPEC,
3919        crate::common::RW,
3920    > {
3921        crate::common::RegisterField::<
3922            6,
3923            0x1,
3924            1,
3925            0,
3926            nrdysts::Pipe6Nrdy,
3927            nrdysts::Pipe6Nrdy,
3928            Nrdysts_SPEC,
3929            crate::common::RW,
3930        >::from_register(self, 0)
3931    }
3932
3933    #[doc = "NRDY Interrupt Status for PIPE5"]
3934    #[inline(always)]
3935    pub fn pipe5nrdy(
3936        self,
3937    ) -> crate::common::RegisterField<
3938        5,
3939        0x1,
3940        1,
3941        0,
3942        nrdysts::Pipe5Nrdy,
3943        nrdysts::Pipe5Nrdy,
3944        Nrdysts_SPEC,
3945        crate::common::RW,
3946    > {
3947        crate::common::RegisterField::<
3948            5,
3949            0x1,
3950            1,
3951            0,
3952            nrdysts::Pipe5Nrdy,
3953            nrdysts::Pipe5Nrdy,
3954            Nrdysts_SPEC,
3955            crate::common::RW,
3956        >::from_register(self, 0)
3957    }
3958
3959    #[doc = "NRDY Interrupt Status for PIPE4"]
3960    #[inline(always)]
3961    pub fn pipe4nrdy(
3962        self,
3963    ) -> crate::common::RegisterField<
3964        4,
3965        0x1,
3966        1,
3967        0,
3968        nrdysts::Pipe4Nrdy,
3969        nrdysts::Pipe4Nrdy,
3970        Nrdysts_SPEC,
3971        crate::common::RW,
3972    > {
3973        crate::common::RegisterField::<
3974            4,
3975            0x1,
3976            1,
3977            0,
3978            nrdysts::Pipe4Nrdy,
3979            nrdysts::Pipe4Nrdy,
3980            Nrdysts_SPEC,
3981            crate::common::RW,
3982        >::from_register(self, 0)
3983    }
3984
3985    #[doc = "NRDY Interrupt Status for PIPE3"]
3986    #[inline(always)]
3987    pub fn pipe3nrdy(
3988        self,
3989    ) -> crate::common::RegisterField<
3990        3,
3991        0x1,
3992        1,
3993        0,
3994        nrdysts::Pipe3Nrdy,
3995        nrdysts::Pipe3Nrdy,
3996        Nrdysts_SPEC,
3997        crate::common::RW,
3998    > {
3999        crate::common::RegisterField::<
4000            3,
4001            0x1,
4002            1,
4003            0,
4004            nrdysts::Pipe3Nrdy,
4005            nrdysts::Pipe3Nrdy,
4006            Nrdysts_SPEC,
4007            crate::common::RW,
4008        >::from_register(self, 0)
4009    }
4010
4011    #[doc = "NRDY Interrupt Status for PIPE2"]
4012    #[inline(always)]
4013    pub fn pipe2nrdy(
4014        self,
4015    ) -> crate::common::RegisterField<
4016        2,
4017        0x1,
4018        1,
4019        0,
4020        nrdysts::Pipe2Nrdy,
4021        nrdysts::Pipe2Nrdy,
4022        Nrdysts_SPEC,
4023        crate::common::RW,
4024    > {
4025        crate::common::RegisterField::<
4026            2,
4027            0x1,
4028            1,
4029            0,
4030            nrdysts::Pipe2Nrdy,
4031            nrdysts::Pipe2Nrdy,
4032            Nrdysts_SPEC,
4033            crate::common::RW,
4034        >::from_register(self, 0)
4035    }
4036
4037    #[doc = "NRDY Interrupt Status for PIPE1"]
4038    #[inline(always)]
4039    pub fn pipe1nrdy(
4040        self,
4041    ) -> crate::common::RegisterField<
4042        1,
4043        0x1,
4044        1,
4045        0,
4046        nrdysts::Pipe1Nrdy,
4047        nrdysts::Pipe1Nrdy,
4048        Nrdysts_SPEC,
4049        crate::common::RW,
4050    > {
4051        crate::common::RegisterField::<
4052            1,
4053            0x1,
4054            1,
4055            0,
4056            nrdysts::Pipe1Nrdy,
4057            nrdysts::Pipe1Nrdy,
4058            Nrdysts_SPEC,
4059            crate::common::RW,
4060        >::from_register(self, 0)
4061    }
4062
4063    #[doc = "NRDY Interrupt Status for PIPE0"]
4064    #[inline(always)]
4065    pub fn pipe0nrdy(
4066        self,
4067    ) -> crate::common::RegisterField<
4068        0,
4069        0x1,
4070        1,
4071        0,
4072        nrdysts::Pipe0Nrdy,
4073        nrdysts::Pipe0Nrdy,
4074        Nrdysts_SPEC,
4075        crate::common::RW,
4076    > {
4077        crate::common::RegisterField::<
4078            0,
4079            0x1,
4080            1,
4081            0,
4082            nrdysts::Pipe0Nrdy,
4083            nrdysts::Pipe0Nrdy,
4084            Nrdysts_SPEC,
4085            crate::common::RW,
4086        >::from_register(self, 0)
4087    }
4088}
4089impl ::core::default::Default for Nrdysts {
4090    #[inline(always)]
4091    fn default() -> Nrdysts {
4092        <crate::RegValueT<Nrdysts_SPEC> as RegisterValue<_>>::new(0)
4093    }
4094}
4095pub mod nrdysts {
4096
4097    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4098    pub struct Pipe9Nrdy_SPEC;
4099    pub type Pipe9Nrdy = crate::EnumBitfieldStruct<u8, Pipe9Nrdy_SPEC>;
4100    impl Pipe9Nrdy {
4101        #[doc = "Interrupts are not generated."]
4102        pub const _0: Self = Self::new(0);
4103
4104        #[doc = "Interrupts are generated."]
4105        pub const _1: Self = Self::new(1);
4106    }
4107    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4108    pub struct Pipe8Nrdy_SPEC;
4109    pub type Pipe8Nrdy = crate::EnumBitfieldStruct<u8, Pipe8Nrdy_SPEC>;
4110    impl Pipe8Nrdy {
4111        #[doc = "Interrupts are not generated."]
4112        pub const _0: Self = Self::new(0);
4113
4114        #[doc = "Interrupts are generated."]
4115        pub const _1: Self = Self::new(1);
4116    }
4117    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4118    pub struct Pipe7Nrdy_SPEC;
4119    pub type Pipe7Nrdy = crate::EnumBitfieldStruct<u8, Pipe7Nrdy_SPEC>;
4120    impl Pipe7Nrdy {
4121        #[doc = "Interrupts are not generated."]
4122        pub const _0: Self = Self::new(0);
4123
4124        #[doc = "Interrupts are generated."]
4125        pub const _1: Self = Self::new(1);
4126    }
4127    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4128    pub struct Pipe6Nrdy_SPEC;
4129    pub type Pipe6Nrdy = crate::EnumBitfieldStruct<u8, Pipe6Nrdy_SPEC>;
4130    impl Pipe6Nrdy {
4131        #[doc = "Interrupts are not generated."]
4132        pub const _0: Self = Self::new(0);
4133
4134        #[doc = "Interrupts are generated."]
4135        pub const _1: Self = Self::new(1);
4136    }
4137    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4138    pub struct Pipe5Nrdy_SPEC;
4139    pub type Pipe5Nrdy = crate::EnumBitfieldStruct<u8, Pipe5Nrdy_SPEC>;
4140    impl Pipe5Nrdy {
4141        #[doc = "Interrupts are not generated."]
4142        pub const _0: Self = Self::new(0);
4143
4144        #[doc = "Interrupts are generated."]
4145        pub const _1: Self = Self::new(1);
4146    }
4147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4148    pub struct Pipe4Nrdy_SPEC;
4149    pub type Pipe4Nrdy = crate::EnumBitfieldStruct<u8, Pipe4Nrdy_SPEC>;
4150    impl Pipe4Nrdy {
4151        #[doc = "Interrupts are not generated."]
4152        pub const _0: Self = Self::new(0);
4153
4154        #[doc = "Interrupts are generated."]
4155        pub const _1: Self = Self::new(1);
4156    }
4157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4158    pub struct Pipe3Nrdy_SPEC;
4159    pub type Pipe3Nrdy = crate::EnumBitfieldStruct<u8, Pipe3Nrdy_SPEC>;
4160    impl Pipe3Nrdy {
4161        #[doc = "Interrupts are not generated."]
4162        pub const _0: Self = Self::new(0);
4163
4164        #[doc = "Interrupts are generated."]
4165        pub const _1: Self = Self::new(1);
4166    }
4167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4168    pub struct Pipe2Nrdy_SPEC;
4169    pub type Pipe2Nrdy = crate::EnumBitfieldStruct<u8, Pipe2Nrdy_SPEC>;
4170    impl Pipe2Nrdy {
4171        #[doc = "Interrupts are not generated."]
4172        pub const _0: Self = Self::new(0);
4173
4174        #[doc = "Interrupts are generated."]
4175        pub const _1: Self = Self::new(1);
4176    }
4177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4178    pub struct Pipe1Nrdy_SPEC;
4179    pub type Pipe1Nrdy = crate::EnumBitfieldStruct<u8, Pipe1Nrdy_SPEC>;
4180    impl Pipe1Nrdy {
4181        #[doc = "Interrupts are not generated."]
4182        pub const _0: Self = Self::new(0);
4183
4184        #[doc = "Interrupts are generated."]
4185        pub const _1: Self = Self::new(1);
4186    }
4187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4188    pub struct Pipe0Nrdy_SPEC;
4189    pub type Pipe0Nrdy = crate::EnumBitfieldStruct<u8, Pipe0Nrdy_SPEC>;
4190    impl Pipe0Nrdy {
4191        #[doc = "Interrupts are not generated."]
4192        pub const _0: Self = Self::new(0);
4193
4194        #[doc = "Interrupts are generated."]
4195        pub const _1: Self = Self::new(1);
4196    }
4197}
4198#[doc(hidden)]
4199#[derive(Copy, Clone, Eq, PartialEq)]
4200pub struct Bempsts_SPEC;
4201impl crate::sealed::RegSpec for Bempsts_SPEC {
4202    type DataType = u16;
4203}
4204
4205#[doc = "BEMP Interrupt Status Register"]
4206pub type Bempsts = crate::RegValueT<Bempsts_SPEC>;
4207
4208impl Bempsts {
4209    #[doc = "These bits are read as 000000. The write value should be 000000."]
4210    #[inline(always)]
4211    pub fn reserved(
4212        self,
4213    ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Bempsts_SPEC, crate::common::RW> {
4214        crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Bempsts_SPEC,crate::common::RW>::from_register(self,0)
4215    }
4216
4217    #[doc = "BEMP Interrupt Status for PIPE9"]
4218    #[inline(always)]
4219    pub fn pipe9bemp(
4220        self,
4221    ) -> crate::common::RegisterField<
4222        9,
4223        0x1,
4224        1,
4225        0,
4226        bempsts::Pipe9Bemp,
4227        bempsts::Pipe9Bemp,
4228        Bempsts_SPEC,
4229        crate::common::RW,
4230    > {
4231        crate::common::RegisterField::<
4232            9,
4233            0x1,
4234            1,
4235            0,
4236            bempsts::Pipe9Bemp,
4237            bempsts::Pipe9Bemp,
4238            Bempsts_SPEC,
4239            crate::common::RW,
4240        >::from_register(self, 0)
4241    }
4242
4243    #[doc = "BEMP Interrupt Status for PIPE8"]
4244    #[inline(always)]
4245    pub fn pipe8bemp(
4246        self,
4247    ) -> crate::common::RegisterField<
4248        8,
4249        0x1,
4250        1,
4251        0,
4252        bempsts::Pipe8Bemp,
4253        bempsts::Pipe8Bemp,
4254        Bempsts_SPEC,
4255        crate::common::RW,
4256    > {
4257        crate::common::RegisterField::<
4258            8,
4259            0x1,
4260            1,
4261            0,
4262            bempsts::Pipe8Bemp,
4263            bempsts::Pipe8Bemp,
4264            Bempsts_SPEC,
4265            crate::common::RW,
4266        >::from_register(self, 0)
4267    }
4268
4269    #[doc = "BEMP Interrupt Status for PIPE7"]
4270    #[inline(always)]
4271    pub fn pipe7bemp(
4272        self,
4273    ) -> crate::common::RegisterField<
4274        7,
4275        0x1,
4276        1,
4277        0,
4278        bempsts::Pipe7Bemp,
4279        bempsts::Pipe7Bemp,
4280        Bempsts_SPEC,
4281        crate::common::RW,
4282    > {
4283        crate::common::RegisterField::<
4284            7,
4285            0x1,
4286            1,
4287            0,
4288            bempsts::Pipe7Bemp,
4289            bempsts::Pipe7Bemp,
4290            Bempsts_SPEC,
4291            crate::common::RW,
4292        >::from_register(self, 0)
4293    }
4294
4295    #[doc = "BEMP Interrupt Status for PIPE6"]
4296    #[inline(always)]
4297    pub fn pipe6bemp(
4298        self,
4299    ) -> crate::common::RegisterField<
4300        6,
4301        0x1,
4302        1,
4303        0,
4304        bempsts::Pipe6Bemp,
4305        bempsts::Pipe6Bemp,
4306        Bempsts_SPEC,
4307        crate::common::RW,
4308    > {
4309        crate::common::RegisterField::<
4310            6,
4311            0x1,
4312            1,
4313            0,
4314            bempsts::Pipe6Bemp,
4315            bempsts::Pipe6Bemp,
4316            Bempsts_SPEC,
4317            crate::common::RW,
4318        >::from_register(self, 0)
4319    }
4320
4321    #[doc = "BEMP Interrupt Status for PIPE5"]
4322    #[inline(always)]
4323    pub fn pipe5bemp(
4324        self,
4325    ) -> crate::common::RegisterField<
4326        5,
4327        0x1,
4328        1,
4329        0,
4330        bempsts::Pipe5Bemp,
4331        bempsts::Pipe5Bemp,
4332        Bempsts_SPEC,
4333        crate::common::RW,
4334    > {
4335        crate::common::RegisterField::<
4336            5,
4337            0x1,
4338            1,
4339            0,
4340            bempsts::Pipe5Bemp,
4341            bempsts::Pipe5Bemp,
4342            Bempsts_SPEC,
4343            crate::common::RW,
4344        >::from_register(self, 0)
4345    }
4346
4347    #[doc = "BEMP Interrupt Status for PIPE4"]
4348    #[inline(always)]
4349    pub fn pipe4bemp(
4350        self,
4351    ) -> crate::common::RegisterField<
4352        4,
4353        0x1,
4354        1,
4355        0,
4356        bempsts::Pipe4Bemp,
4357        bempsts::Pipe4Bemp,
4358        Bempsts_SPEC,
4359        crate::common::RW,
4360    > {
4361        crate::common::RegisterField::<
4362            4,
4363            0x1,
4364            1,
4365            0,
4366            bempsts::Pipe4Bemp,
4367            bempsts::Pipe4Bemp,
4368            Bempsts_SPEC,
4369            crate::common::RW,
4370        >::from_register(self, 0)
4371    }
4372
4373    #[doc = "BEMP Interrupt Status for PIPE3"]
4374    #[inline(always)]
4375    pub fn pipe3bemp(
4376        self,
4377    ) -> crate::common::RegisterField<
4378        3,
4379        0x1,
4380        1,
4381        0,
4382        bempsts::Pipe3Bemp,
4383        bempsts::Pipe3Bemp,
4384        Bempsts_SPEC,
4385        crate::common::RW,
4386    > {
4387        crate::common::RegisterField::<
4388            3,
4389            0x1,
4390            1,
4391            0,
4392            bempsts::Pipe3Bemp,
4393            bempsts::Pipe3Bemp,
4394            Bempsts_SPEC,
4395            crate::common::RW,
4396        >::from_register(self, 0)
4397    }
4398
4399    #[doc = "BEMP Interrupt Status for PIPE2"]
4400    #[inline(always)]
4401    pub fn pipe2bemp(
4402        self,
4403    ) -> crate::common::RegisterField<
4404        2,
4405        0x1,
4406        1,
4407        0,
4408        bempsts::Pipe2Bemp,
4409        bempsts::Pipe2Bemp,
4410        Bempsts_SPEC,
4411        crate::common::RW,
4412    > {
4413        crate::common::RegisterField::<
4414            2,
4415            0x1,
4416            1,
4417            0,
4418            bempsts::Pipe2Bemp,
4419            bempsts::Pipe2Bemp,
4420            Bempsts_SPEC,
4421            crate::common::RW,
4422        >::from_register(self, 0)
4423    }
4424
4425    #[doc = "BEMP Interrupt Status for PIPE1"]
4426    #[inline(always)]
4427    pub fn pipe1bemp(
4428        self,
4429    ) -> crate::common::RegisterField<
4430        1,
4431        0x1,
4432        1,
4433        0,
4434        bempsts::Pipe1Bemp,
4435        bempsts::Pipe1Bemp,
4436        Bempsts_SPEC,
4437        crate::common::RW,
4438    > {
4439        crate::common::RegisterField::<
4440            1,
4441            0x1,
4442            1,
4443            0,
4444            bempsts::Pipe1Bemp,
4445            bempsts::Pipe1Bemp,
4446            Bempsts_SPEC,
4447            crate::common::RW,
4448        >::from_register(self, 0)
4449    }
4450
4451    #[doc = "BEMP Interrupt Status for PIPE0"]
4452    #[inline(always)]
4453    pub fn pipe0bemp(
4454        self,
4455    ) -> crate::common::RegisterField<
4456        0,
4457        0x1,
4458        1,
4459        0,
4460        bempsts::Pipe0Bemp,
4461        bempsts::Pipe0Bemp,
4462        Bempsts_SPEC,
4463        crate::common::RW,
4464    > {
4465        crate::common::RegisterField::<
4466            0,
4467            0x1,
4468            1,
4469            0,
4470            bempsts::Pipe0Bemp,
4471            bempsts::Pipe0Bemp,
4472            Bempsts_SPEC,
4473            crate::common::RW,
4474        >::from_register(self, 0)
4475    }
4476}
4477impl ::core::default::Default for Bempsts {
4478    #[inline(always)]
4479    fn default() -> Bempsts {
4480        <crate::RegValueT<Bempsts_SPEC> as RegisterValue<_>>::new(0)
4481    }
4482}
4483pub mod bempsts {
4484
4485    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4486    pub struct Pipe9Bemp_SPEC;
4487    pub type Pipe9Bemp = crate::EnumBitfieldStruct<u8, Pipe9Bemp_SPEC>;
4488    impl Pipe9Bemp {
4489        #[doc = "Interrupts are not generated."]
4490        pub const _0: Self = Self::new(0);
4491
4492        #[doc = "Interrupts are generated."]
4493        pub const _1: Self = Self::new(1);
4494    }
4495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4496    pub struct Pipe8Bemp_SPEC;
4497    pub type Pipe8Bemp = crate::EnumBitfieldStruct<u8, Pipe8Bemp_SPEC>;
4498    impl Pipe8Bemp {
4499        #[doc = "Interrupts are not generated."]
4500        pub const _0: Self = Self::new(0);
4501
4502        #[doc = "Interrupts are generated."]
4503        pub const _1: Self = Self::new(1);
4504    }
4505    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4506    pub struct Pipe7Bemp_SPEC;
4507    pub type Pipe7Bemp = crate::EnumBitfieldStruct<u8, Pipe7Bemp_SPEC>;
4508    impl Pipe7Bemp {
4509        #[doc = "Interrupts are not generated."]
4510        pub const _0: Self = Self::new(0);
4511
4512        #[doc = "Interrupts are generated."]
4513        pub const _1: Self = Self::new(1);
4514    }
4515    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4516    pub struct Pipe6Bemp_SPEC;
4517    pub type Pipe6Bemp = crate::EnumBitfieldStruct<u8, Pipe6Bemp_SPEC>;
4518    impl Pipe6Bemp {
4519        #[doc = "Interrupts are not generated."]
4520        pub const _0: Self = Self::new(0);
4521
4522        #[doc = "Interrupts are generated."]
4523        pub const _1: Self = Self::new(1);
4524    }
4525    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4526    pub struct Pipe5Bemp_SPEC;
4527    pub type Pipe5Bemp = crate::EnumBitfieldStruct<u8, Pipe5Bemp_SPEC>;
4528    impl Pipe5Bemp {
4529        #[doc = "Interrupts are not generated."]
4530        pub const _0: Self = Self::new(0);
4531
4532        #[doc = "Interrupts are generated."]
4533        pub const _1: Self = Self::new(1);
4534    }
4535    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4536    pub struct Pipe4Bemp_SPEC;
4537    pub type Pipe4Bemp = crate::EnumBitfieldStruct<u8, Pipe4Bemp_SPEC>;
4538    impl Pipe4Bemp {
4539        #[doc = "Interrupts are not generated."]
4540        pub const _0: Self = Self::new(0);
4541
4542        #[doc = "Interrupts are generated."]
4543        pub const _1: Self = Self::new(1);
4544    }
4545    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4546    pub struct Pipe3Bemp_SPEC;
4547    pub type Pipe3Bemp = crate::EnumBitfieldStruct<u8, Pipe3Bemp_SPEC>;
4548    impl Pipe3Bemp {
4549        #[doc = "Interrupts are not generated."]
4550        pub const _0: Self = Self::new(0);
4551
4552        #[doc = "Interrupts are generated."]
4553        pub const _1: Self = Self::new(1);
4554    }
4555    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4556    pub struct Pipe2Bemp_SPEC;
4557    pub type Pipe2Bemp = crate::EnumBitfieldStruct<u8, Pipe2Bemp_SPEC>;
4558    impl Pipe2Bemp {
4559        #[doc = "Interrupts are not generated."]
4560        pub const _0: Self = Self::new(0);
4561
4562        #[doc = "Interrupts are generated."]
4563        pub const _1: Self = Self::new(1);
4564    }
4565    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4566    pub struct Pipe1Bemp_SPEC;
4567    pub type Pipe1Bemp = crate::EnumBitfieldStruct<u8, Pipe1Bemp_SPEC>;
4568    impl Pipe1Bemp {
4569        #[doc = "Interrupts are not generated."]
4570        pub const _0: Self = Self::new(0);
4571
4572        #[doc = "Interrupts are generated."]
4573        pub const _1: Self = Self::new(1);
4574    }
4575    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4576    pub struct Pipe0Bemp_SPEC;
4577    pub type Pipe0Bemp = crate::EnumBitfieldStruct<u8, Pipe0Bemp_SPEC>;
4578    impl Pipe0Bemp {
4579        #[doc = "Interrupts are not generated."]
4580        pub const _0: Self = Self::new(0);
4581
4582        #[doc = "Interrupts are generated."]
4583        pub const _1: Self = Self::new(1);
4584    }
4585}
4586#[doc(hidden)]
4587#[derive(Copy, Clone, Eq, PartialEq)]
4588pub struct Frmnum_SPEC;
4589impl crate::sealed::RegSpec for Frmnum_SPEC {
4590    type DataType = u16;
4591}
4592
4593#[doc = "Frame Number Register"]
4594pub type Frmnum = crate::RegValueT<Frmnum_SPEC>;
4595
4596impl Frmnum {
4597    #[doc = "Overrun/Underrun Detection Status"]
4598    #[inline(always)]
4599    pub fn ovrn(
4600        self,
4601    ) -> crate::common::RegisterField<
4602        15,
4603        0x1,
4604        1,
4605        0,
4606        frmnum::Ovrn,
4607        frmnum::Ovrn,
4608        Frmnum_SPEC,
4609        crate::common::RW,
4610    > {
4611        crate::common::RegisterField::<
4612            15,
4613            0x1,
4614            1,
4615            0,
4616            frmnum::Ovrn,
4617            frmnum::Ovrn,
4618            Frmnum_SPEC,
4619            crate::common::RW,
4620        >::from_register(self, 0)
4621    }
4622
4623    #[doc = "Receive Data Error"]
4624    #[inline(always)]
4625    pub fn crce(
4626        self,
4627    ) -> crate::common::RegisterField<
4628        14,
4629        0x1,
4630        1,
4631        0,
4632        frmnum::Crce,
4633        frmnum::Crce,
4634        Frmnum_SPEC,
4635        crate::common::RW,
4636    > {
4637        crate::common::RegisterField::<
4638            14,
4639            0x1,
4640            1,
4641            0,
4642            frmnum::Crce,
4643            frmnum::Crce,
4644            Frmnum_SPEC,
4645            crate::common::RW,
4646        >::from_register(self, 0)
4647    }
4648
4649    #[doc = "These bits are read as 000. The write value should be 000."]
4650    #[inline(always)]
4651    pub fn reserved(
4652        self,
4653    ) -> crate::common::RegisterField<11, 0x7, 1, 0, u8, u8, Frmnum_SPEC, crate::common::RW> {
4654        crate::common::RegisterField::<11,0x7,1,0,u8,u8,Frmnum_SPEC,crate::common::RW>::from_register(self,0)
4655    }
4656
4657    #[doc = "Frame NumberLatest frame number"]
4658    #[inline(always)]
4659    pub fn frnm(
4660        self,
4661    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Frmnum_SPEC, crate::common::R> {
4662        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Frmnum_SPEC,crate::common::R>::from_register(self,0)
4663    }
4664}
4665impl ::core::default::Default for Frmnum {
4666    #[inline(always)]
4667    fn default() -> Frmnum {
4668        <crate::RegValueT<Frmnum_SPEC> as RegisterValue<_>>::new(0)
4669    }
4670}
4671pub mod frmnum {
4672
4673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4674    pub struct Ovrn_SPEC;
4675    pub type Ovrn = crate::EnumBitfieldStruct<u8, Ovrn_SPEC>;
4676    impl Ovrn {
4677        #[doc = "No error"]
4678        pub const _0: Self = Self::new(0);
4679
4680        #[doc = "An error occurred"]
4681        pub const _1: Self = Self::new(1);
4682    }
4683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4684    pub struct Crce_SPEC;
4685    pub type Crce = crate::EnumBitfieldStruct<u8, Crce_SPEC>;
4686    impl Crce {
4687        #[doc = "No error"]
4688        pub const _0: Self = Self::new(0);
4689
4690        #[doc = "An error occurred"]
4691        pub const _1: Self = Self::new(1);
4692    }
4693}
4694#[doc(hidden)]
4695#[derive(Copy, Clone, Eq, PartialEq)]
4696pub struct Usbreq_SPEC;
4697impl crate::sealed::RegSpec for Usbreq_SPEC {
4698    type DataType = u16;
4699}
4700
4701#[doc = "USB Request Type Register"]
4702pub type Usbreq = crate::RegValueT<Usbreq_SPEC>;
4703
4704impl Usbreq {
4705    #[doc = "RequestThese bits store the USB request bRequest value."]
4706    #[inline(always)]
4707    pub fn brequest(
4708        self,
4709    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Usbreq_SPEC, crate::common::R> {
4710        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Usbreq_SPEC,crate::common::R>::from_register(self,0)
4711    }
4712
4713    #[doc = "Request TypeThese bits store the USB request bmRequestType value."]
4714    #[inline(always)]
4715    pub fn bmrequesttype(
4716        self,
4717    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Usbreq_SPEC, crate::common::R> {
4718        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Usbreq_SPEC,crate::common::R>::from_register(self,0)
4719    }
4720}
4721impl ::core::default::Default for Usbreq {
4722    #[inline(always)]
4723    fn default() -> Usbreq {
4724        <crate::RegValueT<Usbreq_SPEC> as RegisterValue<_>>::new(0)
4725    }
4726}
4727
4728#[doc(hidden)]
4729#[derive(Copy, Clone, Eq, PartialEq)]
4730pub struct Usbval_SPEC;
4731impl crate::sealed::RegSpec for Usbval_SPEC {
4732    type DataType = u16;
4733}
4734
4735#[doc = "USB Request Value Register"]
4736pub type Usbval = crate::RegValueT<Usbval_SPEC>;
4737
4738impl Usbval {
4739    #[doc = "ValueThese bits store the USB request wValue value."]
4740    #[inline(always)]
4741    pub fn wvalue(
4742        self,
4743    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbval_SPEC, crate::common::R>
4744    {
4745        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbval_SPEC,crate::common::R>::from_register(self,0)
4746    }
4747}
4748impl ::core::default::Default for Usbval {
4749    #[inline(always)]
4750    fn default() -> Usbval {
4751        <crate::RegValueT<Usbval_SPEC> as RegisterValue<_>>::new(0)
4752    }
4753}
4754
4755#[doc(hidden)]
4756#[derive(Copy, Clone, Eq, PartialEq)]
4757pub struct Usbindx_SPEC;
4758impl crate::sealed::RegSpec for Usbindx_SPEC {
4759    type DataType = u16;
4760}
4761
4762#[doc = "USB Request Index Register"]
4763pub type Usbindx = crate::RegValueT<Usbindx_SPEC>;
4764
4765impl Usbindx {
4766    #[doc = "IndexThese bits store the USB request wIndex value."]
4767    #[inline(always)]
4768    pub fn windex(
4769        self,
4770    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbindx_SPEC, crate::common::R>
4771    {
4772        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbindx_SPEC,crate::common::R>::from_register(self,0)
4773    }
4774}
4775impl ::core::default::Default for Usbindx {
4776    #[inline(always)]
4777    fn default() -> Usbindx {
4778        <crate::RegValueT<Usbindx_SPEC> as RegisterValue<_>>::new(0)
4779    }
4780}
4781
4782#[doc(hidden)]
4783#[derive(Copy, Clone, Eq, PartialEq)]
4784pub struct Usbleng_SPEC;
4785impl crate::sealed::RegSpec for Usbleng_SPEC {
4786    type DataType = u16;
4787}
4788
4789#[doc = "USB Request Length Register"]
4790pub type Usbleng = crate::RegValueT<Usbleng_SPEC>;
4791
4792impl Usbleng {
4793    #[doc = "LengthThese bits store the USB request wLength value."]
4794    #[inline(always)]
4795    pub fn wlengtuh(
4796        self,
4797    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbleng_SPEC, crate::common::R>
4798    {
4799        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbleng_SPEC,crate::common::R>::from_register(self,0)
4800    }
4801}
4802impl ::core::default::Default for Usbleng {
4803    #[inline(always)]
4804    fn default() -> Usbleng {
4805        <crate::RegValueT<Usbleng_SPEC> as RegisterValue<_>>::new(0)
4806    }
4807}
4808
4809#[doc(hidden)]
4810#[derive(Copy, Clone, Eq, PartialEq)]
4811pub struct Dcpcfg_SPEC;
4812impl crate::sealed::RegSpec for Dcpcfg_SPEC {
4813    type DataType = u16;
4814}
4815
4816#[doc = "DCP Configuration Register"]
4817pub type Dcpcfg = crate::RegValueT<Dcpcfg_SPEC>;
4818
4819impl Dcpcfg {
4820    #[doc = "Pipe Disabled at End of Transfer"]
4821    #[inline(always)]
4822    pub fn shtnak(
4823        self,
4824    ) -> crate::common::RegisterField<
4825        7,
4826        0x1,
4827        1,
4828        0,
4829        dcpcfg::Shtnak,
4830        dcpcfg::Shtnak,
4831        Dcpcfg_SPEC,
4832        crate::common::RW,
4833    > {
4834        crate::common::RegisterField::<
4835            7,
4836            0x1,
4837            1,
4838            0,
4839            dcpcfg::Shtnak,
4840            dcpcfg::Shtnak,
4841            Dcpcfg_SPEC,
4842            crate::common::RW,
4843        >::from_register(self, 0)
4844    }
4845
4846    #[doc = "Transfer Direction"]
4847    #[inline(always)]
4848    pub fn dir(
4849        self,
4850    ) -> crate::common::RegisterField<
4851        4,
4852        0x1,
4853        1,
4854        0,
4855        dcpcfg::Dir,
4856        dcpcfg::Dir,
4857        Dcpcfg_SPEC,
4858        crate::common::RW,
4859    > {
4860        crate::common::RegisterField::<
4861            4,
4862            0x1,
4863            1,
4864            0,
4865            dcpcfg::Dir,
4866            dcpcfg::Dir,
4867            Dcpcfg_SPEC,
4868            crate::common::RW,
4869        >::from_register(self, 0)
4870    }
4871
4872    #[doc = "These bits are read as 0000. The write value should be 0000."]
4873    #[inline(always)]
4874    pub fn reserved(
4875        self,
4876    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Dcpcfg_SPEC, crate::common::RW> {
4877        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Dcpcfg_SPEC,crate::common::RW>::from_register(self,0)
4878    }
4879}
4880impl ::core::default::Default for Dcpcfg {
4881    #[inline(always)]
4882    fn default() -> Dcpcfg {
4883        <crate::RegValueT<Dcpcfg_SPEC> as RegisterValue<_>>::new(0)
4884    }
4885}
4886pub mod dcpcfg {
4887
4888    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4889    pub struct Shtnak_SPEC;
4890    pub type Shtnak = crate::EnumBitfieldStruct<u8, Shtnak_SPEC>;
4891    impl Shtnak {
4892        #[doc = "Pipe continued at the end of transfer"]
4893        pub const _0: Self = Self::new(0);
4894
4895        #[doc = "Pipe disabled at the end of transfer"]
4896        pub const _1: Self = Self::new(1);
4897    }
4898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4899    pub struct Dir_SPEC;
4900    pub type Dir = crate::EnumBitfieldStruct<u8, Dir_SPEC>;
4901    impl Dir {
4902        #[doc = "Data receiving direction"]
4903        pub const _0: Self = Self::new(0);
4904
4905        #[doc = "Data transmitting direction"]
4906        pub const _1: Self = Self::new(1);
4907    }
4908}
4909#[doc(hidden)]
4910#[derive(Copy, Clone, Eq, PartialEq)]
4911pub struct Dcpmaxp_SPEC;
4912impl crate::sealed::RegSpec for Dcpmaxp_SPEC {
4913    type DataType = u16;
4914}
4915
4916#[doc = "DCP Maximum Packet Size Register"]
4917pub type Dcpmaxp = crate::RegValueT<Dcpmaxp_SPEC>;
4918
4919impl Dcpmaxp {
4920    #[doc = "Device Select"]
4921    #[inline(always)]
4922    pub fn devsel(
4923        self,
4924    ) -> crate::common::RegisterField<
4925        12,
4926        0xf,
4927        1,
4928        0,
4929        dcpmaxp::Devsel,
4930        dcpmaxp::Devsel,
4931        Dcpmaxp_SPEC,
4932        crate::common::RW,
4933    > {
4934        crate::common::RegisterField::<
4935            12,
4936            0xf,
4937            1,
4938            0,
4939            dcpmaxp::Devsel,
4940            dcpmaxp::Devsel,
4941            Dcpmaxp_SPEC,
4942            crate::common::RW,
4943        >::from_register(self, 0)
4944    }
4945
4946    #[doc = "These bits are read as 00000. The write value should be 00000."]
4947    #[inline(always)]
4948    pub fn reserved(
4949        self,
4950    ) -> crate::common::RegisterField<7, 0x1f, 1, 0, u8, u8, Dcpmaxp_SPEC, crate::common::RW> {
4951        crate::common::RegisterField::<7,0x1f,1,0,u8,u8,Dcpmaxp_SPEC,crate::common::RW>::from_register(self,0)
4952    }
4953
4954    #[doc = "Maximum Packet SizeThese bits set the maximum amount of data (maximum packet size) in payloads for the DCP."]
4955    #[inline(always)]
4956    pub fn mxps(
4957        self,
4958    ) -> crate::common::RegisterField<
4959        0,
4960        0x7f,
4961        1,
4962        0,
4963        dcpmaxp::Mxps,
4964        dcpmaxp::Mxps,
4965        Dcpmaxp_SPEC,
4966        crate::common::RW,
4967    > {
4968        crate::common::RegisterField::<
4969            0,
4970            0x7f,
4971            1,
4972            0,
4973            dcpmaxp::Mxps,
4974            dcpmaxp::Mxps,
4975            Dcpmaxp_SPEC,
4976            crate::common::RW,
4977        >::from_register(self, 0)
4978    }
4979}
4980impl ::core::default::Default for Dcpmaxp {
4981    #[inline(always)]
4982    fn default() -> Dcpmaxp {
4983        <crate::RegValueT<Dcpmaxp_SPEC> as RegisterValue<_>>::new(64)
4984    }
4985}
4986pub mod dcpmaxp {
4987
4988    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4989    pub struct Devsel_SPEC;
4990    pub type Devsel = crate::EnumBitfieldStruct<u8, Devsel_SPEC>;
4991    impl Devsel {
4992        #[doc = "Address 0000"]
4993        pub const _0000: Self = Self::new(0);
4994
4995        #[doc = "Address 0001"]
4996        pub const _0001: Self = Self::new(1);
4997
4998        #[doc = "Address 0010"]
4999        pub const _0010: Self = Self::new(2);
5000
5001        #[doc = "Address 0011"]
5002        pub const _0011: Self = Self::new(3);
5003
5004        #[doc = "Address 0100"]
5005        pub const _0100: Self = Self::new(4);
5006
5007        #[doc = "Address 0101"]
5008        pub const _0101: Self = Self::new(5);
5009    }
5010    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5011    pub struct Mxps_SPEC;
5012    pub type Mxps = crate::EnumBitfieldStruct<u8, Mxps_SPEC>;
5013    impl Mxps {
5014        #[doc = "8bytes"]
5015        pub const _0001000: Self = Self::new(8);
5016
5017        #[doc = "16bytes"]
5018        pub const _0010000: Self = Self::new(16);
5019
5020        #[doc = "24bytes"]
5021        pub const _0011000: Self = Self::new(24);
5022
5023        #[doc = "32bytes"]
5024        pub const _0100000: Self = Self::new(32);
5025
5026        #[doc = "40bytes"]
5027        pub const _0101000: Self = Self::new(40);
5028
5029        #[doc = "48bytes"]
5030        pub const _0110000: Self = Self::new(48);
5031
5032        #[doc = "56bytes"]
5033        pub const _0111000: Self = Self::new(56);
5034
5035        #[doc = "64bytes"]
5036        pub const _1000000: Self = Self::new(64);
5037
5038        #[doc = "72bytes"]
5039        pub const _1001000: Self = Self::new(72);
5040
5041        #[doc = "80bytes"]
5042        pub const _1010000: Self = Self::new(80);
5043
5044        #[doc = "88bytes"]
5045        pub const _1011000: Self = Self::new(88);
5046
5047        #[doc = "96bytes"]
5048        pub const _1100000: Self = Self::new(96);
5049
5050        #[doc = "104bytes"]
5051        pub const _1101000: Self = Self::new(104);
5052
5053        #[doc = "112bytes"]
5054        pub const _1110000: Self = Self::new(112);
5055
5056        #[doc = "120bytes"]
5057        pub const _1111000: Self = Self::new(120);
5058    }
5059}
5060#[doc(hidden)]
5061#[derive(Copy, Clone, Eq, PartialEq)]
5062pub struct Dcpctr_SPEC;
5063impl crate::sealed::RegSpec for Dcpctr_SPEC {
5064    type DataType = u16;
5065}
5066
5067#[doc = "DCP Control Register"]
5068pub type Dcpctr = crate::RegValueT<Dcpctr_SPEC>;
5069
5070impl Dcpctr {
5071    #[doc = "Buffer Status"]
5072    #[inline(always)]
5073    pub fn bsts(
5074        self,
5075    ) -> crate::common::RegisterField<
5076        15,
5077        0x1,
5078        1,
5079        0,
5080        dcpctr::Bsts,
5081        dcpctr::Bsts,
5082        Dcpctr_SPEC,
5083        crate::common::R,
5084    > {
5085        crate::common::RegisterField::<
5086            15,
5087            0x1,
5088            1,
5089            0,
5090            dcpctr::Bsts,
5091            dcpctr::Bsts,
5092            Dcpctr_SPEC,
5093            crate::common::R,
5094        >::from_register(self, 0)
5095    }
5096
5097    #[doc = "Setup Token Transmission"]
5098    #[inline(always)]
5099    pub fn sureq(
5100        self,
5101    ) -> crate::common::RegisterField<
5102        14,
5103        0x1,
5104        1,
5105        0,
5106        dcpctr::Sureq,
5107        dcpctr::Sureq,
5108        Dcpctr_SPEC,
5109        crate::common::RW,
5110    > {
5111        crate::common::RegisterField::<
5112            14,
5113            0x1,
5114            1,
5115            0,
5116            dcpctr::Sureq,
5117            dcpctr::Sureq,
5118            Dcpctr_SPEC,
5119            crate::common::RW,
5120        >::from_register(self, 0)
5121    }
5122
5123    #[doc = "SUREQ Bit Clear"]
5124    #[inline(always)]
5125    pub fn sureqclr(
5126        self,
5127    ) -> crate::common::RegisterField<
5128        11,
5129        0x1,
5130        1,
5131        0,
5132        dcpctr::Sureqclr,
5133        dcpctr::Sureqclr,
5134        Dcpctr_SPEC,
5135        crate::common::RW,
5136    > {
5137        crate::common::RegisterField::<
5138            11,
5139            0x1,
5140            1,
5141            0,
5142            dcpctr::Sureqclr,
5143            dcpctr::Sureqclr,
5144            Dcpctr_SPEC,
5145            crate::common::RW,
5146        >::from_register(self, 0)
5147    }
5148
5149    #[doc = "Sequence Toggle Bit Clear"]
5150    #[inline(always)]
5151    pub fn sqclr(
5152        self,
5153    ) -> crate::common::RegisterField<
5154        8,
5155        0x1,
5156        1,
5157        0,
5158        dcpctr::Sqclr,
5159        dcpctr::Sqclr,
5160        Dcpctr_SPEC,
5161        crate::common::W,
5162    > {
5163        crate::common::RegisterField::<
5164            8,
5165            0x1,
5166            1,
5167            0,
5168            dcpctr::Sqclr,
5169            dcpctr::Sqclr,
5170            Dcpctr_SPEC,
5171            crate::common::W,
5172        >::from_register(self, 0)
5173    }
5174
5175    #[doc = "Sequence Toggle Bit Set"]
5176    #[inline(always)]
5177    pub fn sqset(
5178        self,
5179    ) -> crate::common::RegisterField<
5180        7,
5181        0x1,
5182        1,
5183        0,
5184        dcpctr::Sqset,
5185        dcpctr::Sqset,
5186        Dcpctr_SPEC,
5187        crate::common::W,
5188    > {
5189        crate::common::RegisterField::<
5190            7,
5191            0x1,
5192            1,
5193            0,
5194            dcpctr::Sqset,
5195            dcpctr::Sqset,
5196            Dcpctr_SPEC,
5197            crate::common::W,
5198        >::from_register(self, 0)
5199    }
5200
5201    #[doc = "Sequence Toggle Bit Monitor"]
5202    #[inline(always)]
5203    pub fn sqmon(
5204        self,
5205    ) -> crate::common::RegisterField<
5206        6,
5207        0x1,
5208        1,
5209        0,
5210        dcpctr::Sqmon,
5211        dcpctr::Sqmon,
5212        Dcpctr_SPEC,
5213        crate::common::R,
5214    > {
5215        crate::common::RegisterField::<
5216            6,
5217            0x1,
5218            1,
5219            0,
5220            dcpctr::Sqmon,
5221            dcpctr::Sqmon,
5222            Dcpctr_SPEC,
5223            crate::common::R,
5224        >::from_register(self, 0)
5225    }
5226
5227    #[doc = "Pipe Busy"]
5228    #[inline(always)]
5229    pub fn pbusy(
5230        self,
5231    ) -> crate::common::RegisterField<
5232        5,
5233        0x1,
5234        1,
5235        0,
5236        dcpctr::Pbusy,
5237        dcpctr::Pbusy,
5238        Dcpctr_SPEC,
5239        crate::common::R,
5240    > {
5241        crate::common::RegisterField::<
5242            5,
5243            0x1,
5244            1,
5245            0,
5246            dcpctr::Pbusy,
5247            dcpctr::Pbusy,
5248            Dcpctr_SPEC,
5249            crate::common::R,
5250        >::from_register(self, 0)
5251    }
5252
5253    #[doc = "These bits are read as 00. The write value should be 00."]
5254    #[inline(always)]
5255    pub fn reserved(
5256        self,
5257    ) -> crate::common::RegisterField<3, 0x3, 1, 0, u8, u8, Dcpctr_SPEC, crate::common::RW> {
5258        crate::common::RegisterField::<3,0x3,1,0,u8,u8,Dcpctr_SPEC,crate::common::RW>::from_register(self,0)
5259    }
5260
5261    #[doc = "Control Transfer End Enable"]
5262    #[inline(always)]
5263    pub fn ccpl(
5264        self,
5265    ) -> crate::common::RegisterField<
5266        2,
5267        0x1,
5268        1,
5269        0,
5270        dcpctr::Ccpl,
5271        dcpctr::Ccpl,
5272        Dcpctr_SPEC,
5273        crate::common::RW,
5274    > {
5275        crate::common::RegisterField::<
5276            2,
5277            0x1,
5278            1,
5279            0,
5280            dcpctr::Ccpl,
5281            dcpctr::Ccpl,
5282            Dcpctr_SPEC,
5283            crate::common::RW,
5284        >::from_register(self, 0)
5285    }
5286
5287    #[doc = "Response PID"]
5288    #[inline(always)]
5289    pub fn pid(
5290        self,
5291    ) -> crate::common::RegisterField<
5292        0,
5293        0x3,
5294        1,
5295        0,
5296        dcpctr::Pid,
5297        dcpctr::Pid,
5298        Dcpctr_SPEC,
5299        crate::common::RW,
5300    > {
5301        crate::common::RegisterField::<
5302            0,
5303            0x3,
5304            1,
5305            0,
5306            dcpctr::Pid,
5307            dcpctr::Pid,
5308            Dcpctr_SPEC,
5309            crate::common::RW,
5310        >::from_register(self, 0)
5311    }
5312}
5313impl ::core::default::Default for Dcpctr {
5314    #[inline(always)]
5315    fn default() -> Dcpctr {
5316        <crate::RegValueT<Dcpctr_SPEC> as RegisterValue<_>>::new(64)
5317    }
5318}
5319pub mod dcpctr {
5320
5321    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5322    pub struct Bsts_SPEC;
5323    pub type Bsts = crate::EnumBitfieldStruct<u8, Bsts_SPEC>;
5324    impl Bsts {
5325        #[doc = "Buffer access is disabled."]
5326        pub const _0: Self = Self::new(0);
5327
5328        #[doc = "Buffer access is enabled."]
5329        pub const _1: Self = Self::new(1);
5330    }
5331    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5332    pub struct Sureq_SPEC;
5333    pub type Sureq = crate::EnumBitfieldStruct<u8, Sureq_SPEC>;
5334    impl Sureq {
5335        #[doc = "Invalid"]
5336        pub const _0: Self = Self::new(0);
5337
5338        #[doc = "Transmits the setup packet."]
5339        pub const _1: Self = Self::new(1);
5340    }
5341    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5342    pub struct Sureqclr_SPEC;
5343    pub type Sureqclr = crate::EnumBitfieldStruct<u8, Sureqclr_SPEC>;
5344    impl Sureqclr {
5345        #[doc = "Invalid"]
5346        pub const _0: Self = Self::new(0);
5347
5348        #[doc = "Clears the SUREQ bit to 0."]
5349        pub const _1: Self = Self::new(1);
5350    }
5351    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5352    pub struct Sqclr_SPEC;
5353    pub type Sqclr = crate::EnumBitfieldStruct<u8, Sqclr_SPEC>;
5354    impl Sqclr {
5355        #[doc = "Invalid"]
5356        pub const _0: Self = Self::new(0);
5357
5358        #[doc = "Specifies DATA0."]
5359        pub const _1: Self = Self::new(1);
5360    }
5361    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5362    pub struct Sqset_SPEC;
5363    pub type Sqset = crate::EnumBitfieldStruct<u8, Sqset_SPEC>;
5364    impl Sqset {
5365        #[doc = "Invalid"]
5366        pub const _0: Self = Self::new(0);
5367
5368        #[doc = "Specifies DATA1."]
5369        pub const _1: Self = Self::new(1);
5370    }
5371    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5372    pub struct Sqmon_SPEC;
5373    pub type Sqmon = crate::EnumBitfieldStruct<u8, Sqmon_SPEC>;
5374    impl Sqmon {
5375        #[doc = "DATA0"]
5376        pub const _0: Self = Self::new(0);
5377
5378        #[doc = "DATA1"]
5379        pub const _1: Self = Self::new(1);
5380    }
5381    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5382    pub struct Pbusy_SPEC;
5383    pub type Pbusy = crate::EnumBitfieldStruct<u8, Pbusy_SPEC>;
5384    impl Pbusy {
5385        #[doc = "DCP is not used for the transaction."]
5386        pub const _0: Self = Self::new(0);
5387
5388        #[doc = "DCP is used for the transaction."]
5389        pub const _1: Self = Self::new(1);
5390    }
5391    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5392    pub struct Ccpl_SPEC;
5393    pub type Ccpl = crate::EnumBitfieldStruct<u8, Ccpl_SPEC>;
5394    impl Ccpl {
5395        #[doc = "Invalid"]
5396        pub const _0: Self = Self::new(0);
5397
5398        #[doc = "Completion of control transfer is enabled."]
5399        pub const _1: Self = Self::new(1);
5400    }
5401    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5402    pub struct Pid_SPEC;
5403    pub type Pid = crate::EnumBitfieldStruct<u8, Pid_SPEC>;
5404    impl Pid {
5405        #[doc = "NAK response"]
5406        pub const _00: Self = Self::new(0);
5407
5408        #[doc = "BUF response (depending on the buffer state)"]
5409        pub const _01: Self = Self::new(1);
5410
5411        #[doc = "STALL response"]
5412        pub const _10: Self = Self::new(2);
5413
5414        #[doc = "STALL response"]
5415        pub const _11: Self = Self::new(3);
5416    }
5417}
5418#[doc(hidden)]
5419#[derive(Copy, Clone, Eq, PartialEq)]
5420pub struct Pipesel_SPEC;
5421impl crate::sealed::RegSpec for Pipesel_SPEC {
5422    type DataType = u16;
5423}
5424
5425#[doc = "Pipe Window Select Register"]
5426pub type Pipesel = crate::RegValueT<Pipesel_SPEC>;
5427
5428impl Pipesel {
5429    #[doc = "These bits are read as 000000000000. The write value should be 000000000000."]
5430    #[inline(always)]
5431    pub fn reserved(
5432        self,
5433    ) -> crate::common::RegisterField<4, 0xfff, 1, 0, u16, u16, Pipesel_SPEC, crate::common::RW>
5434    {
5435        crate::common::RegisterField::<4,0xfff,1,0,u16,u16,Pipesel_SPEC,crate::common::RW>::from_register(self,0)
5436    }
5437
5438    #[doc = "Pipe Window Select"]
5439    #[inline(always)]
5440    pub fn pipesel(
5441        self,
5442    ) -> crate::common::RegisterField<
5443        0,
5444        0xf,
5445        1,
5446        0,
5447        pipesel::Pipesel,
5448        pipesel::Pipesel,
5449        Pipesel_SPEC,
5450        crate::common::RW,
5451    > {
5452        crate::common::RegisterField::<
5453            0,
5454            0xf,
5455            1,
5456            0,
5457            pipesel::Pipesel,
5458            pipesel::Pipesel,
5459            Pipesel_SPEC,
5460            crate::common::RW,
5461        >::from_register(self, 0)
5462    }
5463}
5464impl ::core::default::Default for Pipesel {
5465    #[inline(always)]
5466    fn default() -> Pipesel {
5467        <crate::RegValueT<Pipesel_SPEC> as RegisterValue<_>>::new(0)
5468    }
5469}
5470pub mod pipesel {
5471
5472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5473    pub struct Pipesel_SPEC;
5474    pub type Pipesel = crate::EnumBitfieldStruct<u8, Pipesel_SPEC>;
5475    impl Pipesel {
5476        #[doc = "No pipe selected"]
5477        pub const _0000: Self = Self::new(0);
5478
5479        #[doc = "PIPE4"]
5480        pub const _0100: Self = Self::new(4);
5481
5482        #[doc = "PIPE5"]
5483        pub const _0101: Self = Self::new(5);
5484
5485        #[doc = "PIPE6"]
5486        pub const _0110: Self = Self::new(6);
5487
5488        #[doc = "PIPE7"]
5489        pub const _0111: Self = Self::new(7);
5490    }
5491}
5492#[doc(hidden)]
5493#[derive(Copy, Clone, Eq, PartialEq)]
5494pub struct Pipecfg_SPEC;
5495impl crate::sealed::RegSpec for Pipecfg_SPEC {
5496    type DataType = u16;
5497}
5498
5499#[doc = "Pipe Configuration Register"]
5500pub type Pipecfg = crate::RegValueT<Pipecfg_SPEC>;
5501
5502impl Pipecfg {
5503    #[doc = "Transfer Type"]
5504    #[inline(always)]
5505    pub fn r#type(
5506        self,
5507    ) -> crate::common::RegisterField<
5508        14,
5509        0x3,
5510        1,
5511        0,
5512        pipecfg::Type,
5513        pipecfg::Type,
5514        Pipecfg_SPEC,
5515        crate::common::RW,
5516    > {
5517        crate::common::RegisterField::<
5518            14,
5519            0x3,
5520            1,
5521            0,
5522            pipecfg::Type,
5523            pipecfg::Type,
5524            Pipecfg_SPEC,
5525            crate::common::RW,
5526        >::from_register(self, 0)
5527    }
5528
5529    #[doc = "BRDY Interrupt Operation Specification"]
5530    #[inline(always)]
5531    pub fn bfre(
5532        self,
5533    ) -> crate::common::RegisterField<
5534        10,
5535        0x1,
5536        1,
5537        0,
5538        pipecfg::Bfre,
5539        pipecfg::Bfre,
5540        Pipecfg_SPEC,
5541        crate::common::RW,
5542    > {
5543        crate::common::RegisterField::<
5544            10,
5545            0x1,
5546            1,
5547            0,
5548            pipecfg::Bfre,
5549            pipecfg::Bfre,
5550            Pipecfg_SPEC,
5551            crate::common::RW,
5552        >::from_register(self, 0)
5553    }
5554
5555    #[doc = "Double Buffer Mode"]
5556    #[inline(always)]
5557    pub fn dblb(
5558        self,
5559    ) -> crate::common::RegisterField<
5560        9,
5561        0x1,
5562        1,
5563        0,
5564        pipecfg::Dblb,
5565        pipecfg::Dblb,
5566        Pipecfg_SPEC,
5567        crate::common::RW,
5568    > {
5569        crate::common::RegisterField::<
5570            9,
5571            0x1,
5572            1,
5573            0,
5574            pipecfg::Dblb,
5575            pipecfg::Dblb,
5576            Pipecfg_SPEC,
5577            crate::common::RW,
5578        >::from_register(self, 0)
5579    }
5580
5581    #[doc = "Pipe Disabled at End of Transfer"]
5582    #[inline(always)]
5583    pub fn shtnak(
5584        self,
5585    ) -> crate::common::RegisterField<
5586        7,
5587        0x1,
5588        1,
5589        0,
5590        pipecfg::Shtnak,
5591        pipecfg::Shtnak,
5592        Pipecfg_SPEC,
5593        crate::common::RW,
5594    > {
5595        crate::common::RegisterField::<
5596            7,
5597            0x1,
5598            1,
5599            0,
5600            pipecfg::Shtnak,
5601            pipecfg::Shtnak,
5602            Pipecfg_SPEC,
5603            crate::common::RW,
5604        >::from_register(self, 0)
5605    }
5606
5607    #[doc = "This bit is read as 0. The write value should be 0."]
5608    #[inline(always)]
5609    pub fn reserved(
5610        self,
5611    ) -> crate::common::RegisterFieldBool<5, 1, 0, Pipecfg_SPEC, crate::common::RW> {
5612        crate::common::RegisterFieldBool::<5, 1, 0, Pipecfg_SPEC, crate::common::RW>::from_register(
5613            self, 0,
5614        )
5615    }
5616
5617    #[doc = "Transfer Direction"]
5618    #[inline(always)]
5619    pub fn dir(
5620        self,
5621    ) -> crate::common::RegisterField<
5622        4,
5623        0x1,
5624        1,
5625        0,
5626        pipecfg::Dir,
5627        pipecfg::Dir,
5628        Pipecfg_SPEC,
5629        crate::common::RW,
5630    > {
5631        crate::common::RegisterField::<
5632            4,
5633            0x1,
5634            1,
5635            0,
5636            pipecfg::Dir,
5637            pipecfg::Dir,
5638            Pipecfg_SPEC,
5639            crate::common::RW,
5640        >::from_register(self, 0)
5641    }
5642
5643    #[doc = "Endpoint NumberThese bits specify the endpoint number for the selected pipe.Setting 0000b means unused pipe."]
5644    #[inline(always)]
5645    pub fn epnum(
5646        self,
5647    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Pipecfg_SPEC, crate::common::RW> {
5648        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Pipecfg_SPEC,crate::common::RW>::from_register(self,0)
5649    }
5650}
5651impl ::core::default::Default for Pipecfg {
5652    #[inline(always)]
5653    fn default() -> Pipecfg {
5654        <crate::RegValueT<Pipecfg_SPEC> as RegisterValue<_>>::new(0)
5655    }
5656}
5657pub mod pipecfg {
5658
5659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5660    pub struct Type_SPEC;
5661    pub type Type = crate::EnumBitfieldStruct<u8, Type_SPEC>;
5662    impl Type {
5663        #[doc = "Pipe not used"]
5664        pub const _00: Self = Self::new(0);
5665
5666        #[doc = "Bulk transfer(PIPE1 and PIPE5) /Setting prohibited(PIPE6 to PIPE9)"]
5667        pub const _01: Self = Self::new(1);
5668
5669        #[doc = "Setting prohibited(PIPE1 and PIPE5) /Interrupt transfer(PIPE6 to PIPE9)"]
5670        pub const _10: Self = Self::new(2);
5671
5672        #[doc = "Isochronous transfer(PIPE1 and PIPE2) /Setting prohibited(PIPE3 to PIPE9)"]
5673        pub const _11: Self = Self::new(3);
5674    }
5675    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5676    pub struct Bfre_SPEC;
5677    pub type Bfre = crate::EnumBitfieldStruct<u8, Bfre_SPEC>;
5678    impl Bfre {
5679        #[doc = "BRDY interrupt upon transmitting or receiving data"]
5680        pub const _0: Self = Self::new(0);
5681
5682        #[doc = "BRDY interrupt upon completion of reading data"]
5683        pub const _1: Self = Self::new(1);
5684    }
5685    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5686    pub struct Dblb_SPEC;
5687    pub type Dblb = crate::EnumBitfieldStruct<u8, Dblb_SPEC>;
5688    impl Dblb {
5689        #[doc = "Single buffer"]
5690        pub const _0: Self = Self::new(0);
5691
5692        #[doc = "Double buffer"]
5693        pub const _1: Self = Self::new(1);
5694    }
5695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5696    pub struct Shtnak_SPEC;
5697    pub type Shtnak = crate::EnumBitfieldStruct<u8, Shtnak_SPEC>;
5698    impl Shtnak {
5699        #[doc = "Pipe assignment continued at the end of transfer"]
5700        pub const _0: Self = Self::new(0);
5701
5702        #[doc = "Pipe assignment disabled at the end of transfer"]
5703        pub const _1: Self = Self::new(1);
5704    }
5705    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5706    pub struct Dir_SPEC;
5707    pub type Dir = crate::EnumBitfieldStruct<u8, Dir_SPEC>;
5708    impl Dir {
5709        #[doc = "Receiving direction"]
5710        pub const _0: Self = Self::new(0);
5711
5712        #[doc = "Transmitting direction"]
5713        pub const _1: Self = Self::new(1);
5714    }
5715}
5716#[doc(hidden)]
5717#[derive(Copy, Clone, Eq, PartialEq)]
5718pub struct Pipemaxp_SPEC;
5719impl crate::sealed::RegSpec for Pipemaxp_SPEC {
5720    type DataType = u16;
5721}
5722
5723#[doc = "Pipe Maximum Packet Size Register"]
5724pub type Pipemaxp = crate::RegValueT<Pipemaxp_SPEC>;
5725
5726impl Pipemaxp {
5727    #[doc = "Device Select"]
5728    #[inline(always)]
5729    pub fn devsel(
5730        self,
5731    ) -> crate::common::RegisterField<
5732        12,
5733        0xf,
5734        1,
5735        0,
5736        pipemaxp::Devsel,
5737        pipemaxp::Devsel,
5738        Pipemaxp_SPEC,
5739        crate::common::RW,
5740    > {
5741        crate::common::RegisterField::<
5742            12,
5743            0xf,
5744            1,
5745            0,
5746            pipemaxp::Devsel,
5747            pipemaxp::Devsel,
5748            Pipemaxp_SPEC,
5749            crate::common::RW,
5750        >::from_register(self, 0)
5751    }
5752
5753    #[doc = "These bits are read as 000. The write value should be 000."]
5754    #[inline(always)]
5755    pub fn reserved(
5756        self,
5757    ) -> crate::common::RegisterField<9, 0x7, 1, 0, u8, u8, Pipemaxp_SPEC, crate::common::RW> {
5758        crate::common::RegisterField::<9,0x7,1,0,u8,u8,Pipemaxp_SPEC,crate::common::RW>::from_register(self,0)
5759    }
5760
5761    #[doc = "Maximum Packet SizePIPE1 and PIPE2:  1 byte (001h) to 256 bytes (100h)PIPE3 to PIPE5:   8 bytes (008h), 16 bytes (010h),  32 bytes (020h), 64 bytes (040h)   (Bits \\[8:7\\] and \\[2:0\\] are not provided.)PIPE6 to PIPE9:  1 byte (001h) to 64 bytes (040h)  (Bits \\[8:7\\] are not provided.)"]
5762    #[inline(always)]
5763    pub fn mxps(
5764        self,
5765    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Pipemaxp_SPEC, crate::common::RW>
5766    {
5767        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Pipemaxp_SPEC,crate::common::RW>::from_register(self,0)
5768    }
5769}
5770impl ::core::default::Default for Pipemaxp {
5771    #[inline(always)]
5772    fn default() -> Pipemaxp {
5773        <crate::RegValueT<Pipemaxp_SPEC> as RegisterValue<_>>::new(0)
5774    }
5775}
5776pub mod pipemaxp {
5777
5778    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5779    pub struct Devsel_SPEC;
5780    pub type Devsel = crate::EnumBitfieldStruct<u8, Devsel_SPEC>;
5781    impl Devsel {
5782        #[doc = "Address 0000"]
5783        pub const _0000: Self = Self::new(0);
5784
5785        #[doc = "Address 0001"]
5786        pub const _0001: Self = Self::new(1);
5787
5788        #[doc = "Address 0010"]
5789        pub const _0010: Self = Self::new(2);
5790
5791        #[doc = "Address 0011"]
5792        pub const _0011: Self = Self::new(3);
5793
5794        #[doc = "Address 0100"]
5795        pub const _0100: Self = Self::new(4);
5796
5797        #[doc = "Address 0101"]
5798        pub const _0101: Self = Self::new(5);
5799    }
5800}
5801#[doc(hidden)]
5802#[derive(Copy, Clone, Eq, PartialEq)]
5803pub struct Pipectr_SPEC;
5804impl crate::sealed::RegSpec for Pipectr_SPEC {
5805    type DataType = u16;
5806}
5807
5808#[doc = "Pipe %s Control Register"]
5809pub type Pipectr = crate::RegValueT<Pipectr_SPEC>;
5810
5811impl Pipectr {
5812    #[doc = "Buffer Status"]
5813    #[inline(always)]
5814    pub fn bsts(
5815        self,
5816    ) -> crate::common::RegisterField<
5817        15,
5818        0x1,
5819        1,
5820        0,
5821        pipectr::Bsts,
5822        pipectr::Bsts,
5823        Pipectr_SPEC,
5824        crate::common::R,
5825    > {
5826        crate::common::RegisterField::<
5827            15,
5828            0x1,
5829            1,
5830            0,
5831            pipectr::Bsts,
5832            pipectr::Bsts,
5833            Pipectr_SPEC,
5834            crate::common::R,
5835        >::from_register(self, 0)
5836    }
5837
5838    #[doc = "Auto Buffer Clear Mode"]
5839    #[inline(always)]
5840    pub fn aclrm(
5841        self,
5842    ) -> crate::common::RegisterField<
5843        9,
5844        0x1,
5845        1,
5846        0,
5847        pipectr::Aclrm,
5848        pipectr::Aclrm,
5849        Pipectr_SPEC,
5850        crate::common::RW,
5851    > {
5852        crate::common::RegisterField::<
5853            9,
5854            0x1,
5855            1,
5856            0,
5857            pipectr::Aclrm,
5858            pipectr::Aclrm,
5859            Pipectr_SPEC,
5860            crate::common::RW,
5861        >::from_register(self, 0)
5862    }
5863
5864    #[doc = "Sequence Toggle Bit Clear"]
5865    #[inline(always)]
5866    pub fn sqclr(
5867        self,
5868    ) -> crate::common::RegisterField<
5869        8,
5870        0x1,
5871        1,
5872        0,
5873        pipectr::Sqclr,
5874        pipectr::Sqclr,
5875        Pipectr_SPEC,
5876        crate::common::W,
5877    > {
5878        crate::common::RegisterField::<
5879            8,
5880            0x1,
5881            1,
5882            0,
5883            pipectr::Sqclr,
5884            pipectr::Sqclr,
5885            Pipectr_SPEC,
5886            crate::common::W,
5887        >::from_register(self, 0)
5888    }
5889
5890    #[doc = "Sequence Toggle Bit Set"]
5891    #[inline(always)]
5892    pub fn sqset(
5893        self,
5894    ) -> crate::common::RegisterField<
5895        7,
5896        0x1,
5897        1,
5898        0,
5899        pipectr::Sqset,
5900        pipectr::Sqset,
5901        Pipectr_SPEC,
5902        crate::common::W,
5903    > {
5904        crate::common::RegisterField::<
5905            7,
5906            0x1,
5907            1,
5908            0,
5909            pipectr::Sqset,
5910            pipectr::Sqset,
5911            Pipectr_SPEC,
5912            crate::common::W,
5913        >::from_register(self, 0)
5914    }
5915
5916    #[doc = "Sequence Toggle Bit Confirmation"]
5917    #[inline(always)]
5918    pub fn sqmon(
5919        self,
5920    ) -> crate::common::RegisterField<
5921        6,
5922        0x1,
5923        1,
5924        0,
5925        pipectr::Sqmon,
5926        pipectr::Sqmon,
5927        Pipectr_SPEC,
5928        crate::common::R,
5929    > {
5930        crate::common::RegisterField::<
5931            6,
5932            0x1,
5933            1,
5934            0,
5935            pipectr::Sqmon,
5936            pipectr::Sqmon,
5937            Pipectr_SPEC,
5938            crate::common::R,
5939        >::from_register(self, 0)
5940    }
5941
5942    #[doc = "Pipe Busy"]
5943    #[inline(always)]
5944    pub fn pbusy(
5945        self,
5946    ) -> crate::common::RegisterField<
5947        5,
5948        0x1,
5949        1,
5950        0,
5951        pipectr::Pbusy,
5952        pipectr::Pbusy,
5953        Pipectr_SPEC,
5954        crate::common::R,
5955    > {
5956        crate::common::RegisterField::<
5957            5,
5958            0x1,
5959            1,
5960            0,
5961            pipectr::Pbusy,
5962            pipectr::Pbusy,
5963            Pipectr_SPEC,
5964            crate::common::R,
5965        >::from_register(self, 0)
5966    }
5967
5968    #[doc = "These bits are read as 000. The write value should be 000."]
5969    #[inline(always)]
5970    pub fn reserved(
5971        self,
5972    ) -> crate::common::RegisterField<2, 0x7, 1, 0, u8, u8, Pipectr_SPEC, crate::common::RW> {
5973        crate::common::RegisterField::<2,0x7,1,0,u8,u8,Pipectr_SPEC,crate::common::RW>::from_register(self,0)
5974    }
5975
5976    #[doc = "Response PID"]
5977    #[inline(always)]
5978    pub fn pid(
5979        self,
5980    ) -> crate::common::RegisterField<
5981        0,
5982        0x3,
5983        1,
5984        0,
5985        pipectr::Pid,
5986        pipectr::Pid,
5987        Pipectr_SPEC,
5988        crate::common::RW,
5989    > {
5990        crate::common::RegisterField::<
5991            0,
5992            0x3,
5993            1,
5994            0,
5995            pipectr::Pid,
5996            pipectr::Pid,
5997            Pipectr_SPEC,
5998            crate::common::RW,
5999        >::from_register(self, 0)
6000    }
6001}
6002impl ::core::default::Default for Pipectr {
6003    #[inline(always)]
6004    fn default() -> Pipectr {
6005        <crate::RegValueT<Pipectr_SPEC> as RegisterValue<_>>::new(0)
6006    }
6007}
6008pub mod pipectr {
6009
6010    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6011    pub struct Bsts_SPEC;
6012    pub type Bsts = crate::EnumBitfieldStruct<u8, Bsts_SPEC>;
6013    impl Bsts {
6014        #[doc = "Buffer access is disabled."]
6015        pub const _0: Self = Self::new(0);
6016
6017        #[doc = "Buffer access is enabled."]
6018        pub const _1: Self = Self::new(1);
6019    }
6020    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6021    pub struct Aclrm_SPEC;
6022    pub type Aclrm = crate::EnumBitfieldStruct<u8, Aclrm_SPEC>;
6023    impl Aclrm {
6024        #[doc = "Auto buffer clear mode is disabled."]
6025        pub const _0: Self = Self::new(0);
6026
6027        #[doc = "Auto buffer clear mode is enabled (all buffers are initialized)"]
6028        pub const _1: Self = Self::new(1);
6029    }
6030    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6031    pub struct Sqclr_SPEC;
6032    pub type Sqclr = crate::EnumBitfieldStruct<u8, Sqclr_SPEC>;
6033    impl Sqclr {
6034        #[doc = "Invalid"]
6035        pub const _0: Self = Self::new(0);
6036
6037        #[doc = "Specifies DATA0."]
6038        pub const _1: Self = Self::new(1);
6039    }
6040    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6041    pub struct Sqset_SPEC;
6042    pub type Sqset = crate::EnumBitfieldStruct<u8, Sqset_SPEC>;
6043    impl Sqset {
6044        #[doc = "Invalid"]
6045        pub const _0: Self = Self::new(0);
6046
6047        #[doc = "Specifies DATA1."]
6048        pub const _1: Self = Self::new(1);
6049    }
6050    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6051    pub struct Sqmon_SPEC;
6052    pub type Sqmon = crate::EnumBitfieldStruct<u8, Sqmon_SPEC>;
6053    impl Sqmon {
6054        #[doc = "DATA0"]
6055        pub const _0: Self = Self::new(0);
6056
6057        #[doc = "DATA1"]
6058        pub const _1: Self = Self::new(1);
6059    }
6060    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6061    pub struct Pbusy_SPEC;
6062    pub type Pbusy = crate::EnumBitfieldStruct<u8, Pbusy_SPEC>;
6063    impl Pbusy {
6064        #[doc = "The relevant pipe is not used at the USB bus."]
6065        pub const _0: Self = Self::new(0);
6066
6067        #[doc = "The relevant pipe is used at the USB bus."]
6068        pub const _1: Self = Self::new(1);
6069    }
6070    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6071    pub struct Pid_SPEC;
6072    pub type Pid = crate::EnumBitfieldStruct<u8, Pid_SPEC>;
6073    impl Pid {
6074        #[doc = "NAK response"]
6075        pub const _00: Self = Self::new(0);
6076
6077        #[doc = "BUF response(dependingonthebufferstate)"]
6078        pub const _01: Self = Self::new(1);
6079
6080        #[doc = "STALL response"]
6081        pub const _10: Self = Self::new(2);
6082
6083        #[doc = "STALL response"]
6084        pub const _11: Self = Self::new(3);
6085    }
6086}
6087#[doc(hidden)]
6088#[derive(Copy, Clone, Eq, PartialEq)]
6089pub struct Pipetre_SPEC;
6090impl crate::sealed::RegSpec for Pipetre_SPEC {
6091    type DataType = u16;
6092}
6093
6094#[doc = "Pipe %s Transaction Counter Enable Register"]
6095pub type Pipetre = crate::RegValueT<Pipetre_SPEC>;
6096
6097impl Pipetre {
6098    #[doc = "Transaction Counter Enable"]
6099    #[inline(always)]
6100    pub fn trenb(
6101        self,
6102    ) -> crate::common::RegisterField<
6103        9,
6104        0x1,
6105        1,
6106        0,
6107        pipetre::Trenb,
6108        pipetre::Trenb,
6109        Pipetre_SPEC,
6110        crate::common::RW,
6111    > {
6112        crate::common::RegisterField::<
6113            9,
6114            0x1,
6115            1,
6116            0,
6117            pipetre::Trenb,
6118            pipetre::Trenb,
6119            Pipetre_SPEC,
6120            crate::common::RW,
6121        >::from_register(self, 0)
6122    }
6123
6124    #[doc = "Transaction Counter Clear"]
6125    #[inline(always)]
6126    pub fn trclr(
6127        self,
6128    ) -> crate::common::RegisterField<
6129        8,
6130        0x1,
6131        1,
6132        0,
6133        pipetre::Trclr,
6134        pipetre::Trclr,
6135        Pipetre_SPEC,
6136        crate::common::RW,
6137    > {
6138        crate::common::RegisterField::<
6139            8,
6140            0x1,
6141            1,
6142            0,
6143            pipetre::Trclr,
6144            pipetre::Trclr,
6145            Pipetre_SPEC,
6146            crate::common::RW,
6147        >::from_register(self, 0)
6148    }
6149
6150    #[doc = "These bits are read as 00000000. The write value should be 00000000."]
6151    #[inline(always)]
6152    pub fn reserved(
6153        self,
6154    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Pipetre_SPEC, crate::common::RW> {
6155        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Pipetre_SPEC,crate::common::RW>::from_register(self,0)
6156    }
6157}
6158impl ::core::default::Default for Pipetre {
6159    #[inline(always)]
6160    fn default() -> Pipetre {
6161        <crate::RegValueT<Pipetre_SPEC> as RegisterValue<_>>::new(0)
6162    }
6163}
6164pub mod pipetre {
6165
6166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6167    pub struct Trenb_SPEC;
6168    pub type Trenb = crate::EnumBitfieldStruct<u8, Trenb_SPEC>;
6169    impl Trenb {
6170        #[doc = "Transaction counter is disabled."]
6171        pub const _0: Self = Self::new(0);
6172
6173        #[doc = "Transaction counter is enabled."]
6174        pub const _1: Self = Self::new(1);
6175    }
6176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6177    pub struct Trclr_SPEC;
6178    pub type Trclr = crate::EnumBitfieldStruct<u8, Trclr_SPEC>;
6179    impl Trclr {
6180        #[doc = "Invalid"]
6181        pub const _0: Self = Self::new(0);
6182
6183        #[doc = "The current counter value is cleared."]
6184        pub const _1: Self = Self::new(1);
6185    }
6186}
6187#[doc(hidden)]
6188#[derive(Copy, Clone, Eq, PartialEq)]
6189pub struct Pipetrn_SPEC;
6190impl crate::sealed::RegSpec for Pipetrn_SPEC {
6191    type DataType = u16;
6192}
6193
6194#[doc = "Pipe %s Transaction Counter Register"]
6195pub type Pipetrn = crate::RegValueT<Pipetrn_SPEC>;
6196
6197impl Pipetrn {
6198    #[doc = "Transaction Counter"]
6199    #[inline(always)]
6200    pub fn trncnt(
6201        self,
6202    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Pipetrn_SPEC, crate::common::RW>
6203    {
6204        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Pipetrn_SPEC,crate::common::RW>::from_register(self,0)
6205    }
6206}
6207impl ::core::default::Default for Pipetrn {
6208    #[inline(always)]
6209    fn default() -> Pipetrn {
6210        <crate::RegValueT<Pipetrn_SPEC> as RegisterValue<_>>::new(0)
6211    }
6212}
6213
6214#[doc(hidden)]
6215#[derive(Copy, Clone, Eq, PartialEq)]
6216pub struct Usbmc_SPEC;
6217impl crate::sealed::RegSpec for Usbmc_SPEC {
6218    type DataType = u16;
6219}
6220
6221#[doc = "USB Module Control Register"]
6222pub type Usbmc = crate::RegValueT<Usbmc_SPEC>;
6223
6224impl Usbmc {
6225    #[doc = "USB Regulator On/Off Control"]
6226    #[inline(always)]
6227    pub fn vdcen(
6228        self,
6229    ) -> crate::common::RegisterField<
6230        7,
6231        0x1,
6232        1,
6233        0,
6234        usbmc::Vdcen,
6235        usbmc::Vdcen,
6236        Usbmc_SPEC,
6237        crate::common::RW,
6238    > {
6239        crate::common::RegisterField::<
6240            7,
6241            0x1,
6242            1,
6243            0,
6244            usbmc::Vdcen,
6245            usbmc::Vdcen,
6246            Usbmc_SPEC,
6247            crate::common::RW,
6248        >::from_register(self, 0)
6249    }
6250
6251    #[doc = "This bit is read as 1. The write value should be 1."]
6252    #[inline(always)]
6253    pub fn reserved(
6254        self,
6255    ) -> crate::common::RegisterFieldBool<1, 1, 0, Usbmc_SPEC, crate::common::RW> {
6256        crate::common::RegisterFieldBool::<1, 1, 0, Usbmc_SPEC, crate::common::RW>::from_register(
6257            self, 0,
6258        )
6259    }
6260
6261    #[doc = "USB Reference Power Supply Circuit On/Off Control"]
6262    #[inline(always)]
6263    pub fn vddusbe(
6264        self,
6265    ) -> crate::common::RegisterField<
6266        0,
6267        0x1,
6268        1,
6269        0,
6270        usbmc::Vddusbe,
6271        usbmc::Vddusbe,
6272        Usbmc_SPEC,
6273        crate::common::RW,
6274    > {
6275        crate::common::RegisterField::<
6276            0,
6277            0x1,
6278            1,
6279            0,
6280            usbmc::Vddusbe,
6281            usbmc::Vddusbe,
6282            Usbmc_SPEC,
6283            crate::common::RW,
6284        >::from_register(self, 0)
6285    }
6286}
6287impl ::core::default::Default for Usbmc {
6288    #[inline(always)]
6289    fn default() -> Usbmc {
6290        <crate::RegValueT<Usbmc_SPEC> as RegisterValue<_>>::new(2)
6291    }
6292}
6293pub mod usbmc {
6294
6295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6296    pub struct Vdcen_SPEC;
6297    pub type Vdcen = crate::EnumBitfieldStruct<u8, Vdcen_SPEC>;
6298    impl Vdcen {
6299        #[doc = "USB regulator off"]
6300        pub const _0: Self = Self::new(0);
6301
6302        #[doc = "USB regulator on"]
6303        pub const _1: Self = Self::new(1);
6304    }
6305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6306    pub struct Vddusbe_SPEC;
6307    pub type Vddusbe = crate::EnumBitfieldStruct<u8, Vddusbe_SPEC>;
6308    impl Vddusbe {
6309        #[doc = "USB reference power supply circuit off"]
6310        pub const _0: Self = Self::new(0);
6311
6312        #[doc = "USB reference power supply circuit on"]
6313        pub const _1: Self = Self::new(1);
6314    }
6315}
6316#[doc(hidden)]
6317#[derive(Copy, Clone, Eq, PartialEq)]
6318pub struct Usbbcctrl0_SPEC;
6319impl crate::sealed::RegSpec for Usbbcctrl0_SPEC {
6320    type DataType = u16;
6321}
6322
6323#[doc = "BC Control Register 0"]
6324pub type Usbbcctrl0 = crate::RegValueT<Usbbcctrl0_SPEC>;
6325
6326impl Usbbcctrl0 {
6327    #[doc = "D+ Pin 0.6 V Input Detection Status"]
6328    #[inline(always)]
6329    pub fn pddetsts0(
6330        self,
6331    ) -> crate::common::RegisterField<
6332        9,
6333        0x1,
6334        1,
6335        0,
6336        usbbcctrl0::Pddetsts0,
6337        usbbcctrl0::Pddetsts0,
6338        Usbbcctrl0_SPEC,
6339        crate::common::R,
6340    > {
6341        crate::common::RegisterField::<
6342            9,
6343            0x1,
6344            1,
6345            0,
6346            usbbcctrl0::Pddetsts0,
6347            usbbcctrl0::Pddetsts0,
6348            Usbbcctrl0_SPEC,
6349            crate::common::R,
6350        >::from_register(self, 0)
6351    }
6352
6353    #[doc = "D- Pin 0.6 V Input Detection Status"]
6354    #[inline(always)]
6355    pub fn chgdetsts0(
6356        self,
6357    ) -> crate::common::RegisterField<
6358        8,
6359        0x1,
6360        1,
6361        0,
6362        usbbcctrl0::Chgdetsts0,
6363        usbbcctrl0::Chgdetsts0,
6364        Usbbcctrl0_SPEC,
6365        crate::common::R,
6366    > {
6367        crate::common::RegisterField::<
6368            8,
6369            0x1,
6370            1,
6371            0,
6372            usbbcctrl0::Chgdetsts0,
6373            usbbcctrl0::Chgdetsts0,
6374            Usbbcctrl0_SPEC,
6375            crate::common::R,
6376        >::from_register(self, 0)
6377    }
6378
6379    #[doc = "BC (Battery Charger) Function General Enable Control"]
6380    #[inline(always)]
6381    pub fn batchge0(
6382        self,
6383    ) -> crate::common::RegisterField<
6384        7,
6385        0x1,
6386        1,
6387        0,
6388        usbbcctrl0::Batchge0,
6389        usbbcctrl0::Batchge0,
6390        Usbbcctrl0_SPEC,
6391        crate::common::RW,
6392    > {
6393        crate::common::RegisterField::<
6394            7,
6395            0x1,
6396            1,
6397            0,
6398            usbbcctrl0::Batchge0,
6399            usbbcctrl0::Batchge0,
6400            Usbbcctrl0_SPEC,
6401            crate::common::RW,
6402        >::from_register(self, 0)
6403    }
6404
6405    #[doc = "This bit is read as 0. The write value should be 0."]
6406    #[inline(always)]
6407    pub fn reserved(
6408        self,
6409    ) -> crate::common::RegisterFieldBool<6, 1, 0, Usbbcctrl0_SPEC, crate::common::RW> {
6410        crate::common::RegisterFieldBool::<6,1,0,Usbbcctrl0_SPEC,crate::common::RW>::from_register(self,0)
6411    }
6412
6413    #[doc = "D- Pin VDMSRC (0.6 V) Output Control"]
6414    #[inline(always)]
6415    pub fn vdmsrce0(
6416        self,
6417    ) -> crate::common::RegisterField<
6418        5,
6419        0x1,
6420        1,
6421        0,
6422        usbbcctrl0::Vdmsrce0,
6423        usbbcctrl0::Vdmsrce0,
6424        Usbbcctrl0_SPEC,
6425        crate::common::RW,
6426    > {
6427        crate::common::RegisterField::<
6428            5,
6429            0x1,
6430            1,
6431            0,
6432            usbbcctrl0::Vdmsrce0,
6433            usbbcctrl0::Vdmsrce0,
6434            Usbbcctrl0_SPEC,
6435            crate::common::RW,
6436        >::from_register(self, 0)
6437    }
6438
6439    #[doc = "D+ Pin 0.6 V Input Detection (Comparator and Sink) Control"]
6440    #[inline(always)]
6441    pub fn idpsinke0(
6442        self,
6443    ) -> crate::common::RegisterField<
6444        4,
6445        0x1,
6446        1,
6447        0,
6448        usbbcctrl0::Idpsinke0,
6449        usbbcctrl0::Idpsinke0,
6450        Usbbcctrl0_SPEC,
6451        crate::common::RW,
6452    > {
6453        crate::common::RegisterField::<
6454            4,
6455            0x1,
6456            1,
6457            0,
6458            usbbcctrl0::Idpsinke0,
6459            usbbcctrl0::Idpsinke0,
6460            Usbbcctrl0_SPEC,
6461            crate::common::RW,
6462        >::from_register(self, 0)
6463    }
6464
6465    #[doc = "D+ Pin VDPSRC (0.6 V) Output Control"]
6466    #[inline(always)]
6467    pub fn vdpsrce0(
6468        self,
6469    ) -> crate::common::RegisterField<
6470        3,
6471        0x1,
6472        1,
6473        0,
6474        usbbcctrl0::Vdpsrce0,
6475        usbbcctrl0::Vdpsrce0,
6476        Usbbcctrl0_SPEC,
6477        crate::common::RW,
6478    > {
6479        crate::common::RegisterField::<
6480            3,
6481            0x1,
6482            1,
6483            0,
6484            usbbcctrl0::Vdpsrce0,
6485            usbbcctrl0::Vdpsrce0,
6486            Usbbcctrl0_SPEC,
6487            crate::common::RW,
6488        >::from_register(self, 0)
6489    }
6490
6491    #[doc = "D- Pin 0.6 V Input Detection (Comparator and Sink) Control"]
6492    #[inline(always)]
6493    pub fn idmsinke0(
6494        self,
6495    ) -> crate::common::RegisterField<
6496        2,
6497        0x1,
6498        1,
6499        0,
6500        usbbcctrl0::Idmsinke0,
6501        usbbcctrl0::Idmsinke0,
6502        Usbbcctrl0_SPEC,
6503        crate::common::RW,
6504    > {
6505        crate::common::RegisterField::<
6506            2,
6507            0x1,
6508            1,
6509            0,
6510            usbbcctrl0::Idmsinke0,
6511            usbbcctrl0::Idmsinke0,
6512            Usbbcctrl0_SPEC,
6513            crate::common::RW,
6514        >::from_register(self, 0)
6515    }
6516
6517    #[doc = "D+ Pin IDPSRC Output Control"]
6518    #[inline(always)]
6519    pub fn idpsrce0(
6520        self,
6521    ) -> crate::common::RegisterField<
6522        1,
6523        0x1,
6524        1,
6525        0,
6526        usbbcctrl0::Idpsrce0,
6527        usbbcctrl0::Idpsrce0,
6528        Usbbcctrl0_SPEC,
6529        crate::common::RW,
6530    > {
6531        crate::common::RegisterField::<
6532            1,
6533            0x1,
6534            1,
6535            0,
6536            usbbcctrl0::Idpsrce0,
6537            usbbcctrl0::Idpsrce0,
6538            Usbbcctrl0_SPEC,
6539            crate::common::RW,
6540        >::from_register(self, 0)
6541    }
6542
6543    #[doc = "D- Pin Pull-Down Control"]
6544    #[inline(always)]
6545    pub fn rpdme0(
6546        self,
6547    ) -> crate::common::RegisterField<
6548        0,
6549        0x1,
6550        1,
6551        0,
6552        usbbcctrl0::Rpdme0,
6553        usbbcctrl0::Rpdme0,
6554        Usbbcctrl0_SPEC,
6555        crate::common::RW,
6556    > {
6557        crate::common::RegisterField::<
6558            0,
6559            0x1,
6560            1,
6561            0,
6562            usbbcctrl0::Rpdme0,
6563            usbbcctrl0::Rpdme0,
6564            Usbbcctrl0_SPEC,
6565            crate::common::RW,
6566        >::from_register(self, 0)
6567    }
6568}
6569impl ::core::default::Default for Usbbcctrl0 {
6570    #[inline(always)]
6571    fn default() -> Usbbcctrl0 {
6572        <crate::RegValueT<Usbbcctrl0_SPEC> as RegisterValue<_>>::new(0)
6573    }
6574}
6575pub mod usbbcctrl0 {
6576
6577    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6578    pub struct Pddetsts0_SPEC;
6579    pub type Pddetsts0 = crate::EnumBitfieldStruct<u8, Pddetsts0_SPEC>;
6580    impl Pddetsts0 {
6581        #[doc = "Not detected"]
6582        pub const _0: Self = Self::new(0);
6583
6584        #[doc = "Detected"]
6585        pub const _1: Self = Self::new(1);
6586    }
6587    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6588    pub struct Chgdetsts0_SPEC;
6589    pub type Chgdetsts0 = crate::EnumBitfieldStruct<u8, Chgdetsts0_SPEC>;
6590    impl Chgdetsts0 {
6591        #[doc = "Not detected"]
6592        pub const _0: Self = Self::new(0);
6593
6594        #[doc = "Detected"]
6595        pub const _1: Self = Self::new(1);
6596    }
6597    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6598    pub struct Batchge0_SPEC;
6599    pub type Batchge0 = crate::EnumBitfieldStruct<u8, Batchge0_SPEC>;
6600    impl Batchge0 {
6601        #[doc = "Disabled"]
6602        pub const _0: Self = Self::new(0);
6603
6604        #[doc = "Enabled"]
6605        pub const _1: Self = Self::new(1);
6606    }
6607    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6608    pub struct Vdmsrce0_SPEC;
6609    pub type Vdmsrce0 = crate::EnumBitfieldStruct<u8, Vdmsrce0_SPEC>;
6610    impl Vdmsrce0 {
6611        #[doc = "Stop"]
6612        pub const _0: Self = Self::new(0);
6613
6614        #[doc = "0.6 V output"]
6615        pub const _1: Self = Self::new(1);
6616    }
6617    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6618    pub struct Idpsinke0_SPEC;
6619    pub type Idpsinke0 = crate::EnumBitfieldStruct<u8, Idpsinke0_SPEC>;
6620    impl Idpsinke0 {
6621        #[doc = "Detection off"]
6622        pub const _0: Self = Self::new(0);
6623
6624        #[doc = "Detection on (comparator and sink current on)"]
6625        pub const _1: Self = Self::new(1);
6626    }
6627    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6628    pub struct Vdpsrce0_SPEC;
6629    pub type Vdpsrce0 = crate::EnumBitfieldStruct<u8, Vdpsrce0_SPEC>;
6630    impl Vdpsrce0 {
6631        #[doc = "Stop"]
6632        pub const _0: Self = Self::new(0);
6633
6634        #[doc = "0.6 V output"]
6635        pub const _1: Self = Self::new(1);
6636    }
6637    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6638    pub struct Idmsinke0_SPEC;
6639    pub type Idmsinke0 = crate::EnumBitfieldStruct<u8, Idmsinke0_SPEC>;
6640    impl Idmsinke0 {
6641        #[doc = "Detection off"]
6642        pub const _0: Self = Self::new(0);
6643
6644        #[doc = "Detection on (comparator and sink current on)"]
6645        pub const _1: Self = Self::new(1);
6646    }
6647    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6648    pub struct Idpsrce0_SPEC;
6649    pub type Idpsrce0 = crate::EnumBitfieldStruct<u8, Idpsrce0_SPEC>;
6650    impl Idpsrce0 {
6651        #[doc = "Stop"]
6652        pub const _0: Self = Self::new(0);
6653
6654        #[doc = "10 uA output"]
6655        pub const _1: Self = Self::new(1);
6656    }
6657    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6658    pub struct Rpdme0_SPEC;
6659    pub type Rpdme0 = crate::EnumBitfieldStruct<u8, Rpdme0_SPEC>;
6660    impl Rpdme0 {
6661        #[doc = "Pull-down off"]
6662        pub const _0: Self = Self::new(0);
6663
6664        #[doc = "Pull-down on"]
6665        pub const _1: Self = Self::new(1);
6666    }
6667}
6668#[doc(hidden)]
6669#[derive(Copy, Clone, Eq, PartialEq)]
6670pub struct Ucksel_SPEC;
6671impl crate::sealed::RegSpec for Ucksel_SPEC {
6672    type DataType = u16;
6673}
6674
6675#[doc = "USB Clock Selection Register"]
6676pub type Ucksel = crate::RegValueT<Ucksel_SPEC>;
6677
6678impl Ucksel {
6679    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
6680    #[inline(always)]
6681    pub fn reserved(
6682        self,
6683    ) -> crate::common::RegisterField<1, 0x7fff, 1, 0, u16, u16, Ucksel_SPEC, crate::common::RW>
6684    {
6685        crate::common::RegisterField::<1,0x7fff,1,0,u16,u16,Ucksel_SPEC,crate::common::RW>::from_register(self,0)
6686    }
6687
6688    #[doc = "USB Clock Selection"]
6689    #[inline(always)]
6690    pub fn uckselc(
6691        self,
6692    ) -> crate::common::RegisterField<
6693        0,
6694        0x1,
6695        1,
6696        0,
6697        ucksel::Uckselc,
6698        ucksel::Uckselc,
6699        Ucksel_SPEC,
6700        crate::common::RW,
6701    > {
6702        crate::common::RegisterField::<
6703            0,
6704            0x1,
6705            1,
6706            0,
6707            ucksel::Uckselc,
6708            ucksel::Uckselc,
6709            Ucksel_SPEC,
6710            crate::common::RW,
6711        >::from_register(self, 0)
6712    }
6713}
6714impl ::core::default::Default for Ucksel {
6715    #[inline(always)]
6716    fn default() -> Ucksel {
6717        <crate::RegValueT<Ucksel_SPEC> as RegisterValue<_>>::new(0)
6718    }
6719}
6720pub mod ucksel {
6721
6722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6723    pub struct Uckselc_SPEC;
6724    pub type Uckselc = crate::EnumBitfieldStruct<u8, Uckselc_SPEC>;
6725    impl Uckselc {
6726        #[doc = "High-speed on-chip oscillator clock (HOCO) is not selected as USB clock"]
6727        pub const _0: Self = Self::new(0);
6728
6729        #[doc = "High-speed on-chip oscillator clock (HOCO) is selected as USB clock"]
6730        pub const _1: Self = Self::new(1);
6731    }
6732}
ra2a1_pac/usbfs.rs

ra2a1_pac/
usbfs.rs
