ra2a1_pac/
smpu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Slave MPU"]
28unsafe impl ::core::marker::Send for super::Smpu {}
29unsafe impl ::core::marker::Sync for super::Smpu {}
30impl super::Smpu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Slave MPU Control Register"]
38    #[inline(always)]
39    pub const fn smpuctl(
40        &self,
41    ) -> &'static crate::common::Reg<self::Smpuctl_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Smpuctl_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Access Control Register for MBIU"]
50    #[inline(always)]
51    pub const fn smpumbiu(
52        &self,
53    ) -> &'static crate::common::Reg<self::Smpumbiu_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Smpumbiu_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(16usize),
57            )
58        }
59    }
60
61    #[doc = "Access Control Register for FBIU"]
62    #[inline(always)]
63    pub const fn smpufbiu(
64        &self,
65    ) -> &'static crate::common::Reg<self::Smpufbiu_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Smpufbiu_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(20usize),
69            )
70        }
71    }
72
73    #[doc = "Access Control Register for SRAM"]
74    #[inline(always)]
75    pub const fn smpusram0(
76        &self,
77    ) -> &'static crate::common::Reg<self::Smpusram0_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Smpusram0_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(24usize),
81            )
82        }
83    }
84
85    #[doc = "Access Control Register for P%sBIU"]
86    #[inline(always)]
87    pub const fn smpupbiu(
88        &self,
89    ) -> &'static crate::common::ClusterRegisterArray<
90        crate::common::Reg<self::Smpupbiu_SPEC, crate::common::RW>,
91        3,
92        0x4,
93    > {
94        unsafe {
95            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x20usize))
96        }
97    }
98    #[inline(always)]
99    pub const fn smpup0biu(
100        &self,
101    ) -> &'static crate::common::Reg<self::Smpupbiu_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Smpupbiu_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(0x20usize),
105            )
106        }
107    }
108    #[inline(always)]
109    pub const fn smpup2biu(
110        &self,
111    ) -> &'static crate::common::Reg<self::Smpupbiu_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Smpupbiu_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(0x24usize),
115            )
116        }
117    }
118    #[inline(always)]
119    pub const fn smpup6biu(
120        &self,
121    ) -> &'static crate::common::Reg<self::Smpupbiu_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Smpupbiu_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(0x28usize),
125            )
126        }
127    }
128}
129#[doc(hidden)]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Smpuctl_SPEC;
132impl crate::sealed::RegSpec for Smpuctl_SPEC {
133    type DataType = u16;
134}
135
136#[doc = "Slave MPU Control Register"]
137pub type Smpuctl = crate::RegValueT<Smpuctl_SPEC>;
138
139impl Smpuctl {
140    #[doc = "Key Code This bit is used to enable or disable writing of the PROTECT and OAD bit."]
141    #[inline(always)]
142    pub fn key(
143        self,
144    ) -> crate::common::RegisterField<
145        8,
146        0xff,
147        1,
148        0,
149        smpuctl::Key,
150        smpuctl::Key,
151        Smpuctl_SPEC,
152        crate::common::W,
153    > {
154        crate::common::RegisterField::<
155            8,
156            0xff,
157            1,
158            0,
159            smpuctl::Key,
160            smpuctl::Key,
161            Smpuctl_SPEC,
162            crate::common::W,
163        >::from_register(self, 0)
164    }
165
166    #[doc = "These bits are read as 000000. The write value should be 000000."]
167    #[inline(always)]
168    pub fn reserved(
169        self,
170    ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Smpuctl_SPEC, crate::common::RW> {
171        crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Smpuctl_SPEC,crate::common::RW>::from_register(self,0)
172    }
173
174    #[doc = "Protection of register"]
175    #[inline(always)]
176    pub fn protect(
177        self,
178    ) -> crate::common::RegisterField<
179        1,
180        0x1,
181        1,
182        0,
183        smpuctl::Protect,
184        smpuctl::Protect,
185        Smpuctl_SPEC,
186        crate::common::RW,
187    > {
188        crate::common::RegisterField::<
189            1,
190            0x1,
191            1,
192            0,
193            smpuctl::Protect,
194            smpuctl::Protect,
195            Smpuctl_SPEC,
196            crate::common::RW,
197        >::from_register(self, 0)
198    }
199
200    #[doc = "Operation after detection"]
201    #[inline(always)]
202    pub fn oad(
203        self,
204    ) -> crate::common::RegisterField<
205        0,
206        0x1,
207        1,
208        0,
209        smpuctl::Oad,
210        smpuctl::Oad,
211        Smpuctl_SPEC,
212        crate::common::RW,
213    > {
214        crate::common::RegisterField::<
215            0,
216            0x1,
217            1,
218            0,
219            smpuctl::Oad,
220            smpuctl::Oad,
221            Smpuctl_SPEC,
222            crate::common::RW,
223        >::from_register(self, 0)
224    }
225}
226impl ::core::default::Default for Smpuctl {
227    #[inline(always)]
228    fn default() -> Smpuctl {
229        <crate::RegValueT<Smpuctl_SPEC> as RegisterValue<_>>::new(0)
230    }
231}
232pub mod smpuctl {
233
234    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
235    pub struct Key_SPEC;
236    pub type Key = crate::EnumBitfieldStruct<u8, Key_SPEC>;
237    impl Key {
238        #[doc = "Writing to the PROTECT and OAD bit is valid, when the KEY bits are written 0xA5."]
239        pub const _0_X_A_5: Self = Self::new(165);
240    }
241    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
242    pub struct Protect_SPEC;
243    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
244    impl Protect {
245        #[doc = "All Bus Slave register writing is possible."]
246        pub const _0: Self = Self::new(0);
247
248        #[doc = "All Bus Slave register writing is protected. Read is possible."]
249        pub const _1: Self = Self::new(1);
250    }
251    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
252    pub struct Oad_SPEC;
253    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
254    impl Oad {
255        #[doc = "Non-maskable interrupt."]
256        pub const _0: Self = Self::new(0);
257
258        #[doc = "Reset"]
259        pub const _1: Self = Self::new(1);
260    }
261}
262#[doc(hidden)]
263#[derive(Copy, Clone, Eq, PartialEq)]
264pub struct Smpumbiu_SPEC;
265impl crate::sealed::RegSpec for Smpumbiu_SPEC {
266    type DataType = u16;
267}
268
269#[doc = "Access Control Register for MBIU"]
270pub type Smpumbiu = crate::RegValueT<Smpumbiu_SPEC>;
271
272impl Smpumbiu {
273    #[doc = "Master Group A Write protection"]
274    #[inline(always)]
275    pub fn wpgrpa(
276        self,
277    ) -> crate::common::RegisterField<
278        3,
279        0x1,
280        1,
281        0,
282        smpumbiu::Wpgrpa,
283        smpumbiu::Wpgrpa,
284        Smpumbiu_SPEC,
285        crate::common::RW,
286    > {
287        crate::common::RegisterField::<
288            3,
289            0x1,
290            1,
291            0,
292            smpumbiu::Wpgrpa,
293            smpumbiu::Wpgrpa,
294            Smpumbiu_SPEC,
295            crate::common::RW,
296        >::from_register(self, 0)
297    }
298
299    #[doc = "Master Group A Read protection"]
300    #[inline(always)]
301    pub fn rpgrpa(
302        self,
303    ) -> crate::common::RegisterField<
304        2,
305        0x1,
306        1,
307        0,
308        smpumbiu::Rpgrpa,
309        smpumbiu::Rpgrpa,
310        Smpumbiu_SPEC,
311        crate::common::RW,
312    > {
313        crate::common::RegisterField::<
314            2,
315            0x1,
316            1,
317            0,
318            smpumbiu::Rpgrpa,
319            smpumbiu::Rpgrpa,
320            Smpumbiu_SPEC,
321            crate::common::RW,
322        >::from_register(self, 0)
323    }
324
325    #[doc = "These bits are read as 00. The write value should be 00."]
326    #[inline(always)]
327    pub fn reserved(
328        self,
329    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Smpumbiu_SPEC, crate::common::RW> {
330        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Smpumbiu_SPEC,crate::common::RW>::from_register(self,0)
331    }
332}
333impl ::core::default::Default for Smpumbiu {
334    #[inline(always)]
335    fn default() -> Smpumbiu {
336        <crate::RegValueT<Smpumbiu_SPEC> as RegisterValue<_>>::new(0)
337    }
338}
339pub mod smpumbiu {
340
341    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
342    pub struct Wpgrpa_SPEC;
343    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
344    impl Wpgrpa {
345        #[doc = "Master group A write of memory protection is disabled."]
346        pub const _0: Self = Self::new(0);
347
348        #[doc = "Master group A write of memory protection is enabled."]
349        pub const _1: Self = Self::new(1);
350    }
351    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
352    pub struct Rpgrpa_SPEC;
353    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
354    impl Rpgrpa {
355        #[doc = "Master group A read of memory protection is disabled."]
356        pub const _0: Self = Self::new(0);
357
358        #[doc = "Master group A read of memory protection is enabled."]
359        pub const _1: Self = Self::new(1);
360    }
361}
362#[doc(hidden)]
363#[derive(Copy, Clone, Eq, PartialEq)]
364pub struct Smpufbiu_SPEC;
365impl crate::sealed::RegSpec for Smpufbiu_SPEC {
366    type DataType = u16;
367}
368
369#[doc = "Access Control Register for FBIU"]
370pub type Smpufbiu = crate::RegValueT<Smpufbiu_SPEC>;
371
372impl Smpufbiu {
373    #[doc = "These bits are read as 000000000000. The write value should be 000000000000."]
374    #[inline(always)]
375    pub fn reserved(
376        self,
377    ) -> crate::common::RegisterField<4, 0xfff, 1, 0, u16, u16, Smpufbiu_SPEC, crate::common::RW>
378    {
379        crate::common::RegisterField::<4,0xfff,1,0,u16,u16,Smpufbiu_SPEC,crate::common::RW>::from_register(self,0)
380    }
381
382    #[doc = "Master Group A Write protection"]
383    #[inline(always)]
384    pub fn wpgrpa(
385        self,
386    ) -> crate::common::RegisterField<
387        3,
388        0x1,
389        1,
390        0,
391        smpufbiu::Wpgrpa,
392        smpufbiu::Wpgrpa,
393        Smpufbiu_SPEC,
394        crate::common::RW,
395    > {
396        crate::common::RegisterField::<
397            3,
398            0x1,
399            1,
400            0,
401            smpufbiu::Wpgrpa,
402            smpufbiu::Wpgrpa,
403            Smpufbiu_SPEC,
404            crate::common::RW,
405        >::from_register(self, 0)
406    }
407
408    #[doc = "Master Group A Read protection"]
409    #[inline(always)]
410    pub fn rpgrpa(
411        self,
412    ) -> crate::common::RegisterField<
413        2,
414        0x1,
415        1,
416        0,
417        smpufbiu::Rpgrpa,
418        smpufbiu::Rpgrpa,
419        Smpufbiu_SPEC,
420        crate::common::RW,
421    > {
422        crate::common::RegisterField::<
423            2,
424            0x1,
425            1,
426            0,
427            smpufbiu::Rpgrpa,
428            smpufbiu::Rpgrpa,
429            Smpufbiu_SPEC,
430            crate::common::RW,
431        >::from_register(self, 0)
432    }
433
434    #[doc = "CPU Write protection"]
435    #[inline(always)]
436    pub fn wpcpu(
437        self,
438    ) -> crate::common::RegisterField<
439        1,
440        0x1,
441        1,
442        0,
443        smpufbiu::Wpcpu,
444        smpufbiu::Wpcpu,
445        Smpufbiu_SPEC,
446        crate::common::RW,
447    > {
448        crate::common::RegisterField::<
449            1,
450            0x1,
451            1,
452            0,
453            smpufbiu::Wpcpu,
454            smpufbiu::Wpcpu,
455            Smpufbiu_SPEC,
456            crate::common::RW,
457        >::from_register(self, 0)
458    }
459
460    #[doc = "CPU Read protection"]
461    #[inline(always)]
462    pub fn rpcpu(
463        self,
464    ) -> crate::common::RegisterField<
465        0,
466        0x1,
467        1,
468        0,
469        smpufbiu::Rpcpu,
470        smpufbiu::Rpcpu,
471        Smpufbiu_SPEC,
472        crate::common::RW,
473    > {
474        crate::common::RegisterField::<
475            0,
476            0x1,
477            1,
478            0,
479            smpufbiu::Rpcpu,
480            smpufbiu::Rpcpu,
481            Smpufbiu_SPEC,
482            crate::common::RW,
483        >::from_register(self, 0)
484    }
485}
486impl ::core::default::Default for Smpufbiu {
487    #[inline(always)]
488    fn default() -> Smpufbiu {
489        <crate::RegValueT<Smpufbiu_SPEC> as RegisterValue<_>>::new(0)
490    }
491}
492pub mod smpufbiu {
493
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct Wpgrpa_SPEC;
496    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
497    impl Wpgrpa {
498        #[doc = "Master group A write of memory protection is disabled."]
499        pub const _0: Self = Self::new(0);
500
501        #[doc = "Master group A write of memory protection is enabled."]
502        pub const _1: Self = Self::new(1);
503    }
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Rpgrpa_SPEC;
506    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
507    impl Rpgrpa {
508        #[doc = "Master group A read of memory protection is disabled."]
509        pub const _0: Self = Self::new(0);
510
511        #[doc = "Master group A read of memory protection is enabled."]
512        pub const _1: Self = Self::new(1);
513    }
514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
515    pub struct Wpcpu_SPEC;
516    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
517    impl Wpcpu {
518        #[doc = "CPU write of memory protection is disabled."]
519        pub const _0: Self = Self::new(0);
520
521        #[doc = "CPU write of memory protection is enabled."]
522        pub const _1: Self = Self::new(1);
523    }
524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
525    pub struct Rpcpu_SPEC;
526    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
527    impl Rpcpu {
528        #[doc = "CPU read of memory protection is disabled."]
529        pub const _0: Self = Self::new(0);
530
531        #[doc = "CPU read of memory protection is enabled."]
532        pub const _1: Self = Self::new(1);
533    }
534}
535#[doc(hidden)]
536#[derive(Copy, Clone, Eq, PartialEq)]
537pub struct Smpusram0_SPEC;
538impl crate::sealed::RegSpec for Smpusram0_SPEC {
539    type DataType = u16;
540}
541
542#[doc = "Access Control Register for SRAM"]
543pub type Smpusram0 = crate::RegValueT<Smpusram0_SPEC>;
544
545impl Smpusram0 {
546    #[doc = "These bits are read as 000000000000. The write value should be 000000000000."]
547    #[inline(always)]
548    pub fn reserved(
549        self,
550    ) -> crate::common::RegisterField<4, 0xfff, 1, 0, u16, u16, Smpusram0_SPEC, crate::common::RW>
551    {
552        crate::common::RegisterField::<4,0xfff,1,0,u16,u16,Smpusram0_SPEC,crate::common::RW>::from_register(self,0)
553    }
554
555    #[doc = "Master Group A Write protection"]
556    #[inline(always)]
557    pub fn wpgrpa(
558        self,
559    ) -> crate::common::RegisterField<
560        3,
561        0x1,
562        1,
563        0,
564        smpusram0::Wpgrpa,
565        smpusram0::Wpgrpa,
566        Smpusram0_SPEC,
567        crate::common::RW,
568    > {
569        crate::common::RegisterField::<
570            3,
571            0x1,
572            1,
573            0,
574            smpusram0::Wpgrpa,
575            smpusram0::Wpgrpa,
576            Smpusram0_SPEC,
577            crate::common::RW,
578        >::from_register(self, 0)
579    }
580
581    #[doc = "Master Group A Read protection"]
582    #[inline(always)]
583    pub fn rpgrpa(
584        self,
585    ) -> crate::common::RegisterField<
586        2,
587        0x1,
588        1,
589        0,
590        smpusram0::Rpgrpa,
591        smpusram0::Rpgrpa,
592        Smpusram0_SPEC,
593        crate::common::RW,
594    > {
595        crate::common::RegisterField::<
596            2,
597            0x1,
598            1,
599            0,
600            smpusram0::Rpgrpa,
601            smpusram0::Rpgrpa,
602            Smpusram0_SPEC,
603            crate::common::RW,
604        >::from_register(self, 0)
605    }
606
607    #[doc = "CPU Write protection"]
608    #[inline(always)]
609    pub fn wpcpu(
610        self,
611    ) -> crate::common::RegisterField<
612        1,
613        0x1,
614        1,
615        0,
616        smpusram0::Wpcpu,
617        smpusram0::Wpcpu,
618        Smpusram0_SPEC,
619        crate::common::RW,
620    > {
621        crate::common::RegisterField::<
622            1,
623            0x1,
624            1,
625            0,
626            smpusram0::Wpcpu,
627            smpusram0::Wpcpu,
628            Smpusram0_SPEC,
629            crate::common::RW,
630        >::from_register(self, 0)
631    }
632
633    #[doc = "CPU Read protection"]
634    #[inline(always)]
635    pub fn rpcpu(
636        self,
637    ) -> crate::common::RegisterField<
638        0,
639        0x1,
640        1,
641        0,
642        smpusram0::Rpcpu,
643        smpusram0::Rpcpu,
644        Smpusram0_SPEC,
645        crate::common::RW,
646    > {
647        crate::common::RegisterField::<
648            0,
649            0x1,
650            1,
651            0,
652            smpusram0::Rpcpu,
653            smpusram0::Rpcpu,
654            Smpusram0_SPEC,
655            crate::common::RW,
656        >::from_register(self, 0)
657    }
658}
659impl ::core::default::Default for Smpusram0 {
660    #[inline(always)]
661    fn default() -> Smpusram0 {
662        <crate::RegValueT<Smpusram0_SPEC> as RegisterValue<_>>::new(0)
663    }
664}
665pub mod smpusram0 {
666
667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
668    pub struct Wpgrpa_SPEC;
669    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
670    impl Wpgrpa {
671        #[doc = "Master group A write of memory protection is disabled."]
672        pub const _0: Self = Self::new(0);
673
674        #[doc = "Master group A write of memory protection is enabled."]
675        pub const _1: Self = Self::new(1);
676    }
677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
678    pub struct Rpgrpa_SPEC;
679    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
680    impl Rpgrpa {
681        #[doc = "Master group A read of memory protection is disabled."]
682        pub const _0: Self = Self::new(0);
683
684        #[doc = "Master group A read of memory protection is enabled."]
685        pub const _1: Self = Self::new(1);
686    }
687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
688    pub struct Wpcpu_SPEC;
689    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
690    impl Wpcpu {
691        #[doc = "CPU write of memory protection is disabled."]
692        pub const _0: Self = Self::new(0);
693
694        #[doc = "CPU write of memory protection is enabled."]
695        pub const _1: Self = Self::new(1);
696    }
697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
698    pub struct Rpcpu_SPEC;
699    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
700    impl Rpcpu {
701        #[doc = "CPU read of memory protection is disabled."]
702        pub const _0: Self = Self::new(0);
703
704        #[doc = "CPU read of memory protection is enabled."]
705        pub const _1: Self = Self::new(1);
706    }
707}
708#[doc(hidden)]
709#[derive(Copy, Clone, Eq, PartialEq)]
710pub struct Smpupbiu_SPEC;
711impl crate::sealed::RegSpec for Smpupbiu_SPEC {
712    type DataType = u16;
713}
714
715#[doc = "Access Control Register for P%sBIU"]
716pub type Smpupbiu = crate::RegValueT<Smpupbiu_SPEC>;
717
718impl Smpupbiu {
719    #[doc = "These bits are read as 000000000000. The write value should be 000000000000."]
720    #[inline(always)]
721    pub fn reserved(
722        self,
723    ) -> crate::common::RegisterField<4, 0xfff, 1, 0, u16, u16, Smpupbiu_SPEC, crate::common::RW>
724    {
725        crate::common::RegisterField::<4,0xfff,1,0,u16,u16,Smpupbiu_SPEC,crate::common::RW>::from_register(self,0)
726    }
727
728    #[doc = "Master Group A Write protection"]
729    #[inline(always)]
730    pub fn wpgrpa(
731        self,
732    ) -> crate::common::RegisterField<
733        3,
734        0x1,
735        1,
736        0,
737        smpupbiu::Wpgrpa,
738        smpupbiu::Wpgrpa,
739        Smpupbiu_SPEC,
740        crate::common::RW,
741    > {
742        crate::common::RegisterField::<
743            3,
744            0x1,
745            1,
746            0,
747            smpupbiu::Wpgrpa,
748            smpupbiu::Wpgrpa,
749            Smpupbiu_SPEC,
750            crate::common::RW,
751        >::from_register(self, 0)
752    }
753
754    #[doc = "Master Group A Read protection"]
755    #[inline(always)]
756    pub fn rpgrpa(
757        self,
758    ) -> crate::common::RegisterField<
759        2,
760        0x1,
761        1,
762        0,
763        smpupbiu::Rpgrpa,
764        smpupbiu::Rpgrpa,
765        Smpupbiu_SPEC,
766        crate::common::RW,
767    > {
768        crate::common::RegisterField::<
769            2,
770            0x1,
771            1,
772            0,
773            smpupbiu::Rpgrpa,
774            smpupbiu::Rpgrpa,
775            Smpupbiu_SPEC,
776            crate::common::RW,
777        >::from_register(self, 0)
778    }
779
780    #[doc = "CPU Write protection"]
781    #[inline(always)]
782    pub fn wpcpu(
783        self,
784    ) -> crate::common::RegisterField<
785        1,
786        0x1,
787        1,
788        0,
789        smpupbiu::Wpcpu,
790        smpupbiu::Wpcpu,
791        Smpupbiu_SPEC,
792        crate::common::RW,
793    > {
794        crate::common::RegisterField::<
795            1,
796            0x1,
797            1,
798            0,
799            smpupbiu::Wpcpu,
800            smpupbiu::Wpcpu,
801            Smpupbiu_SPEC,
802            crate::common::RW,
803        >::from_register(self, 0)
804    }
805
806    #[doc = "CPU Read protection"]
807    #[inline(always)]
808    pub fn rpcpu(
809        self,
810    ) -> crate::common::RegisterField<
811        0,
812        0x1,
813        1,
814        0,
815        smpupbiu::Rpcpu,
816        smpupbiu::Rpcpu,
817        Smpupbiu_SPEC,
818        crate::common::RW,
819    > {
820        crate::common::RegisterField::<
821            0,
822            0x1,
823            1,
824            0,
825            smpupbiu::Rpcpu,
826            smpupbiu::Rpcpu,
827            Smpupbiu_SPEC,
828            crate::common::RW,
829        >::from_register(self, 0)
830    }
831}
832impl ::core::default::Default for Smpupbiu {
833    #[inline(always)]
834    fn default() -> Smpupbiu {
835        <crate::RegValueT<Smpupbiu_SPEC> as RegisterValue<_>>::new(0)
836    }
837}
838pub mod smpupbiu {
839
840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
841    pub struct Wpgrpa_SPEC;
842    pub type Wpgrpa = crate::EnumBitfieldStruct<u8, Wpgrpa_SPEC>;
843    impl Wpgrpa {
844        #[doc = "Master group A write of memory protection is disabled."]
845        pub const _0: Self = Self::new(0);
846
847        #[doc = "Master group A write of memory protection is enabled."]
848        pub const _1: Self = Self::new(1);
849    }
850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
851    pub struct Rpgrpa_SPEC;
852    pub type Rpgrpa = crate::EnumBitfieldStruct<u8, Rpgrpa_SPEC>;
853    impl Rpgrpa {
854        #[doc = "Master group A read of memory protection is disabled."]
855        pub const _0: Self = Self::new(0);
856
857        #[doc = "Master group A read of memory protection is enabled."]
858        pub const _1: Self = Self::new(1);
859    }
860    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
861    pub struct Wpcpu_SPEC;
862    pub type Wpcpu = crate::EnumBitfieldStruct<u8, Wpcpu_SPEC>;
863    impl Wpcpu {
864        #[doc = "CPU write of memory protection is disabled."]
865        pub const _0: Self = Self::new(0);
866
867        #[doc = "CPU write of memory protection is enabled."]
868        pub const _1: Self = Self::new(1);
869    }
870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
871    pub struct Rpcpu_SPEC;
872    pub type Rpcpu = crate::EnumBitfieldStruct<u8, Rpcpu_SPEC>;
873    impl Rpcpu {
874        #[doc = "CPU read of memory protection is disabled."]
875        pub const _0: Self = Self::new(0);
876
877        #[doc = "CPU read of memory protection is enabled."]
878        pub const _1: Self = Self::new(1);
879    }
880}
ra2a1_pac/smpu.rs

ra2a1_pac/
smpu.rs
