1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Master MPU"]
28unsafe impl ::core::marker::Send for super::Mmpu {}
29unsafe impl ::core::marker::Sync for super::Mmpu {}
30impl super::Mmpu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Bus Master MPU Control Register"]
38 #[inline(always)]
39 pub const fn mmpuctla(
40 &self,
41 ) -> &'static crate::common::Reg<self::Mmpuctla_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Mmpuctla_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "Group A Protection of Register"]
50 #[inline(always)]
51 pub const fn mmpupta(
52 &self,
53 ) -> &'static crate::common::Reg<self::Mmpupta_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Mmpupta_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(258usize),
57 )
58 }
59 }
60
61 #[doc = "Group A Region %s Access Control Register"]
62 #[inline(always)]
63 pub const fn mmpuaca(
64 &self,
65 ) -> &'static crate::common::ClusterRegisterArray<
66 crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW>,
67 4,
68 0x10,
69 > {
70 unsafe {
71 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
72 }
73 }
74 #[inline(always)]
75 pub const fn mmpuaca0(
76 &self,
77 ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(0x200usize),
81 )
82 }
83 }
84 #[inline(always)]
85 pub const fn mmpuaca1(
86 &self,
87 ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
88 unsafe {
89 crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
90 self._svd2pac_as_ptr().add(0x210usize),
91 )
92 }
93 }
94 #[inline(always)]
95 pub const fn mmpuaca2(
96 &self,
97 ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
98 unsafe {
99 crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
100 self._svd2pac_as_ptr().add(0x220usize),
101 )
102 }
103 }
104 #[inline(always)]
105 pub const fn mmpuaca3(
106 &self,
107 ) -> &'static crate::common::Reg<self::Mmpuaca_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Mmpuaca_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(0x230usize),
111 )
112 }
113 }
114
115 #[doc = "Group A Region %s Start Address Register"]
116 #[inline(always)]
117 pub const fn mmpusa(
118 &self,
119 ) -> &'static crate::common::ClusterRegisterArray<
120 crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW>,
121 4,
122 0x10,
123 > {
124 unsafe {
125 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
126 }
127 }
128 #[inline(always)]
129 pub const fn mmpusa0(
130 &self,
131 ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
132 unsafe {
133 crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
134 self._svd2pac_as_ptr().add(0x204usize),
135 )
136 }
137 }
138 #[inline(always)]
139 pub const fn mmpusa1(
140 &self,
141 ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
142 unsafe {
143 crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
144 self._svd2pac_as_ptr().add(0x214usize),
145 )
146 }
147 }
148 #[inline(always)]
149 pub const fn mmpusa2(
150 &self,
151 ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
152 unsafe {
153 crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
154 self._svd2pac_as_ptr().add(0x224usize),
155 )
156 }
157 }
158 #[inline(always)]
159 pub const fn mmpusa3(
160 &self,
161 ) -> &'static crate::common::Reg<self::Mmpusa_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::Mmpusa_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(0x234usize),
165 )
166 }
167 }
168
169 #[doc = "Group A Region %s End Address Register"]
170 #[inline(always)]
171 pub const fn mmpuea(
172 &self,
173 ) -> &'static crate::common::ClusterRegisterArray<
174 crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW>,
175 4,
176 0x10,
177 > {
178 unsafe {
179 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
180 }
181 }
182 #[inline(always)]
183 pub const fn mmpuea0(
184 &self,
185 ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(0x208usize),
189 )
190 }
191 }
192 #[inline(always)]
193 pub const fn mmpuea1(
194 &self,
195 ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(0x218usize),
199 )
200 }
201 }
202 #[inline(always)]
203 pub const fn mmpuea2(
204 &self,
205 ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
206 unsafe {
207 crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
208 self._svd2pac_as_ptr().add(0x228usize),
209 )
210 }
211 }
212 #[inline(always)]
213 pub const fn mmpuea3(
214 &self,
215 ) -> &'static crate::common::Reg<self::Mmpuea_SPEC, crate::common::RW> {
216 unsafe {
217 crate::common::Reg::<self::Mmpuea_SPEC, crate::common::RW>::from_ptr(
218 self._svd2pac_as_ptr().add(0x238usize),
219 )
220 }
221 }
222}
223#[doc(hidden)]
224#[derive(Copy, Clone, Eq, PartialEq)]
225pub struct Mmpuctla_SPEC;
226impl crate::sealed::RegSpec for Mmpuctla_SPEC {
227 type DataType = u16;
228}
229
230#[doc = "Bus Master MPU Control Register"]
231pub type Mmpuctla = crate::RegValueT<Mmpuctla_SPEC>;
232
233impl Mmpuctla {
234 #[doc = "Write Keyword The data written to these bits are not stored."]
235 #[inline(always)]
236 pub fn key(
237 self,
238 ) -> crate::common::RegisterField<
239 8,
240 0xff,
241 1,
242 0,
243 mmpuctla::Key,
244 mmpuctla::Key,
245 Mmpuctla_SPEC,
246 crate::common::W,
247 > {
248 crate::common::RegisterField::<
249 8,
250 0xff,
251 1,
252 0,
253 mmpuctla::Key,
254 mmpuctla::Key,
255 Mmpuctla_SPEC,
256 crate::common::W,
257 >::from_register(self, 0)
258 }
259
260 #[doc = "These bits are read as 000000. The write value should be 000000."]
261 #[inline(always)]
262 pub fn reserved(
263 self,
264 ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Mmpuctla_SPEC, crate::common::RW> {
265 crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Mmpuctla_SPEC,crate::common::RW>::from_register(self,0)
266 }
267
268 #[doc = "Operation After Detection"]
269 #[inline(always)]
270 pub fn oad(
271 self,
272 ) -> crate::common::RegisterField<
273 1,
274 0x1,
275 1,
276 0,
277 mmpuctla::Oad,
278 mmpuctla::Oad,
279 Mmpuctla_SPEC,
280 crate::common::RW,
281 > {
282 crate::common::RegisterField::<
283 1,
284 0x1,
285 1,
286 0,
287 mmpuctla::Oad,
288 mmpuctla::Oad,
289 Mmpuctla_SPEC,
290 crate::common::RW,
291 >::from_register(self, 0)
292 }
293
294 #[doc = "Master Group Enable"]
295 #[inline(always)]
296 pub fn enable(
297 self,
298 ) -> crate::common::RegisterField<
299 0,
300 0x1,
301 1,
302 0,
303 mmpuctla::Enable,
304 mmpuctla::Enable,
305 Mmpuctla_SPEC,
306 crate::common::RW,
307 > {
308 crate::common::RegisterField::<
309 0,
310 0x1,
311 1,
312 0,
313 mmpuctla::Enable,
314 mmpuctla::Enable,
315 Mmpuctla_SPEC,
316 crate::common::RW,
317 >::from_register(self, 0)
318 }
319}
320impl ::core::default::Default for Mmpuctla {
321 #[inline(always)]
322 fn default() -> Mmpuctla {
323 <crate::RegValueT<Mmpuctla_SPEC> as RegisterValue<_>>::new(0)
324 }
325}
326pub mod mmpuctla {
327
328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
329 pub struct Key_SPEC;
330 pub type Key = crate::EnumBitfieldStruct<u8, Key_SPEC>;
331 impl Key {
332 #[doc = "Writing to the OAD and ENABLE bit is valid, when the KEY bits are written 0xA5."]
333 pub const _0_X_A_5: Self = Self::new(165);
334 }
335 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
336 pub struct Oad_SPEC;
337 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
338 impl Oad {
339 #[doc = "Non-maskable interrupt."]
340 pub const _0: Self = Self::new(0);
341
342 #[doc = "Internal reset."]
343 pub const _1: Self = Self::new(1);
344 }
345 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
346 pub struct Enable_SPEC;
347 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
348 impl Enable {
349 #[doc = "Master Group A disabled. Permission of all regions."]
350 pub const _0: Self = Self::new(0);
351
352 #[doc = "Master Group A enabled. Protection of all regions."]
353 pub const _1: Self = Self::new(1);
354 }
355}
356#[doc(hidden)]
357#[derive(Copy, Clone, Eq, PartialEq)]
358pub struct Mmpupta_SPEC;
359impl crate::sealed::RegSpec for Mmpupta_SPEC {
360 type DataType = u16;
361}
362
363#[doc = "Group A Protection of Register"]
364pub type Mmpupta = crate::RegValueT<Mmpupta_SPEC>;
365
366impl Mmpupta {
367 #[doc = "Write Keyword The data written to these bits are not stored."]
368 #[inline(always)]
369 pub fn key(
370 self,
371 ) -> crate::common::RegisterField<
372 8,
373 0xff,
374 1,
375 0,
376 mmpupta::Key,
377 mmpupta::Key,
378 Mmpupta_SPEC,
379 crate::common::W,
380 > {
381 crate::common::RegisterField::<
382 8,
383 0xff,
384 1,
385 0,
386 mmpupta::Key,
387 mmpupta::Key,
388 Mmpupta_SPEC,
389 crate::common::W,
390 >::from_register(self, 0)
391 }
392
393 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
394 #[inline(always)]
395 pub fn reserved(
396 self,
397 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Mmpupta_SPEC, crate::common::RW> {
398 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Mmpupta_SPEC,crate::common::RW>::from_register(self,0)
399 }
400
401 #[doc = "Protection of register(MMPUSAn, MMPUEAn, MMPUACAn and MMPUCTLA )"]
402 #[inline(always)]
403 pub fn protect(
404 self,
405 ) -> crate::common::RegisterField<
406 0,
407 0x1,
408 1,
409 0,
410 mmpupta::Protect,
411 mmpupta::Protect,
412 Mmpupta_SPEC,
413 crate::common::RW,
414 > {
415 crate::common::RegisterField::<
416 0,
417 0x1,
418 1,
419 0,
420 mmpupta::Protect,
421 mmpupta::Protect,
422 Mmpupta_SPEC,
423 crate::common::RW,
424 >::from_register(self, 0)
425 }
426}
427impl ::core::default::Default for Mmpupta {
428 #[inline(always)]
429 fn default() -> Mmpupta {
430 <crate::RegValueT<Mmpupta_SPEC> as RegisterValue<_>>::new(0)
431 }
432}
433pub mod mmpupta {
434
435 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
436 pub struct Key_SPEC;
437 pub type Key = crate::EnumBitfieldStruct<u8, Key_SPEC>;
438 impl Key {
439 #[doc = "Writing to the PROTECT bit is valid, when the KEY bits are written 0xA5."]
440 pub const _0_X_A_5: Self = Self::new(165);
441 }
442 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
443 pub struct Protect_SPEC;
444 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
445 impl Protect {
446 #[doc = "All Bus Master MPU Group A register writing is possible."]
447 pub const _0: Self = Self::new(0);
448
449 #[doc = "All Bus Master MPU Group A register writing is protected. Read is possible."]
450 pub const _1: Self = Self::new(1);
451 }
452}
453#[doc(hidden)]
454#[derive(Copy, Clone, Eq, PartialEq)]
455pub struct Mmpuaca_SPEC;
456impl crate::sealed::RegSpec for Mmpuaca_SPEC {
457 type DataType = u16;
458}
459
460#[doc = "Group A Region %s Access Control Register"]
461pub type Mmpuaca = crate::RegValueT<Mmpuaca_SPEC>;
462
463impl Mmpuaca {
464 #[doc = "These bits are read as 0000000000000. The write value should be 0000000000000."]
465 #[inline(always)]
466 pub fn reserved(
467 self,
468 ) -> crate::common::RegisterField<3, 0x1fff, 1, 0, u16, u16, Mmpuaca_SPEC, crate::common::RW>
469 {
470 crate::common::RegisterField::<3,0x1fff,1,0,u16,u16,Mmpuaca_SPEC,crate::common::RW>::from_register(self,0)
471 }
472
473 #[doc = "Write protection"]
474 #[inline(always)]
475 pub fn wp(
476 self,
477 ) -> crate::common::RegisterField<
478 2,
479 0x1,
480 1,
481 0,
482 mmpuaca::Wp,
483 mmpuaca::Wp,
484 Mmpuaca_SPEC,
485 crate::common::RW,
486 > {
487 crate::common::RegisterField::<
488 2,
489 0x1,
490 1,
491 0,
492 mmpuaca::Wp,
493 mmpuaca::Wp,
494 Mmpuaca_SPEC,
495 crate::common::RW,
496 >::from_register(self, 0)
497 }
498
499 #[doc = "Read protection"]
500 #[inline(always)]
501 pub fn rp(
502 self,
503 ) -> crate::common::RegisterField<
504 1,
505 0x1,
506 1,
507 0,
508 mmpuaca::Rp,
509 mmpuaca::Rp,
510 Mmpuaca_SPEC,
511 crate::common::RW,
512 > {
513 crate::common::RegisterField::<
514 1,
515 0x1,
516 1,
517 0,
518 mmpuaca::Rp,
519 mmpuaca::Rp,
520 Mmpuaca_SPEC,
521 crate::common::RW,
522 >::from_register(self, 0)
523 }
524
525 #[doc = "Region enable"]
526 #[inline(always)]
527 pub fn enable(
528 self,
529 ) -> crate::common::RegisterField<
530 0,
531 0x1,
532 1,
533 0,
534 mmpuaca::Enable,
535 mmpuaca::Enable,
536 Mmpuaca_SPEC,
537 crate::common::RW,
538 > {
539 crate::common::RegisterField::<
540 0,
541 0x1,
542 1,
543 0,
544 mmpuaca::Enable,
545 mmpuaca::Enable,
546 Mmpuaca_SPEC,
547 crate::common::RW,
548 >::from_register(self, 0)
549 }
550}
551impl ::core::default::Default for Mmpuaca {
552 #[inline(always)]
553 fn default() -> Mmpuaca {
554 <crate::RegValueT<Mmpuaca_SPEC> as RegisterValue<_>>::new(0)
555 }
556}
557pub mod mmpuaca {
558
559 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
560 pub struct Wp_SPEC;
561 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
562 impl Wp {
563 #[doc = "Write permission"]
564 pub const _0: Self = Self::new(0);
565
566 #[doc = "Write protection"]
567 pub const _1: Self = Self::new(1);
568 }
569 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
570 pub struct Rp_SPEC;
571 pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
572 impl Rp {
573 #[doc = "Read permission"]
574 pub const _0: Self = Self::new(0);
575
576 #[doc = "Read protection"]
577 pub const _1: Self = Self::new(1);
578 }
579 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
580 pub struct Enable_SPEC;
581 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
582 impl Enable {
583 #[doc = "Group m Region n unit is disabled"]
584 pub const _0: Self = Self::new(0);
585
586 #[doc = "Group m Region n unit is enabled"]
587 pub const _1: Self = Self::new(1);
588 }
589}
590#[doc(hidden)]
591#[derive(Copy, Clone, Eq, PartialEq)]
592pub struct Mmpusa_SPEC;
593impl crate::sealed::RegSpec for Mmpusa_SPEC {
594 type DataType = u32;
595}
596
597#[doc = "Group A Region %s Start Address Register"]
598pub type Mmpusa = crate::RegValueT<Mmpusa_SPEC>;
599
600impl Mmpusa {
601 #[doc = "Address where the region starts, for use in region determination.NOTE: The low-order 2 bits are fixed to 0."]
602 #[inline(always)]
603 pub fn mmpusa(
604 self,
605 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpusa_SPEC, crate::common::RW>
606 {
607 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpusa_SPEC,crate::common::RW>::from_register(self,0)
608 }
609
610 #[doc = "These bits are read as 00. The write value should be 00."]
611 #[inline(always)]
612 pub fn reserved(
613 self,
614 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Mmpusa_SPEC, crate::common::RW> {
615 crate::common::RegisterField::<0,0x3,1,0,u8,u8,Mmpusa_SPEC,crate::common::RW>::from_register(self,0)
616 }
617}
618impl ::core::default::Default for Mmpusa {
619 #[inline(always)]
620 fn default() -> Mmpusa {
621 <crate::RegValueT<Mmpusa_SPEC> as RegisterValue<_>>::new(0)
622 }
623}
624
625#[doc(hidden)]
626#[derive(Copy, Clone, Eq, PartialEq)]
627pub struct Mmpuea_SPEC;
628impl crate::sealed::RegSpec for Mmpuea_SPEC {
629 type DataType = u32;
630}
631
632#[doc = "Group A Region %s End Address Register"]
633pub type Mmpuea = crate::RegValueT<Mmpuea_SPEC>;
634
635impl Mmpuea {
636 #[doc = "Region end address registerAddress where the region end, for use in region determination.NOTE: The low-order 2 bits are fixed to 1."]
637 #[inline(always)]
638 pub fn mmpuea(
639 self,
640 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Mmpuea_SPEC, crate::common::RW>
641 {
642 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Mmpuea_SPEC,crate::common::RW>::from_register(self,0)
643 }
644
645 #[doc = "These bits are read as 11. The write value should be 11."]
646 #[inline(always)]
647 pub fn reserved(
648 self,
649 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Mmpuea_SPEC, crate::common::RW> {
650 crate::common::RegisterField::<0,0x3,1,0,u8,u8,Mmpuea_SPEC,crate::common::RW>::from_register(self,0)
651 }
652}
653impl ::core::default::Default for Mmpuea {
654 #[inline(always)]
655 fn default() -> Mmpuea {
656 <crate::RegValueT<Mmpuea_SPEC> as RegisterValue<_>>::new(3)
657 }
658}