1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Event Link Controller"]
28unsafe impl ::core::marker::Send for super::Elc {}
29unsafe impl ::core::marker::Sync for super::Elc {}
30impl super::Elc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Event Link Controller Register"]
38 #[inline(always)]
39 pub const fn elcr(&self) -> &'static crate::common::Reg<self::Elcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Elcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Event Link Software Event Generation Register %s"]
48 #[inline(always)]
49 pub const fn elsegr(
50 &self,
51 ) -> &'static crate::common::ClusterRegisterArray<
52 crate::common::Reg<self::Elsegr_SPEC, crate::common::RW>,
53 2,
54 0x2,
55 > {
56 unsafe {
57 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2usize))
58 }
59 }
60 #[inline(always)]
61 pub const fn elsegr0(
62 &self,
63 ) -> &'static crate::common::Reg<self::Elsegr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Elsegr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(0x2usize),
67 )
68 }
69 }
70 #[inline(always)]
71 pub const fn elsegr1(
72 &self,
73 ) -> &'static crate::common::Reg<self::Elsegr_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::Elsegr_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(0x4usize),
77 )
78 }
79 }
80
81 #[doc = "Event Link Setting Register 12"]
82 #[inline(always)]
83 pub const fn elsr12(
84 &self,
85 ) -> &'static crate::common::Reg<self::Elsr12_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::Elsr12_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(64usize),
89 )
90 }
91 }
92
93 #[doc = "Event Link Setting Register %s"]
94 #[inline(always)]
95 pub const fn elsr(
96 &self,
97 ) -> &'static crate::common::ClusterRegisterArray<
98 crate::common::Reg<self::Elsr_SPEC, crate::common::RW>,
99 3,
100 0x4,
101 > {
102 unsafe {
103 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x58usize))
104 }
105 }
106 #[inline(always)]
107 pub const fn elsr18(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(0x58usize),
111 )
112 }
113 }
114 #[inline(always)]
115 pub const fn elsr19(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
116 unsafe {
117 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
118 self._svd2pac_as_ptr().add(0x5cusize),
119 )
120 }
121 }
122 #[inline(always)]
123 pub const fn elsr20(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(0x60usize),
127 )
128 }
129 }
130
131 #[doc = "Event Link Setting Register 22"]
132 #[inline(always)]
133 pub const fn elsr22(
134 &self,
135 ) -> &'static crate::common::Reg<self::Elsr22_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Elsr22_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(104usize),
139 )
140 }
141 }
142}
143#[doc(hidden)]
144#[derive(Copy, Clone, Eq, PartialEq)]
145pub struct Elcr_SPEC;
146impl crate::sealed::RegSpec for Elcr_SPEC {
147 type DataType = u8;
148}
149
150#[doc = "Event Link Controller Register"]
151pub type Elcr = crate::RegValueT<Elcr_SPEC>;
152
153impl Elcr {
154 #[doc = "All Event Link Enable"]
155 #[inline(always)]
156 pub fn elcon(
157 self,
158 ) -> crate::common::RegisterField<
159 7,
160 0x1,
161 1,
162 0,
163 elcr::Elcon,
164 elcr::Elcon,
165 Elcr_SPEC,
166 crate::common::RW,
167 > {
168 crate::common::RegisterField::<
169 7,
170 0x1,
171 1,
172 0,
173 elcr::Elcon,
174 elcr::Elcon,
175 Elcr_SPEC,
176 crate::common::RW,
177 >::from_register(self, 0)
178 }
179
180 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
181 #[inline(always)]
182 pub fn reserved(
183 self,
184 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Elcr_SPEC, crate::common::RW> {
185 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Elcr_SPEC,crate::common::RW>::from_register(self,0)
186 }
187}
188impl ::core::default::Default for Elcr {
189 #[inline(always)]
190 fn default() -> Elcr {
191 <crate::RegValueT<Elcr_SPEC> as RegisterValue<_>>::new(0)
192 }
193}
194pub mod elcr {
195
196 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
197 pub struct Elcon_SPEC;
198 pub type Elcon = crate::EnumBitfieldStruct<u8, Elcon_SPEC>;
199 impl Elcon {
200 #[doc = "ELC function is disabled."]
201 pub const _0: Self = Self::new(0);
202
203 #[doc = "ELC function is enabled."]
204 pub const _1: Self = Self::new(1);
205 }
206}
207#[doc(hidden)]
208#[derive(Copy, Clone, Eq, PartialEq)]
209pub struct Elsegr_SPEC;
210impl crate::sealed::RegSpec for Elsegr_SPEC {
211 type DataType = u8;
212}
213
214#[doc = "Event Link Software Event Generation Register %s"]
215pub type Elsegr = crate::RegValueT<Elsegr_SPEC>;
216
217impl Elsegr {
218 #[doc = "ELSEGR Register Write Disable"]
219 #[inline(always)]
220 pub fn wi(
221 self,
222 ) -> crate::common::RegisterField<
223 7,
224 0x1,
225 1,
226 0,
227 elsegr::Wi,
228 elsegr::Wi,
229 Elsegr_SPEC,
230 crate::common::W,
231 > {
232 crate::common::RegisterField::<
233 7,
234 0x1,
235 1,
236 0,
237 elsegr::Wi,
238 elsegr::Wi,
239 Elsegr_SPEC,
240 crate::common::W,
241 >::from_register(self, 0)
242 }
243
244 #[doc = "SEG Bit Write Enable"]
245 #[inline(always)]
246 pub fn we(
247 self,
248 ) -> crate::common::RegisterField<
249 6,
250 0x1,
251 1,
252 0,
253 elsegr::We,
254 elsegr::We,
255 Elsegr_SPEC,
256 crate::common::RW,
257 > {
258 crate::common::RegisterField::<
259 6,
260 0x1,
261 1,
262 0,
263 elsegr::We,
264 elsegr::We,
265 Elsegr_SPEC,
266 crate::common::RW,
267 >::from_register(self, 0)
268 }
269
270 #[doc = "These bits are read as 00000. The write value should be 00000."]
271 #[inline(always)]
272 pub fn reserved(
273 self,
274 ) -> crate::common::RegisterField<1, 0x1f, 1, 0, u8, u8, Elsegr_SPEC, crate::common::RW> {
275 crate::common::RegisterField::<1,0x1f,1,0,u8,u8,Elsegr_SPEC,crate::common::RW>::from_register(self,0)
276 }
277
278 #[doc = "Software Event Generation"]
279 #[inline(always)]
280 pub fn seg(
281 self,
282 ) -> crate::common::RegisterField<
283 0,
284 0x1,
285 1,
286 0,
287 elsegr::Seg,
288 elsegr::Seg,
289 Elsegr_SPEC,
290 crate::common::W,
291 > {
292 crate::common::RegisterField::<
293 0,
294 0x1,
295 1,
296 0,
297 elsegr::Seg,
298 elsegr::Seg,
299 Elsegr_SPEC,
300 crate::common::W,
301 >::from_register(self, 0)
302 }
303}
304impl ::core::default::Default for Elsegr {
305 #[inline(always)]
306 fn default() -> Elsegr {
307 <crate::RegValueT<Elsegr_SPEC> as RegisterValue<_>>::new(128)
308 }
309}
310pub mod elsegr {
311
312 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
313 pub struct Wi_SPEC;
314 pub type Wi = crate::EnumBitfieldStruct<u8, Wi_SPEC>;
315 impl Wi {
316 #[doc = "Write to ELSEGR register is enabled."]
317 pub const _0: Self = Self::new(0);
318
319 #[doc = "Write to ELSEGR register is disabled."]
320 pub const _1: Self = Self::new(1);
321 }
322 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
323 pub struct We_SPEC;
324 pub type We = crate::EnumBitfieldStruct<u8, We_SPEC>;
325 impl We {
326 #[doc = "Write to SEG bit is disabled."]
327 pub const _0: Self = Self::new(0);
328
329 #[doc = "Write to SEG bit is enabled."]
330 pub const _1: Self = Self::new(1);
331 }
332 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
333 pub struct Seg_SPEC;
334 pub type Seg = crate::EnumBitfieldStruct<u8, Seg_SPEC>;
335 impl Seg {
336 #[doc = "Normal operation"]
337 pub const _0: Self = Self::new(0);
338
339 #[doc = "Software event is generated."]
340 pub const _1: Self = Self::new(1);
341 }
342}
343#[doc(hidden)]
344#[derive(Copy, Clone, Eq, PartialEq)]
345pub struct Elsr12_SPEC;
346impl crate::sealed::RegSpec for Elsr12_SPEC {
347 type DataType = u16;
348}
349
350#[doc = "Event Link Setting Register 12"]
351pub type Elsr12 = crate::RegValueT<Elsr12_SPEC>;
352
353impl Elsr12 {
354 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
355 #[inline(always)]
356 pub fn reserved(
357 self,
358 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Elsr12_SPEC, crate::common::RW> {
359 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Elsr12_SPEC,crate::common::RW>::from_register(self,0)
360 }
361
362 #[doc = "Event Link Select"]
363 #[inline(always)]
364 pub fn els(
365 self,
366 ) -> crate::common::RegisterField<
367 0,
368 0xff,
369 1,
370 0,
371 elsr12::Els,
372 elsr12::Els,
373 Elsr12_SPEC,
374 crate::common::RW,
375 > {
376 crate::common::RegisterField::<
377 0,
378 0xff,
379 1,
380 0,
381 elsr12::Els,
382 elsr12::Els,
383 Elsr12_SPEC,
384 crate::common::RW,
385 >::from_register(self, 0)
386 }
387}
388impl ::core::default::Default for Elsr12 {
389 #[inline(always)]
390 fn default() -> Elsr12 {
391 <crate::RegValueT<Elsr12_SPEC> as RegisterValue<_>>::new(0)
392 }
393}
394pub mod elsr12 {
395
396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
397 pub struct Els_SPEC;
398 pub type Els = crate::EnumBitfieldStruct<u8, Els_SPEC>;
399 impl Els {
400 #[doc = "Event output to the corresponding peripheral module is disabled."]
401 pub const _0_X_000: Self = Self::new(0);
402 }
403}
404#[doc(hidden)]
405#[derive(Copy, Clone, Eq, PartialEq)]
406pub struct Elsr_SPEC;
407impl crate::sealed::RegSpec for Elsr_SPEC {
408 type DataType = u16;
409}
410
411#[doc = "Event Link Setting Register %s"]
412pub type Elsr = crate::RegValueT<Elsr_SPEC>;
413
414impl Elsr {
415 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
416 #[inline(always)]
417 pub fn reserved(
418 self,
419 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Elsr_SPEC, crate::common::RW> {
420 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Elsr_SPEC,crate::common::RW>::from_register(self,0)
421 }
422
423 #[doc = "Event Link Select"]
424 #[inline(always)]
425 pub fn els(
426 self,
427 ) -> crate::common::RegisterField<
428 0,
429 0xff,
430 1,
431 0,
432 elsr::Els,
433 elsr::Els,
434 Elsr_SPEC,
435 crate::common::RW,
436 > {
437 crate::common::RegisterField::<
438 0,
439 0xff,
440 1,
441 0,
442 elsr::Els,
443 elsr::Els,
444 Elsr_SPEC,
445 crate::common::RW,
446 >::from_register(self, 0)
447 }
448}
449impl ::core::default::Default for Elsr {
450 #[inline(always)]
451 fn default() -> Elsr {
452 <crate::RegValueT<Elsr_SPEC> as RegisterValue<_>>::new(0)
453 }
454}
455pub mod elsr {
456
457 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
458 pub struct Els_SPEC;
459 pub type Els = crate::EnumBitfieldStruct<u8, Els_SPEC>;
460 impl Els {
461 #[doc = "Event output to the corresponding peripheral module is disabled."]
462 pub const _0_X_000: Self = Self::new(0);
463 }
464}
465#[doc(hidden)]
466#[derive(Copy, Clone, Eq, PartialEq)]
467pub struct Elsr22_SPEC;
468impl crate::sealed::RegSpec for Elsr22_SPEC {
469 type DataType = u16;
470}
471
472#[doc = "Event Link Setting Register 22"]
473pub type Elsr22 = crate::RegValueT<Elsr22_SPEC>;
474
475impl Elsr22 {
476 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
477 #[inline(always)]
478 pub fn reserved(
479 self,
480 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Elsr22_SPEC, crate::common::RW> {
481 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Elsr22_SPEC,crate::common::RW>::from_register(self,0)
482 }
483
484 #[doc = "Event Link Select"]
485 #[inline(always)]
486 pub fn els(
487 self,
488 ) -> crate::common::RegisterField<
489 0,
490 0xff,
491 1,
492 0,
493 elsr22::Els,
494 elsr22::Els,
495 Elsr22_SPEC,
496 crate::common::RW,
497 > {
498 crate::common::RegisterField::<
499 0,
500 0xff,
501 1,
502 0,
503 elsr22::Els,
504 elsr22::Els,
505 Elsr22_SPEC,
506 crate::common::RW,
507 >::from_register(self, 0)
508 }
509}
510impl ::core::default::Default for Elsr22 {
511 #[inline(always)]
512 fn default() -> Elsr22 {
513 <crate::RegValueT<Elsr22_SPEC> as RegisterValue<_>>::new(0)
514 }
515}
516pub mod elsr22 {
517
518 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
519 pub struct Els_SPEC;
520 pub type Els = crate::EnumBitfieldStruct<u8, Els_SPEC>;
521 impl Els {
522 #[doc = "Event output to the corresponding peripheral module is disabled."]
523 pub const _0_X_000: Self = Self::new(0);
524 }
525}