ra2a1_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"BUS Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Master Bus Control Register SYS"]
38    #[inline(always)]
39    pub const fn busmcntsys(
40        &self,
41    ) -> &'static crate::common::Reg<self::Busmcntsys_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Busmcntsys_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4104usize),
45            )
46        }
47    }
48
49    #[doc = "Master Bus Control Register DMA"]
50    #[inline(always)]
51    pub const fn busmcntdma(
52        &self,
53    ) -> &'static crate::common::Reg<self::Busmcntdma_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Busmcntdma_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(4108usize),
57            )
58        }
59    }
60
61    #[doc = "Slave Bus Control Register FLI"]
62    #[inline(always)]
63    pub const fn busscntfli(
64        &self,
65    ) -> &'static crate::common::Reg<self::Busscntfli_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Busscntfli_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(4352usize),
69            )
70        }
71    }
72
73    #[doc = "Slave Bus Control Register RAM0"]
74    #[inline(always)]
75    pub const fn busscntram0(
76        &self,
77    ) -> &'static crate::common::Reg<self::Busscntram0_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::Busscntram0_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(4364usize),
81            )
82        }
83    }
84
85    #[doc = "Slave Bus Control Register %s"]
86    #[inline(always)]
87    pub const fn busscnt(
88        &self,
89    ) -> &'static crate::common::ClusterRegisterArray<
90        crate::common::Reg<self::Busscnt_SPEC, crate::common::RW>,
91        2,
92        0x4,
93    > {
94        unsafe {
95            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1114usize))
96        }
97    }
98    #[inline(always)]
99    pub const fn busscntp0b(
100        &self,
101    ) -> &'static crate::common::Reg<self::Busscnt_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Busscnt_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(0x1114usize),
105            )
106        }
107    }
108    #[inline(always)]
109    pub const fn busscntp2b(
110        &self,
111    ) -> &'static crate::common::Reg<self::Busscnt_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Busscnt_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(0x1118usize),
115            )
116        }
117    }
118
119    #[doc = "Slave Bus Control Register P4B"]
120    #[inline(always)]
121    pub const fn busscntp4b(
122        &self,
123    ) -> &'static crate::common::Reg<self::Busscntp4B_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Busscntp4B_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(4384usize),
127            )
128        }
129    }
130
131    #[doc = "Slave Bus Control Register P6B"]
132    #[inline(always)]
133    pub const fn busscntp6b(
134        &self,
135    ) -> &'static crate::common::Reg<self::Busscntp6B_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Busscntp6B_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(4392usize),
139            )
140        }
141    }
142
143    #[doc = "Slave Bus Control Register FBU"]
144    #[inline(always)]
145    pub const fn busscntfbu(
146        &self,
147    ) -> &'static crate::common::Reg<self::Busscntfbu_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Busscntfbu_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(4400usize),
151            )
152        }
153    }
154
155    #[doc = "Bus Error Address Register %s"]
156    #[inline(always)]
157    pub const fn buserradd(
158        &self,
159    ) -> &'static crate::common::ClusterRegisterArray<
160        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
161        2,
162        0x10,
163    > {
164        unsafe {
165            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1820usize))
166        }
167    }
168    #[inline(always)]
169    pub const fn bus3erradd(
170        &self,
171    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
172        unsafe {
173            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
174                self._svd2pac_as_ptr().add(0x1820usize),
175            )
176        }
177    }
178    #[inline(always)]
179    pub const fn bus4erradd(
180        &self,
181    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
182        unsafe {
183            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
184                self._svd2pac_as_ptr().add(0x1830usize),
185            )
186        }
187    }
188
189    #[doc = "Bus Error Status Register %s"]
190    #[inline(always)]
191    pub const fn buserrstat(
192        &self,
193    ) -> &'static crate::common::ClusterRegisterArray<
194        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
195        2,
196        0x10,
197    > {
198        unsafe {
199            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1824usize))
200        }
201    }
202    #[inline(always)]
203    pub const fn bus3errstat(
204        &self,
205    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
206        unsafe {
207            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
208                self._svd2pac_as_ptr().add(0x1824usize),
209            )
210        }
211    }
212    #[inline(always)]
213    pub const fn bus4errstat(
214        &self,
215    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
216        unsafe {
217            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
218                self._svd2pac_as_ptr().add(0x1834usize),
219            )
220        }
221    }
222}
223#[doc(hidden)]
224#[derive(Copy, Clone, Eq, PartialEq)]
225pub struct Busmcntsys_SPEC;
226impl crate::sealed::RegSpec for Busmcntsys_SPEC {
227    type DataType = u16;
228}
229
230#[doc = "Master Bus Control Register SYS"]
231pub type Busmcntsys = crate::RegValueT<Busmcntsys_SPEC>;
232
233impl Busmcntsys {
234    #[doc = "Ignore Error Responses"]
235    #[inline(always)]
236    pub fn ieres(
237        self,
238    ) -> crate::common::RegisterField<
239        15,
240        0x1,
241        1,
242        0,
243        busmcntsys::Ieres,
244        busmcntsys::Ieres,
245        Busmcntsys_SPEC,
246        crate::common::RW,
247    > {
248        crate::common::RegisterField::<
249            15,
250            0x1,
251            1,
252            0,
253            busmcntsys::Ieres,
254            busmcntsys::Ieres,
255            Busmcntsys_SPEC,
256            crate::common::RW,
257        >::from_register(self, 0)
258    }
259
260    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
261    #[inline(always)]
262    pub fn reserved(
263        self,
264    ) -> crate::common::RegisterField<0, 0x7fff, 1, 0, u16, u16, Busmcntsys_SPEC, crate::common::RW>
265    {
266        crate::common::RegisterField::<0,0x7fff,1,0,u16,u16,Busmcntsys_SPEC,crate::common::RW>::from_register(self,0)
267    }
268}
269impl ::core::default::Default for Busmcntsys {
270    #[inline(always)]
271    fn default() -> Busmcntsys {
272        <crate::RegValueT<Busmcntsys_SPEC> as RegisterValue<_>>::new(0)
273    }
274}
275pub mod busmcntsys {
276
277    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
278    pub struct Ieres_SPEC;
279    pub type Ieres = crate::EnumBitfieldStruct<u8, Ieres_SPEC>;
280    impl Ieres {
281        #[doc = "Bus error will be reported."]
282        pub const _0: Self = Self::new(0);
283
284        #[doc = "Bus error will not be reported."]
285        pub const _1: Self = Self::new(1);
286    }
287}
288#[doc(hidden)]
289#[derive(Copy, Clone, Eq, PartialEq)]
290pub struct Busmcntdma_SPEC;
291impl crate::sealed::RegSpec for Busmcntdma_SPEC {
292    type DataType = u16;
293}
294
295#[doc = "Master Bus Control Register DMA"]
296pub type Busmcntdma = crate::RegValueT<Busmcntdma_SPEC>;
297
298impl Busmcntdma {
299    #[doc = "Ignore Error Responses"]
300    #[inline(always)]
301    pub fn ieres(
302        self,
303    ) -> crate::common::RegisterField<
304        15,
305        0x1,
306        1,
307        0,
308        busmcntdma::Ieres,
309        busmcntdma::Ieres,
310        Busmcntdma_SPEC,
311        crate::common::RW,
312    > {
313        crate::common::RegisterField::<
314            15,
315            0x1,
316            1,
317            0,
318            busmcntdma::Ieres,
319            busmcntdma::Ieres,
320            Busmcntdma_SPEC,
321            crate::common::RW,
322        >::from_register(self, 0)
323    }
324
325    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
326    #[inline(always)]
327    pub fn reserved(
328        self,
329    ) -> crate::common::RegisterField<0, 0x7fff, 1, 0, u16, u16, Busmcntdma_SPEC, crate::common::RW>
330    {
331        crate::common::RegisterField::<0,0x7fff,1,0,u16,u16,Busmcntdma_SPEC,crate::common::RW>::from_register(self,0)
332    }
333}
334impl ::core::default::Default for Busmcntdma {
335    #[inline(always)]
336    fn default() -> Busmcntdma {
337        <crate::RegValueT<Busmcntdma_SPEC> as RegisterValue<_>>::new(0)
338    }
339}
340pub mod busmcntdma {
341
342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
343    pub struct Ieres_SPEC;
344    pub type Ieres = crate::EnumBitfieldStruct<u8, Ieres_SPEC>;
345    impl Ieres {
346        #[doc = "Bus error will be reported."]
347        pub const _0: Self = Self::new(0);
348
349        #[doc = "Bus error will not be reported."]
350        pub const _1: Self = Self::new(1);
351    }
352}
353#[doc(hidden)]
354#[derive(Copy, Clone, Eq, PartialEq)]
355pub struct Busscntfli_SPEC;
356impl crate::sealed::RegSpec for Busscntfli_SPEC {
357    type DataType = u16;
358}
359
360#[doc = "Slave Bus Control Register FLI"]
361pub type Busscntfli = crate::RegValueT<Busscntfli_SPEC>;
362
363impl Busscntfli {
364    #[doc = "Arbitration MethodSpecify the priority between groups"]
365    #[inline(always)]
366    pub fn arbmet(
367        self,
368    ) -> crate::common::RegisterField<
369        4,
370        0x3,
371        1,
372        0,
373        busscntfli::Arbmet,
374        busscntfli::Arbmet,
375        Busscntfli_SPEC,
376        crate::common::RW,
377    > {
378        crate::common::RegisterField::<
379            4,
380            0x3,
381            1,
382            0,
383            busscntfli::Arbmet,
384            busscntfli::Arbmet,
385            Busscntfli_SPEC,
386            crate::common::RW,
387        >::from_register(self, 0)
388    }
389
390    #[doc = "These bits are read as 0000. The write value should be 0000."]
391    #[inline(always)]
392    pub fn reserved(
393        self,
394    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscntfli_SPEC, crate::common::RW>
395    {
396        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscntfli_SPEC,crate::common::RW>::from_register(self,0)
397    }
398}
399impl ::core::default::Default for Busscntfli {
400    #[inline(always)]
401    fn default() -> Busscntfli {
402        <crate::RegValueT<Busscntfli_SPEC> as RegisterValue<_>>::new(0)
403    }
404}
405pub mod busscntfli {
406
407    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
408    pub struct Arbmet_SPEC;
409    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
410    impl Arbmet {
411        #[doc = "fixed priority"]
412        pub const _00: Self = Self::new(0);
413
414        #[doc = "round-robin"]
415        pub const _01: Self = Self::new(1);
416    }
417}
418#[doc(hidden)]
419#[derive(Copy, Clone, Eq, PartialEq)]
420pub struct Busscntram0_SPEC;
421impl crate::sealed::RegSpec for Busscntram0_SPEC {
422    type DataType = u16;
423}
424
425#[doc = "Slave Bus Control Register RAM0"]
426pub type Busscntram0 = crate::RegValueT<Busscntram0_SPEC>;
427
428impl Busscntram0 {
429    #[doc = "Arbitration MethodSpecify the priority between groups"]
430    #[inline(always)]
431    pub fn arbmet(
432        self,
433    ) -> crate::common::RegisterField<
434        4,
435        0x3,
436        1,
437        0,
438        busscntram0::Arbmet,
439        busscntram0::Arbmet,
440        Busscntram0_SPEC,
441        crate::common::RW,
442    > {
443        crate::common::RegisterField::<
444            4,
445            0x3,
446            1,
447            0,
448            busscntram0::Arbmet,
449            busscntram0::Arbmet,
450            Busscntram0_SPEC,
451            crate::common::RW,
452        >::from_register(self, 0)
453    }
454
455    #[doc = "These bits are read as 0000. The write value should be 0000."]
456    #[inline(always)]
457    pub fn reserved(
458        self,
459    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscntram0_SPEC, crate::common::RW>
460    {
461        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscntram0_SPEC,crate::common::RW>::from_register(self,0)
462    }
463}
464impl ::core::default::Default for Busscntram0 {
465    #[inline(always)]
466    fn default() -> Busscntram0 {
467        <crate::RegValueT<Busscntram0_SPEC> as RegisterValue<_>>::new(0)
468    }
469}
470pub mod busscntram0 {
471
472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
473    pub struct Arbmet_SPEC;
474    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
475    impl Arbmet {
476        #[doc = "fixed priority"]
477        pub const _00: Self = Self::new(0);
478
479        #[doc = "round-robin"]
480        pub const _01: Self = Self::new(1);
481    }
482}
483#[doc(hidden)]
484#[derive(Copy, Clone, Eq, PartialEq)]
485pub struct Busscnt_SPEC;
486impl crate::sealed::RegSpec for Busscnt_SPEC {
487    type DataType = u16;
488}
489
490#[doc = "Slave Bus Control Register %s"]
491pub type Busscnt = crate::RegValueT<Busscnt_SPEC>;
492
493impl Busscnt {
494    #[doc = "Arbitration MethodSpecify the priority between groups"]
495    #[inline(always)]
496    pub fn arbmet(
497        self,
498    ) -> crate::common::RegisterField<
499        4,
500        0x3,
501        1,
502        0,
503        busscnt::Arbmet,
504        busscnt::Arbmet,
505        Busscnt_SPEC,
506        crate::common::RW,
507    > {
508        crate::common::RegisterField::<
509            4,
510            0x3,
511            1,
512            0,
513            busscnt::Arbmet,
514            busscnt::Arbmet,
515            Busscnt_SPEC,
516            crate::common::RW,
517        >::from_register(self, 0)
518    }
519
520    #[doc = "These bits are read as 0000. The write value should be 0000."]
521    #[inline(always)]
522    pub fn reserved(
523        self,
524    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscnt_SPEC, crate::common::RW> {
525        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscnt_SPEC,crate::common::RW>::from_register(self,0)
526    }
527}
528impl ::core::default::Default for Busscnt {
529    #[inline(always)]
530    fn default() -> Busscnt {
531        <crate::RegValueT<Busscnt_SPEC> as RegisterValue<_>>::new(0)
532    }
533}
534pub mod busscnt {
535
536    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
537    pub struct Arbmet_SPEC;
538    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
539    impl Arbmet {
540        #[doc = "fixed priority"]
541        pub const _00: Self = Self::new(0);
542
543        #[doc = "round-robin"]
544        pub const _01: Self = Self::new(1);
545    }
546}
547#[doc(hidden)]
548#[derive(Copy, Clone, Eq, PartialEq)]
549pub struct Busscntp4B_SPEC;
550impl crate::sealed::RegSpec for Busscntp4B_SPEC {
551    type DataType = u16;
552}
553
554#[doc = "Slave Bus Control Register P4B"]
555pub type Busscntp4B = crate::RegValueT<Busscntp4B_SPEC>;
556
557impl Busscntp4B {
558    #[doc = "Arbitration MethodSpecify the priority between groups"]
559    #[inline(always)]
560    pub fn arbmet(
561        self,
562    ) -> crate::common::RegisterField<
563        4,
564        0x3,
565        1,
566        0,
567        busscntp4b::Arbmet,
568        busscntp4b::Arbmet,
569        Busscntp4B_SPEC,
570        crate::common::RW,
571    > {
572        crate::common::RegisterField::<
573            4,
574            0x3,
575            1,
576            0,
577            busscntp4b::Arbmet,
578            busscntp4b::Arbmet,
579            Busscntp4B_SPEC,
580            crate::common::RW,
581        >::from_register(self, 0)
582    }
583
584    #[doc = "These bits are read as 0000. The write value should be 0000."]
585    #[inline(always)]
586    pub fn reserved(
587        self,
588    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscntp4B_SPEC, crate::common::RW>
589    {
590        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscntp4B_SPEC,crate::common::RW>::from_register(self,0)
591    }
592}
593impl ::core::default::Default for Busscntp4B {
594    #[inline(always)]
595    fn default() -> Busscntp4B {
596        <crate::RegValueT<Busscntp4B_SPEC> as RegisterValue<_>>::new(0)
597    }
598}
599pub mod busscntp4b {
600
601    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
602    pub struct Arbmet_SPEC;
603    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
604    impl Arbmet {
605        #[doc = "fixed priority"]
606        pub const _00: Self = Self::new(0);
607
608        #[doc = "round-robin"]
609        pub const _01: Self = Self::new(1);
610    }
611}
612#[doc(hidden)]
613#[derive(Copy, Clone, Eq, PartialEq)]
614pub struct Busscntp6B_SPEC;
615impl crate::sealed::RegSpec for Busscntp6B_SPEC {
616    type DataType = u16;
617}
618
619#[doc = "Slave Bus Control Register P6B"]
620pub type Busscntp6B = crate::RegValueT<Busscntp6B_SPEC>;
621
622impl Busscntp6B {
623    #[doc = "Arbitration MethodSpecify the priority between groups"]
624    #[inline(always)]
625    pub fn arbmet(
626        self,
627    ) -> crate::common::RegisterField<
628        4,
629        0x3,
630        1,
631        0,
632        busscntp6b::Arbmet,
633        busscntp6b::Arbmet,
634        Busscntp6B_SPEC,
635        crate::common::RW,
636    > {
637        crate::common::RegisterField::<
638            4,
639            0x3,
640            1,
641            0,
642            busscntp6b::Arbmet,
643            busscntp6b::Arbmet,
644            Busscntp6B_SPEC,
645            crate::common::RW,
646        >::from_register(self, 0)
647    }
648
649    #[doc = "These bits are read as 0000. The write value should be 0000."]
650    #[inline(always)]
651    pub fn reserved(
652        self,
653    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscntp6B_SPEC, crate::common::RW>
654    {
655        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscntp6B_SPEC,crate::common::RW>::from_register(self,0)
656    }
657}
658impl ::core::default::Default for Busscntp6B {
659    #[inline(always)]
660    fn default() -> Busscntp6B {
661        <crate::RegValueT<Busscntp6B_SPEC> as RegisterValue<_>>::new(0)
662    }
663}
664pub mod busscntp6b {
665
666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
667    pub struct Arbmet_SPEC;
668    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
669    impl Arbmet {
670        #[doc = "fixed priority"]
671        pub const _00: Self = Self::new(0);
672
673        #[doc = "round-robin"]
674        pub const _01: Self = Self::new(1);
675    }
676}
677#[doc(hidden)]
678#[derive(Copy, Clone, Eq, PartialEq)]
679pub struct Busscntfbu_SPEC;
680impl crate::sealed::RegSpec for Busscntfbu_SPEC {
681    type DataType = u16;
682}
683
684#[doc = "Slave Bus Control Register FBU"]
685pub type Busscntfbu = crate::RegValueT<Busscntfbu_SPEC>;
686
687impl Busscntfbu {
688    #[doc = "Arbitration MethodSpecify the priority between groups"]
689    #[inline(always)]
690    pub fn arbmet(
691        self,
692    ) -> crate::common::RegisterField<
693        4,
694        0x3,
695        1,
696        0,
697        busscntfbu::Arbmet,
698        busscntfbu::Arbmet,
699        Busscntfbu_SPEC,
700        crate::common::RW,
701    > {
702        crate::common::RegisterField::<
703            4,
704            0x3,
705            1,
706            0,
707            busscntfbu::Arbmet,
708            busscntfbu::Arbmet,
709            Busscntfbu_SPEC,
710            crate::common::RW,
711        >::from_register(self, 0)
712    }
713
714    #[doc = "These bits are read as 0000. The write value should be 0000."]
715    #[inline(always)]
716    pub fn reserved(
717        self,
718    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Busscntfbu_SPEC, crate::common::RW>
719    {
720        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Busscntfbu_SPEC,crate::common::RW>::from_register(self,0)
721    }
722}
723impl ::core::default::Default for Busscntfbu {
724    #[inline(always)]
725    fn default() -> Busscntfbu {
726        <crate::RegValueT<Busscntfbu_SPEC> as RegisterValue<_>>::new(0)
727    }
728}
729pub mod busscntfbu {
730
731    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
732    pub struct Arbmet_SPEC;
733    pub type Arbmet = crate::EnumBitfieldStruct<u8, Arbmet_SPEC>;
734    impl Arbmet {
735        #[doc = "fixed priority"]
736        pub const _00: Self = Self::new(0);
737
738        #[doc = "round-robin"]
739        pub const _01: Self = Self::new(1);
740    }
741}
742#[doc(hidden)]
743#[derive(Copy, Clone, Eq, PartialEq)]
744pub struct Buserradd_SPEC;
745impl crate::sealed::RegSpec for Buserradd_SPEC {
746    type DataType = u32;
747}
748
749#[doc = "Bus Error Address Register %s"]
750pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
751
752impl Buserradd {
753    #[doc = "Bus Error AddressWhen a bus error occurs, It stores an error address."]
754    #[inline(always)]
755    pub fn berad(
756        self,
757    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
758    {
759        crate::common::RegisterField::<
760            0,
761            0xffffffff,
762            1,
763            0,
764            u32,
765            u32,
766            Buserradd_SPEC,
767            crate::common::R,
768        >::from_register(self, 0)
769    }
770}
771impl ::core::default::Default for Buserradd {
772    #[inline(always)]
773    fn default() -> Buserradd {
774        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
775    }
776}
777
778#[doc(hidden)]
779#[derive(Copy, Clone, Eq, PartialEq)]
780pub struct Buserrstat_SPEC;
781impl crate::sealed::RegSpec for Buserrstat_SPEC {
782    type DataType = u8;
783}
784
785#[doc = "Bus Error Status Register %s"]
786pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
787
788impl Buserrstat {
789    #[doc = "Bus Error StatusWhen bus error assert, error flag occurs."]
790    #[inline(always)]
791    pub fn errstat(
792        self,
793    ) -> crate::common::RegisterField<
794        7,
795        0x1,
796        1,
797        0,
798        buserrstat::Errstat,
799        buserrstat::Errstat,
800        Buserrstat_SPEC,
801        crate::common::R,
802    > {
803        crate::common::RegisterField::<
804            7,
805            0x1,
806            1,
807            0,
808            buserrstat::Errstat,
809            buserrstat::Errstat,
810            Buserrstat_SPEC,
811            crate::common::R,
812        >::from_register(self, 0)
813    }
814
815    #[doc = "These bits are read as 000000."]
816    #[inline(always)]
817    pub fn reserved(
818        self,
819    ) -> crate::common::RegisterField<1, 0x3f, 1, 0, u8, u8, Buserrstat_SPEC, crate::common::R>
820    {
821        crate::common::RegisterField::<1,0x3f,1,0,u8,u8,Buserrstat_SPEC,crate::common::R>::from_register(self,0)
822    }
823
824    #[doc = "Error access statusThe status at the time of the error"]
825    #[inline(always)]
826    pub fn accstat(
827        self,
828    ) -> crate::common::RegisterField<
829        0,
830        0x1,
831        1,
832        0,
833        buserrstat::Accstat,
834        buserrstat::Accstat,
835        Buserrstat_SPEC,
836        crate::common::R,
837    > {
838        crate::common::RegisterField::<
839            0,
840            0x1,
841            1,
842            0,
843            buserrstat::Accstat,
844            buserrstat::Accstat,
845            Buserrstat_SPEC,
846            crate::common::R,
847        >::from_register(self, 0)
848    }
849}
850impl ::core::default::Default for Buserrstat {
851    #[inline(always)]
852    fn default() -> Buserrstat {
853        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
854    }
855}
856pub mod buserrstat {
857
858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
859    pub struct Errstat_SPEC;
860    pub type Errstat = crate::EnumBitfieldStruct<u8, Errstat_SPEC>;
861    impl Errstat {
862        #[doc = "No bus error occurred"]
863        pub const _0: Self = Self::new(0);
864
865        #[doc = "Bus error occurred"]
866        pub const _1: Self = Self::new(1);
867    }
868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
869    pub struct Accstat_SPEC;
870    pub type Accstat = crate::EnumBitfieldStruct<u8, Accstat_SPEC>;
871    impl Accstat {
872        #[doc = "Read access"]
873        pub const _0: Self = Self::new(0);
874
875        #[doc = "Write Access"]
876        pub const _1: Self = Self::new(1);
877    }
878}
ra2a1_pac/bus.rs

ra2a1_pac/
bus.rs
