ra2a1_pac/
poeg.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.1, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:31 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Port Output Enable Module for GPT"]
28unsafe impl ::core::marker::Send for super::Poeg {}
29unsafe impl ::core::marker::Sync for super::Poeg {}
30impl super::Poeg {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "POEG Group %s Setting Register"]
38    #[inline(always)]
39    pub const fn poegg(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::Poegg_SPEC, crate::common::RW>,
43        2,
44        0x100,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn poegga(&self) -> &'static crate::common::Reg<self::Poegg_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Poegg_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(0x0usize),
55            )
56        }
57    }
58    #[inline(always)]
59    pub const fn poeggb(&self) -> &'static crate::common::Reg<self::Poegg_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Poegg_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(0x100usize),
63            )
64        }
65    }
66}
67#[doc(hidden)]
68#[derive(Copy, Clone, Eq, PartialEq)]
69pub struct Poegg_SPEC;
70impl crate::sealed::RegSpec for Poegg_SPEC {
71    type DataType = u32;
72}
73
74#[doc = "POEG Group %s Setting Register"]
75pub type Poegg = crate::RegValueT<Poegg_SPEC>;
76
77impl Poegg {
78    #[doc = "Noise Filter Clock Select"]
79    #[inline(always)]
80    pub fn nfcs(
81        self,
82    ) -> crate::common::RegisterField<
83        30,
84        0x3,
85        1,
86        0,
87        poegg::Nfcs,
88        poegg::Nfcs,
89        Poegg_SPEC,
90        crate::common::RW,
91    > {
92        crate::common::RegisterField::<
93            30,
94            0x3,
95            1,
96            0,
97            poegg::Nfcs,
98            poegg::Nfcs,
99            Poegg_SPEC,
100            crate::common::RW,
101        >::from_register(self, 0)
102    }
103
104    #[doc = "Noise Filter Enable"]
105    #[inline(always)]
106    pub fn nfen(
107        self,
108    ) -> crate::common::RegisterField<
109        29,
110        0x1,
111        1,
112        0,
113        poegg::Nfen,
114        poegg::Nfen,
115        Poegg_SPEC,
116        crate::common::RW,
117    > {
118        crate::common::RegisterField::<
119            29,
120            0x1,
121            1,
122            0,
123            poegg::Nfen,
124            poegg::Nfen,
125            Poegg_SPEC,
126            crate::common::RW,
127        >::from_register(self, 0)
128    }
129
130    #[doc = "GTETRG Input Reverse"]
131    #[inline(always)]
132    pub fn inv(
133        self,
134    ) -> crate::common::RegisterField<
135        28,
136        0x1,
137        1,
138        0,
139        poegg::Inv,
140        poegg::Inv,
141        Poegg_SPEC,
142        crate::common::RW,
143    > {
144        crate::common::RegisterField::<
145            28,
146            0x1,
147            1,
148            0,
149            poegg::Inv,
150            poegg::Inv,
151            Poegg_SPEC,
152            crate::common::RW,
153        >::from_register(self, 0)
154    }
155
156    #[doc = "GTETRG Input Status Flag"]
157    #[inline(always)]
158    pub fn st(
159        self,
160    ) -> crate::common::RegisterField<
161        16,
162        0x1,
163        1,
164        0,
165        poegg::St,
166        poegg::St,
167        Poegg_SPEC,
168        crate::common::R,
169    > {
170        crate::common::RegisterField::<
171            16,
172            0x1,
173            1,
174            0,
175            poegg::St,
176            poegg::St,
177            Poegg_SPEC,
178            crate::common::R,
179        >::from_register(self, 0)
180    }
181
182    #[doc = "ACMP_LP1 EnableNote: Can be modified only once after a reset."]
183    #[inline(always)]
184    pub fn cdre5(
185        self,
186    ) -> crate::common::RegisterField<
187        13,
188        0x1,
189        1,
190        0,
191        poegg::Cdre5,
192        poegg::Cdre5,
193        Poegg_SPEC,
194        crate::common::RW,
195    > {
196        crate::common::RegisterField::<
197            13,
198            0x1,
199            1,
200            0,
201            poegg::Cdre5,
202            poegg::Cdre5,
203            Poegg_SPEC,
204            crate::common::RW,
205        >::from_register(self, 0)
206    }
207
208    #[doc = "ACMP_LP0 EnableNote: Can be modified only once after a reset."]
209    #[inline(always)]
210    pub fn cdre4(
211        self,
212    ) -> crate::common::RegisterField<
213        12,
214        0x1,
215        1,
216        0,
217        poegg::Cdre4,
218        poegg::Cdre4,
219        Poegg_SPEC,
220        crate::common::RW,
221    > {
222        crate::common::RegisterField::<
223            12,
224            0x1,
225            1,
226            0,
227            poegg::Cdre4,
228            poegg::Cdre4,
229            Poegg_SPEC,
230            crate::common::RW,
231        >::from_register(self, 0)
232    }
233
234    #[doc = "These bits are read as 000. The write value should be 000."]
235    #[inline(always)]
236    pub fn reserved(
237        self,
238    ) -> crate::common::RegisterField<9, 0x7, 1, 0, u8, u8, Poegg_SPEC, crate::common::RW> {
239        crate::common::RegisterField::<9,0x7,1,0,u8,u8,Poegg_SPEC,crate::common::RW>::from_register(self,0)
240    }
241
242    #[doc = "ACMP_HS0 EnableNote: Can be modified only once after a reset."]
243    #[inline(always)]
244    pub fn cdre0(
245        self,
246    ) -> crate::common::RegisterField<
247        8,
248        0x1,
249        1,
250        0,
251        poegg::Cdre0,
252        poegg::Cdre0,
253        Poegg_SPEC,
254        crate::common::RW,
255    > {
256        crate::common::RegisterField::<
257            8,
258            0x1,
259            1,
260            0,
261            poegg::Cdre0,
262            poegg::Cdre0,
263            Poegg_SPEC,
264            crate::common::RW,
265        >::from_register(self, 0)
266    }
267
268    #[doc = "Oscillation Stop Detection EnableNote: Can be modified only once after a reset."]
269    #[inline(always)]
270    pub fn ostpe(
271        self,
272    ) -> crate::common::RegisterField<
273        6,
274        0x1,
275        1,
276        0,
277        poegg::Ostpe,
278        poegg::Ostpe,
279        Poegg_SPEC,
280        crate::common::RW,
281    > {
282        crate::common::RegisterField::<
283            6,
284            0x1,
285            1,
286            0,
287            poegg::Ostpe,
288            poegg::Ostpe,
289            Poegg_SPEC,
290            crate::common::RW,
291        >::from_register(self, 0)
292    }
293
294    #[doc = "Real Time Overcurrent EnableNote: Can be modified only once after a reset."]
295    #[inline(always)]
296    pub fn ioce(
297        self,
298    ) -> crate::common::RegisterField<
299        5,
300        0x1,
301        1,
302        0,
303        poegg::Ioce,
304        poegg::Ioce,
305        Poegg_SPEC,
306        crate::common::RW,
307    > {
308        crate::common::RegisterField::<
309            5,
310            0x1,
311            1,
312            0,
313            poegg::Ioce,
314            poegg::Ioce,
315            Poegg_SPEC,
316            crate::common::RW,
317        >::from_register(self, 0)
318    }
319
320    #[doc = "Port Input Detection EnableNote: Can be modified only once after a reset."]
321    #[inline(always)]
322    pub fn pide(
323        self,
324    ) -> crate::common::RegisterField<
325        4,
326        0x1,
327        1,
328        0,
329        poegg::Pide,
330        poegg::Pide,
331        Poegg_SPEC,
332        crate::common::RW,
333    > {
334        crate::common::RegisterField::<
335            4,
336            0x1,
337            1,
338            0,
339            poegg::Pide,
340            poegg::Pide,
341            Poegg_SPEC,
342            crate::common::RW,
343        >::from_register(self, 0)
344    }
345
346    #[doc = "Software Stop Flag"]
347    #[inline(always)]
348    pub fn ssf(
349        self,
350    ) -> crate::common::RegisterField<
351        3,
352        0x1,
353        1,
354        0,
355        poegg::Ssf,
356        poegg::Ssf,
357        Poegg_SPEC,
358        crate::common::RW,
359    > {
360        crate::common::RegisterField::<
361            3,
362            0x1,
363            1,
364            0,
365            poegg::Ssf,
366            poegg::Ssf,
367            Poegg_SPEC,
368            crate::common::RW,
369        >::from_register(self, 0)
370    }
371
372    #[doc = "Oscillation Stop Detection Flag"]
373    #[inline(always)]
374    pub fn ostpf(
375        self,
376    ) -> crate::common::RegisterField<
377        2,
378        0x1,
379        1,
380        0,
381        poegg::Ostpf,
382        poegg::Ostpf,
383        Poegg_SPEC,
384        crate::common::RW,
385    > {
386        crate::common::RegisterField::<
387            2,
388            0x1,
389            1,
390            0,
391            poegg::Ostpf,
392            poegg::Ostpf,
393            Poegg_SPEC,
394            crate::common::RW,
395        >::from_register(self, 0)
396    }
397
398    #[doc = "Real Time Overcurrent Detection Flag"]
399    #[inline(always)]
400    pub fn iocf(
401        self,
402    ) -> crate::common::RegisterField<
403        1,
404        0x1,
405        1,
406        0,
407        poegg::Iocf,
408        poegg::Iocf,
409        Poegg_SPEC,
410        crate::common::RW,
411    > {
412        crate::common::RegisterField::<
413            1,
414            0x1,
415            1,
416            0,
417            poegg::Iocf,
418            poegg::Iocf,
419            Poegg_SPEC,
420            crate::common::RW,
421        >::from_register(self, 0)
422    }
423
424    #[doc = "Port Input Detection Flag"]
425    #[inline(always)]
426    pub fn pidf(
427        self,
428    ) -> crate::common::RegisterField<
429        0,
430        0x1,
431        1,
432        0,
433        poegg::Pidf,
434        poegg::Pidf,
435        Poegg_SPEC,
436        crate::common::RW,
437    > {
438        crate::common::RegisterField::<
439            0,
440            0x1,
441            1,
442            0,
443            poegg::Pidf,
444            poegg::Pidf,
445            Poegg_SPEC,
446            crate::common::RW,
447        >::from_register(self, 0)
448    }
449}
450impl ::core::default::Default for Poegg {
451    #[inline(always)]
452    fn default() -> Poegg {
453        <crate::RegValueT<Poegg_SPEC> as RegisterValue<_>>::new(0)
454    }
455}
456pub mod poegg {
457
458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459    pub struct Nfcs_SPEC;
460    pub type Nfcs = crate::EnumBitfieldStruct<u8, Nfcs_SPEC>;
461    impl Nfcs {
462        #[doc = "Sampling GTETRG pin input level for three times in every PCLKB."]
463        pub const _00: Self = Self::new(0);
464
465        #[doc = "Sampling GTETRG pin input level for three times in every PCLKB /8."]
466        pub const _01: Self = Self::new(1);
467
468        #[doc = "Sampling GTETRG pin input level for three times in every PCLKB /32."]
469        pub const _10: Self = Self::new(2);
470
471        #[doc = "Sampling GTETRG pin input level for three times in every PCLKB /128."]
472        pub const _11: Self = Self::new(3);
473    }
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Nfen_SPEC;
476    pub type Nfen = crate::EnumBitfieldStruct<u8, Nfen_SPEC>;
477    impl Nfen {
478        #[doc = "Filtering noise disabled"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "Filtering noise enabled"]
482        pub const _1: Self = Self::new(1);
483    }
484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
485    pub struct Inv_SPEC;
486    pub type Inv = crate::EnumBitfieldStruct<u8, Inv_SPEC>;
487    impl Inv {
488        #[doc = "GTETRG Input"]
489        pub const _0: Self = Self::new(0);
490
491        #[doc = "GTETRG Input Reversed."]
492        pub const _1: Self = Self::new(1);
493    }
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct St_SPEC;
496    pub type St = crate::EnumBitfieldStruct<u8, St_SPEC>;
497    impl St {
498        #[doc = "GTETRG input after filtering is 0."]
499        pub const _0: Self = Self::new(0);
500
501        #[doc = "GTETRG input after filtering is 1."]
502        pub const _1: Self = Self::new(1);
503    }
504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
505    pub struct Cdre5_SPEC;
506    pub type Cdre5 = crate::EnumBitfieldStruct<u8, Cdre5_SPEC>;
507    impl Cdre5 {
508        #[doc = "Disable output-disable request from ACMPLP1."]
509        pub const _0: Self = Self::new(0);
510
511        #[doc = "Enable output-disable request from ACMPLP1."]
512        pub const _1: Self = Self::new(1);
513    }
514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
515    pub struct Cdre4_SPEC;
516    pub type Cdre4 = crate::EnumBitfieldStruct<u8, Cdre4_SPEC>;
517    impl Cdre4 {
518        #[doc = "Disable output-disable request from ACMPLP0."]
519        pub const _0: Self = Self::new(0);
520
521        #[doc = "Enable output-disable request from ACMPLP0."]
522        pub const _1: Self = Self::new(1);
523    }
524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
525    pub struct Cdre0_SPEC;
526    pub type Cdre0 = crate::EnumBitfieldStruct<u8, Cdre0_SPEC>;
527    impl Cdre0 {
528        #[doc = "Disable output-disable request from ACMPHS0."]
529        pub const _0: Self = Self::new(0);
530
531        #[doc = "Enable output-disable request from ACMPHS0."]
532        pub const _1: Self = Self::new(1);
533    }
534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
535    pub struct Ostpe_SPEC;
536    pub type Ostpe = crate::EnumBitfieldStruct<u8, Ostpe_SPEC>;
537    impl Ostpe {
538        #[doc = "A output-disable request from the oscillation stop detection disabled."]
539        pub const _0: Self = Self::new(0);
540
541        #[doc = "A output-disable request from the oscillation stop detection enabled."]
542        pub const _1: Self = Self::new(1);
543    }
544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
545    pub struct Ioce_SPEC;
546    pub type Ioce = crate::EnumBitfieldStruct<u8, Ioce_SPEC>;
547    impl Ioce {
548        #[doc = "A output-disable request from GPT disable request or comparator interrupt disabled."]
549        pub const _0: Self = Self::new(0);
550
551        #[doc = "A output-disable request from GPT disable request or comparator interrupt enabled."]
552        pub const _1: Self = Self::new(1);
553    }
554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
555    pub struct Pide_SPEC;
556    pub type Pide = crate::EnumBitfieldStruct<u8, Pide_SPEC>;
557    impl Pide {
558        #[doc = "A output-disable request from the GTETRG pins disabled."]
559        pub const _0: Self = Self::new(0);
560
561        #[doc = "A output-disable request from the GTETRG pins enabled."]
562        pub const _1: Self = Self::new(1);
563    }
564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
565    pub struct Ssf_SPEC;
566    pub type Ssf = crate::EnumBitfieldStruct<u8, Ssf_SPEC>;
567    impl Ssf {
568        #[doc = "A output-disable request from software has not been generated."]
569        pub const _0: Self = Self::new(0);
570
571        #[doc = "A output-disable request from software has been generated."]
572        pub const _1: Self = Self::new(1);
573    }
574    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
575    pub struct Ostpf_SPEC;
576    pub type Ostpf = crate::EnumBitfieldStruct<u8, Ostpf_SPEC>;
577    impl Ostpf {
578        #[doc = "A output-disable request from the oscillation stop detection has not been generated."]
579        pub const _0: Self = Self::new(0);
580
581        #[doc = "A output-disable request from the oscillation stop detection has been generated."]
582        pub const _1: Self = Self::new(1);
583    }
584    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
585    pub struct Iocf_SPEC;
586    pub type Iocf = crate::EnumBitfieldStruct<u8, Iocf_SPEC>;
587    impl Iocf {
588        #[doc = "No output-disable request from the GPT, the ACMPHS or the ACMPLP occurred."]
589        pub const _0: Self = Self::new(0);
590
591        #[doc = "Output-disable request from the GPT, the ACMPHS or the ACMPLP occurred."]
592        pub const _1: Self = Self::new(1);
593    }
594    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
595    pub struct Pidf_SPEC;
596    pub type Pidf = crate::EnumBitfieldStruct<u8, Pidf_SPEC>;
597    impl Pidf {
598        #[doc = "A output-disable request from the GTETRG pin has not been generated."]
599        pub const _0: Self = Self::new(0);
600
601        #[doc = "A output-disable request from the GTETRG pin has been generated."]
602        pub const _1: Self = Self::new(1);
603    }
604}
ra2a1_pac/poeg.rs

ra2a1_pac/
poeg.rs
