1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Capacitive Touch Sensing Unit"]
28unsafe impl ::core::marker::Send for super::Ctsu {}
29unsafe impl ::core::marker::Sync for super::Ctsu {}
30impl super::Ctsu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "CTSU Control Register 0"]
38 #[inline(always)]
39 pub const fn ctsucr0(
40 &self,
41 ) -> &'static crate::common::Reg<self::Ctsucr0_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Ctsucr0_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "CTSU Control Register 1"]
50 #[inline(always)]
51 pub const fn ctsucr1(
52 &self,
53 ) -> &'static crate::common::Reg<self::Ctsucr1_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Ctsucr1_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(1usize),
57 )
58 }
59 }
60
61 #[doc = "CTSU Synchronous Noise Reduction Setting Register"]
62 #[inline(always)]
63 pub const fn ctsusdprs(
64 &self,
65 ) -> &'static crate::common::Reg<self::Ctsusdprs_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Ctsusdprs_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(2usize),
69 )
70 }
71 }
72
73 #[doc = "CTSU Sensor Stabilization Wait Control Register"]
74 #[inline(always)]
75 pub const fn ctsusst(
76 &self,
77 ) -> &'static crate::common::Reg<self::Ctsusst_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Ctsusst_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(3usize),
81 )
82 }
83 }
84
85 #[doc = "CTSU Measurement Channel Register 0"]
86 #[inline(always)]
87 pub const fn ctsumch0(
88 &self,
89 ) -> &'static crate::common::Reg<self::Ctsumch0_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Ctsumch0_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(4usize),
93 )
94 }
95 }
96
97 #[doc = "CTSU Measurement Channel Register 1"]
98 #[inline(always)]
99 pub const fn ctsumch1(
100 &self,
101 ) -> &'static crate::common::Reg<self::Ctsumch1_SPEC, crate::common::R> {
102 unsafe {
103 crate::common::Reg::<self::Ctsumch1_SPEC, crate::common::R>::from_ptr(
104 self._svd2pac_as_ptr().add(5usize),
105 )
106 }
107 }
108
109 #[doc = "CTSU Channel Enable Control Register 0"]
110 #[inline(always)]
111 pub const fn ctsuchac0(
112 &self,
113 ) -> &'static crate::common::Reg<self::Ctsuchac0_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Ctsuchac0_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(6usize),
117 )
118 }
119 }
120
121 #[doc = "CTSU Channel Enable Control Register 1"]
122 #[inline(always)]
123 pub const fn ctsuchac1(
124 &self,
125 ) -> &'static crate::common::Reg<self::Ctsuchac1_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Ctsuchac1_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(7usize),
129 )
130 }
131 }
132
133 #[doc = "CTSU Channel Enable Control Register 2"]
134 #[inline(always)]
135 pub const fn ctsuchac2(
136 &self,
137 ) -> &'static crate::common::Reg<self::Ctsuchac2_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::Ctsuchac2_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(8usize),
141 )
142 }
143 }
144
145 #[doc = "CTSU Channel Enable Control Register 3"]
146 #[inline(always)]
147 pub const fn ctsuchac3(
148 &self,
149 ) -> &'static crate::common::Reg<self::Ctsuchac3_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::Ctsuchac3_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(9usize),
153 )
154 }
155 }
156
157 #[doc = "CTSU Channel Transmit/Receive Control Register 0"]
158 #[inline(always)]
159 pub const fn ctsuchtrc0(
160 &self,
161 ) -> &'static crate::common::Reg<self::Ctsuchtrc0_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::Ctsuchtrc0_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(11usize),
165 )
166 }
167 }
168
169 #[doc = "CTSU Channel Transmit/Receive Control Register 1"]
170 #[inline(always)]
171 pub const fn ctsuchtrc1(
172 &self,
173 ) -> &'static crate::common::Reg<self::Ctsuchtrc1_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::Ctsuchtrc1_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(12usize),
177 )
178 }
179 }
180
181 #[doc = "CTSU Channel Transmit/Receive Control Register 2"]
182 #[inline(always)]
183 pub const fn ctsuchtrc2(
184 &self,
185 ) -> &'static crate::common::Reg<self::Ctsuchtrc2_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::Ctsuchtrc2_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(13usize),
189 )
190 }
191 }
192
193 #[doc = "CTSU Channel Transmit/Receive Control Register 3"]
194 #[inline(always)]
195 pub const fn ctsuchtrc3(
196 &self,
197 ) -> &'static crate::common::Reg<self::Ctsuchtrc3_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::Ctsuchtrc3_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(14usize),
201 )
202 }
203 }
204
205 #[doc = "CTSU High-Pass Noise Reduction Control Register"]
206 #[inline(always)]
207 pub const fn ctsudclkc(
208 &self,
209 ) -> &'static crate::common::Reg<self::Ctsudclkc_SPEC, crate::common::RW> {
210 unsafe {
211 crate::common::Reg::<self::Ctsudclkc_SPEC, crate::common::RW>::from_ptr(
212 self._svd2pac_as_ptr().add(16usize),
213 )
214 }
215 }
216
217 #[doc = "CTSU Status Register"]
218 #[inline(always)]
219 pub const fn ctsust(
220 &self,
221 ) -> &'static crate::common::Reg<self::Ctsust_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::Ctsust_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(17usize),
225 )
226 }
227 }
228
229 #[doc = "CTSU High-Pass Noise Reduction Spectrum Diffusion Control Register"]
230 #[inline(always)]
231 pub const fn ctsussc(
232 &self,
233 ) -> &'static crate::common::Reg<self::Ctsussc_SPEC, crate::common::RW> {
234 unsafe {
235 crate::common::Reg::<self::Ctsussc_SPEC, crate::common::RW>::from_ptr(
236 self._svd2pac_as_ptr().add(18usize),
237 )
238 }
239 }
240
241 #[doc = "CTSU Sensor Offset Register 0"]
242 #[inline(always)]
243 pub const fn ctsuso0(
244 &self,
245 ) -> &'static crate::common::Reg<self::Ctsuso0_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Ctsuso0_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(20usize),
249 )
250 }
251 }
252
253 #[doc = "CTSU Sensor Offset Register 1"]
254 #[inline(always)]
255 pub const fn ctsuso1(
256 &self,
257 ) -> &'static crate::common::Reg<self::Ctsuso1_SPEC, crate::common::RW> {
258 unsafe {
259 crate::common::Reg::<self::Ctsuso1_SPEC, crate::common::RW>::from_ptr(
260 self._svd2pac_as_ptr().add(22usize),
261 )
262 }
263 }
264
265 #[doc = "CTSU Sensor Counter"]
266 #[inline(always)]
267 pub const fn ctsusc(&self) -> &'static crate::common::Reg<self::Ctsusc_SPEC, crate::common::R> {
268 unsafe {
269 crate::common::Reg::<self::Ctsusc_SPEC, crate::common::R>::from_ptr(
270 self._svd2pac_as_ptr().add(24usize),
271 )
272 }
273 }
274
275 #[doc = "CTSU Reference Counter"]
276 #[inline(always)]
277 pub const fn ctsurc(&self) -> &'static crate::common::Reg<self::Ctsurc_SPEC, crate::common::R> {
278 unsafe {
279 crate::common::Reg::<self::Ctsurc_SPEC, crate::common::R>::from_ptr(
280 self._svd2pac_as_ptr().add(26usize),
281 )
282 }
283 }
284
285 #[doc = "CTSU Error Status Register"]
286 #[inline(always)]
287 pub const fn ctsuerrs(
288 &self,
289 ) -> &'static crate::common::Reg<self::Ctsuerrs_SPEC, crate::common::R> {
290 unsafe {
291 crate::common::Reg::<self::Ctsuerrs_SPEC, crate::common::R>::from_ptr(
292 self._svd2pac_as_ptr().add(28usize),
293 )
294 }
295 }
296}
297#[doc(hidden)]
298#[derive(Copy, Clone, Eq, PartialEq)]
299pub struct Ctsucr0_SPEC;
300impl crate::sealed::RegSpec for Ctsucr0_SPEC {
301 type DataType = u8;
302}
303
304#[doc = "CTSU Control Register 0"]
305pub type Ctsucr0 = crate::RegValueT<Ctsucr0_SPEC>;
306
307impl Ctsucr0 {
308 #[doc = "CTSU Control Block Initialization"]
309 #[inline(always)]
310 pub fn ctsuinit(
311 self,
312 ) -> crate::common::RegisterField<
313 4,
314 0x1,
315 1,
316 0,
317 ctsucr0::Ctsuinit,
318 ctsucr0::Ctsuinit,
319 Ctsucr0_SPEC,
320 crate::common::RW,
321 > {
322 crate::common::RegisterField::<
323 4,
324 0x1,
325 1,
326 0,
327 ctsucr0::Ctsuinit,
328 ctsucr0::Ctsuinit,
329 Ctsucr0_SPEC,
330 crate::common::RW,
331 >::from_register(self, 0)
332 }
333
334 #[doc = "CTSU Wait State Power-Saving Enable"]
335 #[inline(always)]
336 pub fn ctsusnz(
337 self,
338 ) -> crate::common::RegisterField<
339 2,
340 0x1,
341 1,
342 0,
343 ctsucr0::Ctsusnz,
344 ctsucr0::Ctsusnz,
345 Ctsucr0_SPEC,
346 crate::common::RW,
347 > {
348 crate::common::RegisterField::<
349 2,
350 0x1,
351 1,
352 0,
353 ctsucr0::Ctsusnz,
354 ctsucr0::Ctsusnz,
355 Ctsucr0_SPEC,
356 crate::common::RW,
357 >::from_register(self, 0)
358 }
359
360 #[doc = "CTSU Measurement Operation Start Trigger Select"]
361 #[inline(always)]
362 pub fn ctsucap(
363 self,
364 ) -> crate::common::RegisterField<
365 1,
366 0x1,
367 1,
368 0,
369 ctsucr0::Ctsucap,
370 ctsucr0::Ctsucap,
371 Ctsucr0_SPEC,
372 crate::common::RW,
373 > {
374 crate::common::RegisterField::<
375 1,
376 0x1,
377 1,
378 0,
379 ctsucr0::Ctsucap,
380 ctsucr0::Ctsucap,
381 Ctsucr0_SPEC,
382 crate::common::RW,
383 >::from_register(self, 0)
384 }
385
386 #[doc = "CTSU Measurement Operation Start"]
387 #[inline(always)]
388 pub fn ctsustrt(
389 self,
390 ) -> crate::common::RegisterField<
391 0,
392 0x1,
393 1,
394 0,
395 ctsucr0::Ctsustrt,
396 ctsucr0::Ctsustrt,
397 Ctsucr0_SPEC,
398 crate::common::RW,
399 > {
400 crate::common::RegisterField::<
401 0,
402 0x1,
403 1,
404 0,
405 ctsucr0::Ctsustrt,
406 ctsucr0::Ctsustrt,
407 Ctsucr0_SPEC,
408 crate::common::RW,
409 >::from_register(self, 0)
410 }
411}
412impl ::core::default::Default for Ctsucr0 {
413 #[inline(always)]
414 fn default() -> Ctsucr0 {
415 <crate::RegValueT<Ctsucr0_SPEC> as RegisterValue<_>>::new(0)
416 }
417}
418pub mod ctsucr0 {
419
420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421 pub struct Ctsuinit_SPEC;
422 pub type Ctsuinit = crate::EnumBitfieldStruct<u8, Ctsuinit_SPEC>;
423 impl Ctsuinit {
424 #[doc = "Writing a 0 has no effect, this bit is read as 0."]
425 pub const _0: Self = Self::new(0);
426
427 #[doc = "initializes the CTSU control block and registers."]
428 pub const _1: Self = Self::new(1);
429 }
430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
431 pub struct Ctsusnz_SPEC;
432 pub type Ctsusnz = crate::EnumBitfieldStruct<u8, Ctsusnz_SPEC>;
433 impl Ctsusnz {
434 #[doc = "Power-saving function during wait state is disabled."]
435 pub const _0: Self = Self::new(0);
436
437 #[doc = "Power-saving function during wait state is enabled."]
438 pub const _1: Self = Self::new(1);
439 }
440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441 pub struct Ctsucap_SPEC;
442 pub type Ctsucap = crate::EnumBitfieldStruct<u8, Ctsucap_SPEC>;
443 impl Ctsucap {
444 #[doc = "Software trigger."]
445 pub const _0: Self = Self::new(0);
446
447 #[doc = "External trigger."]
448 pub const _1: Self = Self::new(1);
449 }
450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
451 pub struct Ctsustrt_SPEC;
452 pub type Ctsustrt = crate::EnumBitfieldStruct<u8, Ctsustrt_SPEC>;
453 impl Ctsustrt {
454 #[doc = "Measurement operation stops."]
455 pub const _0: Self = Self::new(0);
456
457 #[doc = "Measurement operation starts."]
458 pub const _1: Self = Self::new(1);
459 }
460}
461#[doc(hidden)]
462#[derive(Copy, Clone, Eq, PartialEq)]
463pub struct Ctsucr1_SPEC;
464impl crate::sealed::RegSpec for Ctsucr1_SPEC {
465 type DataType = u8;
466}
467
468#[doc = "CTSU Control Register 1"]
469pub type Ctsucr1 = crate::RegValueT<Ctsucr1_SPEC>;
470
471impl Ctsucr1 {
472 #[doc = "CTSU Measurement Mode Select"]
473 #[inline(always)]
474 pub fn ctsumd(
475 self,
476 ) -> crate::common::RegisterField<
477 6,
478 0x3,
479 1,
480 0,
481 ctsucr1::Ctsumd,
482 ctsucr1::Ctsumd,
483 Ctsucr1_SPEC,
484 crate::common::RW,
485 > {
486 crate::common::RegisterField::<
487 6,
488 0x3,
489 1,
490 0,
491 ctsucr1::Ctsumd,
492 ctsucr1::Ctsumd,
493 Ctsucr1_SPEC,
494 crate::common::RW,
495 >::from_register(self, 0)
496 }
497
498 #[doc = "CTSU Operating Clock Select"]
499 #[inline(always)]
500 pub fn ctsuclk(
501 self,
502 ) -> crate::common::RegisterField<
503 4,
504 0x3,
505 1,
506 0,
507 ctsucr1::Ctsuclk,
508 ctsucr1::Ctsuclk,
509 Ctsucr1_SPEC,
510 crate::common::RW,
511 > {
512 crate::common::RegisterField::<
513 4,
514 0x3,
515 1,
516 0,
517 ctsucr1::Ctsuclk,
518 ctsucr1::Ctsuclk,
519 Ctsucr1_SPEC,
520 crate::common::RW,
521 >::from_register(self, 0)
522 }
523
524 #[doc = "CTSU Power Supply Capacity Adjustment"]
525 #[inline(always)]
526 pub fn ctsuatune1(
527 self,
528 ) -> crate::common::RegisterField<
529 3,
530 0x1,
531 1,
532 0,
533 ctsucr1::Ctsuatune1,
534 ctsucr1::Ctsuatune1,
535 Ctsucr1_SPEC,
536 crate::common::RW,
537 > {
538 crate::common::RegisterField::<
539 3,
540 0x1,
541 1,
542 0,
543 ctsucr1::Ctsuatune1,
544 ctsucr1::Ctsuatune1,
545 Ctsucr1_SPEC,
546 crate::common::RW,
547 >::from_register(self, 0)
548 }
549
550 #[doc = "CTSU Power Supply Operating Mode Setting"]
551 #[inline(always)]
552 pub fn ctsuatune0(
553 self,
554 ) -> crate::common::RegisterField<
555 2,
556 0x1,
557 1,
558 0,
559 ctsucr1::Ctsuatune0,
560 ctsucr1::Ctsuatune0,
561 Ctsucr1_SPEC,
562 crate::common::RW,
563 > {
564 crate::common::RegisterField::<
565 2,
566 0x1,
567 1,
568 0,
569 ctsucr1::Ctsuatune0,
570 ctsucr1::Ctsuatune0,
571 Ctsucr1_SPEC,
572 crate::common::RW,
573 >::from_register(self, 0)
574 }
575
576 #[doc = "CTSU LPF Capacitance Charging Control"]
577 #[inline(always)]
578 pub fn ctsucsw(
579 self,
580 ) -> crate::common::RegisterField<
581 1,
582 0x1,
583 1,
584 0,
585 ctsucr1::Ctsucsw,
586 ctsucr1::Ctsucsw,
587 Ctsucr1_SPEC,
588 crate::common::RW,
589 > {
590 crate::common::RegisterField::<
591 1,
592 0x1,
593 1,
594 0,
595 ctsucr1::Ctsucsw,
596 ctsucr1::Ctsucsw,
597 Ctsucr1_SPEC,
598 crate::common::RW,
599 >::from_register(self, 0)
600 }
601
602 #[doc = "CTSU Power Supply Enable"]
603 #[inline(always)]
604 pub fn ctsupon(
605 self,
606 ) -> crate::common::RegisterField<
607 0,
608 0x1,
609 1,
610 0,
611 ctsucr1::Ctsupon,
612 ctsucr1::Ctsupon,
613 Ctsucr1_SPEC,
614 crate::common::RW,
615 > {
616 crate::common::RegisterField::<
617 0,
618 0x1,
619 1,
620 0,
621 ctsucr1::Ctsupon,
622 ctsucr1::Ctsupon,
623 Ctsucr1_SPEC,
624 crate::common::RW,
625 >::from_register(self, 0)
626 }
627}
628impl ::core::default::Default for Ctsucr1 {
629 #[inline(always)]
630 fn default() -> Ctsucr1 {
631 <crate::RegValueT<Ctsucr1_SPEC> as RegisterValue<_>>::new(0)
632 }
633}
634pub mod ctsucr1 {
635
636 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
637 pub struct Ctsumd_SPEC;
638 pub type Ctsumd = crate::EnumBitfieldStruct<u8, Ctsumd_SPEC>;
639 impl Ctsumd {
640 #[doc = "Self-capacitance single scan mode"]
641 pub const _00: Self = Self::new(0);
642
643 #[doc = "Self-capacitance multi-scan mode"]
644 pub const _01: Self = Self::new(1);
645
646 #[doc = "Setting prohibited"]
647 pub const _10: Self = Self::new(2);
648
649 #[doc = "Mutual capacitance full scan mode"]
650 pub const _11: Self = Self::new(3);
651 }
652 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
653 pub struct Ctsuclk_SPEC;
654 pub type Ctsuclk = crate::EnumBitfieldStruct<u8, Ctsuclk_SPEC>;
655 impl Ctsuclk {
656 #[doc = "PCLK"]
657 pub const _00: Self = Self::new(0);
658
659 #[doc = "PCLK/2 (PCLK divided by 2)"]
660 pub const _01: Self = Self::new(1);
661
662 #[doc = "PCLK/2 (PCLK divided by 4)"]
663 pub const _10: Self = Self::new(2);
664
665 #[doc = "Setting prohibited"]
666 pub const _11: Self = Self::new(3);
667 }
668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
669 pub struct Ctsuatune1_SPEC;
670 pub type Ctsuatune1 = crate::EnumBitfieldStruct<u8, Ctsuatune1_SPEC>;
671 impl Ctsuatune1 {
672 #[doc = "Normal output"]
673 pub const _0: Self = Self::new(0);
674
675 #[doc = "High-current output"]
676 pub const _1: Self = Self::new(1);
677 }
678 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
679 pub struct Ctsuatune0_SPEC;
680 pub type Ctsuatune0 = crate::EnumBitfieldStruct<u8, Ctsuatune0_SPEC>;
681 impl Ctsuatune0 {
682 #[doc = "Normal operating mode"]
683 pub const _0: Self = Self::new(0);
684
685 #[doc = "Low-voltage operating mode"]
686 pub const _1: Self = Self::new(1);
687 }
688 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689 pub struct Ctsucsw_SPEC;
690 pub type Ctsucsw = crate::EnumBitfieldStruct<u8, Ctsucsw_SPEC>;
691 impl Ctsucsw {
692 #[doc = "Turned off capacitance switch"]
693 pub const _0: Self = Self::new(0);
694
695 #[doc = "Turned on capacitance switch"]
696 pub const _1: Self = Self::new(1);
697 }
698 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
699 pub struct Ctsupon_SPEC;
700 pub type Ctsupon = crate::EnumBitfieldStruct<u8, Ctsupon_SPEC>;
701 impl Ctsupon {
702 #[doc = "Powered off the CTSU"]
703 pub const _0: Self = Self::new(0);
704
705 #[doc = "Powered on the CTSU"]
706 pub const _1: Self = Self::new(1);
707 }
708}
709#[doc(hidden)]
710#[derive(Copy, Clone, Eq, PartialEq)]
711pub struct Ctsusdprs_SPEC;
712impl crate::sealed::RegSpec for Ctsusdprs_SPEC {
713 type DataType = u8;
714}
715
716#[doc = "CTSU Synchronous Noise Reduction Setting Register"]
717pub type Ctsusdprs = crate::RegValueT<Ctsusdprs_SPEC>;
718
719impl Ctsusdprs {
720 #[doc = "This bit is read as 0. The write value should be 0."]
721 #[inline(always)]
722 pub fn reserved(
723 self,
724 ) -> crate::common::RegisterFieldBool<7, 1, 0, Ctsusdprs_SPEC, crate::common::RW> {
725 crate::common::RegisterFieldBool::<7,1,0,Ctsusdprs_SPEC,crate::common::RW>::from_register(self,0)
726 }
727
728 #[doc = "CTSU High-Pass Noise Reduction Function Off Setting"]
729 #[inline(always)]
730 pub fn ctsusoff(
731 self,
732 ) -> crate::common::RegisterField<
733 6,
734 0x1,
735 1,
736 0,
737 ctsusdprs::Ctsusoff,
738 ctsusdprs::Ctsusoff,
739 Ctsusdprs_SPEC,
740 crate::common::RW,
741 > {
742 crate::common::RegisterField::<
743 6,
744 0x1,
745 1,
746 0,
747 ctsusdprs::Ctsusoff,
748 ctsusdprs::Ctsusoff,
749 Ctsusdprs_SPEC,
750 crate::common::RW,
751 >::from_register(self, 0)
752 }
753
754 #[doc = "CTSU Base Period and Pulse Count Setting"]
755 #[inline(always)]
756 pub fn ctsuprmode(
757 self,
758 ) -> crate::common::RegisterField<
759 4,
760 0x3,
761 1,
762 0,
763 ctsusdprs::Ctsuprmode,
764 ctsusdprs::Ctsuprmode,
765 Ctsusdprs_SPEC,
766 crate::common::RW,
767 > {
768 crate::common::RegisterField::<
769 4,
770 0x3,
771 1,
772 0,
773 ctsusdprs::Ctsuprmode,
774 ctsusdprs::Ctsuprmode,
775 Ctsusdprs_SPEC,
776 crate::common::RW,
777 >::from_register(self, 0)
778 }
779
780 #[doc = "CTSU Measurement Time and Pulse Count AdjustmentRecommended setting: 3 (0011b)"]
781 #[inline(always)]
782 pub fn ctsuprratio(
783 self,
784 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Ctsusdprs_SPEC, crate::common::RW> {
785 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Ctsusdprs_SPEC,crate::common::RW>::from_register(self,0)
786 }
787}
788impl ::core::default::Default for Ctsusdprs {
789 #[inline(always)]
790 fn default() -> Ctsusdprs {
791 <crate::RegValueT<Ctsusdprs_SPEC> as RegisterValue<_>>::new(0)
792 }
793}
794pub mod ctsusdprs {
795
796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
797 pub struct Ctsusoff_SPEC;
798 pub type Ctsusoff = crate::EnumBitfieldStruct<u8, Ctsusoff_SPEC>;
799 impl Ctsusoff {
800 #[doc = "High-pass noise reduction function turned on"]
801 pub const _0: Self = Self::new(0);
802
803 #[doc = "High-pass noise reduction function turned off"]
804 pub const _1: Self = Self::new(1);
805 }
806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
807 pub struct Ctsuprmode_SPEC;
808 pub type Ctsuprmode = crate::EnumBitfieldStruct<u8, Ctsuprmode_SPEC>;
809 impl Ctsuprmode {
810 #[doc = "510 pulses"]
811 pub const _00: Self = Self::new(0);
812
813 #[doc = "126 pulses"]
814 pub const _01: Self = Self::new(1);
815
816 #[doc = "62 pulses (recommended setting value)"]
817 pub const _10: Self = Self::new(2);
818
819 #[doc = "Setting prohibited"]
820 pub const _11: Self = Self::new(3);
821 }
822}
823#[doc(hidden)]
824#[derive(Copy, Clone, Eq, PartialEq)]
825pub struct Ctsusst_SPEC;
826impl crate::sealed::RegSpec for Ctsusst_SPEC {
827 type DataType = u8;
828}
829
830#[doc = "CTSU Sensor Stabilization Wait Control Register"]
831pub type Ctsusst = crate::RegValueT<Ctsusst_SPEC>;
832
833impl Ctsusst {
834 #[doc = "CTSU Sensor Stabilization Wait ControlNOTE: The value of these bits should be fixed to 00010000b."]
835 #[inline(always)]
836 pub fn ctsusst(
837 self,
838 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsusst_SPEC, crate::common::RW> {
839 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsusst_SPEC,crate::common::RW>::from_register(self,0)
840 }
841}
842impl ::core::default::Default for Ctsusst {
843 #[inline(always)]
844 fn default() -> Ctsusst {
845 <crate::RegValueT<Ctsusst_SPEC> as RegisterValue<_>>::new(0)
846 }
847}
848
849#[doc(hidden)]
850#[derive(Copy, Clone, Eq, PartialEq)]
851pub struct Ctsumch0_SPEC;
852impl crate::sealed::RegSpec for Ctsumch0_SPEC {
853 type DataType = u8;
854}
855
856#[doc = "CTSU Measurement Channel Register 0"]
857pub type Ctsumch0 = crate::RegValueT<Ctsumch0_SPEC>;
858
859impl Ctsumch0 {
860 #[doc = "These bits are read as 00. The write value should be 00."]
861 #[inline(always)]
862 pub fn reserved(
863 self,
864 ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, Ctsumch0_SPEC, crate::common::RW> {
865 crate::common::RegisterField::<6,0x3,1,0,u8,u8,Ctsumch0_SPEC,crate::common::RW>::from_register(self,0)
866 }
867
868 #[doc = "CTSU Measurement Channel 0.Note1: Writing to these bits is enabled only in self-capacitance single scan mode (CTSUCR1.CTSUMD\\[1:0\\] bits = 00b).Note2: If the value of CTSUMCH0 was set to b\'111111 in mode other than self-capacitor single scan mode, the measurement is stopped."]
869 #[inline(always)]
870 pub fn ctsumch0(
871 self,
872 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Ctsumch0_SPEC, crate::common::RW> {
873 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Ctsumch0_SPEC,crate::common::RW>::from_register(self,0)
874 }
875}
876impl ::core::default::Default for Ctsumch0 {
877 #[inline(always)]
878 fn default() -> Ctsumch0 {
879 <crate::RegValueT<Ctsumch0_SPEC> as RegisterValue<_>>::new(63)
880 }
881}
882
883#[doc(hidden)]
884#[derive(Copy, Clone, Eq, PartialEq)]
885pub struct Ctsumch1_SPEC;
886impl crate::sealed::RegSpec for Ctsumch1_SPEC {
887 type DataType = u8;
888}
889
890#[doc = "CTSU Measurement Channel Register 1"]
891pub type Ctsumch1 = crate::RegValueT<Ctsumch1_SPEC>;
892
893impl Ctsumch1 {
894 #[doc = "These bits are read as 00."]
895 #[inline(always)]
896 pub fn reserved(
897 self,
898 ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, Ctsumch1_SPEC, crate::common::R> {
899 crate::common::RegisterField::<6,0x3,1,0,u8,u8,Ctsumch1_SPEC,crate::common::R>::from_register(self,0)
900 }
901
902 #[doc = "CTSU Measurement Channel 1Note1: If the value of CTSUMCH1 was set to b\'111111, the measurement is stopped."]
903 #[inline(always)]
904 pub fn ctsumch1(
905 self,
906 ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Ctsumch1_SPEC, crate::common::R> {
907 crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Ctsumch1_SPEC,crate::common::R>::from_register(self,0)
908 }
909}
910impl ::core::default::Default for Ctsumch1 {
911 #[inline(always)]
912 fn default() -> Ctsumch1 {
913 <crate::RegValueT<Ctsumch1_SPEC> as RegisterValue<_>>::new(63)
914 }
915}
916
917#[doc(hidden)]
918#[derive(Copy, Clone, Eq, PartialEq)]
919pub struct Ctsuchac0_SPEC;
920impl crate::sealed::RegSpec for Ctsuchac0_SPEC {
921 type DataType = u8;
922}
923
924#[doc = "CTSU Channel Enable Control Register 0"]
925pub type Ctsuchac0 = crate::RegValueT<Ctsuchac0_SPEC>;
926
927impl Ctsuchac0 {
928 #[doc = "CTSU Channel Enable Control 0.0: Not measurement target1: Measurement targetNote: CTSUCHAC0\\[0\\] corresponds to TS00 and CTSUCHAC0\\[7\\] corresponds to TS07."]
929 #[inline(always)]
930 pub fn ctsuchac0(
931 self,
932 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsuchac0_SPEC, crate::common::RW>
933 {
934 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsuchac0_SPEC,crate::common::RW>::from_register(self,0)
935 }
936}
937impl ::core::default::Default for Ctsuchac0 {
938 #[inline(always)]
939 fn default() -> Ctsuchac0 {
940 <crate::RegValueT<Ctsuchac0_SPEC> as RegisterValue<_>>::new(0)
941 }
942}
943
944#[doc(hidden)]
945#[derive(Copy, Clone, Eq, PartialEq)]
946pub struct Ctsuchac1_SPEC;
947impl crate::sealed::RegSpec for Ctsuchac1_SPEC {
948 type DataType = u8;
949}
950
951#[doc = "CTSU Channel Enable Control Register 1"]
952pub type Ctsuchac1 = crate::RegValueT<Ctsuchac1_SPEC>;
953
954impl Ctsuchac1 {
955 #[doc = "CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\] corresponds to TS08 and CTSUCHAC1\\[7\\] corresponds to TS15."]
956 #[inline(always)]
957 pub fn ctsuchac1(
958 self,
959 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsuchac1_SPEC, crate::common::RW>
960 {
961 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsuchac1_SPEC,crate::common::RW>::from_register(self,0)
962 }
963}
964impl ::core::default::Default for Ctsuchac1 {
965 #[inline(always)]
966 fn default() -> Ctsuchac1 {
967 <crate::RegValueT<Ctsuchac1_SPEC> as RegisterValue<_>>::new(0)
968 }
969}
970
971#[doc(hidden)]
972#[derive(Copy, Clone, Eq, PartialEq)]
973pub struct Ctsuchac2_SPEC;
974impl crate::sealed::RegSpec for Ctsuchac2_SPEC {
975 type DataType = u8;
976}
977
978#[doc = "CTSU Channel Enable Control Register 2"]
979pub type Ctsuchac2 = crate::RegValueT<Ctsuchac2_SPEC>;
980
981impl Ctsuchac2 {
982 #[doc = "CTSU Channel Enable Control 2.0: Not measurement target1: Measurement targetNote: CTSUCHAC2\\[0\\] corresponds to TS16 and CTSUCHAC2\\[7\\] corresponds to TS23."]
983 #[inline(always)]
984 pub fn ctsuchac2(
985 self,
986 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsuchac2_SPEC, crate::common::RW>
987 {
988 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsuchac2_SPEC,crate::common::RW>::from_register(self,0)
989 }
990}
991impl ::core::default::Default for Ctsuchac2 {
992 #[inline(always)]
993 fn default() -> Ctsuchac2 {
994 <crate::RegValueT<Ctsuchac2_SPEC> as RegisterValue<_>>::new(0)
995 }
996}
997
998#[doc(hidden)]
999#[derive(Copy, Clone, Eq, PartialEq)]
1000pub struct Ctsuchac3_SPEC;
1001impl crate::sealed::RegSpec for Ctsuchac3_SPEC {
1002 type DataType = u8;
1003}
1004
1005#[doc = "CTSU Channel Enable Control Register 3"]
1006pub type Ctsuchac3 = crate::RegValueT<Ctsuchac3_SPEC>;
1007
1008impl Ctsuchac3 {
1009 #[doc = "CTSU Channel Enable Control 3.0: Not measurement target1: Measurement targetNote: CTSUCHAC3\\[0\\] corresponds to TS24 and CTSUCHAC3\\[3\\] corresponds to TS27."]
1010 #[inline(always)]
1011 pub fn ctsuchac3(
1012 self,
1013 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsuchac3_SPEC, crate::common::RW>
1014 {
1015 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsuchac3_SPEC,crate::common::RW>::from_register(self,0)
1016 }
1017}
1018impl ::core::default::Default for Ctsuchac3 {
1019 #[inline(always)]
1020 fn default() -> Ctsuchac3 {
1021 <crate::RegValueT<Ctsuchac3_SPEC> as RegisterValue<_>>::new(0)
1022 }
1023}
1024
1025#[doc(hidden)]
1026#[derive(Copy, Clone, Eq, PartialEq)]
1027pub struct Ctsuchtrc0_SPEC;
1028impl crate::sealed::RegSpec for Ctsuchtrc0_SPEC {
1029 type DataType = u8;
1030}
1031
1032#[doc = "CTSU Channel Transmit/Receive Control Register 0"]
1033pub type Ctsuchtrc0 = crate::RegValueT<Ctsuchtrc0_SPEC>;
1034
1035impl Ctsuchtrc0 {
1036 #[doc = "CTSU Channel Transmit/Receive Control 0"]
1037 #[inline(always)]
1038 pub fn ctsuchtrc0(
1039 self,
1040 ) -> crate::common::RegisterField<
1041 0,
1042 0xff,
1043 1,
1044 0,
1045 ctsuchtrc0::Ctsuchtrc0,
1046 ctsuchtrc0::Ctsuchtrc0,
1047 Ctsuchtrc0_SPEC,
1048 crate::common::RW,
1049 > {
1050 crate::common::RegisterField::<
1051 0,
1052 0xff,
1053 1,
1054 0,
1055 ctsuchtrc0::Ctsuchtrc0,
1056 ctsuchtrc0::Ctsuchtrc0,
1057 Ctsuchtrc0_SPEC,
1058 crate::common::RW,
1059 >::from_register(self, 0)
1060 }
1061}
1062impl ::core::default::Default for Ctsuchtrc0 {
1063 #[inline(always)]
1064 fn default() -> Ctsuchtrc0 {
1065 <crate::RegValueT<Ctsuchtrc0_SPEC> as RegisterValue<_>>::new(0)
1066 }
1067}
1068pub mod ctsuchtrc0 {
1069
1070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1071 pub struct Ctsuchtrc0_SPEC;
1072 pub type Ctsuchtrc0 = crate::EnumBitfieldStruct<u8, Ctsuchtrc0_SPEC>;
1073 impl Ctsuchtrc0 {
1074 #[doc = "Reception"]
1075 pub const _0: Self = Self::new(0);
1076
1077 #[doc = "Transmission"]
1078 pub const _1: Self = Self::new(1);
1079 }
1080}
1081#[doc(hidden)]
1082#[derive(Copy, Clone, Eq, PartialEq)]
1083pub struct Ctsuchtrc1_SPEC;
1084impl crate::sealed::RegSpec for Ctsuchtrc1_SPEC {
1085 type DataType = u8;
1086}
1087
1088#[doc = "CTSU Channel Transmit/Receive Control Register 1"]
1089pub type Ctsuchtrc1 = crate::RegValueT<Ctsuchtrc1_SPEC>;
1090
1091impl Ctsuchtrc1 {
1092 #[doc = "CTSU Channel Transmit/Receive Control 1"]
1093 #[inline(always)]
1094 pub fn ctsuchtrc1(
1095 self,
1096 ) -> crate::common::RegisterField<
1097 0,
1098 0xff,
1099 1,
1100 0,
1101 ctsuchtrc1::Ctsuchtrc1,
1102 ctsuchtrc1::Ctsuchtrc1,
1103 Ctsuchtrc1_SPEC,
1104 crate::common::RW,
1105 > {
1106 crate::common::RegisterField::<
1107 0,
1108 0xff,
1109 1,
1110 0,
1111 ctsuchtrc1::Ctsuchtrc1,
1112 ctsuchtrc1::Ctsuchtrc1,
1113 Ctsuchtrc1_SPEC,
1114 crate::common::RW,
1115 >::from_register(self, 0)
1116 }
1117}
1118impl ::core::default::Default for Ctsuchtrc1 {
1119 #[inline(always)]
1120 fn default() -> Ctsuchtrc1 {
1121 <crate::RegValueT<Ctsuchtrc1_SPEC> as RegisterValue<_>>::new(0)
1122 }
1123}
1124pub mod ctsuchtrc1 {
1125
1126 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1127 pub struct Ctsuchtrc1_SPEC;
1128 pub type Ctsuchtrc1 = crate::EnumBitfieldStruct<u8, Ctsuchtrc1_SPEC>;
1129 impl Ctsuchtrc1 {
1130 #[doc = "Reception"]
1131 pub const _0: Self = Self::new(0);
1132
1133 #[doc = "Transmission"]
1134 pub const _1: Self = Self::new(1);
1135 }
1136}
1137#[doc(hidden)]
1138#[derive(Copy, Clone, Eq, PartialEq)]
1139pub struct Ctsuchtrc2_SPEC;
1140impl crate::sealed::RegSpec for Ctsuchtrc2_SPEC {
1141 type DataType = u8;
1142}
1143
1144#[doc = "CTSU Channel Transmit/Receive Control Register 2"]
1145pub type Ctsuchtrc2 = crate::RegValueT<Ctsuchtrc2_SPEC>;
1146
1147impl Ctsuchtrc2 {
1148 #[doc = "CTSU Channel Transmit/Receive Control 2"]
1149 #[inline(always)]
1150 pub fn ctsuchrc2(
1151 self,
1152 ) -> crate::common::RegisterField<
1153 0,
1154 0xff,
1155 1,
1156 0,
1157 ctsuchtrc2::Ctsuchrc2,
1158 ctsuchtrc2::Ctsuchrc2,
1159 Ctsuchtrc2_SPEC,
1160 crate::common::RW,
1161 > {
1162 crate::common::RegisterField::<
1163 0,
1164 0xff,
1165 1,
1166 0,
1167 ctsuchtrc2::Ctsuchrc2,
1168 ctsuchtrc2::Ctsuchrc2,
1169 Ctsuchtrc2_SPEC,
1170 crate::common::RW,
1171 >::from_register(self, 0)
1172 }
1173}
1174impl ::core::default::Default for Ctsuchtrc2 {
1175 #[inline(always)]
1176 fn default() -> Ctsuchtrc2 {
1177 <crate::RegValueT<Ctsuchtrc2_SPEC> as RegisterValue<_>>::new(0)
1178 }
1179}
1180pub mod ctsuchtrc2 {
1181
1182 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1183 pub struct Ctsuchrc2_SPEC;
1184 pub type Ctsuchrc2 = crate::EnumBitfieldStruct<u8, Ctsuchrc2_SPEC>;
1185 impl Ctsuchrc2 {
1186 #[doc = "Reception"]
1187 pub const _0: Self = Self::new(0);
1188
1189 #[doc = "Transmission"]
1190 pub const _1: Self = Self::new(1);
1191 }
1192}
1193#[doc(hidden)]
1194#[derive(Copy, Clone, Eq, PartialEq)]
1195pub struct Ctsuchtrc3_SPEC;
1196impl crate::sealed::RegSpec for Ctsuchtrc3_SPEC {
1197 type DataType = u8;
1198}
1199
1200#[doc = "CTSU Channel Transmit/Receive Control Register 3"]
1201pub type Ctsuchtrc3 = crate::RegValueT<Ctsuchtrc3_SPEC>;
1202
1203impl Ctsuchtrc3 {
1204 #[doc = "CTSU Channel Transmit/Receive Control 3"]
1205 #[inline(always)]
1206 pub fn ctsuchrc3(
1207 self,
1208 ) -> crate::common::RegisterField<
1209 0,
1210 0xff,
1211 1,
1212 0,
1213 ctsuchtrc3::Ctsuchrc3,
1214 ctsuchtrc3::Ctsuchrc3,
1215 Ctsuchtrc3_SPEC,
1216 crate::common::RW,
1217 > {
1218 crate::common::RegisterField::<
1219 0,
1220 0xff,
1221 1,
1222 0,
1223 ctsuchtrc3::Ctsuchrc3,
1224 ctsuchtrc3::Ctsuchrc3,
1225 Ctsuchtrc3_SPEC,
1226 crate::common::RW,
1227 >::from_register(self, 0)
1228 }
1229}
1230impl ::core::default::Default for Ctsuchtrc3 {
1231 #[inline(always)]
1232 fn default() -> Ctsuchtrc3 {
1233 <crate::RegValueT<Ctsuchtrc3_SPEC> as RegisterValue<_>>::new(0)
1234 }
1235}
1236pub mod ctsuchtrc3 {
1237
1238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1239 pub struct Ctsuchrc3_SPEC;
1240 pub type Ctsuchrc3 = crate::EnumBitfieldStruct<u8, Ctsuchrc3_SPEC>;
1241 impl Ctsuchrc3 {
1242 #[doc = "Reception"]
1243 pub const _0: Self = Self::new(0);
1244
1245 #[doc = "Transmission"]
1246 pub const _1: Self = Self::new(1);
1247 }
1248}
1249#[doc(hidden)]
1250#[derive(Copy, Clone, Eq, PartialEq)]
1251pub struct Ctsudclkc_SPEC;
1252impl crate::sealed::RegSpec for Ctsudclkc_SPEC {
1253 type DataType = u8;
1254}
1255
1256#[doc = "CTSU High-Pass Noise Reduction Control Register"]
1257pub type Ctsudclkc = crate::RegValueT<Ctsudclkc_SPEC>;
1258
1259impl Ctsudclkc {
1260 #[doc = "CTSU Diffusion Clock Mode ControlNOTE: This bit should be set to 11b."]
1261 #[inline(always)]
1262 pub fn ctsusscnt(
1263 self,
1264 ) -> crate::common::RegisterField<4, 0x3, 1, 0, u8, u8, Ctsudclkc_SPEC, crate::common::RW> {
1265 crate::common::RegisterField::<4,0x3,1,0,u8,u8,Ctsudclkc_SPEC,crate::common::RW>::from_register(self,0)
1266 }
1267
1268 #[doc = "These bits are read as 00. The write value should be 00."]
1269 #[inline(always)]
1270 pub fn reserved(
1271 self,
1272 ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Ctsudclkc_SPEC, crate::common::RW> {
1273 crate::common::RegisterField::<2,0x3,1,0,u8,u8,Ctsudclkc_SPEC,crate::common::RW>::from_register(self,0)
1274 }
1275
1276 #[doc = "CTSU Diffusion Clock Mode SelectNOTE: This bit should be set to 00b."]
1277 #[inline(always)]
1278 pub fn ctsussmod(
1279 self,
1280 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Ctsudclkc_SPEC, crate::common::RW> {
1281 crate::common::RegisterField::<0,0x3,1,0,u8,u8,Ctsudclkc_SPEC,crate::common::RW>::from_register(self,0)
1282 }
1283}
1284impl ::core::default::Default for Ctsudclkc {
1285 #[inline(always)]
1286 fn default() -> Ctsudclkc {
1287 <crate::RegValueT<Ctsudclkc_SPEC> as RegisterValue<_>>::new(0)
1288 }
1289}
1290
1291#[doc(hidden)]
1292#[derive(Copy, Clone, Eq, PartialEq)]
1293pub struct Ctsust_SPEC;
1294impl crate::sealed::RegSpec for Ctsust_SPEC {
1295 type DataType = u8;
1296}
1297
1298#[doc = "CTSU Status Register"]
1299pub type Ctsust = crate::RegValueT<Ctsust_SPEC>;
1300
1301impl Ctsust {
1302 #[doc = "CTSU Mutual Capacitance Status Flag"]
1303 #[inline(always)]
1304 pub fn ctsups(
1305 self,
1306 ) -> crate::common::RegisterField<
1307 7,
1308 0x1,
1309 1,
1310 0,
1311 ctsust::Ctsups,
1312 ctsust::Ctsups,
1313 Ctsust_SPEC,
1314 crate::common::R,
1315 > {
1316 crate::common::RegisterField::<
1317 7,
1318 0x1,
1319 1,
1320 0,
1321 ctsust::Ctsups,
1322 ctsust::Ctsups,
1323 Ctsust_SPEC,
1324 crate::common::R,
1325 >::from_register(self, 0)
1326 }
1327
1328 #[doc = "CTSU Reference Counter Overflow Flag"]
1329 #[inline(always)]
1330 pub fn ctsurovf(
1331 self,
1332 ) -> crate::common::RegisterField<
1333 6,
1334 0x1,
1335 1,
1336 0,
1337 ctsust::Ctsurovf,
1338 ctsust::Ctsurovf,
1339 Ctsust_SPEC,
1340 crate::common::RW,
1341 > {
1342 crate::common::RegisterField::<
1343 6,
1344 0x1,
1345 1,
1346 0,
1347 ctsust::Ctsurovf,
1348 ctsust::Ctsurovf,
1349 Ctsust_SPEC,
1350 crate::common::RW,
1351 >::from_register(self, 0)
1352 }
1353
1354 #[doc = "CTSU Sensor Counter Overflow Flag"]
1355 #[inline(always)]
1356 pub fn ctsusovf(
1357 self,
1358 ) -> crate::common::RegisterField<
1359 5,
1360 0x1,
1361 1,
1362 0,
1363 ctsust::Ctsusovf,
1364 ctsust::Ctsusovf,
1365 Ctsust_SPEC,
1366 crate::common::RW,
1367 > {
1368 crate::common::RegisterField::<
1369 5,
1370 0x1,
1371 1,
1372 0,
1373 ctsust::Ctsusovf,
1374 ctsust::Ctsusovf,
1375 Ctsust_SPEC,
1376 crate::common::RW,
1377 >::from_register(self, 0)
1378 }
1379
1380 #[doc = "CTSU Data Transfer Status Flag"]
1381 #[inline(always)]
1382 pub fn ctsudtsr(
1383 self,
1384 ) -> crate::common::RegisterField<
1385 4,
1386 0x1,
1387 1,
1388 0,
1389 ctsust::Ctsudtsr,
1390 ctsust::Ctsudtsr,
1391 Ctsust_SPEC,
1392 crate::common::R,
1393 > {
1394 crate::common::RegisterField::<
1395 4,
1396 0x1,
1397 1,
1398 0,
1399 ctsust::Ctsudtsr,
1400 ctsust::Ctsudtsr,
1401 Ctsust_SPEC,
1402 crate::common::R,
1403 >::from_register(self, 0)
1404 }
1405
1406 #[doc = "This bit is read as 0. The write value should be 0."]
1407 #[inline(always)]
1408 pub fn reserved(
1409 self,
1410 ) -> crate::common::RegisterFieldBool<3, 1, 0, Ctsust_SPEC, crate::common::RW> {
1411 crate::common::RegisterFieldBool::<3, 1, 0, Ctsust_SPEC, crate::common::RW>::from_register(
1412 self, 0,
1413 )
1414 }
1415
1416 #[doc = "CTSU Measurement Status Counter"]
1417 #[inline(always)]
1418 pub fn ctsustc(
1419 self,
1420 ) -> crate::common::RegisterField<
1421 0,
1422 0x7,
1423 1,
1424 0,
1425 ctsust::Ctsustc,
1426 ctsust::Ctsustc,
1427 Ctsust_SPEC,
1428 crate::common::R,
1429 > {
1430 crate::common::RegisterField::<
1431 0,
1432 0x7,
1433 1,
1434 0,
1435 ctsust::Ctsustc,
1436 ctsust::Ctsustc,
1437 Ctsust_SPEC,
1438 crate::common::R,
1439 >::from_register(self, 0)
1440 }
1441}
1442impl ::core::default::Default for Ctsust {
1443 #[inline(always)]
1444 fn default() -> Ctsust {
1445 <crate::RegValueT<Ctsust_SPEC> as RegisterValue<_>>::new(0)
1446 }
1447}
1448pub mod ctsust {
1449
1450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1451 pub struct Ctsups_SPEC;
1452 pub type Ctsups = crate::EnumBitfieldStruct<u8, Ctsups_SPEC>;
1453 impl Ctsups {
1454 #[doc = "First measurement"]
1455 pub const _0: Self = Self::new(0);
1456
1457 #[doc = "Second measurement"]
1458 pub const _1: Self = Self::new(1);
1459 }
1460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1461 pub struct Ctsurovf_SPEC;
1462 pub type Ctsurovf = crate::EnumBitfieldStruct<u8, Ctsurovf_SPEC>;
1463 impl Ctsurovf {
1464 #[doc = "No overflow"]
1465 pub const _0: Self = Self::new(0);
1466
1467 #[doc = "An overflow"]
1468 pub const _1: Self = Self::new(1);
1469 }
1470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1471 pub struct Ctsusovf_SPEC;
1472 pub type Ctsusovf = crate::EnumBitfieldStruct<u8, Ctsusovf_SPEC>;
1473 impl Ctsusovf {
1474 #[doc = "No overflow"]
1475 pub const _0: Self = Self::new(0);
1476
1477 #[doc = "An overflow"]
1478 pub const _1: Self = Self::new(1);
1479 }
1480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1481 pub struct Ctsudtsr_SPEC;
1482 pub type Ctsudtsr = crate::EnumBitfieldStruct<u8, Ctsudtsr_SPEC>;
1483 impl Ctsudtsr {
1484 #[doc = "Measurement result has been read"]
1485 pub const _0: Self = Self::new(0);
1486
1487 #[doc = "Measurement result has not been read"]
1488 pub const _1: Self = Self::new(1);
1489 }
1490 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1491 pub struct Ctsustc_SPEC;
1492 pub type Ctsustc = crate::EnumBitfieldStruct<u8, Ctsustc_SPEC>;
1493 impl Ctsustc {
1494 #[doc = "Status 0"]
1495 pub const _000: Self = Self::new(0);
1496
1497 #[doc = "Status 1"]
1498 pub const _001: Self = Self::new(1);
1499
1500 #[doc = "Status 2"]
1501 pub const _010: Self = Self::new(2);
1502
1503 #[doc = "Status 3"]
1504 pub const _011: Self = Self::new(3);
1505
1506 #[doc = "Status 4"]
1507 pub const _100: Self = Self::new(4);
1508
1509 #[doc = "Status 5"]
1510 pub const _101: Self = Self::new(5);
1511 }
1512}
1513#[doc(hidden)]
1514#[derive(Copy, Clone, Eq, PartialEq)]
1515pub struct Ctsussc_SPEC;
1516impl crate::sealed::RegSpec for Ctsussc_SPEC {
1517 type DataType = u16;
1518}
1519
1520#[doc = "CTSU High-Pass Noise Reduction Spectrum Diffusion Control Register"]
1521pub type Ctsussc = crate::RegValueT<Ctsussc_SPEC>;
1522
1523impl Ctsussc {
1524 #[doc = "CTSU Spectrum Diffusion Frequency Division Setting"]
1525 #[inline(always)]
1526 pub fn ctsussdiv(
1527 self,
1528 ) -> crate::common::RegisterField<
1529 8,
1530 0xf,
1531 1,
1532 0,
1533 ctsussc::Ctsussdiv,
1534 ctsussc::Ctsussdiv,
1535 Ctsussc_SPEC,
1536 crate::common::RW,
1537 > {
1538 crate::common::RegisterField::<
1539 8,
1540 0xf,
1541 1,
1542 0,
1543 ctsussc::Ctsussdiv,
1544 ctsussc::Ctsussdiv,
1545 Ctsussc_SPEC,
1546 crate::common::RW,
1547 >::from_register(self, 0)
1548 }
1549
1550 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
1551 #[inline(always)]
1552 pub fn reserved(
1553 self,
1554 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsussc_SPEC, crate::common::RW> {
1555 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsussc_SPEC,crate::common::RW>::from_register(self,0)
1556 }
1557}
1558impl ::core::default::Default for Ctsussc {
1559 #[inline(always)]
1560 fn default() -> Ctsussc {
1561 <crate::RegValueT<Ctsussc_SPEC> as RegisterValue<_>>::new(0)
1562 }
1563}
1564pub mod ctsussc {
1565
1566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1567 pub struct Ctsussdiv_SPEC;
1568 pub type Ctsussdiv = crate::EnumBitfieldStruct<u8, Ctsussdiv_SPEC>;
1569 impl Ctsussdiv {
1570 #[doc = "4.00 <= fb"]
1571 pub const _0000: Self = Self::new(0);
1572
1573 #[doc = "2.00 <= fb < 4.00"]
1574 pub const _0001: Self = Self::new(1);
1575
1576 #[doc = "1.33 <= fb < 2.00"]
1577 pub const _0010: Self = Self::new(2);
1578
1579 #[doc = "1.00 <= fb < 1.33"]
1580 pub const _0011: Self = Self::new(3);
1581
1582 #[doc = "0.80 <= fb < 1.00"]
1583 pub const _0100: Self = Self::new(4);
1584
1585 #[doc = "0.67 <= fb < 0.80"]
1586 pub const _0101: Self = Self::new(5);
1587
1588 #[doc = "0.57 <= fb < 0.67"]
1589 pub const _0110: Self = Self::new(6);
1590
1591 #[doc = "0.50 <= fb < 0.57"]
1592 pub const _0111: Self = Self::new(7);
1593
1594 #[doc = "0.44 <= fb < 0.50"]
1595 pub const _1000: Self = Self::new(8);
1596
1597 #[doc = "0.40 <= fb < 0.44"]
1598 pub const _1001: Self = Self::new(9);
1599
1600 #[doc = "0.36 <= fb < 0.40"]
1601 pub const _1010: Self = Self::new(10);
1602
1603 #[doc = "0.33 <= fb < 0.36"]
1604 pub const _1011: Self = Self::new(11);
1605
1606 #[doc = "0.31 <= fb < 0.33"]
1607 pub const _1100: Self = Self::new(12);
1608
1609 #[doc = "0.29 <= fb < 0.31"]
1610 pub const _1101: Self = Self::new(13);
1611
1612 #[doc = "0.27 <= fb < 0.29"]
1613 pub const _1110: Self = Self::new(14);
1614
1615 #[doc = "fb < 0.27"]
1616 pub const _1111: Self = Self::new(15);
1617 }
1618}
1619#[doc(hidden)]
1620#[derive(Copy, Clone, Eq, PartialEq)]
1621pub struct Ctsuso0_SPEC;
1622impl crate::sealed::RegSpec for Ctsuso0_SPEC {
1623 type DataType = u16;
1624}
1625
1626#[doc = "CTSU Sensor Offset Register 0"]
1627pub type Ctsuso0 = crate::RegValueT<Ctsuso0_SPEC>;
1628
1629impl Ctsuso0 {
1630 #[doc = "CTSU Measurement Count Setting"]
1631 #[inline(always)]
1632 pub fn ctsusnum(
1633 self,
1634 ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, Ctsuso0_SPEC, crate::common::RW> {
1635 crate::common::RegisterField::<10,0x3f,1,0,u8,u8,Ctsuso0_SPEC,crate::common::RW>::from_register(self,0)
1636 }
1637
1638 #[doc = "CTSU Sensor Offset AdjustmentCurrent offset amount is CTSUSO ( 0 to 1023 )"]
1639 #[inline(always)]
1640 pub fn ctsuso(
1641 self,
1642 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Ctsuso0_SPEC, crate::common::RW>
1643 {
1644 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Ctsuso0_SPEC,crate::common::RW>::from_register(self,0)
1645 }
1646}
1647impl ::core::default::Default for Ctsuso0 {
1648 #[inline(always)]
1649 fn default() -> Ctsuso0 {
1650 <crate::RegValueT<Ctsuso0_SPEC> as RegisterValue<_>>::new(0)
1651 }
1652}
1653
1654#[doc(hidden)]
1655#[derive(Copy, Clone, Eq, PartialEq)]
1656pub struct Ctsuso1_SPEC;
1657impl crate::sealed::RegSpec for Ctsuso1_SPEC {
1658 type DataType = u16;
1659}
1660
1661#[doc = "CTSU Sensor Offset Register 1"]
1662pub type Ctsuso1 = crate::RegValueT<Ctsuso1_SPEC>;
1663
1664impl Ctsuso1 {
1665 #[doc = "This bit is read as 0. The write value should be 0."]
1666 #[inline(always)]
1667 pub fn reserved(
1668 self,
1669 ) -> crate::common::RegisterFieldBool<15, 1, 0, Ctsuso1_SPEC, crate::common::RW> {
1670 crate::common::RegisterFieldBool::<15, 1, 0, Ctsuso1_SPEC, crate::common::RW>::from_register(
1671 self, 0,
1672 )
1673 }
1674
1675 #[doc = "CTSU ICO Gain Adjustment"]
1676 #[inline(always)]
1677 pub fn ctsuicog(
1678 self,
1679 ) -> crate::common::RegisterField<
1680 13,
1681 0x3,
1682 1,
1683 0,
1684 ctsuso1::Ctsuicog,
1685 ctsuso1::Ctsuicog,
1686 Ctsuso1_SPEC,
1687 crate::common::RW,
1688 > {
1689 crate::common::RegisterField::<
1690 13,
1691 0x3,
1692 1,
1693 0,
1694 ctsuso1::Ctsuicog,
1695 ctsuso1::Ctsuicog,
1696 Ctsuso1_SPEC,
1697 crate::common::RW,
1698 >::from_register(self, 0)
1699 }
1700
1701 #[doc = "CTSU Base Clock SettingOperating clock divided by ( CTSUSDPA + 1 ) x 2"]
1702 #[inline(always)]
1703 pub fn ctsusdpa(
1704 self,
1705 ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Ctsuso1_SPEC, crate::common::RW> {
1706 crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Ctsuso1_SPEC,crate::common::RW>::from_register(self,0)
1707 }
1708
1709 #[doc = "CTSU Reference ICO Current AdjustmentCurrent offset amount is CTSUSO ( 0 to 255 )"]
1710 #[inline(always)]
1711 pub fn ctsuricoa(
1712 self,
1713 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ctsuso1_SPEC, crate::common::RW> {
1714 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ctsuso1_SPEC,crate::common::RW>::from_register(self,0)
1715 }
1716}
1717impl ::core::default::Default for Ctsuso1 {
1718 #[inline(always)]
1719 fn default() -> Ctsuso1 {
1720 <crate::RegValueT<Ctsuso1_SPEC> as RegisterValue<_>>::new(0)
1721 }
1722}
1723pub mod ctsuso1 {
1724
1725 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1726 pub struct Ctsuicog_SPEC;
1727 pub type Ctsuicog = crate::EnumBitfieldStruct<u8, Ctsuicog_SPEC>;
1728 impl Ctsuicog {
1729 #[doc = "100 percent gain"]
1730 pub const _00: Self = Self::new(0);
1731
1732 #[doc = "66 percent gain"]
1733 pub const _01: Self = Self::new(1);
1734
1735 #[doc = "50 percent gain"]
1736 pub const _10: Self = Self::new(2);
1737
1738 #[doc = "40 percent gain"]
1739 pub const _11: Self = Self::new(3);
1740 }
1741}
1742#[doc(hidden)]
1743#[derive(Copy, Clone, Eq, PartialEq)]
1744pub struct Ctsusc_SPEC;
1745impl crate::sealed::RegSpec for Ctsusc_SPEC {
1746 type DataType = u16;
1747}
1748
1749#[doc = "CTSU Sensor Counter"]
1750pub type Ctsusc = crate::RegValueT<Ctsusc_SPEC>;
1751
1752impl Ctsusc {
1753 #[doc = "CTSU Sensor CounterThese bits indicate the measurement result of the CTSU. These bits indicate FFFFh when an overflow occurs."]
1754 #[inline(always)]
1755 pub fn ctsusc(
1756 self,
1757 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsusc_SPEC, crate::common::R>
1758 {
1759 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsusc_SPEC,crate::common::R>::from_register(self,0)
1760 }
1761}
1762impl ::core::default::Default for Ctsusc {
1763 #[inline(always)]
1764 fn default() -> Ctsusc {
1765 <crate::RegValueT<Ctsusc_SPEC> as RegisterValue<_>>::new(0)
1766 }
1767}
1768
1769#[doc(hidden)]
1770#[derive(Copy, Clone, Eq, PartialEq)]
1771pub struct Ctsurc_SPEC;
1772impl crate::sealed::RegSpec for Ctsurc_SPEC {
1773 type DataType = u16;
1774}
1775
1776#[doc = "CTSU Reference Counter"]
1777pub type Ctsurc = crate::RegValueT<Ctsurc_SPEC>;
1778
1779impl Ctsurc {
1780 #[doc = "CTSU Reference Counter"]
1781 #[inline(always)]
1782 pub fn ctsurc(
1783 self,
1784 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Ctsurc_SPEC, crate::common::R>
1785 {
1786 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Ctsurc_SPEC,crate::common::R>::from_register(self,0)
1787 }
1788}
1789impl ::core::default::Default for Ctsurc {
1790 #[inline(always)]
1791 fn default() -> Ctsurc {
1792 <crate::RegValueT<Ctsurc_SPEC> as RegisterValue<_>>::new(0)
1793 }
1794}
1795
1796#[doc(hidden)]
1797#[derive(Copy, Clone, Eq, PartialEq)]
1798pub struct Ctsuerrs_SPEC;
1799impl crate::sealed::RegSpec for Ctsuerrs_SPEC {
1800 type DataType = u16;
1801}
1802
1803#[doc = "CTSU Error Status Register"]
1804pub type Ctsuerrs = crate::RegValueT<Ctsuerrs_SPEC>;
1805
1806impl Ctsuerrs {
1807 #[doc = "TSCAP Voltage Error Monitor"]
1808 #[inline(always)]
1809 pub fn ctsuicomp(
1810 self,
1811 ) -> crate::common::RegisterField<
1812 15,
1813 0x1,
1814 1,
1815 0,
1816 ctsuerrs::Ctsuicomp,
1817 ctsuerrs::Ctsuicomp,
1818 Ctsuerrs_SPEC,
1819 crate::common::R,
1820 > {
1821 crate::common::RegisterField::<
1822 15,
1823 0x1,
1824 1,
1825 0,
1826 ctsuerrs::Ctsuicomp,
1827 ctsuerrs::Ctsuicomp,
1828 Ctsuerrs_SPEC,
1829 crate::common::R,
1830 >::from_register(self, 0)
1831 }
1832
1833 #[doc = "These bits are read as 000000000000000."]
1834 #[inline(always)]
1835 pub fn reserved(
1836 self,
1837 ) -> crate::common::RegisterField<0, 0x7fff, 1, 0, u16, u16, Ctsuerrs_SPEC, crate::common::R>
1838 {
1839 crate::common::RegisterField::<0,0x7fff,1,0,u16,u16,Ctsuerrs_SPEC,crate::common::R>::from_register(self,0)
1840 }
1841}
1842impl ::core::default::Default for Ctsuerrs {
1843 #[inline(always)]
1844 fn default() -> Ctsuerrs {
1845 <crate::RegValueT<Ctsuerrs_SPEC> as RegisterValue<_>>::new(0)
1846 }
1847}
1848pub mod ctsuerrs {
1849
1850 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1851 pub struct Ctsuicomp_SPEC;
1852 pub type Ctsuicomp = crate::EnumBitfieldStruct<u8, Ctsuicomp_SPEC>;
1853 impl Ctsuicomp {
1854 #[doc = "Normal TSCAP voltage"]
1855 pub const _0: Self = Self::new(0);
1856
1857 #[doc = "Abnormal TSCAP voltage"]
1858 pub const _1: Self = Self::new(1);
1859 }
1860}