1#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "ARM 32-bit Cortex-M23 Microcontroller based device, CPU clock up to 48MHz, etc."]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "acmphs0")]
31pub mod acmphs0;
32#[cfg(feature = "acmplp")]
33pub mod acmplp;
34#[cfg(feature = "adc160")]
35pub mod adc160;
36#[cfg(feature = "agt0")]
37pub mod agt0;
38#[cfg(feature = "bus")]
39pub mod bus;
40#[cfg(feature = "cac")]
41pub mod cac;
42#[cfg(feature = "can0")]
43pub mod can0;
44#[cfg(feature = "crc")]
45pub mod crc;
46#[cfg(feature = "ctsu")]
47pub mod ctsu;
48#[cfg(feature = "dac12")]
49pub mod dac12;
50#[cfg(feature = "dac8")]
51pub mod dac8;
52#[cfg(feature = "dbg")]
53pub mod dbg;
54#[cfg(feature = "doc")]
55pub mod doc;
56#[cfg(feature = "dtc")]
57pub mod dtc;
58#[cfg(feature = "elc")]
59pub mod elc;
60#[cfg(feature = "fcache")]
61pub mod fcache;
62#[cfg(feature = "gpt161")]
63pub mod gpt161;
64#[cfg(feature = "gpt320")]
65pub mod gpt320;
66#[cfg(feature = "gpt_ops")]
67pub mod gpt_ops;
68#[cfg(feature = "icu")]
69pub mod icu;
70#[cfg(feature = "iic0")]
71pub mod iic0;
72#[cfg(feature = "iic1")]
73pub mod iic1;
74#[cfg(feature = "iwdt")]
75pub mod iwdt;
76#[cfg(feature = "kint")]
77pub mod kint;
78#[cfg(feature = "mmf")]
79pub mod mmf;
80#[cfg(feature = "mmpu")]
81pub mod mmpu;
82#[cfg(feature = "mstp")]
83pub mod mstp;
84#[cfg(feature = "opamp")]
85pub mod opamp;
86#[cfg(feature = "pfs")]
87pub mod pfs;
88#[cfg(feature = "pmisc")]
89pub mod pmisc;
90#[cfg(feature = "poeg")]
91pub mod poeg;
92#[cfg(feature = "port0")]
93pub mod port0;
94#[cfg(feature = "port1")]
95pub mod port1;
96#[cfg(feature = "rtc")]
97pub mod rtc;
98#[cfg(feature = "sci0")]
99pub mod sci0;
100#[cfg(feature = "sci1")]
101pub mod sci1;
102#[cfg(feature = "sdadc24")]
103pub mod sdadc24;
104#[cfg(feature = "smpu")]
105pub mod smpu;
106#[cfg(feature = "spi0")]
107pub mod spi0;
108#[cfg(feature = "spmon")]
109pub mod spmon;
110#[cfg(feature = "sram")]
111pub mod sram;
112#[cfg(feature = "system")]
113pub mod system;
114#[cfg(feature = "tsn")]
115pub mod tsn;
116#[cfg(feature = "usbfs")]
117pub mod usbfs;
118#[cfg(feature = "wdt")]
119pub mod wdt;
120
121#[cfg(feature = "acmphs0")]
122#[derive(Copy, Clone, Eq, PartialEq)]
123pub struct Acmphs0 {
124 ptr: *mut u8,
125}
126#[cfg(feature = "acmphs0")]
127pub const ACMPHS0: self::Acmphs0 = self::Acmphs0 {
128 ptr: 0x40085000u32 as _,
129};
130#[cfg(feature = "acmplp")]
131#[derive(Copy, Clone, Eq, PartialEq)]
132pub struct Acmplp {
133 ptr: *mut u8,
134}
135#[cfg(feature = "acmplp")]
136pub const ACMPLP: self::Acmplp = self::Acmplp {
137 ptr: 0x40085e00u32 as _,
138};
139#[cfg(feature = "adc160")]
140#[derive(Copy, Clone, Eq, PartialEq)]
141pub struct Adc160 {
142 ptr: *mut u8,
143}
144#[cfg(feature = "adc160")]
145pub const ADC160: self::Adc160 = self::Adc160 {
146 ptr: 0x4005c000u32 as _,
147};
148#[cfg(feature = "ctsu")]
149#[derive(Copy, Clone, Eq, PartialEq)]
150pub struct Ctsu {
151 ptr: *mut u8,
152}
153#[cfg(feature = "ctsu")]
154pub const CTSU: self::Ctsu = self::Ctsu {
155 ptr: 0x40081000u32 as _,
156};
157#[cfg(feature = "opamp")]
158#[derive(Copy, Clone, Eq, PartialEq)]
159pub struct Opamp {
160 ptr: *mut u8,
161}
162#[cfg(feature = "opamp")]
163pub const OPAMP: self::Opamp = self::Opamp {
164 ptr: 0x40086800u32 as _,
165};
166#[cfg(feature = "sdadc24")]
167#[derive(Copy, Clone, Eq, PartialEq)]
168pub struct Sdadc24 {
169 ptr: *mut u8,
170}
171#[cfg(feature = "sdadc24")]
172pub const SDADC24: self::Sdadc24 = self::Sdadc24 {
173 ptr: 0x4009c000u32 as _,
174};
175#[cfg(feature = "tsn")]
176#[derive(Copy, Clone, Eq, PartialEq)]
177pub struct Tsn {
178 ptr: *mut u8,
179}
180#[cfg(feature = "tsn")]
181pub const TSN: self::Tsn = self::Tsn {
182 ptr: 0x407ec000u32 as _,
183};
184#[cfg(feature = "dac12")]
185#[derive(Copy, Clone, Eq, PartialEq)]
186pub struct Dac12 {
187 ptr: *mut u8,
188}
189#[cfg(feature = "dac12")]
190pub const DAC12: self::Dac12 = self::Dac12 {
191 ptr: 0x4005e000u32 as _,
192};
193#[cfg(feature = "dac8")]
194#[derive(Copy, Clone, Eq, PartialEq)]
195pub struct Dac8 {
196 ptr: *mut u8,
197}
198#[cfg(feature = "dac8")]
199pub const DAC8: self::Dac8 = self::Dac8 {
200 ptr: 0x4009e000u32 as _,
201};
202#[cfg(feature = "elc")]
203#[derive(Copy, Clone, Eq, PartialEq)]
204pub struct Elc {
205 ptr: *mut u8,
206}
207#[cfg(feature = "elc")]
208pub const ELC: self::Elc = self::Elc {
209 ptr: 0x40041000u32 as _,
210};
211#[cfg(feature = "iwdt")]
212#[derive(Copy, Clone, Eq, PartialEq)]
213pub struct Iwdt {
214 ptr: *mut u8,
215}
216#[cfg(feature = "iwdt")]
217pub const IWDT: self::Iwdt = self::Iwdt {
218 ptr: 0x40044400u32 as _,
219};
220#[cfg(feature = "kint")]
221#[derive(Copy, Clone, Eq, PartialEq)]
222pub struct Kint {
223 ptr: *mut u8,
224}
225#[cfg(feature = "kint")]
226pub const KINT: self::Kint = self::Kint {
227 ptr: 0x40080000u32 as _,
228};
229#[cfg(feature = "usbfs")]
230#[derive(Copy, Clone, Eq, PartialEq)]
231pub struct Usbfs {
232 ptr: *mut u8,
233}
234#[cfg(feature = "usbfs")]
235pub const USBFS: self::Usbfs = self::Usbfs {
236 ptr: 0x40090000u32 as _,
237};
238#[cfg(feature = "wdt")]
239#[derive(Copy, Clone, Eq, PartialEq)]
240pub struct Wdt {
241 ptr: *mut u8,
242}
243#[cfg(feature = "wdt")]
244pub const WDT: self::Wdt = self::Wdt {
245 ptr: 0x40044200u32 as _,
246};
247#[cfg(feature = "cac")]
248#[derive(Copy, Clone, Eq, PartialEq)]
249pub struct Cac {
250 ptr: *mut u8,
251}
252#[cfg(feature = "cac")]
253pub const CAC: self::Cac = self::Cac {
254 ptr: 0x40044600u32 as _,
255};
256#[cfg(feature = "crc")]
257#[derive(Copy, Clone, Eq, PartialEq)]
258pub struct Crc {
259 ptr: *mut u8,
260}
261#[cfg(feature = "crc")]
262pub const CRC: self::Crc = self::Crc {
263 ptr: 0x40074000u32 as _,
264};
265#[cfg(feature = "doc")]
266#[derive(Copy, Clone, Eq, PartialEq)]
267pub struct Doc {
268 ptr: *mut u8,
269}
270#[cfg(feature = "doc")]
271pub const DOC: self::Doc = self::Doc {
272 ptr: 0x40054100u32 as _,
273};
274#[cfg(feature = "sci0")]
275#[derive(Copy, Clone, Eq, PartialEq)]
276pub struct Sci0 {
277 ptr: *mut u8,
278}
279#[cfg(feature = "sci0")]
280pub const SCI0: self::Sci0 = self::Sci0 {
281 ptr: 0x40070000u32 as _,
282};
283#[cfg(feature = "sci1")]
284#[derive(Copy, Clone, Eq, PartialEq)]
285pub struct Sci1 {
286 ptr: *mut u8,
287}
288#[cfg(feature = "sci1")]
289pub const SCI1: self::Sci1 = self::Sci1 {
290 ptr: 0x40070020u32 as _,
291};
292#[cfg(feature = "sci9")]
293pub const SCI9: self::Sci1 = self::Sci1 {
294 ptr: 0x40070120u32 as _,
295};
296#[cfg(feature = "spi0")]
297#[derive(Copy, Clone, Eq, PartialEq)]
298pub struct Spi0 {
299 ptr: *mut u8,
300}
301#[cfg(feature = "spi0")]
302pub const SPI0: self::Spi0 = self::Spi0 {
303 ptr: 0x40072000u32 as _,
304};
305#[cfg(feature = "spi1")]
306pub const SPI1: self::Spi0 = self::Spi0 {
307 ptr: 0x40072100u32 as _,
308};
309#[cfg(feature = "can0")]
310#[derive(Copy, Clone, Eq, PartialEq)]
311pub struct Can0 {
312 ptr: *mut u8,
313}
314#[cfg(feature = "can0")]
315pub const CAN0: self::Can0 = self::Can0 {
316 ptr: 0x40050000u32 as _,
317};
318#[cfg(feature = "iic0")]
319#[derive(Copy, Clone, Eq, PartialEq)]
320pub struct Iic0 {
321 ptr: *mut u8,
322}
323#[cfg(feature = "iic0")]
324pub const IIC0: self::Iic0 = self::Iic0 {
325 ptr: 0x40053000u32 as _,
326};
327#[cfg(feature = "iic1")]
328#[derive(Copy, Clone, Eq, PartialEq)]
329pub struct Iic1 {
330 ptr: *mut u8,
331}
332#[cfg(feature = "iic1")]
333pub const IIC1: self::Iic1 = self::Iic1 {
334 ptr: 0x40053100u32 as _,
335};
336#[cfg(feature = "mmf")]
337#[derive(Copy, Clone, Eq, PartialEq)]
338pub struct Mmf {
339 ptr: *mut u8,
340}
341#[cfg(feature = "mmf")]
342pub const MMF: self::Mmf = self::Mmf {
343 ptr: 0x40001000u32 as _,
344};
345#[cfg(feature = "mmpu")]
346#[derive(Copy, Clone, Eq, PartialEq)]
347pub struct Mmpu {
348 ptr: *mut u8,
349}
350#[cfg(feature = "mmpu")]
351pub const MMPU: self::Mmpu = self::Mmpu {
352 ptr: 0x40000000u32 as _,
353};
354#[cfg(feature = "smpu")]
355#[derive(Copy, Clone, Eq, PartialEq)]
356pub struct Smpu {
357 ptr: *mut u8,
358}
359#[cfg(feature = "smpu")]
360pub const SMPU: self::Smpu = self::Smpu {
361 ptr: 0x40000c00u32 as _,
362};
363#[cfg(feature = "spmon")]
364#[derive(Copy, Clone, Eq, PartialEq)]
365pub struct Spmon {
366 ptr: *mut u8,
367}
368#[cfg(feature = "spmon")]
369pub const SPMON: self::Spmon = self::Spmon {
370 ptr: 0x40000d00u32 as _,
371};
372#[cfg(feature = "sram")]
373#[derive(Copy, Clone, Eq, PartialEq)]
374pub struct Sram {
375 ptr: *mut u8,
376}
377#[cfg(feature = "sram")]
378pub const SRAM: self::Sram = self::Sram {
379 ptr: 0x40002000u32 as _,
380};
381#[cfg(feature = "bus")]
382#[derive(Copy, Clone, Eq, PartialEq)]
383pub struct Bus {
384 ptr: *mut u8,
385}
386#[cfg(feature = "bus")]
387pub const BUS: self::Bus = self::Bus {
388 ptr: 0x40003000u32 as _,
389};
390#[cfg(feature = "dbg")]
391#[derive(Copy, Clone, Eq, PartialEq)]
392pub struct Dbg {
393 ptr: *mut u8,
394}
395#[cfg(feature = "dbg")]
396pub const DBG: self::Dbg = self::Dbg {
397 ptr: 0x4001b000u32 as _,
398};
399#[cfg(feature = "dtc")]
400#[derive(Copy, Clone, Eq, PartialEq)]
401pub struct Dtc {
402 ptr: *mut u8,
403}
404#[cfg(feature = "dtc")]
405pub const DTC: self::Dtc = self::Dtc {
406 ptr: 0x40005400u32 as _,
407};
408#[cfg(feature = "icu")]
409#[derive(Copy, Clone, Eq, PartialEq)]
410pub struct Icu {
411 ptr: *mut u8,
412}
413#[cfg(feature = "icu")]
414pub const ICU: self::Icu = self::Icu {
415 ptr: 0x40006000u32 as _,
416};
417#[cfg(feature = "system")]
418#[derive(Copy, Clone, Eq, PartialEq)]
419pub struct System {
420 ptr: *mut u8,
421}
422#[cfg(feature = "system")]
423pub const SYSTEM: self::System = self::System {
424 ptr: 0x4001e000u32 as _,
425};
426#[cfg(feature = "mstp")]
427#[derive(Copy, Clone, Eq, PartialEq)]
428pub struct Mstp {
429 ptr: *mut u8,
430}
431#[cfg(feature = "mstp")]
432pub const MSTP: self::Mstp = self::Mstp {
433 ptr: 0x40047000u32 as _,
434};
435#[cfg(feature = "agt0")]
436#[derive(Copy, Clone, Eq, PartialEq)]
437pub struct Agt0 {
438 ptr: *mut u8,
439}
440#[cfg(feature = "agt0")]
441pub const AGT0: self::Agt0 = self::Agt0 {
442 ptr: 0x40084000u32 as _,
443};
444#[cfg(feature = "agt1")]
445pub const AGT1: self::Agt0 = self::Agt0 {
446 ptr: 0x40084100u32 as _,
447};
448#[cfg(feature = "gpt320")]
449#[derive(Copy, Clone, Eq, PartialEq)]
450pub struct Gpt320 {
451 ptr: *mut u8,
452}
453#[cfg(feature = "gpt320")]
454pub const GPT320: self::Gpt320 = self::Gpt320 {
455 ptr: 0x40078000u32 as _,
456};
457#[cfg(feature = "gpt_ops")]
458#[derive(Copy, Clone, Eq, PartialEq)]
459pub struct GptOps {
460 ptr: *mut u8,
461}
462#[cfg(feature = "gpt_ops")]
463pub const GPT_OPS: self::GptOps = self::GptOps {
464 ptr: 0x40078ff0u32 as _,
465};
466#[cfg(feature = "gpt161")]
467#[derive(Copy, Clone, Eq, PartialEq)]
468pub struct Gpt161 {
469 ptr: *mut u8,
470}
471#[cfg(feature = "gpt161")]
472pub const GPT161: self::Gpt161 = self::Gpt161 {
473 ptr: 0x40078100u32 as _,
474};
475#[cfg(feature = "gpt162")]
476pub const GPT162: self::Gpt161 = self::Gpt161 {
477 ptr: 0x40078200u32 as _,
478};
479#[cfg(feature = "gpt163")]
480pub const GPT163: self::Gpt161 = self::Gpt161 {
481 ptr: 0x40078300u32 as _,
482};
483#[cfg(feature = "gpt164")]
484pub const GPT164: self::Gpt161 = self::Gpt161 {
485 ptr: 0x40078400u32 as _,
486};
487#[cfg(feature = "gpt165")]
488pub const GPT165: self::Gpt161 = self::Gpt161 {
489 ptr: 0x40078500u32 as _,
490};
491#[cfg(feature = "gpt166")]
492pub const GPT166: self::Gpt161 = self::Gpt161 {
493 ptr: 0x40078600u32 as _,
494};
495#[cfg(feature = "poeg")]
496#[derive(Copy, Clone, Eq, PartialEq)]
497pub struct Poeg {
498 ptr: *mut u8,
499}
500#[cfg(feature = "poeg")]
501pub const POEG: self::Poeg = self::Poeg {
502 ptr: 0x40042000u32 as _,
503};
504#[cfg(feature = "rtc")]
505#[derive(Copy, Clone, Eq, PartialEq)]
506pub struct Rtc {
507 ptr: *mut u8,
508}
509#[cfg(feature = "rtc")]
510pub const RTC: self::Rtc = self::Rtc {
511 ptr: 0x40044000u32 as _,
512};
513#[cfg(feature = "fcache")]
514#[derive(Copy, Clone, Eq, PartialEq)]
515pub struct Fcache {
516 ptr: *mut u8,
517}
518#[cfg(feature = "fcache")]
519pub const FCACHE: self::Fcache = self::Fcache {
520 ptr: 0x4001c000u32 as _,
521};
522#[cfg(feature = "port0")]
523#[derive(Copy, Clone, Eq, PartialEq)]
524pub struct Port0 {
525 ptr: *mut u8,
526}
527#[cfg(feature = "port0")]
528pub const PORT0: self::Port0 = self::Port0 {
529 ptr: 0x40040000u32 as _,
530};
531#[cfg(feature = "port1")]
532#[derive(Copy, Clone, Eq, PartialEq)]
533pub struct Port1 {
534 ptr: *mut u8,
535}
536#[cfg(feature = "port1")]
537pub const PORT1: self::Port1 = self::Port1 {
538 ptr: 0x40040020u32 as _,
539};
540#[cfg(feature = "port2")]
541pub const PORT2: self::Port1 = self::Port1 {
542 ptr: 0x40040040u32 as _,
543};
544#[cfg(feature = "port3")]
545pub const PORT3: self::Port0 = self::Port0 {
546 ptr: 0x40040060u32 as _,
547};
548#[cfg(feature = "port4")]
549pub const PORT4: self::Port0 = self::Port0 {
550 ptr: 0x40040080u32 as _,
551};
552#[cfg(feature = "port5")]
553pub const PORT5: self::Port0 = self::Port0 {
554 ptr: 0x400400a0u32 as _,
555};
556#[cfg(feature = "port9")]
557pub const PORT9: self::Port0 = self::Port0 {
558 ptr: 0x40040120u32 as _,
559};
560#[cfg(feature = "pfs")]
561#[derive(Copy, Clone, Eq, PartialEq)]
562pub struct Pfs {
563 ptr: *mut u8,
564}
565#[cfg(feature = "pfs")]
566pub const PFS: self::Pfs = self::Pfs {
567 ptr: 0x40040800u32 as _,
568};
569#[cfg(feature = "pmisc")]
570#[derive(Copy, Clone, Eq, PartialEq)]
571pub struct Pmisc {
572 ptr: *mut u8,
573}
574#[cfg(feature = "pmisc")]
575pub const PMISC: self::Pmisc = self::Pmisc {
576 ptr: 0x40040d00u32 as _,
577};
578
579pub use cortex_m::peripheral::Peripherals as CorePeripherals;
580pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU};
581#[doc = "Number available in the NVIC for configuring priority"]
582pub const NVIC_PRIO_BITS: u8 = 2;
583#[doc(hidden)]
584pub union Vector {
585 _handler: unsafe extern "C" fn(),
586 _reserved: u32,
587}
588#[cfg(feature = "rt")]
589pub use self::Interrupt as interrupt;
590#[cfg(feature = "rt")]
591pub use cortex_m_rt::interrupt;
592#[cfg(feature = "rt")]
593pub mod interrupt_handlers {
594 unsafe extern "C" {
595 pub fn IEL0();
596 pub fn IEL1();
597 pub fn IEL2();
598 pub fn IEL3();
599 pub fn IEL4();
600 pub fn IEL5();
601 pub fn IEL6();
602 pub fn IEL7();
603 pub fn IEL8();
604 pub fn IEL9();
605 pub fn IEL10();
606 pub fn IEL11();
607 pub fn IEL12();
608 pub fn IEL13();
609 pub fn IEL14();
610 pub fn IEL15();
611 pub fn IEL16();
612 pub fn IEL17();
613 pub fn IEL18();
614 pub fn IEL19();
615 pub fn IEL20();
616 pub fn IEL21();
617 pub fn IEL22();
618 pub fn IEL23();
619 pub fn IEL24();
620 pub fn IEL25();
621 pub fn IEL26();
622 pub fn IEL27();
623 pub fn IEL28();
624 pub fn IEL29();
625 pub fn IEL30();
626 pub fn IEL31();
627 }
628}
629#[cfg(feature = "rt")]
630#[doc(hidden)]
631#[unsafe(link_section = ".vector_table.interrupts")]
632#[unsafe(no_mangle)]
633pub static __INTERRUPTS: [Vector; 32] = [
634 Vector {
635 _handler: interrupt_handlers::IEL0,
636 },
637 Vector {
638 _handler: interrupt_handlers::IEL1,
639 },
640 Vector {
641 _handler: interrupt_handlers::IEL2,
642 },
643 Vector {
644 _handler: interrupt_handlers::IEL3,
645 },
646 Vector {
647 _handler: interrupt_handlers::IEL4,
648 },
649 Vector {
650 _handler: interrupt_handlers::IEL5,
651 },
652 Vector {
653 _handler: interrupt_handlers::IEL6,
654 },
655 Vector {
656 _handler: interrupt_handlers::IEL7,
657 },
658 Vector {
659 _handler: interrupt_handlers::IEL8,
660 },
661 Vector {
662 _handler: interrupt_handlers::IEL9,
663 },
664 Vector {
665 _handler: interrupt_handlers::IEL10,
666 },
667 Vector {
668 _handler: interrupt_handlers::IEL11,
669 },
670 Vector {
671 _handler: interrupt_handlers::IEL12,
672 },
673 Vector {
674 _handler: interrupt_handlers::IEL13,
675 },
676 Vector {
677 _handler: interrupt_handlers::IEL14,
678 },
679 Vector {
680 _handler: interrupt_handlers::IEL15,
681 },
682 Vector {
683 _handler: interrupt_handlers::IEL16,
684 },
685 Vector {
686 _handler: interrupt_handlers::IEL17,
687 },
688 Vector {
689 _handler: interrupt_handlers::IEL18,
690 },
691 Vector {
692 _handler: interrupt_handlers::IEL19,
693 },
694 Vector {
695 _handler: interrupt_handlers::IEL20,
696 },
697 Vector {
698 _handler: interrupt_handlers::IEL21,
699 },
700 Vector {
701 _handler: interrupt_handlers::IEL22,
702 },
703 Vector {
704 _handler: interrupt_handlers::IEL23,
705 },
706 Vector {
707 _handler: interrupt_handlers::IEL24,
708 },
709 Vector {
710 _handler: interrupt_handlers::IEL25,
711 },
712 Vector {
713 _handler: interrupt_handlers::IEL26,
714 },
715 Vector {
716 _handler: interrupt_handlers::IEL27,
717 },
718 Vector {
719 _handler: interrupt_handlers::IEL28,
720 },
721 Vector {
722 _handler: interrupt_handlers::IEL29,
723 },
724 Vector {
725 _handler: interrupt_handlers::IEL30,
726 },
727 Vector {
728 _handler: interrupt_handlers::IEL31,
729 },
730];
731#[doc = "Enumeration of all the interrupts."]
732#[derive(Copy, Clone, Debug, PartialEq, Eq)]
733#[repr(u16)]
734pub enum Interrupt {
735 #[doc = "ICU Interrupt 0"]
736 IEL0 = 0,
737
738 #[doc = "ICU Interrupt 1"]
739 IEL1 = 1,
740
741 #[doc = "ICU Interrupt 2"]
742 IEL2 = 2,
743
744 #[doc = "ICU Interrupt 3"]
745 IEL3 = 3,
746
747 #[doc = "ICU Interrupt 4"]
748 IEL4 = 4,
749
750 #[doc = "ICU Interrupt 5"]
751 IEL5 = 5,
752
753 #[doc = "ICU Interrupt 6"]
754 IEL6 = 6,
755
756 #[doc = "ICU Interrupt 7"]
757 IEL7 = 7,
758
759 #[doc = "ICU Interrupt 8"]
760 IEL8 = 8,
761
762 #[doc = "ICU Interrupt 9"]
763 IEL9 = 9,
764
765 #[doc = "ICU Interrupt 10"]
766 IEL10 = 10,
767
768 #[doc = "ICU Interrupt 11"]
769 IEL11 = 11,
770
771 #[doc = "ICU Interrupt 12"]
772 IEL12 = 12,
773
774 #[doc = "ICU Interrupt 13"]
775 IEL13 = 13,
776
777 #[doc = "ICU Interrupt 14"]
778 IEL14 = 14,
779
780 #[doc = "ICU Interrupt 15"]
781 IEL15 = 15,
782
783 #[doc = "ICU Interrupt 16"]
784 IEL16 = 16,
785
786 #[doc = "ICU Interrupt 17"]
787 IEL17 = 17,
788
789 #[doc = "ICU Interrupt 18"]
790 IEL18 = 18,
791
792 #[doc = "ICU Interrupt 19"]
793 IEL19 = 19,
794
795 #[doc = "ICU Interrupt 20"]
796 IEL20 = 20,
797
798 #[doc = "ICU Interrupt 21"]
799 IEL21 = 21,
800
801 #[doc = "ICU Interrupt 22"]
802 IEL22 = 22,
803
804 #[doc = "ICU Interrupt 23"]
805 IEL23 = 23,
806
807 #[doc = "ICU Interrupt 24"]
808 IEL24 = 24,
809
810 #[doc = "ICU Interrupt 25"]
811 IEL25 = 25,
812
813 #[doc = "ICU Interrupt 26"]
814 IEL26 = 26,
815
816 #[doc = "ICU Interrupt 27"]
817 IEL27 = 27,
818
819 #[doc = "ICU Interrupt 28"]
820 IEL28 = 28,
821
822 #[doc = "ICU Interrupt 29"]
823 IEL29 = 29,
824
825 #[doc = "ICU Interrupt 30"]
826 IEL30 = 30,
827
828 #[doc = "ICU Interrupt 31"]
829 IEL31 = 31,
830}
831unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
832 #[inline(always)]
833 fn number(self) -> u16 {
834 self as u16
835 }
836}
837#[allow(non_snake_case)]
838pub struct Peripherals {
840 #[cfg(feature = "acmphs0")]
841 pub ACMPHS0: self::Acmphs0,
842 #[cfg(feature = "acmplp")]
843 pub ACMPLP: self::Acmplp,
844 #[cfg(feature = "adc160")]
845 pub ADC160: self::Adc160,
846 #[cfg(feature = "ctsu")]
847 pub CTSU: self::Ctsu,
848 #[cfg(feature = "opamp")]
849 pub OPAMP: self::Opamp,
850 #[cfg(feature = "sdadc24")]
851 pub SDADC24: self::Sdadc24,
852 #[cfg(feature = "tsn")]
853 pub TSN: self::Tsn,
854 #[cfg(feature = "dac12")]
855 pub DAC12: self::Dac12,
856 #[cfg(feature = "dac8")]
857 pub DAC8: self::Dac8,
858 #[cfg(feature = "elc")]
859 pub ELC: self::Elc,
860 #[cfg(feature = "iwdt")]
861 pub IWDT: self::Iwdt,
862 #[cfg(feature = "kint")]
863 pub KINT: self::Kint,
864 #[cfg(feature = "usbfs")]
865 pub USBFS: self::Usbfs,
866 #[cfg(feature = "wdt")]
867 pub WDT: self::Wdt,
868 #[cfg(feature = "cac")]
869 pub CAC: self::Cac,
870 #[cfg(feature = "crc")]
871 pub CRC: self::Crc,
872 #[cfg(feature = "doc")]
873 pub DOC: self::Doc,
874 #[cfg(feature = "sci0")]
875 pub SCI0: self::Sci0,
876 #[cfg(feature = "sci1")]
877 pub SCI1: self::Sci1,
878 #[cfg(feature = "sci9")]
879 pub SCI9: self::Sci1,
880 #[cfg(feature = "spi0")]
881 pub SPI0: self::Spi0,
882 #[cfg(feature = "spi1")]
883 pub SPI1: self::Spi0,
884 #[cfg(feature = "can0")]
885 pub CAN0: self::Can0,
886 #[cfg(feature = "iic0")]
887 pub IIC0: self::Iic0,
888 #[cfg(feature = "iic1")]
889 pub IIC1: self::Iic1,
890 #[cfg(feature = "mmf")]
891 pub MMF: self::Mmf,
892 #[cfg(feature = "mmpu")]
893 pub MMPU: self::Mmpu,
894 #[cfg(feature = "smpu")]
895 pub SMPU: self::Smpu,
896 #[cfg(feature = "spmon")]
897 pub SPMON: self::Spmon,
898 #[cfg(feature = "sram")]
899 pub SRAM: self::Sram,
900 #[cfg(feature = "bus")]
901 pub BUS: self::Bus,
902 #[cfg(feature = "dbg")]
903 pub DBG: self::Dbg,
904 #[cfg(feature = "dtc")]
905 pub DTC: self::Dtc,
906 #[cfg(feature = "icu")]
907 pub ICU: self::Icu,
908 #[cfg(feature = "system")]
909 pub SYSTEM: self::System,
910 #[cfg(feature = "mstp")]
911 pub MSTP: self::Mstp,
912 #[cfg(feature = "agt0")]
913 pub AGT0: self::Agt0,
914 #[cfg(feature = "agt1")]
915 pub AGT1: self::Agt0,
916 #[cfg(feature = "gpt320")]
917 pub GPT320: self::Gpt320,
918 #[cfg(feature = "gpt_ops")]
919 pub GPT_OPS: self::GptOps,
920 #[cfg(feature = "gpt161")]
921 pub GPT161: self::Gpt161,
922 #[cfg(feature = "gpt162")]
923 pub GPT162: self::Gpt161,
924 #[cfg(feature = "gpt163")]
925 pub GPT163: self::Gpt161,
926 #[cfg(feature = "gpt164")]
927 pub GPT164: self::Gpt161,
928 #[cfg(feature = "gpt165")]
929 pub GPT165: self::Gpt161,
930 #[cfg(feature = "gpt166")]
931 pub GPT166: self::Gpt161,
932 #[cfg(feature = "poeg")]
933 pub POEG: self::Poeg,
934 #[cfg(feature = "rtc")]
935 pub RTC: self::Rtc,
936 #[cfg(feature = "fcache")]
937 pub FCACHE: self::Fcache,
938 #[cfg(feature = "port0")]
939 pub PORT0: self::Port0,
940 #[cfg(feature = "port1")]
941 pub PORT1: self::Port1,
942 #[cfg(feature = "port2")]
943 pub PORT2: self::Port1,
944 #[cfg(feature = "port3")]
945 pub PORT3: self::Port0,
946 #[cfg(feature = "port4")]
947 pub PORT4: self::Port0,
948 #[cfg(feature = "port5")]
949 pub PORT5: self::Port0,
950 #[cfg(feature = "port9")]
951 pub PORT9: self::Port0,
952 #[cfg(feature = "pfs")]
953 pub PFS: self::Pfs,
954 #[cfg(feature = "pmisc")]
955 pub PMISC: self::Pmisc,
956}
957
958impl Peripherals {
959 #[inline]
962 pub fn take() -> Option<Self> {
963 Some(Self::steal())
964 }
965
966 #[inline]
969 pub fn steal() -> Self {
970 Peripherals {
971 #[cfg(feature = "acmphs0")]
972 ACMPHS0: crate::ACMPHS0,
973 #[cfg(feature = "acmplp")]
974 ACMPLP: crate::ACMPLP,
975 #[cfg(feature = "adc160")]
976 ADC160: crate::ADC160,
977 #[cfg(feature = "ctsu")]
978 CTSU: crate::CTSU,
979 #[cfg(feature = "opamp")]
980 OPAMP: crate::OPAMP,
981 #[cfg(feature = "sdadc24")]
982 SDADC24: crate::SDADC24,
983 #[cfg(feature = "tsn")]
984 TSN: crate::TSN,
985 #[cfg(feature = "dac12")]
986 DAC12: crate::DAC12,
987 #[cfg(feature = "dac8")]
988 DAC8: crate::DAC8,
989 #[cfg(feature = "elc")]
990 ELC: crate::ELC,
991 #[cfg(feature = "iwdt")]
992 IWDT: crate::IWDT,
993 #[cfg(feature = "kint")]
994 KINT: crate::KINT,
995 #[cfg(feature = "usbfs")]
996 USBFS: crate::USBFS,
997 #[cfg(feature = "wdt")]
998 WDT: crate::WDT,
999 #[cfg(feature = "cac")]
1000 CAC: crate::CAC,
1001 #[cfg(feature = "crc")]
1002 CRC: crate::CRC,
1003 #[cfg(feature = "doc")]
1004 DOC: crate::DOC,
1005 #[cfg(feature = "sci0")]
1006 SCI0: crate::SCI0,
1007 #[cfg(feature = "sci1")]
1008 SCI1: crate::SCI1,
1009 #[cfg(feature = "sci9")]
1010 SCI9: crate::SCI9,
1011 #[cfg(feature = "spi0")]
1012 SPI0: crate::SPI0,
1013 #[cfg(feature = "spi1")]
1014 SPI1: crate::SPI1,
1015 #[cfg(feature = "can0")]
1016 CAN0: crate::CAN0,
1017 #[cfg(feature = "iic0")]
1018 IIC0: crate::IIC0,
1019 #[cfg(feature = "iic1")]
1020 IIC1: crate::IIC1,
1021 #[cfg(feature = "mmf")]
1022 MMF: crate::MMF,
1023 #[cfg(feature = "mmpu")]
1024 MMPU: crate::MMPU,
1025 #[cfg(feature = "smpu")]
1026 SMPU: crate::SMPU,
1027 #[cfg(feature = "spmon")]
1028 SPMON: crate::SPMON,
1029 #[cfg(feature = "sram")]
1030 SRAM: crate::SRAM,
1031 #[cfg(feature = "bus")]
1032 BUS: crate::BUS,
1033 #[cfg(feature = "dbg")]
1034 DBG: crate::DBG,
1035 #[cfg(feature = "dtc")]
1036 DTC: crate::DTC,
1037 #[cfg(feature = "icu")]
1038 ICU: crate::ICU,
1039 #[cfg(feature = "system")]
1040 SYSTEM: crate::SYSTEM,
1041 #[cfg(feature = "mstp")]
1042 MSTP: crate::MSTP,
1043 #[cfg(feature = "agt0")]
1044 AGT0: crate::AGT0,
1045 #[cfg(feature = "agt1")]
1046 AGT1: crate::AGT1,
1047 #[cfg(feature = "gpt320")]
1048 GPT320: crate::GPT320,
1049 #[cfg(feature = "gpt_ops")]
1050 GPT_OPS: crate::GPT_OPS,
1051 #[cfg(feature = "gpt161")]
1052 GPT161: crate::GPT161,
1053 #[cfg(feature = "gpt162")]
1054 GPT162: crate::GPT162,
1055 #[cfg(feature = "gpt163")]
1056 GPT163: crate::GPT163,
1057 #[cfg(feature = "gpt164")]
1058 GPT164: crate::GPT164,
1059 #[cfg(feature = "gpt165")]
1060 GPT165: crate::GPT165,
1061 #[cfg(feature = "gpt166")]
1062 GPT166: crate::GPT166,
1063 #[cfg(feature = "poeg")]
1064 POEG: crate::POEG,
1065 #[cfg(feature = "rtc")]
1066 RTC: crate::RTC,
1067 #[cfg(feature = "fcache")]
1068 FCACHE: crate::FCACHE,
1069 #[cfg(feature = "port0")]
1070 PORT0: crate::PORT0,
1071 #[cfg(feature = "port1")]
1072 PORT1: crate::PORT1,
1073 #[cfg(feature = "port2")]
1074 PORT2: crate::PORT2,
1075 #[cfg(feature = "port3")]
1076 PORT3: crate::PORT3,
1077 #[cfg(feature = "port4")]
1078 PORT4: crate::PORT4,
1079 #[cfg(feature = "port5")]
1080 PORT5: crate::PORT5,
1081 #[cfg(feature = "port9")]
1082 PORT9: crate::PORT9,
1083 #[cfg(feature = "pfs")]
1084 PFS: crate::PFS,
1085 #[cfg(feature = "pmisc")]
1086 PMISC: crate::PMISC,
1087 }
1088 }
1089}