1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"True Random Number Generator"]
28unsafe impl ::core::marker::Send for super::Trng {}
29unsafe impl ::core::marker::Sync for super::Trng {}
30impl super::Trng {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "TRNG Seed Data Register"]
38 #[inline(always)]
39 pub const fn trngsdr(
40 &self,
41 ) -> &'static crate::common::Reg<self::Trngsdr_SPEC, crate::common::R> {
42 unsafe {
43 crate::common::Reg::<self::Trngsdr_SPEC, crate::common::R>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "TRNG Seed Command Register 0"]
50 #[inline(always)]
51 pub const fn trngscr0(
52 &self,
53 ) -> &'static crate::common::Reg<self::Trngscr0_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Trngscr0_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(2usize),
57 )
58 }
59 }
60
61 #[doc = "TRNG Seed Command Register 1"]
62 #[inline(always)]
63 pub const fn trngscr1(
64 &self,
65 ) -> &'static crate::common::Reg<self::Trngscr1_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Trngscr1_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(3usize),
69 )
70 }
71 }
72}
73#[doc(hidden)]
74#[derive(Copy, Clone, Eq, PartialEq)]
75pub struct Trngsdr_SPEC;
76impl crate::sealed::RegSpec for Trngsdr_SPEC {
77 type DataType = u8;
78}
79
80#[doc = "TRNG Seed Data Register"]
81pub type Trngsdr = crate::RegValueT<Trngsdr_SPEC>;
82
83impl NoBitfieldReg<Trngsdr_SPEC> for Trngsdr {}
84impl ::core::default::Default for Trngsdr {
85 #[inline(always)]
86 fn default() -> Trngsdr {
87 <crate::RegValueT<Trngsdr_SPEC> as RegisterValue<_>>::new(0)
88 }
89}
90
91#[doc(hidden)]
92#[derive(Copy, Clone, Eq, PartialEq)]
93pub struct Trngscr0_SPEC;
94impl crate::sealed::RegSpec for Trngscr0_SPEC {
95 type DataType = u8;
96}
97
98#[doc = "TRNG Seed Command Register 0"]
99pub type Trngscr0 = crate::RegValueT<Trngscr0_SPEC>;
100
101impl Trngscr0 {
102 #[doc = "Seed Generation Start"]
103 #[inline(always)]
104 pub fn sgstart(
105 self,
106 ) -> crate::common::RegisterField<
107 2,
108 0x1,
109 1,
110 0,
111 trngscr0::Sgstart,
112 trngscr0::Sgstart,
113 Trngscr0_SPEC,
114 crate::common::W,
115 > {
116 crate::common::RegisterField::<
117 2,
118 0x1,
119 1,
120 0,
121 trngscr0::Sgstart,
122 trngscr0::Sgstart,
123 Trngscr0_SPEC,
124 crate::common::W,
125 >::from_register(self, 0)
126 }
127
128 #[doc = "Seed Generation Circuit Enable"]
129 #[inline(always)]
130 pub fn sgcen(
131 self,
132 ) -> crate::common::RegisterField<
133 3,
134 0x1,
135 1,
136 0,
137 trngscr0::Sgcen,
138 trngscr0::Sgcen,
139 Trngscr0_SPEC,
140 crate::common::RW,
141 > {
142 crate::common::RegisterField::<
143 3,
144 0x1,
145 1,
146 0,
147 trngscr0::Sgcen,
148 trngscr0::Sgcen,
149 Trngscr0_SPEC,
150 crate::common::RW,
151 >::from_register(self, 0)
152 }
153
154 #[doc = "Read Ready"]
155 #[inline(always)]
156 pub fn rdrdy(
157 self,
158 ) -> crate::common::RegisterFieldBool<7, 1, 0, Trngscr0_SPEC, crate::common::R> {
159 crate::common::RegisterFieldBool::<7, 1, 0, Trngscr0_SPEC, crate::common::R>::from_register(
160 self, 0,
161 )
162 }
163}
164impl ::core::default::Default for Trngscr0 {
165 #[inline(always)]
166 fn default() -> Trngscr0 {
167 <crate::RegValueT<Trngscr0_SPEC> as RegisterValue<_>>::new(0)
168 }
169}
170pub mod trngscr0 {
171
172 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
173 pub struct Sgstart_SPEC;
174 pub type Sgstart = crate::EnumBitfieldStruct<u8, Sgstart_SPEC>;
175 impl Sgstart {
176 #[doc = "No effect"]
177 pub const _0: Self = Self::new(0);
178
179 #[doc = "Start to generate the seed data"]
180 pub const _1: Self = Self::new(1);
181 }
182 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
183 pub struct Sgcen_SPEC;
184 pub type Sgcen = crate::EnumBitfieldStruct<u8, Sgcen_SPEC>;
185 impl Sgcen {
186 #[doc = "Seed generation circuit is disable."]
187 pub const _0: Self = Self::new(0);
188
189 #[doc = "Seed generation circuit is enable."]
190 pub const _1: Self = Self::new(1);
191 }
192}
193#[doc(hidden)]
194#[derive(Copy, Clone, Eq, PartialEq)]
195pub struct Trngscr1_SPEC;
196impl crate::sealed::RegSpec for Trngscr1_SPEC {
197 type DataType = u8;
198}
199
200#[doc = "TRNG Seed Command Register 1"]
201pub type Trngscr1 = crate::RegValueT<Trngscr1_SPEC>;
202
203impl Trngscr1 {
204 #[doc = "TRNG Interrupt Enable"]
205 #[inline(always)]
206 pub fn inten(
207 self,
208 ) -> crate::common::RegisterField<
209 0,
210 0x1,
211 1,
212 0,
213 trngscr1::Inten,
214 trngscr1::Inten,
215 Trngscr1_SPEC,
216 crate::common::RW,
217 > {
218 crate::common::RegisterField::<
219 0,
220 0x1,
221 1,
222 0,
223 trngscr1::Inten,
224 trngscr1::Inten,
225 Trngscr1_SPEC,
226 crate::common::RW,
227 >::from_register(self, 0)
228 }
229}
230impl ::core::default::Default for Trngscr1 {
231 #[inline(always)]
232 fn default() -> Trngscr1 {
233 <crate::RegValueT<Trngscr1_SPEC> as RegisterValue<_>>::new(0)
234 }
235}
236pub mod trngscr1 {
237
238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
239 pub struct Inten_SPEC;
240 pub type Inten = crate::EnumBitfieldStruct<u8, Inten_SPEC>;
241 impl Inten {
242 #[doc = "TRNG interrupt is disabled."]
243 pub const _0: Self = Self::new(0);
244
245 #[doc = "TRNG interrupt is enabled."]
246 pub const _1: Self = Self::new(1);
247 }
248}