ra0e1_pac/
tml32.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.10.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:13 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"32-bit Interval Timer"]
28unsafe impl ::core::marker::Send for super::Tml32 {}
29unsafe impl ::core::marker::Sync for super::Tml32 {}
30impl super::Tml32 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Interval Timer Compare Registers 0%s"]
38    #[inline(always)]
39    pub const fn itlcmp0(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::Itlcmp0_SPEC, crate::common::RW>,
43        2,
44        0x2,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn itlcmp00(
52        &self,
53    ) -> &'static crate::common::Reg<self::Itlcmp0_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Itlcmp0_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0x0usize),
57            )
58        }
59    }
60    #[inline(always)]
61    pub const fn itlcmp01(
62        &self,
63    ) -> &'static crate::common::Reg<self::Itlcmp0_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Itlcmp0_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(0x2usize),
67            )
68        }
69    }
70
71    #[doc = "Interval Timer Compare Registers 0%s"]
72    #[inline(always)]
73    pub const fn itlcmp0_l(
74        &self,
75    ) -> &'static crate::common::ClusterRegisterArray<
76        crate::common::Reg<self::Itlcmp0L_SPEC, crate::common::RW>,
77        2,
78        0x2,
79    > {
80        unsafe {
81            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
82        }
83    }
84    #[inline(always)]
85    pub const fn itlcmp00_l(
86        &self,
87    ) -> &'static crate::common::Reg<self::Itlcmp0L_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Itlcmp0L_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(0x0usize),
91            )
92        }
93    }
94    #[inline(always)]
95    pub const fn itlcmp01_l(
96        &self,
97    ) -> &'static crate::common::Reg<self::Itlcmp0L_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Itlcmp0L_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(0x2usize),
101            )
102        }
103    }
104
105    #[doc = "Interval Timer Compare Registers 0%s"]
106    #[inline(always)]
107    pub const fn itlcmp0_h(
108        &self,
109    ) -> &'static crate::common::ClusterRegisterArray<
110        crate::common::Reg<self::Itlcmp0H_SPEC, crate::common::RW>,
111        2,
112        0x2,
113    > {
114        unsafe {
115            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1usize))
116        }
117    }
118    #[inline(always)]
119    pub const fn itlcmp00_h(
120        &self,
121    ) -> &'static crate::common::Reg<self::Itlcmp0H_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Itlcmp0H_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(0x1usize),
125            )
126        }
127    }
128    #[inline(always)]
129    pub const fn itlcmp01_h(
130        &self,
131    ) -> &'static crate::common::Reg<self::Itlcmp0H_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Itlcmp0H_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(0x3usize),
135            )
136        }
137    }
138
139    #[doc = "Interval Timer Capture Register 00"]
140    #[inline(always)]
141    pub const fn itlcap00(
142        &self,
143    ) -> &'static crate::common::Reg<self::Itlcap00_SPEC, crate::common::R> {
144        unsafe {
145            crate::common::Reg::<self::Itlcap00_SPEC, crate::common::R>::from_ptr(
146                self._svd2pac_as_ptr().add(4usize),
147            )
148        }
149    }
150
151    #[doc = "Interval Timer Control Register"]
152    #[inline(always)]
153    pub const fn itlctl0(
154        &self,
155    ) -> &'static crate::common::Reg<self::Itlctl0_SPEC, crate::common::RW> {
156        unsafe {
157            crate::common::Reg::<self::Itlctl0_SPEC, crate::common::RW>::from_ptr(
158                self._svd2pac_as_ptr().add(6usize),
159            )
160        }
161    }
162
163    #[doc = "Interval Timer Clock Select Register 0"]
164    #[inline(always)]
165    pub const fn itlcsel0(
166        &self,
167    ) -> &'static crate::common::Reg<self::Itlcsel0_SPEC, crate::common::RW> {
168        unsafe {
169            crate::common::Reg::<self::Itlcsel0_SPEC, crate::common::RW>::from_ptr(
170                self._svd2pac_as_ptr().add(7usize),
171            )
172        }
173    }
174
175    #[doc = "Interval Timer Frequency Division Register 0"]
176    #[inline(always)]
177    pub const fn itlfdiv00(
178        &self,
179    ) -> &'static crate::common::Reg<self::Itlfdiv00_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Itlfdiv00_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(8usize),
183            )
184        }
185    }
186
187    #[doc = "Interval Timer Frequency Division Register 1"]
188    #[inline(always)]
189    pub const fn itlfdiv01(
190        &self,
191    ) -> &'static crate::common::Reg<self::Itlfdiv01_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Itlfdiv01_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(9usize),
195            )
196        }
197    }
198
199    #[doc = "Interval Timer Capture Control Register 0"]
200    #[inline(always)]
201    pub const fn itlcc0(
202        &self,
203    ) -> &'static crate::common::Reg<self::Itlcc0_SPEC, crate::common::RW> {
204        unsafe {
205            crate::common::Reg::<self::Itlcc0_SPEC, crate::common::RW>::from_ptr(
206                self._svd2pac_as_ptr().add(10usize),
207            )
208        }
209    }
210
211    #[doc = "Interval Timer Status Register"]
212    #[inline(always)]
213    pub const fn itls0(&self) -> &'static crate::common::Reg<self::Itls0_SPEC, crate::common::RW> {
214        unsafe {
215            crate::common::Reg::<self::Itls0_SPEC, crate::common::RW>::from_ptr(
216                self._svd2pac_as_ptr().add(11usize),
217            )
218        }
219    }
220
221    #[doc = "Interval Timer Match Detection Mask Register"]
222    #[inline(always)]
223    pub const fn itlmkf0(
224        &self,
225    ) -> &'static crate::common::Reg<self::Itlmkf0_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Itlmkf0_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(12usize),
229            )
230        }
231    }
232}
233#[doc(hidden)]
234#[derive(Copy, Clone, Eq, PartialEq)]
235pub struct Itlcmp0_SPEC;
236impl crate::sealed::RegSpec for Itlcmp0_SPEC {
237    type DataType = u16;
238}
239
240#[doc = "Interval Timer Compare Registers 0%s"]
241pub type Itlcmp0 = crate::RegValueT<Itlcmp0_SPEC>;
242
243impl NoBitfieldReg<Itlcmp0_SPEC> for Itlcmp0 {}
244impl ::core::default::Default for Itlcmp0 {
245    #[inline(always)]
246    fn default() -> Itlcmp0 {
247        <crate::RegValueT<Itlcmp0_SPEC> as RegisterValue<_>>::new(65535)
248    }
249}
250
251#[doc(hidden)]
252#[derive(Copy, Clone, Eq, PartialEq)]
253pub struct Itlcmp0L_SPEC;
254impl crate::sealed::RegSpec for Itlcmp0L_SPEC {
255    type DataType = u8;
256}
257
258#[doc = "Interval Timer Compare Registers 0%s"]
259pub type Itlcmp0L = crate::RegValueT<Itlcmp0L_SPEC>;
260
261impl NoBitfieldReg<Itlcmp0L_SPEC> for Itlcmp0L {}
262impl ::core::default::Default for Itlcmp0L {
263    #[inline(always)]
264    fn default() -> Itlcmp0L {
265        <crate::RegValueT<Itlcmp0L_SPEC> as RegisterValue<_>>::new(255)
266    }
267}
268
269#[doc(hidden)]
270#[derive(Copy, Clone, Eq, PartialEq)]
271pub struct Itlcmp0H_SPEC;
272impl crate::sealed::RegSpec for Itlcmp0H_SPEC {
273    type DataType = u8;
274}
275
276#[doc = "Interval Timer Compare Registers 0%s"]
277pub type Itlcmp0H = crate::RegValueT<Itlcmp0H_SPEC>;
278
279impl NoBitfieldReg<Itlcmp0H_SPEC> for Itlcmp0H {}
280impl ::core::default::Default for Itlcmp0H {
281    #[inline(always)]
282    fn default() -> Itlcmp0H {
283        <crate::RegValueT<Itlcmp0H_SPEC> as RegisterValue<_>>::new(255)
284    }
285}
286
287#[doc(hidden)]
288#[derive(Copy, Clone, Eq, PartialEq)]
289pub struct Itlcap00_SPEC;
290impl crate::sealed::RegSpec for Itlcap00_SPEC {
291    type DataType = u16;
292}
293
294#[doc = "Interval Timer Capture Register 00"]
295pub type Itlcap00 = crate::RegValueT<Itlcap00_SPEC>;
296
297impl NoBitfieldReg<Itlcap00_SPEC> for Itlcap00 {}
298impl ::core::default::Default for Itlcap00 {
299    #[inline(always)]
300    fn default() -> Itlcap00 {
301        <crate::RegValueT<Itlcap00_SPEC> as RegisterValue<_>>::new(0)
302    }
303}
304
305#[doc(hidden)]
306#[derive(Copy, Clone, Eq, PartialEq)]
307pub struct Itlctl0_SPEC;
308impl crate::sealed::RegSpec for Itlctl0_SPEC {
309    type DataType = u8;
310}
311
312#[doc = "Interval Timer Control Register"]
313pub type Itlctl0 = crate::RegValueT<Itlctl0_SPEC>;
314
315impl Itlctl0 {
316    #[doc = "8-bit Counter Mode: ITL000 Count Enable"]
317    #[inline(always)]
318    pub fn en0(
319        self,
320    ) -> crate::common::RegisterField<
321        0,
322        0x1,
323        1,
324        0,
325        itlctl0::En0,
326        itlctl0::En0,
327        Itlctl0_SPEC,
328        crate::common::RW,
329    > {
330        crate::common::RegisterField::<
331            0,
332            0x1,
333            1,
334            0,
335            itlctl0::En0,
336            itlctl0::En0,
337            Itlctl0_SPEC,
338            crate::common::RW,
339        >::from_register(self, 0)
340    }
341
342    #[doc = "8-bit Counter Mode: ITL001 Count Enable"]
343    #[inline(always)]
344    pub fn en1(
345        self,
346    ) -> crate::common::RegisterField<
347        1,
348        0x1,
349        1,
350        0,
351        itlctl0::En1,
352        itlctl0::En1,
353        Itlctl0_SPEC,
354        crate::common::RW,
355    > {
356        crate::common::RegisterField::<
357            1,
358            0x1,
359            1,
360            0,
361            itlctl0::En1,
362            itlctl0::En1,
363            Itlctl0_SPEC,
364            crate::common::RW,
365        >::from_register(self, 0)
366    }
367
368    #[doc = "8-bit Counter Mode: ITL012 Count Enable"]
369    #[inline(always)]
370    pub fn en2(
371        self,
372    ) -> crate::common::RegisterField<
373        2,
374        0x1,
375        1,
376        0,
377        itlctl0::En2,
378        itlctl0::En2,
379        Itlctl0_SPEC,
380        crate::common::RW,
381    > {
382        crate::common::RegisterField::<
383            2,
384            0x1,
385            1,
386            0,
387            itlctl0::En2,
388            itlctl0::En2,
389            Itlctl0_SPEC,
390            crate::common::RW,
391        >::from_register(self, 0)
392    }
393
394    #[doc = "8-bit Counter Mode: ITL013 Count Enable"]
395    #[inline(always)]
396    pub fn en3(
397        self,
398    ) -> crate::common::RegisterField<
399        3,
400        0x1,
401        1,
402        0,
403        itlctl0::En3,
404        itlctl0::En3,
405        Itlctl0_SPEC,
406        crate::common::RW,
407    > {
408        crate::common::RegisterField::<
409            3,
410            0x1,
411            1,
412            0,
413            itlctl0::En3,
414            itlctl0::En3,
415            Itlctl0_SPEC,
416            crate::common::RW,
417        >::from_register(self, 0)
418    }
419
420    #[doc = "Selection of 8-bit, 16-bit, or 32-bit Counter Mode"]
421    #[inline(always)]
422    pub fn md(
423        self,
424    ) -> crate::common::RegisterField<
425        6,
426        0x3,
427        1,
428        0,
429        itlctl0::Md,
430        itlctl0::Md,
431        Itlctl0_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            6,
436            0x3,
437            1,
438            0,
439            itlctl0::Md,
440            itlctl0::Md,
441            Itlctl0_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445}
446impl ::core::default::Default for Itlctl0 {
447    #[inline(always)]
448    fn default() -> Itlctl0 {
449        <crate::RegValueT<Itlctl0_SPEC> as RegisterValue<_>>::new(0)
450    }
451}
452pub mod itlctl0 {
453
454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
455    pub struct En0_SPEC;
456    pub type En0 = crate::EnumBitfieldStruct<u8, En0_SPEC>;
457    impl En0 {
458        #[doc = "Counting stops"]
459        pub const _0: Self = Self::new(0);
460
461        #[doc = "Counting begins"]
462        pub const _1: Self = Self::new(1);
463    }
464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465    pub struct En1_SPEC;
466    pub type En1 = crate::EnumBitfieldStruct<u8, En1_SPEC>;
467    impl En1 {
468        #[doc = "Counting stops"]
469        pub const _0: Self = Self::new(0);
470
471        #[doc = "Counting begins"]
472        pub const _1: Self = Self::new(1);
473    }
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct En2_SPEC;
476    pub type En2 = crate::EnumBitfieldStruct<u8, En2_SPEC>;
477    impl En2 {
478        #[doc = "Counting stops"]
479        pub const _0: Self = Self::new(0);
480
481        #[doc = "Counting begins"]
482        pub const _1: Self = Self::new(1);
483    }
484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
485    pub struct En3_SPEC;
486    pub type En3 = crate::EnumBitfieldStruct<u8, En3_SPEC>;
487    impl En3 {
488        #[doc = "Counting stops"]
489        pub const _0: Self = Self::new(0);
490
491        #[doc = "Counting begins"]
492        pub const _1: Self = Self::new(1);
493    }
494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
495    pub struct Md_SPEC;
496    pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
497    impl Md {
498        #[doc = "The interval timer operates in 8-bit counter mode."]
499        pub const _00: Self = Self::new(0);
500
501        #[doc = "The interval timer operates in 16-bit counter mode (channel 0 is connected with channel 1 and channel 2 is connected with channel 3)."]
502        pub const _01: Self = Self::new(1);
503
504        #[doc = "The interval timer operates in 32-bit counter mode (channels 0 to 3 are connected)."]
505        pub const _10: Self = Self::new(2);
506
507        #[doc = "Setting prohibited."]
508        pub const _11: Self = Self::new(3);
509    }
510}
511#[doc(hidden)]
512#[derive(Copy, Clone, Eq, PartialEq)]
513pub struct Itlcsel0_SPEC;
514impl crate::sealed::RegSpec for Itlcsel0_SPEC {
515    type DataType = u8;
516}
517
518#[doc = "Interval Timer Clock Select Register 0"]
519pub type Itlcsel0 = crate::RegValueT<Itlcsel0_SPEC>;
520
521impl Itlcsel0 {
522    #[doc = "Selection of Interval Timer Count Clock (fITL0)"]
523    #[inline(always)]
524    pub fn isel(
525        self,
526    ) -> crate::common::RegisterField<
527        0,
528        0x7,
529        1,
530        0,
531        itlcsel0::Isel,
532        itlcsel0::Isel,
533        Itlcsel0_SPEC,
534        crate::common::RW,
535    > {
536        crate::common::RegisterField::<
537            0,
538            0x7,
539            1,
540            0,
541            itlcsel0::Isel,
542            itlcsel0::Isel,
543            Itlcsel0_SPEC,
544            crate::common::RW,
545        >::from_register(self, 0)
546    }
547
548    #[doc = "Selection of Interval Timer Count Clock for Capturing (fITL1)"]
549    #[inline(always)]
550    pub fn csel(
551        self,
552    ) -> crate::common::RegisterField<
553        4,
554        0x7,
555        1,
556        0,
557        itlcsel0::Csel,
558        itlcsel0::Csel,
559        Itlcsel0_SPEC,
560        crate::common::RW,
561    > {
562        crate::common::RegisterField::<
563            4,
564            0x7,
565            1,
566            0,
567            itlcsel0::Csel,
568            itlcsel0::Csel,
569            Itlcsel0_SPEC,
570            crate::common::RW,
571        >::from_register(self, 0)
572    }
573}
574impl ::core::default::Default for Itlcsel0 {
575    #[inline(always)]
576    fn default() -> Itlcsel0 {
577        <crate::RegValueT<Itlcsel0_SPEC> as RegisterValue<_>>::new(0)
578    }
579}
580pub mod itlcsel0 {
581
582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
583    pub struct Isel_SPEC;
584    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
585    impl Isel {
586        #[doc = "Counting stops"]
587        pub const _000: Self = Self::new(0);
588
589        #[doc = "HOCO"]
590        pub const _001: Self = Self::new(1);
591
592        #[doc = "MOCO"]
593        pub const _010: Self = Self::new(2);
594
595        #[doc = "MOSC"]
596        pub const _011: Self = Self::new(3);
597
598        #[doc = "FSXP"]
599        pub const _100: Self = Self::new(4);
600
601        #[doc = "Event input from the ELC"]
602        pub const _101: Self = Self::new(5);
603    }
604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
605    pub struct Csel_SPEC;
606    pub type Csel = crate::EnumBitfieldStruct<u8, Csel_SPEC>;
607    impl Csel {
608        #[doc = "Counting stops"]
609        pub const _000: Self = Self::new(0);
610
611        #[doc = "HOCO"]
612        pub const _001: Self = Self::new(1);
613
614        #[doc = "MOCO"]
615        pub const _010: Self = Self::new(2);
616
617        #[doc = "MOSC"]
618        pub const _011: Self = Self::new(3);
619
620        #[doc = "FSXP"]
621        pub const _100: Self = Self::new(4);
622
623        #[doc = "Event input from the ELC"]
624        pub const _101: Self = Self::new(5);
625    }
626}
627#[doc(hidden)]
628#[derive(Copy, Clone, Eq, PartialEq)]
629pub struct Itlfdiv00_SPEC;
630impl crate::sealed::RegSpec for Itlfdiv00_SPEC {
631    type DataType = u8;
632}
633
634#[doc = "Interval Timer Frequency Division Register 0"]
635pub type Itlfdiv00 = crate::RegValueT<Itlfdiv00_SPEC>;
636
637impl Itlfdiv00 {
638    #[doc = "8-bit Counter Mode: Counter Clock for ITL000"]
639    #[inline(always)]
640    pub fn fdiv0(
641        self,
642    ) -> crate::common::RegisterField<
643        0,
644        0x7,
645        1,
646        0,
647        itlfdiv00::Fdiv0,
648        itlfdiv00::Fdiv0,
649        Itlfdiv00_SPEC,
650        crate::common::RW,
651    > {
652        crate::common::RegisterField::<
653            0,
654            0x7,
655            1,
656            0,
657            itlfdiv00::Fdiv0,
658            itlfdiv00::Fdiv0,
659            Itlfdiv00_SPEC,
660            crate::common::RW,
661        >::from_register(self, 0)
662    }
663
664    #[doc = "8-bit Counter Mode: Counter Clock for ITL001"]
665    #[inline(always)]
666    pub fn fdiv1(
667        self,
668    ) -> crate::common::RegisterField<
669        4,
670        0x7,
671        1,
672        0,
673        itlfdiv00::Fdiv1,
674        itlfdiv00::Fdiv1,
675        Itlfdiv00_SPEC,
676        crate::common::RW,
677    > {
678        crate::common::RegisterField::<
679            4,
680            0x7,
681            1,
682            0,
683            itlfdiv00::Fdiv1,
684            itlfdiv00::Fdiv1,
685            Itlfdiv00_SPEC,
686            crate::common::RW,
687        >::from_register(self, 0)
688    }
689}
690impl ::core::default::Default for Itlfdiv00 {
691    #[inline(always)]
692    fn default() -> Itlfdiv00 {
693        <crate::RegValueT<Itlfdiv00_SPEC> as RegisterValue<_>>::new(0)
694    }
695}
696pub mod itlfdiv00 {
697
698    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
699    pub struct Fdiv0_SPEC;
700    pub type Fdiv0 = crate::EnumBitfieldStruct<u8, Fdiv0_SPEC>;
701    impl Fdiv0 {
702        #[doc = "fITL0"]
703        pub const _000: Self = Self::new(0);
704
705        #[doc = "fITL0/2"]
706        pub const _001: Self = Self::new(1);
707
708        #[doc = "fITL0/4"]
709        pub const _010: Self = Self::new(2);
710
711        #[doc = "fITL0/8"]
712        pub const _011: Self = Self::new(3);
713
714        #[doc = "fITL0/16"]
715        pub const _100: Self = Self::new(4);
716
717        #[doc = "fITL0/32"]
718        pub const _101: Self = Self::new(5);
719
720        #[doc = "fITL0/64"]
721        pub const _110: Self = Self::new(6);
722
723        #[doc = "fITL0/128"]
724        pub const _111: Self = Self::new(7);
725    }
726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
727    pub struct Fdiv1_SPEC;
728    pub type Fdiv1 = crate::EnumBitfieldStruct<u8, Fdiv1_SPEC>;
729    impl Fdiv1 {
730        #[doc = "fITL0"]
731        pub const _000: Self = Self::new(0);
732
733        #[doc = "fITL0/2"]
734        pub const _001: Self = Self::new(1);
735
736        #[doc = "fITL0/4"]
737        pub const _010: Self = Self::new(2);
738
739        #[doc = "fITL0/8"]
740        pub const _011: Self = Self::new(3);
741
742        #[doc = "fITL0/16"]
743        pub const _100: Self = Self::new(4);
744
745        #[doc = "fITL0/32"]
746        pub const _101: Self = Self::new(5);
747
748        #[doc = "fITL0/64"]
749        pub const _110: Self = Self::new(6);
750
751        #[doc = "fITL0/128"]
752        pub const _111: Self = Self::new(7);
753    }
754}
755#[doc(hidden)]
756#[derive(Copy, Clone, Eq, PartialEq)]
757pub struct Itlfdiv01_SPEC;
758impl crate::sealed::RegSpec for Itlfdiv01_SPEC {
759    type DataType = u8;
760}
761
762#[doc = "Interval Timer Frequency Division Register 1"]
763pub type Itlfdiv01 = crate::RegValueT<Itlfdiv01_SPEC>;
764
765impl Itlfdiv01 {
766    #[doc = "8-bit Counter Mode: Counter Clock for ITL012"]
767    #[inline(always)]
768    pub fn fdiv2(
769        self,
770    ) -> crate::common::RegisterField<
771        0,
772        0x7,
773        1,
774        0,
775        itlfdiv01::Fdiv2,
776        itlfdiv01::Fdiv2,
777        Itlfdiv01_SPEC,
778        crate::common::RW,
779    > {
780        crate::common::RegisterField::<
781            0,
782            0x7,
783            1,
784            0,
785            itlfdiv01::Fdiv2,
786            itlfdiv01::Fdiv2,
787            Itlfdiv01_SPEC,
788            crate::common::RW,
789        >::from_register(self, 0)
790    }
791
792    #[doc = "8-bit Counter Mode: Counter Clock for ITL013"]
793    #[inline(always)]
794    pub fn fdiv3(
795        self,
796    ) -> crate::common::RegisterField<
797        4,
798        0x7,
799        1,
800        0,
801        itlfdiv01::Fdiv3,
802        itlfdiv01::Fdiv3,
803        Itlfdiv01_SPEC,
804        crate::common::RW,
805    > {
806        crate::common::RegisterField::<
807            4,
808            0x7,
809            1,
810            0,
811            itlfdiv01::Fdiv3,
812            itlfdiv01::Fdiv3,
813            Itlfdiv01_SPEC,
814            crate::common::RW,
815        >::from_register(self, 0)
816    }
817}
818impl ::core::default::Default for Itlfdiv01 {
819    #[inline(always)]
820    fn default() -> Itlfdiv01 {
821        <crate::RegValueT<Itlfdiv01_SPEC> as RegisterValue<_>>::new(0)
822    }
823}
824pub mod itlfdiv01 {
825
826    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
827    pub struct Fdiv2_SPEC;
828    pub type Fdiv2 = crate::EnumBitfieldStruct<u8, Fdiv2_SPEC>;
829    impl Fdiv2 {
830        #[doc = "fITL0"]
831        pub const _000: Self = Self::new(0);
832
833        #[doc = "fITL0/2"]
834        pub const _001: Self = Self::new(1);
835
836        #[doc = "fITL0/4"]
837        pub const _010: Self = Self::new(2);
838
839        #[doc = "fITL0/8"]
840        pub const _011: Self = Self::new(3);
841
842        #[doc = "fITL0/16"]
843        pub const _100: Self = Self::new(4);
844
845        #[doc = "fITL0/32"]
846        pub const _101: Self = Self::new(5);
847
848        #[doc = "fITL0/64"]
849        pub const _110: Self = Self::new(6);
850
851        #[doc = "fITL0/128"]
852        pub const _111: Self = Self::new(7);
853    }
854    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
855    pub struct Fdiv3_SPEC;
856    pub type Fdiv3 = crate::EnumBitfieldStruct<u8, Fdiv3_SPEC>;
857    impl Fdiv3 {
858        #[doc = "fITL0"]
859        pub const _000: Self = Self::new(0);
860
861        #[doc = "fITL0/2"]
862        pub const _001: Self = Self::new(1);
863
864        #[doc = "fITL0/4"]
865        pub const _010: Self = Self::new(2);
866
867        #[doc = "fITL0/8"]
868        pub const _011: Self = Self::new(3);
869
870        #[doc = "fITL0/16"]
871        pub const _100: Self = Self::new(4);
872
873        #[doc = "fITL0/32"]
874        pub const _101: Self = Self::new(5);
875
876        #[doc = "fITL0/64"]
877        pub const _110: Self = Self::new(6);
878
879        #[doc = "fITL0/128"]
880        pub const _111: Self = Self::new(7);
881    }
882}
883#[doc(hidden)]
884#[derive(Copy, Clone, Eq, PartialEq)]
885pub struct Itlcc0_SPEC;
886impl crate::sealed::RegSpec for Itlcc0_SPEC {
887    type DataType = u8;
888}
889
890#[doc = "Interval Timer Capture Control Register 0"]
891pub type Itlcc0 = crate::RegValueT<Itlcc0_SPEC>;
892
893impl Itlcc0 {
894    #[doc = "Selection of Capture Trigger"]
895    #[inline(always)]
896    pub fn ctrs(
897        self,
898    ) -> crate::common::RegisterField<
899        0,
900        0x3,
901        1,
902        0,
903        itlcc0::Ctrs,
904        itlcc0::Ctrs,
905        Itlcc0_SPEC,
906        crate::common::RW,
907    > {
908        crate::common::RegisterField::<
909            0,
910            0x3,
911            1,
912            0,
913            itlcc0::Ctrs,
914            itlcc0::Ctrs,
915            Itlcc0_SPEC,
916            crate::common::RW,
917        >::from_register(self, 0)
918    }
919
920    #[doc = "Selection of Capture Counter Clearing After Capturing"]
921    #[inline(always)]
922    pub fn capccr(
923        self,
924    ) -> crate::common::RegisterField<
925        3,
926        0x1,
927        1,
928        0,
929        itlcc0::Capccr,
930        itlcc0::Capccr,
931        Itlcc0_SPEC,
932        crate::common::RW,
933    > {
934        crate::common::RegisterField::<
935            3,
936            0x1,
937            1,
938            0,
939            itlcc0::Capccr,
940            itlcc0::Capccr,
941            Itlcc0_SPEC,
942            crate::common::RW,
943        >::from_register(self, 0)
944    }
945
946    #[doc = "Software Capture Trigger"]
947    #[inline(always)]
948    pub fn capr(
949        self,
950    ) -> crate::common::RegisterField<
951        4,
952        0x1,
953        1,
954        0,
955        itlcc0::Capr,
956        itlcc0::Capr,
957        Itlcc0_SPEC,
958        crate::common::RW,
959    > {
960        crate::common::RegisterField::<
961            4,
962            0x1,
963            1,
964            0,
965            itlcc0::Capr,
966            itlcc0::Capr,
967            Itlcc0_SPEC,
968            crate::common::RW,
969        >::from_register(self, 0)
970    }
971
972    #[doc = "Capture Completion Flag"]
973    #[inline(always)]
974    pub fn capf(
975        self,
976    ) -> crate::common::RegisterField<
977        5,
978        0x1,
979        1,
980        0,
981        itlcc0::Capf,
982        itlcc0::Capf,
983        Itlcc0_SPEC,
984        crate::common::R,
985    > {
986        crate::common::RegisterField::<
987            5,
988            0x1,
989            1,
990            0,
991            itlcc0::Capf,
992            itlcc0::Capf,
993            Itlcc0_SPEC,
994            crate::common::R,
995        >::from_register(self, 0)
996    }
997
998    #[doc = "Capture Completion Flag Clear"]
999    #[inline(always)]
1000    pub fn capfcr(
1001        self,
1002    ) -> crate::common::RegisterField<
1003        6,
1004        0x1,
1005        1,
1006        0,
1007        itlcc0::Capfcr,
1008        itlcc0::Capfcr,
1009        Itlcc0_SPEC,
1010        crate::common::RW,
1011    > {
1012        crate::common::RegisterField::<
1013            6,
1014            0x1,
1015            1,
1016            0,
1017            itlcc0::Capfcr,
1018            itlcc0::Capfcr,
1019            Itlcc0_SPEC,
1020            crate::common::RW,
1021        >::from_register(self, 0)
1022    }
1023
1024    #[doc = "Capture Enable"]
1025    #[inline(always)]
1026    pub fn capen(
1027        self,
1028    ) -> crate::common::RegisterField<
1029        7,
1030        0x1,
1031        1,
1032        0,
1033        itlcc0::Capen,
1034        itlcc0::Capen,
1035        Itlcc0_SPEC,
1036        crate::common::RW,
1037    > {
1038        crate::common::RegisterField::<
1039            7,
1040            0x1,
1041            1,
1042            0,
1043            itlcc0::Capen,
1044            itlcc0::Capen,
1045            Itlcc0_SPEC,
1046            crate::common::RW,
1047        >::from_register(self, 0)
1048    }
1049}
1050impl ::core::default::Default for Itlcc0 {
1051    #[inline(always)]
1052    fn default() -> Itlcc0 {
1053        <crate::RegValueT<Itlcc0_SPEC> as RegisterValue<_>>::new(0)
1054    }
1055}
1056pub mod itlcc0 {
1057
1058    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1059    pub struct Ctrs_SPEC;
1060    pub type Ctrs = crate::EnumBitfieldStruct<u8, Ctrs_SPEC>;
1061    impl Ctrs {
1062        #[doc = "Software trigger"]
1063        pub const _00: Self = Self::new(0);
1064
1065        #[doc = "Interrupt on compare match with ITLCMP01"]
1066        pub const _01: Self = Self::new(1);
1067
1068        #[doc = "FSXP (rising edge)"]
1069        pub const _10: Self = Self::new(2);
1070
1071        #[doc = "Event input from ELC (rising edge)"]
1072        pub const _11: Self = Self::new(3);
1073    }
1074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1075    pub struct Capccr_SPEC;
1076    pub type Capccr = crate::EnumBitfieldStruct<u8, Capccr_SPEC>;
1077    impl Capccr {
1078        #[doc = "The capture counter value is held after the completion of capturing."]
1079        pub const _0: Self = Self::new(0);
1080
1081        #[doc = "The capture counter value is cleared after the completion of capturing."]
1082        pub const _1: Self = Self::new(1);
1083    }
1084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1085    pub struct Capr_SPEC;
1086    pub type Capr = crate::EnumBitfieldStruct<u8, Capr_SPEC>;
1087    impl Capr {
1088        #[doc = "Trigger operation does not proceed."]
1089        pub const _0: Self = Self::new(0);
1090
1091        #[doc = "A software trigger for capturing is generated."]
1092        pub const _1: Self = Self::new(1);
1093    }
1094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1095    pub struct Capf_SPEC;
1096    pub type Capf = crate::EnumBitfieldStruct<u8, Capf_SPEC>;
1097    impl Capf {
1098        #[doc = "Capturing has not been completed."]
1099        pub const _0: Self = Self::new(0);
1100
1101        #[doc = "Capturing has been completed."]
1102        pub const _1: Self = Self::new(1);
1103    }
1104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1105    pub struct Capfcr_SPEC;
1106    pub type Capfcr = crate::EnumBitfieldStruct<u8, Capfcr_SPEC>;
1107    impl Capfcr {
1108        #[doc = "The value of the capture completion flag CAPF is held."]
1109        pub const _0: Self = Self::new(0);
1110
1111        #[doc = "The value of the capture completion flag CAPF is cleared."]
1112        pub const _1: Self = Self::new(1);
1113    }
1114    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1115    pub struct Capen_SPEC;
1116    pub type Capen = crate::EnumBitfieldStruct<u8, Capen_SPEC>;
1117    impl Capen {
1118        #[doc = "Capturing is disabled."]
1119        pub const _0: Self = Self::new(0);
1120
1121        #[doc = "Capturing is enabled."]
1122        pub const _1: Self = Self::new(1);
1123    }
1124}
1125#[doc(hidden)]
1126#[derive(Copy, Clone, Eq, PartialEq)]
1127pub struct Itls0_SPEC;
1128impl crate::sealed::RegSpec for Itls0_SPEC {
1129    type DataType = u8;
1130}
1131
1132#[doc = "Interval Timer Status Register"]
1133pub type Itls0 = crate::RegValueT<Itls0_SPEC>;
1134
1135impl Itls0 {
1136    #[doc = "Compare Match Detection Flag for Channel 0"]
1137    #[inline(always)]
1138    pub fn itf00(
1139        self,
1140    ) -> crate::common::RegisterField<
1141        0,
1142        0x1,
1143        1,
1144        0,
1145        itls0::Itf00,
1146        itls0::Itf00,
1147        Itls0_SPEC,
1148        crate::common::RW,
1149    > {
1150        crate::common::RegisterField::<
1151            0,
1152            0x1,
1153            1,
1154            0,
1155            itls0::Itf00,
1156            itls0::Itf00,
1157            Itls0_SPEC,
1158            crate::common::RW,
1159        >::from_register(self, 0)
1160    }
1161
1162    #[doc = "Compare Match Detection Flag for Channel 1"]
1163    #[inline(always)]
1164    pub fn itf01(
1165        self,
1166    ) -> crate::common::RegisterField<
1167        1,
1168        0x1,
1169        1,
1170        0,
1171        itls0::Itf01,
1172        itls0::Itf01,
1173        Itls0_SPEC,
1174        crate::common::RW,
1175    > {
1176        crate::common::RegisterField::<
1177            1,
1178            0x1,
1179            1,
1180            0,
1181            itls0::Itf01,
1182            itls0::Itf01,
1183            Itls0_SPEC,
1184            crate::common::RW,
1185        >::from_register(self, 0)
1186    }
1187
1188    #[doc = "Compare Match Detection Flag for Channel 2"]
1189    #[inline(always)]
1190    pub fn itf02(
1191        self,
1192    ) -> crate::common::RegisterField<
1193        2,
1194        0x1,
1195        1,
1196        0,
1197        itls0::Itf02,
1198        itls0::Itf02,
1199        Itls0_SPEC,
1200        crate::common::RW,
1201    > {
1202        crate::common::RegisterField::<
1203            2,
1204            0x1,
1205            1,
1206            0,
1207            itls0::Itf02,
1208            itls0::Itf02,
1209            Itls0_SPEC,
1210            crate::common::RW,
1211        >::from_register(self, 0)
1212    }
1213
1214    #[doc = "Compare Match Detection Flag for Channel 3"]
1215    #[inline(always)]
1216    pub fn itf03(
1217        self,
1218    ) -> crate::common::RegisterField<
1219        3,
1220        0x1,
1221        1,
1222        0,
1223        itls0::Itf03,
1224        itls0::Itf03,
1225        Itls0_SPEC,
1226        crate::common::RW,
1227    > {
1228        crate::common::RegisterField::<
1229            3,
1230            0x1,
1231            1,
1232            0,
1233            itls0::Itf03,
1234            itls0::Itf03,
1235            Itls0_SPEC,
1236            crate::common::RW,
1237        >::from_register(self, 0)
1238    }
1239
1240    #[doc = "Capture Detection Flag"]
1241    #[inline(always)]
1242    pub fn itf0c(
1243        self,
1244    ) -> crate::common::RegisterField<
1245        4,
1246        0x1,
1247        1,
1248        0,
1249        itls0::Itf0C,
1250        itls0::Itf0C,
1251        Itls0_SPEC,
1252        crate::common::RW,
1253    > {
1254        crate::common::RegisterField::<
1255            4,
1256            0x1,
1257            1,
1258            0,
1259            itls0::Itf0C,
1260            itls0::Itf0C,
1261            Itls0_SPEC,
1262            crate::common::RW,
1263        >::from_register(self, 0)
1264    }
1265}
1266impl ::core::default::Default for Itls0 {
1267    #[inline(always)]
1268    fn default() -> Itls0 {
1269        <crate::RegValueT<Itls0_SPEC> as RegisterValue<_>>::new(0)
1270    }
1271}
1272pub mod itls0 {
1273
1274    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1275    pub struct Itf00_SPEC;
1276    pub type Itf00 = crate::EnumBitfieldStruct<u8, Itf00_SPEC>;
1277    impl Itf00 {
1278        #[doc = "A compare match signal has not been detected in channel 0."]
1279        pub const _0: Self = Self::new(0);
1280
1281        #[doc = "A compare match signal has been detected in channel 0."]
1282        pub const _1: Self = Self::new(1);
1283    }
1284    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1285    pub struct Itf01_SPEC;
1286    pub type Itf01 = crate::EnumBitfieldStruct<u8, Itf01_SPEC>;
1287    impl Itf01 {
1288        #[doc = "A compare match signal has not been detected in channel 1."]
1289        pub const _0: Self = Self::new(0);
1290
1291        #[doc = "A compare match signal has been detected in channel 1."]
1292        pub const _1: Self = Self::new(1);
1293    }
1294    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1295    pub struct Itf02_SPEC;
1296    pub type Itf02 = crate::EnumBitfieldStruct<u8, Itf02_SPEC>;
1297    impl Itf02 {
1298        #[doc = "A compare match signal has not been detected in channel 2."]
1299        pub const _0: Self = Self::new(0);
1300
1301        #[doc = "A compare match signal has been detected in channel 2."]
1302        pub const _1: Self = Self::new(1);
1303    }
1304    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1305    pub struct Itf03_SPEC;
1306    pub type Itf03 = crate::EnumBitfieldStruct<u8, Itf03_SPEC>;
1307    impl Itf03 {
1308        #[doc = "A compare match signal has not been detected in channel 3."]
1309        pub const _0: Self = Self::new(0);
1310
1311        #[doc = "A compare match signal has been detected in channel 3."]
1312        pub const _1: Self = Self::new(1);
1313    }
1314    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1315    pub struct Itf0C_SPEC;
1316    pub type Itf0C = crate::EnumBitfieldStruct<u8, Itf0C_SPEC>;
1317    impl Itf0C {
1318        #[doc = "Completion of capturing has not been detected."]
1319        pub const _0: Self = Self::new(0);
1320
1321        #[doc = "Completion of capturing has been detected."]
1322        pub const _1: Self = Self::new(1);
1323    }
1324}
1325#[doc(hidden)]
1326#[derive(Copy, Clone, Eq, PartialEq)]
1327pub struct Itlmkf0_SPEC;
1328impl crate::sealed::RegSpec for Itlmkf0_SPEC {
1329    type DataType = u8;
1330}
1331
1332#[doc = "Interval Timer Match Detection Mask Register"]
1333pub type Itlmkf0 = crate::RegValueT<Itlmkf0_SPEC>;
1334
1335impl Itlmkf0 {
1336    #[doc = "Mask for Compare Match Status Flag for Channel 0"]
1337    #[inline(always)]
1338    pub fn mkf00(
1339        self,
1340    ) -> crate::common::RegisterField<
1341        0,
1342        0x1,
1343        1,
1344        0,
1345        itlmkf0::Mkf00,
1346        itlmkf0::Mkf00,
1347        Itlmkf0_SPEC,
1348        crate::common::RW,
1349    > {
1350        crate::common::RegisterField::<
1351            0,
1352            0x1,
1353            1,
1354            0,
1355            itlmkf0::Mkf00,
1356            itlmkf0::Mkf00,
1357            Itlmkf0_SPEC,
1358            crate::common::RW,
1359        >::from_register(self, 0)
1360    }
1361
1362    #[doc = "Mask for Compare Match Status Flag for Channel 1"]
1363    #[inline(always)]
1364    pub fn mkf01(
1365        self,
1366    ) -> crate::common::RegisterField<
1367        1,
1368        0x1,
1369        1,
1370        0,
1371        itlmkf0::Mkf01,
1372        itlmkf0::Mkf01,
1373        Itlmkf0_SPEC,
1374        crate::common::RW,
1375    > {
1376        crate::common::RegisterField::<
1377            1,
1378            0x1,
1379            1,
1380            0,
1381            itlmkf0::Mkf01,
1382            itlmkf0::Mkf01,
1383            Itlmkf0_SPEC,
1384            crate::common::RW,
1385        >::from_register(self, 0)
1386    }
1387
1388    #[doc = "Mask for Compare Match Status Flag for Channel 2"]
1389    #[inline(always)]
1390    pub fn mkf02(
1391        self,
1392    ) -> crate::common::RegisterField<
1393        2,
1394        0x1,
1395        1,
1396        0,
1397        itlmkf0::Mkf02,
1398        itlmkf0::Mkf02,
1399        Itlmkf0_SPEC,
1400        crate::common::RW,
1401    > {
1402        crate::common::RegisterField::<
1403            2,
1404            0x1,
1405            1,
1406            0,
1407            itlmkf0::Mkf02,
1408            itlmkf0::Mkf02,
1409            Itlmkf0_SPEC,
1410            crate::common::RW,
1411        >::from_register(self, 0)
1412    }
1413
1414    #[doc = "Mask for Compare Match Status Flag for Channel 3"]
1415    #[inline(always)]
1416    pub fn mkf03(
1417        self,
1418    ) -> crate::common::RegisterField<
1419        3,
1420        0x1,
1421        1,
1422        0,
1423        itlmkf0::Mkf03,
1424        itlmkf0::Mkf03,
1425        Itlmkf0_SPEC,
1426        crate::common::RW,
1427    > {
1428        crate::common::RegisterField::<
1429            3,
1430            0x1,
1431            1,
1432            0,
1433            itlmkf0::Mkf03,
1434            itlmkf0::Mkf03,
1435            Itlmkf0_SPEC,
1436            crate::common::RW,
1437        >::from_register(self, 0)
1438    }
1439
1440    #[doc = "Mask for Capture Detection Status Flag"]
1441    #[inline(always)]
1442    pub fn mkf0c(
1443        self,
1444    ) -> crate::common::RegisterField<
1445        4,
1446        0x1,
1447        1,
1448        0,
1449        itlmkf0::Mkf0C,
1450        itlmkf0::Mkf0C,
1451        Itlmkf0_SPEC,
1452        crate::common::RW,
1453    > {
1454        crate::common::RegisterField::<
1455            4,
1456            0x1,
1457            1,
1458            0,
1459            itlmkf0::Mkf0C,
1460            itlmkf0::Mkf0C,
1461            Itlmkf0_SPEC,
1462            crate::common::RW,
1463        >::from_register(self, 0)
1464    }
1465}
1466impl ::core::default::Default for Itlmkf0 {
1467    #[inline(always)]
1468    fn default() -> Itlmkf0 {
1469        <crate::RegValueT<Itlmkf0_SPEC> as RegisterValue<_>>::new(0)
1470    }
1471}
1472pub mod itlmkf0 {
1473
1474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1475    pub struct Mkf00_SPEC;
1476    pub type Mkf00 = crate::EnumBitfieldStruct<u8, Mkf00_SPEC>;
1477    impl Mkf00 {
1478        #[doc = "ITLS0.ITF00 is not masked"]
1479        pub const _0: Self = Self::new(0);
1480
1481        #[doc = "ITLS0.ITF00 is masked"]
1482        pub const _1: Self = Self::new(1);
1483    }
1484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1485    pub struct Mkf01_SPEC;
1486    pub type Mkf01 = crate::EnumBitfieldStruct<u8, Mkf01_SPEC>;
1487    impl Mkf01 {
1488        #[doc = "ITLS0.ITF01 is not masked"]
1489        pub const _0: Self = Self::new(0);
1490
1491        #[doc = "ITLS0.ITF01 is masked"]
1492        pub const _1: Self = Self::new(1);
1493    }
1494    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1495    pub struct Mkf02_SPEC;
1496    pub type Mkf02 = crate::EnumBitfieldStruct<u8, Mkf02_SPEC>;
1497    impl Mkf02 {
1498        #[doc = "ITLS0.ITF02 is not masked"]
1499        pub const _0: Self = Self::new(0);
1500
1501        #[doc = "ITLS0.ITF02 is masked"]
1502        pub const _1: Self = Self::new(1);
1503    }
1504    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1505    pub struct Mkf03_SPEC;
1506    pub type Mkf03 = crate::EnumBitfieldStruct<u8, Mkf03_SPEC>;
1507    impl Mkf03 {
1508        #[doc = "ITLS0.ITF03 is not masked"]
1509        pub const _0: Self = Self::new(0);
1510
1511        #[doc = "ITLS0.ITF03 is masked"]
1512        pub const _1: Self = Self::new(1);
1513    }
1514    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1515    pub struct Mkf0C_SPEC;
1516    pub type Mkf0C = crate::EnumBitfieldStruct<u8, Mkf0C_SPEC>;
1517    impl Mkf0C {
1518        #[doc = "ITLS0.ITF0C is not masked"]
1519        pub const _0: Self = Self::new(0);
1520
1521        #[doc = "ITLS0.ITF0C is masked"]
1522        pub const _1: Self = Self::new(1);
1523    }
1524}
ra0e1_pac/tml32.rs

ra0e1_pac/
tml32.rs
