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ra0e1_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.10.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:13 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Clock Operation Mode Control Register"]
38    #[inline(always)]
39    pub const fn cmc(&self) -> &'static crate::common::Reg<self::Cmc_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Cmc_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(2048usize),
43            )
44        }
45    }
46
47    #[doc = "Sub-clock Oscillator Margin Check Register"]
48    #[inline(always)]
49    pub const fn somrg(&self) -> &'static crate::common::Reg<self::Somrg_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Somrg_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(2051usize),
53            )
54        }
55    }
56
57    #[doc = "Middle-speed On-chip Oscillator Trimming Register"]
58    #[inline(always)]
59    pub const fn miotrm(
60        &self,
61    ) -> &'static crate::common::Reg<self::Miotrm_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Miotrm_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(2052usize),
65            )
66        }
67    }
68
69    #[doc = "Low-speed On-chip Oscillator Trimming Register"]
70    #[inline(always)]
71    pub const fn liotrm(
72        &self,
73    ) -> &'static crate::common::Reg<self::Liotrm_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Liotrm_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(2053usize),
77            )
78        }
79    }
80
81    #[doc = "High-speed On-chip Oscillator Control Register"]
82    #[inline(always)]
83    pub const fn hococr(
84        &self,
85    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(2056usize),
89            )
90        }
91    }
92
93    #[doc = "Middle-speed On-chip Oscillator Control Register"]
94    #[inline(always)]
95    pub const fn mococr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(2057usize),
101            )
102        }
103    }
104
105    #[doc = "Low-speed On-chip Oscillator Control Register"]
106    #[inline(always)]
107    pub const fn lococr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(2058usize),
113            )
114        }
115    }
116
117    #[doc = "Main Clock Oscillator Control Register"]
118    #[inline(always)]
119    pub const fn mosccr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(2059usize),
125            )
126        }
127    }
128
129    #[doc = "Sub-clock Oscillator Control Register"]
130    #[inline(always)]
131    pub const fn sosccr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(2060usize),
137            )
138        }
139    }
140
141    #[doc = "Oscillation Stabilization Time Counter Status Register"]
142    #[inline(always)]
143    pub const fn ostc(&self) -> &'static crate::common::Reg<self::Ostc_SPEC, crate::common::R> {
144        unsafe {
145            crate::common::Reg::<self::Ostc_SPEC, crate::common::R>::from_ptr(
146                self._svd2pac_as_ptr().add(2064usize),
147            )
148        }
149    }
150
151    #[doc = "Oscillation Stabilization Time Select Register"]
152    #[inline(always)]
153    pub const fn osts(&self) -> &'static crate::common::Reg<self::Osts_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Osts_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(2065usize),
157            )
158        }
159    }
160
161    #[doc = "Oscillation Stabilization Flag Register"]
162    #[inline(always)]
163    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
164        unsafe {
165            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
166                self._svd2pac_as_ptr().add(2066usize),
167            )
168        }
169    }
170
171    #[doc = "High-speed On-chip Oscillator Frequency Select Register"]
172    #[inline(always)]
173    pub const fn hocodiv(
174        &self,
175    ) -> &'static crate::common::Reg<self::Hocodiv_SPEC, crate::common::RW> {
176        unsafe {
177            crate::common::Reg::<self::Hocodiv_SPEC, crate::common::RW>::from_ptr(
178                self._svd2pac_as_ptr().add(2072usize),
179            )
180        }
181    }
182
183    #[doc = "Middle-speed On-chip Oscillator Frequency Select Register"]
184    #[inline(always)]
185    pub const fn mocodiv(
186        &self,
187    ) -> &'static crate::common::Reg<self::Mocodiv_SPEC, crate::common::RW> {
188        unsafe {
189            crate::common::Reg::<self::Mocodiv_SPEC, crate::common::RW>::from_ptr(
190                self._svd2pac_as_ptr().add(2073usize),
191            )
192        }
193    }
194
195    #[doc = "MOSC Clock Division Register"]
196    #[inline(always)]
197    pub const fn moscdiv(
198        &self,
199    ) -> &'static crate::common::Reg<self::Moscdiv_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Moscdiv_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(2074usize),
203            )
204        }
205    }
206
207    #[doc = "FOCO Clock Source Control Register"]
208    #[inline(always)]
209    pub const fn focoscr(
210        &self,
211    ) -> &'static crate::common::Reg<self::Focoscr_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Focoscr_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(2080usize),
215            )
216        }
217    }
218
219    #[doc = "FMAIN Clock Source Control Register"]
220    #[inline(always)]
221    pub const fn fmainscr(
222        &self,
223    ) -> &'static crate::common::Reg<self::Fmainscr_SPEC, crate::common::RW> {
224        unsafe {
225            crate::common::Reg::<self::Fmainscr_SPEC, crate::common::RW>::from_ptr(
226                self._svd2pac_as_ptr().add(2081usize),
227            )
228        }
229    }
230
231    #[doc = "FSUB Clock Source Control Register"]
232    #[inline(always)]
233    pub const fn fsubscr(
234        &self,
235    ) -> &'static crate::common::Reg<self::Fsubscr_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Fsubscr_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(2082usize),
239            )
240        }
241    }
242
243    #[doc = "ICLK Clock Source Control Register"]
244    #[inline(always)]
245    pub const fn iclkscr(
246        &self,
247    ) -> &'static crate::common::Reg<self::Iclkscr_SPEC, crate::common::RW> {
248        unsafe {
249            crate::common::Reg::<self::Iclkscr_SPEC, crate::common::RW>::from_ptr(
250                self._svd2pac_as_ptr().add(2083usize),
251            )
252        }
253    }
254
255    #[doc = "Subsystem Clock Supply Mode Control Register"]
256    #[inline(always)]
257    pub const fn osmc(&self) -> &'static crate::common::Reg<self::Osmc_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Osmc_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(2084usize),
261            )
262        }
263    }
264
265    #[doc = "Reset Status Flag Register"]
266    #[inline(always)]
267    pub const fn resf(&self) -> &'static crate::common::Reg<self::Resf_SPEC, crate::common::R> {
268        unsafe {
269            crate::common::Reg::<self::Resf_SPEC, crate::common::R>::from_ptr(
270                self._svd2pac_as_ptr().add(2096usize),
271            )
272        }
273    }
274
275    #[doc = "Power-On Reset Status Register"]
276    #[inline(always)]
277    pub const fn porsr(&self) -> &'static crate::common::Reg<self::Porsr_SPEC, crate::common::RW> {
278        unsafe {
279            crate::common::Reg::<self::Porsr_SPEC, crate::common::RW>::from_ptr(
280                self._svd2pac_as_ptr().add(2097usize),
281            )
282        }
283    }
284
285    #[doc = "Voltage Monitor 1 Circuit Control Register"]
286    #[inline(always)]
287    pub const fn lvd1cr(
288        &self,
289    ) -> &'static crate::common::Reg<self::Lvd1Cr_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Lvd1Cr_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(2112usize),
293            )
294        }
295    }
296
297    #[doc = "Voltage Monitor 1 Circuit Mask Register"]
298    #[inline(always)]
299    pub const fn lvd1mkr(
300        &self,
301    ) -> &'static crate::common::Reg<self::Lvd1Mkr_SPEC, crate::common::RW> {
302        unsafe {
303            crate::common::Reg::<self::Lvd1Mkr_SPEC, crate::common::RW>::from_ptr(
304                self._svd2pac_as_ptr().add(2113usize),
305            )
306        }
307    }
308
309    #[doc = "Voltage Monitor 1 Circuit Status Register"]
310    #[inline(always)]
311    pub const fn lvd1sr(
312        &self,
313    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(2115usize),
317            )
318        }
319    }
320
321    #[doc = "Standby Control Register"]
322    #[inline(always)]
323    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(2144usize),
327            )
328        }
329    }
330
331    #[doc = "Power Save Memory Control Register"]
332    #[inline(always)]
333    pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
334        unsafe {
335            crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
336                self._svd2pac_as_ptr().add(2146usize),
337            )
338        }
339    }
340
341    #[doc = "System Control OCD Control Register"]
342    #[inline(always)]
343    pub const fn syocdcr(
344        &self,
345    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
346        unsafe {
347            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
348                self._svd2pac_as_ptr().add(2147usize),
349            )
350        }
351    }
352
353    #[doc = "Protect Register"]
354    #[inline(always)]
355    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
356        unsafe {
357            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
358                self._svd2pac_as_ptr().add(2302usize),
359            )
360        }
361    }
362
363    #[doc = "Module Stop Control Register A"]
364    #[inline(always)]
365    pub const fn mstpcra(
366        &self,
367    ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(3074usize),
371            )
372        }
373    }
374}
375#[doc(hidden)]
376#[derive(Copy, Clone, Eq, PartialEq)]
377pub struct Cmc_SPEC;
378impl crate::sealed::RegSpec for Cmc_SPEC {
379    type DataType = u8;
380}
381
382#[doc = "Clock Operation Mode Control Register"]
383pub type Cmc = crate::RegValueT<Cmc_SPEC>;
384
385impl Cmc {
386    #[doc = "Main Clock Oscillator Drive Capability Switching"]
387    #[inline(always)]
388    pub fn modrv(
389        self,
390    ) -> crate::common::RegisterField<
391        0,
392        0x1,
393        1,
394        0,
395        cmc::Modrv,
396        cmc::Modrv,
397        Cmc_SPEC,
398        crate::common::RW,
399    > {
400        crate::common::RegisterField::<
401            0,
402            0x1,
403            1,
404            0,
405            cmc::Modrv,
406            cmc::Modrv,
407            Cmc_SPEC,
408            crate::common::RW,
409        >::from_register(self, 0)
410    }
411
412    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
413    #[inline(always)]
414    pub fn sodrv(
415        self,
416    ) -> crate::common::RegisterField<
417        1,
418        0x3,
419        1,
420        0,
421        cmc::Sodrv,
422        cmc::Sodrv,
423        Cmc_SPEC,
424        crate::common::RW,
425    > {
426        crate::common::RegisterField::<
427            1,
428            0x3,
429            1,
430            0,
431            cmc::Sodrv,
432            cmc::Sodrv,
433            Cmc_SPEC,
434            crate::common::RW,
435        >::from_register(self, 0)
436    }
437
438    #[doc = "Selecting Clock Oscillator"]
439    #[inline(always)]
440    pub fn xtsel(
441        self,
442    ) -> crate::common::RegisterField<
443        3,
444        0x1,
445        1,
446        0,
447        cmc::Xtsel,
448        cmc::Xtsel,
449        Cmc_SPEC,
450        crate::common::RW,
451    > {
452        crate::common::RegisterField::<
453            3,
454            0x1,
455            1,
456            0,
457            cmc::Xtsel,
458            cmc::Xtsel,
459            Cmc_SPEC,
460            crate::common::RW,
461        >::from_register(self, 0)
462    }
463
464    #[doc = "Sub Clock Oscillator Switching"]
465    #[inline(always)]
466    pub fn sosel(
467        self,
468    ) -> crate::common::RegisterField<
469        4,
470        0x1,
471        1,
472        0,
473        cmc::Sosel,
474        cmc::Sosel,
475        Cmc_SPEC,
476        crate::common::RW,
477    > {
478        crate::common::RegisterField::<
479            4,
480            0x1,
481            1,
482            0,
483            cmc::Sosel,
484            cmc::Sosel,
485            Cmc_SPEC,
486            crate::common::RW,
487        >::from_register(self, 0)
488    }
489
490    #[doc = "Main Clock Oscillator Switching"]
491    #[inline(always)]
492    pub fn mosel(
493        self,
494    ) -> crate::common::RegisterField<
495        6,
496        0x3,
497        1,
498        0,
499        cmc::Mosel,
500        cmc::Mosel,
501        Cmc_SPEC,
502        crate::common::RW,
503    > {
504        crate::common::RegisterField::<
505            6,
506            0x3,
507            1,
508            0,
509            cmc::Mosel,
510            cmc::Mosel,
511            Cmc_SPEC,
512            crate::common::RW,
513        >::from_register(self, 0)
514    }
515}
516impl ::core::default::Default for Cmc {
517    #[inline(always)]
518    fn default() -> Cmc {
519        <crate::RegValueT<Cmc_SPEC> as RegisterValue<_>>::new(0)
520    }
521}
522pub mod cmc {
523
524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
525    pub struct Modrv_SPEC;
526    pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
527    impl Modrv {
528        #[doc = "1 MHz to 10 MHz"]
529        pub const _0: Self = Self::new(0);
530
531        #[doc = "10 MHz to 20 MHz"]
532        pub const _1: Self = Self::new(1);
533    }
534    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
535    pub struct Sodrv_SPEC;
536    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
537    impl Sodrv {
538        #[doc = "Low Power Mode 1"]
539        pub const _00: Self = Self::new(0);
540
541        #[doc = "Normal Mode"]
542        pub const _01: Self = Self::new(1);
543
544        #[doc = "Low Power Mode 2"]
545        pub const _10: Self = Self::new(2);
546
547        #[doc = "Low Power Mode 3"]
548        pub const _11: Self = Self::new(3);
549    }
550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
551    pub struct Xtsel_SPEC;
552    pub type Xtsel = crate::EnumBitfieldStruct<u8, Xtsel_SPEC>;
553    impl Xtsel {
554        #[doc = "Select MOSEL Contents"]
555        pub const _0: Self = Self::new(0);
556
557        #[doc = "Select SOSEL Contents"]
558        pub const _1: Self = Self::new(1);
559    }
560    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
561    pub struct Sosel_SPEC;
562    pub type Sosel = crate::EnumBitfieldStruct<u8, Sosel_SPEC>;
563    impl Sosel {
564        #[doc = "Port mode"]
565        pub const _0: Self = Self::new(0);
566
567        #[doc = "Resonator"]
568        pub const _1: Self = Self::new(1);
569    }
570    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
571    pub struct Mosel_SPEC;
572    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
573    impl Mosel {
574        #[doc = "Resonator"]
575        pub const _01: Self = Self::new(1);
576
577        #[doc = "External clock input mode"]
578        pub const _11: Self = Self::new(3);
579    }
580}
581#[doc(hidden)]
582#[derive(Copy, Clone, Eq, PartialEq)]
583pub struct Somrg_SPEC;
584impl crate::sealed::RegSpec for Somrg_SPEC {
585    type DataType = u8;
586}
587
588#[doc = "Sub-clock Oscillator Margin Check Register"]
589pub type Somrg = crate::RegValueT<Somrg_SPEC>;
590
591impl Somrg {
592    #[doc = "Sub Clock Oscillator Margin Check Switching"]
593    #[inline(always)]
594    pub fn soscmrg(
595        self,
596    ) -> crate::common::RegisterField<
597        0,
598        0x3,
599        1,
600        0,
601        somrg::Soscmrg,
602        somrg::Soscmrg,
603        Somrg_SPEC,
604        crate::common::RW,
605    > {
606        crate::common::RegisterField::<
607            0,
608            0x3,
609            1,
610            0,
611            somrg::Soscmrg,
612            somrg::Soscmrg,
613            Somrg_SPEC,
614            crate::common::RW,
615        >::from_register(self, 0)
616    }
617}
618impl ::core::default::Default for Somrg {
619    #[inline(always)]
620    fn default() -> Somrg {
621        <crate::RegValueT<Somrg_SPEC> as RegisterValue<_>>::new(0)
622    }
623}
624pub mod somrg {
625
626    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
627    pub struct Soscmrg_SPEC;
628    pub type Soscmrg = crate::EnumBitfieldStruct<u8, Soscmrg_SPEC>;
629    impl Soscmrg {
630        #[doc = "Normal Current"]
631        pub const _00: Self = Self::new(0);
632
633        #[doc = "Lower Margin check"]
634        pub const _01: Self = Self::new(1);
635
636        #[doc = "Upper Margin check"]
637        pub const _10: Self = Self::new(2);
638
639        #[doc = "Setting prohibited"]
640        pub const _11: Self = Self::new(3);
641    }
642}
643#[doc(hidden)]
644#[derive(Copy, Clone, Eq, PartialEq)]
645pub struct Miotrm_SPEC;
646impl crate::sealed::RegSpec for Miotrm_SPEC {
647    type DataType = u8;
648}
649
650#[doc = "Middle-speed On-chip Oscillator Trimming Register"]
651pub type Miotrm = crate::RegValueT<Miotrm_SPEC>;
652
653impl Miotrm {
654    #[doc = "MOCO User Trimming"]
655    #[inline(always)]
656    pub fn miotrm(
657        self,
658    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Miotrm_SPEC, crate::common::RW> {
659        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Miotrm_SPEC,crate::common::RW>::from_register(self,0)
660    }
661}
662impl ::core::default::Default for Miotrm {
663    #[inline(always)]
664    fn default() -> Miotrm {
665        <crate::RegValueT<Miotrm_SPEC> as RegisterValue<_>>::new(144)
666    }
667}
668
669#[doc(hidden)]
670#[derive(Copy, Clone, Eq, PartialEq)]
671pub struct Liotrm_SPEC;
672impl crate::sealed::RegSpec for Liotrm_SPEC {
673    type DataType = u8;
674}
675
676#[doc = "Low-speed On-chip Oscillator Trimming Register"]
677pub type Liotrm = crate::RegValueT<Liotrm_SPEC>;
678
679impl Liotrm {
680    #[doc = "LOCO User Trimming"]
681    #[inline(always)]
682    pub fn liotrm(
683        self,
684    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Liotrm_SPEC, crate::common::RW> {
685        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Liotrm_SPEC,crate::common::RW>::from_register(self,0)
686    }
687}
688impl ::core::default::Default for Liotrm {
689    #[inline(always)]
690    fn default() -> Liotrm {
691        <crate::RegValueT<Liotrm_SPEC> as RegisterValue<_>>::new(128)
692    }
693}
694
695#[doc(hidden)]
696#[derive(Copy, Clone, Eq, PartialEq)]
697pub struct Hococr_SPEC;
698impl crate::sealed::RegSpec for Hococr_SPEC {
699    type DataType = u8;
700}
701
702#[doc = "High-speed On-chip Oscillator Control Register"]
703pub type Hococr = crate::RegValueT<Hococr_SPEC>;
704
705impl Hococr {
706    #[doc = "HOCO Stop"]
707    #[inline(always)]
708    pub fn hcstp(
709        self,
710    ) -> crate::common::RegisterField<
711        0,
712        0x1,
713        1,
714        0,
715        hococr::Hcstp,
716        hococr::Hcstp,
717        Hococr_SPEC,
718        crate::common::RW,
719    > {
720        crate::common::RegisterField::<
721            0,
722            0x1,
723            1,
724            0,
725            hococr::Hcstp,
726            hococr::Hcstp,
727            Hococr_SPEC,
728            crate::common::RW,
729        >::from_register(self, 0)
730    }
731}
732impl ::core::default::Default for Hococr {
733    #[inline(always)]
734    fn default() -> Hococr {
735        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
736    }
737}
738pub mod hococr {
739
740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
741    pub struct Hcstp_SPEC;
742    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
743    impl Hcstp {
744        #[doc = "Operate the HOCO clock"]
745        pub const _0: Self = Self::new(0);
746
747        #[doc = "Stop the HOCO clock"]
748        pub const _1: Self = Self::new(1);
749    }
750}
751#[doc(hidden)]
752#[derive(Copy, Clone, Eq, PartialEq)]
753pub struct Mococr_SPEC;
754impl crate::sealed::RegSpec for Mococr_SPEC {
755    type DataType = u8;
756}
757
758#[doc = "Middle-speed On-chip Oscillator Control Register"]
759pub type Mococr = crate::RegValueT<Mococr_SPEC>;
760
761impl Mococr {
762    #[doc = "MOCO Stop"]
763    #[inline(always)]
764    pub fn mcstp(
765        self,
766    ) -> crate::common::RegisterField<
767        0,
768        0x1,
769        1,
770        0,
771        mococr::Mcstp,
772        mococr::Mcstp,
773        Mococr_SPEC,
774        crate::common::RW,
775    > {
776        crate::common::RegisterField::<
777            0,
778            0x1,
779            1,
780            0,
781            mococr::Mcstp,
782            mococr::Mcstp,
783            Mococr_SPEC,
784            crate::common::RW,
785        >::from_register(self, 0)
786    }
787}
788impl ::core::default::Default for Mococr {
789    #[inline(always)]
790    fn default() -> Mococr {
791        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(1)
792    }
793}
794pub mod mococr {
795
796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
797    pub struct Mcstp_SPEC;
798    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
799    impl Mcstp {
800        #[doc = "MOCO clock is operating"]
801        pub const _0: Self = Self::new(0);
802
803        #[doc = "MOCO clock is stopped"]
804        pub const _1: Self = Self::new(1);
805    }
806}
807#[doc(hidden)]
808#[derive(Copy, Clone, Eq, PartialEq)]
809pub struct Lococr_SPEC;
810impl crate::sealed::RegSpec for Lococr_SPEC {
811    type DataType = u8;
812}
813
814#[doc = "Low-speed On-chip Oscillator Control Register"]
815pub type Lococr = crate::RegValueT<Lococr_SPEC>;
816
817impl Lococr {
818    #[doc = "LOCO Stop"]
819    #[inline(always)]
820    pub fn lcstp(
821        self,
822    ) -> crate::common::RegisterField<
823        0,
824        0x1,
825        1,
826        0,
827        lococr::Lcstp,
828        lococr::Lcstp,
829        Lococr_SPEC,
830        crate::common::RW,
831    > {
832        crate::common::RegisterField::<
833            0,
834            0x1,
835            1,
836            0,
837            lococr::Lcstp,
838            lococr::Lcstp,
839            Lococr_SPEC,
840            crate::common::RW,
841        >::from_register(self, 0)
842    }
843}
844impl ::core::default::Default for Lococr {
845    #[inline(always)]
846    fn default() -> Lococr {
847        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(1)
848    }
849}
850pub mod lococr {
851
852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
853    pub struct Lcstp_SPEC;
854    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
855    impl Lcstp {
856        #[doc = "Operate the LOCO clock"]
857        pub const _0: Self = Self::new(0);
858
859        #[doc = "Stop the LOCO clock"]
860        pub const _1: Self = Self::new(1);
861    }
862}
863#[doc(hidden)]
864#[derive(Copy, Clone, Eq, PartialEq)]
865pub struct Mosccr_SPEC;
866impl crate::sealed::RegSpec for Mosccr_SPEC {
867    type DataType = u8;
868}
869
870#[doc = "Main Clock Oscillator Control Register"]
871pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
872
873impl Mosccr {
874    #[doc = "Main Clock Oscillator Stop"]
875    #[inline(always)]
876    pub fn mostp(
877        self,
878    ) -> crate::common::RegisterField<
879        0,
880        0x1,
881        1,
882        0,
883        mosccr::Mostp,
884        mosccr::Mostp,
885        Mosccr_SPEC,
886        crate::common::RW,
887    > {
888        crate::common::RegisterField::<
889            0,
890            0x1,
891            1,
892            0,
893            mosccr::Mostp,
894            mosccr::Mostp,
895            Mosccr_SPEC,
896            crate::common::RW,
897        >::from_register(self, 0)
898    }
899}
900impl ::core::default::Default for Mosccr {
901    #[inline(always)]
902    fn default() -> Mosccr {
903        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
904    }
905}
906pub mod mosccr {
907
908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
909    pub struct Mostp_SPEC;
910    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
911    impl Mostp {
912        #[doc = "Operate the main clock oscillator"]
913        pub const _0: Self = Self::new(0);
914
915        #[doc = "Stop the main clock oscillator"]
916        pub const _1: Self = Self::new(1);
917    }
918}
919#[doc(hidden)]
920#[derive(Copy, Clone, Eq, PartialEq)]
921pub struct Sosccr_SPEC;
922impl crate::sealed::RegSpec for Sosccr_SPEC {
923    type DataType = u8;
924}
925
926#[doc = "Sub-clock Oscillator Control Register"]
927pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
928
929impl Sosccr {
930    #[doc = "Sub Clock Oscillator Stop"]
931    #[inline(always)]
932    pub fn sostp(
933        self,
934    ) -> crate::common::RegisterField<
935        0,
936        0x1,
937        1,
938        0,
939        sosccr::Sostp,
940        sosccr::Sostp,
941        Sosccr_SPEC,
942        crate::common::RW,
943    > {
944        crate::common::RegisterField::<
945            0,
946            0x1,
947            1,
948            0,
949            sosccr::Sostp,
950            sosccr::Sostp,
951            Sosccr_SPEC,
952            crate::common::RW,
953        >::from_register(self, 0)
954    }
955}
956impl ::core::default::Default for Sosccr {
957    #[inline(always)]
958    fn default() -> Sosccr {
959        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(1)
960    }
961}
962pub mod sosccr {
963
964    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
965    pub struct Sostp_SPEC;
966    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
967    impl Sostp {
968        #[doc = "Operate the sub-clock oscillator"]
969        pub const _0: Self = Self::new(0);
970
971        #[doc = "Stop the sub-clock oscillator"]
972        pub const _1: Self = Self::new(1);
973    }
974}
975#[doc(hidden)]
976#[derive(Copy, Clone, Eq, PartialEq)]
977pub struct Ostc_SPEC;
978impl crate::sealed::RegSpec for Ostc_SPEC {
979    type DataType = u8;
980}
981
982#[doc = "Oscillation Stabilization Time Counter Status Register"]
983pub type Ostc = crate::RegValueT<Ostc_SPEC>;
984
985impl Ostc {
986    #[doc = "Selection of the Oscillation Stabilization Time"]
987    #[inline(always)]
988    pub fn most(
989        self,
990    ) -> crate::common::RegisterField<
991        0,
992        0xff,
993        1,
994        0,
995        ostc::Most,
996        ostc::Most,
997        Ostc_SPEC,
998        crate::common::R,
999    > {
1000        crate::common::RegisterField::<
1001            0,
1002            0xff,
1003            1,
1004            0,
1005            ostc::Most,
1006            ostc::Most,
1007            Ostc_SPEC,
1008            crate::common::R,
1009        >::from_register(self, 0)
1010    }
1011}
1012impl ::core::default::Default for Ostc {
1013    #[inline(always)]
1014    fn default() -> Ostc {
1015        <crate::RegValueT<Ostc_SPEC> as RegisterValue<_>>::new(0)
1016    }
1017}
1018pub mod ostc {
1019
1020    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1021    pub struct Most_SPEC;
1022    pub type Most = crate::EnumBitfieldStruct<u8, Most_SPEC>;
1023    impl Most {
1024        #[doc = "Less than 28/fMOSC"]
1025        pub const _0_X_00: Self = Self::new(0);
1026
1027        #[doc = "28/fMOSC min"]
1028        pub const _0_X_80: Self = Self::new(128);
1029
1030        #[doc = "29/fMOSC min"]
1031        pub const _0_X_C_0: Self = Self::new(192);
1032
1033        #[doc = "210/fMOSC min"]
1034        pub const _0_X_E_0: Self = Self::new(224);
1035
1036        #[doc = "211/fMOSC min"]
1037        pub const _0_X_F_0: Self = Self::new(240);
1038
1039        #[doc = "213/fMOSC min"]
1040        pub const _0_X_F_8: Self = Self::new(248);
1041
1042        #[doc = "215/fMOSC min"]
1043        pub const _0_X_FC: Self = Self::new(252);
1044
1045        #[doc = "217/fMOSC min"]
1046        pub const _0_X_FE: Self = Self::new(254);
1047
1048        #[doc = "218/fMOSC min"]
1049        pub const _0_X_FF: Self = Self::new(255);
1050    }
1051}
1052#[doc(hidden)]
1053#[derive(Copy, Clone, Eq, PartialEq)]
1054pub struct Osts_SPEC;
1055impl crate::sealed::RegSpec for Osts_SPEC {
1056    type DataType = u8;
1057}
1058
1059#[doc = "Oscillation Stabilization Time Select Register"]
1060pub type Osts = crate::RegValueT<Osts_SPEC>;
1061
1062impl Osts {
1063    #[doc = "Selection of the Oscillation Stabilization Time"]
1064    #[inline(always)]
1065    pub fn ostsb(
1066        self,
1067    ) -> crate::common::RegisterField<
1068        0,
1069        0x7,
1070        1,
1071        0,
1072        osts::Ostsb,
1073        osts::Ostsb,
1074        Osts_SPEC,
1075        crate::common::RW,
1076    > {
1077        crate::common::RegisterField::<
1078            0,
1079            0x7,
1080            1,
1081            0,
1082            osts::Ostsb,
1083            osts::Ostsb,
1084            Osts_SPEC,
1085            crate::common::RW,
1086        >::from_register(self, 0)
1087    }
1088}
1089impl ::core::default::Default for Osts {
1090    #[inline(always)]
1091    fn default() -> Osts {
1092        <crate::RegValueT<Osts_SPEC> as RegisterValue<_>>::new(7)
1093    }
1094}
1095pub mod osts {
1096
1097    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1098    pub struct Ostsb_SPEC;
1099    pub type Ostsb = crate::EnumBitfieldStruct<u8, Ostsb_SPEC>;
1100    impl Ostsb {
1101        #[doc = "28/fMOSC"]
1102        pub const _000: Self = Self::new(0);
1103
1104        #[doc = "29/fMOSC"]
1105        pub const _001: Self = Self::new(1);
1106
1107        #[doc = "210/fMOSC"]
1108        pub const _010: Self = Self::new(2);
1109
1110        #[doc = "211/fMOSC"]
1111        pub const _011: Self = Self::new(3);
1112
1113        #[doc = "213/fMOSC"]
1114        pub const _100: Self = Self::new(4);
1115
1116        #[doc = "215/fMOSC"]
1117        pub const _101: Self = Self::new(5);
1118
1119        #[doc = "217/fMOSC"]
1120        pub const _110: Self = Self::new(6);
1121
1122        #[doc = "218/fMOSC"]
1123        pub const _111: Self = Self::new(7);
1124    }
1125}
1126#[doc(hidden)]
1127#[derive(Copy, Clone, Eq, PartialEq)]
1128pub struct Oscsf_SPEC;
1129impl crate::sealed::RegSpec for Oscsf_SPEC {
1130    type DataType = u8;
1131}
1132
1133#[doc = "Oscillation Stabilization Flag Register"]
1134pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1135
1136impl Oscsf {
1137    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1138    #[inline(always)]
1139    pub fn hocosf(
1140        self,
1141    ) -> crate::common::RegisterField<
1142        0,
1143        0x1,
1144        1,
1145        0,
1146        oscsf::Hocosf,
1147        oscsf::Hocosf,
1148        Oscsf_SPEC,
1149        crate::common::R,
1150    > {
1151        crate::common::RegisterField::<
1152            0,
1153            0x1,
1154            1,
1155            0,
1156            oscsf::Hocosf,
1157            oscsf::Hocosf,
1158            Oscsf_SPEC,
1159            crate::common::R,
1160        >::from_register(self, 0)
1161    }
1162}
1163impl ::core::default::Default for Oscsf {
1164    #[inline(always)]
1165    fn default() -> Oscsf {
1166        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(1)
1167    }
1168}
1169pub mod oscsf {
1170
1171    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1172    pub struct Hocosf_SPEC;
1173    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1174    impl Hocosf {
1175        #[doc = "The HOCO clock is being started at high speed and waiting for the precision of its oscillation to become stable is in progress."]
1176        pub const _0: Self = Self::new(0);
1177
1178        #[doc = "The HOCO clock is operating with high precision."]
1179        pub const _1: Self = Self::new(1);
1180    }
1181}
1182#[doc(hidden)]
1183#[derive(Copy, Clone, Eq, PartialEq)]
1184pub struct Hocodiv_SPEC;
1185impl crate::sealed::RegSpec for Hocodiv_SPEC {
1186    type DataType = u8;
1187}
1188
1189#[doc = "High-speed On-chip Oscillator Frequency Select Register"]
1190pub type Hocodiv = crate::RegValueT<Hocodiv_SPEC>;
1191
1192impl Hocodiv {
1193    #[doc = "High-speed On-chip Oscillator Clock Division Ratio"]
1194    #[inline(always)]
1195    pub fn div(
1196        self,
1197    ) -> crate::common::RegisterField<
1198        0,
1199        0x7,
1200        1,
1201        0,
1202        hocodiv::Div,
1203        hocodiv::Div,
1204        Hocodiv_SPEC,
1205        crate::common::RW,
1206    > {
1207        crate::common::RegisterField::<
1208            0,
1209            0x7,
1210            1,
1211            0,
1212            hocodiv::Div,
1213            hocodiv::Div,
1214            Hocodiv_SPEC,
1215            crate::common::RW,
1216        >::from_register(self, 0)
1217    }
1218}
1219impl ::core::default::Default for Hocodiv {
1220    #[inline(always)]
1221    fn default() -> Hocodiv {
1222        <crate::RegValueT<Hocodiv_SPEC> as RegisterValue<_>>::new(3)
1223    }
1224}
1225pub mod hocodiv {
1226
1227    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1228    pub struct Div_SPEC;
1229    pub type Div = crate::EnumBitfieldStruct<u8, Div_SPEC>;
1230    impl Div {
1231        #[doc = "× 1/1"]
1232        pub const _000: Self = Self::new(0);
1233
1234        #[doc = "× 1/2"]
1235        pub const _001: Self = Self::new(1);
1236
1237        #[doc = "× 1/4"]
1238        pub const _010: Self = Self::new(2);
1239
1240        #[doc = "× 1/8"]
1241        pub const _011: Self = Self::new(3);
1242
1243        #[doc = "× 1/16"]
1244        pub const _100: Self = Self::new(4);
1245
1246        #[doc = "× 1/32"]
1247        pub const _101: Self = Self::new(5);
1248    }
1249}
1250#[doc(hidden)]
1251#[derive(Copy, Clone, Eq, PartialEq)]
1252pub struct Mocodiv_SPEC;
1253impl crate::sealed::RegSpec for Mocodiv_SPEC {
1254    type DataType = u8;
1255}
1256
1257#[doc = "Middle-speed On-chip Oscillator Frequency Select Register"]
1258pub type Mocodiv = crate::RegValueT<Mocodiv_SPEC>;
1259
1260impl Mocodiv {
1261    #[doc = "Selection of the Middle-speed On-chip Oscillator Clock Frequency"]
1262    #[inline(always)]
1263    pub fn div(
1264        self,
1265    ) -> crate::common::RegisterField<
1266        0,
1267        0x3,
1268        1,
1269        0,
1270        mocodiv::Div,
1271        mocodiv::Div,
1272        Mocodiv_SPEC,
1273        crate::common::RW,
1274    > {
1275        crate::common::RegisterField::<
1276            0,
1277            0x3,
1278            1,
1279            0,
1280            mocodiv::Div,
1281            mocodiv::Div,
1282            Mocodiv_SPEC,
1283            crate::common::RW,
1284        >::from_register(self, 0)
1285    }
1286}
1287impl ::core::default::Default for Mocodiv {
1288    #[inline(always)]
1289    fn default() -> Mocodiv {
1290        <crate::RegValueT<Mocodiv_SPEC> as RegisterValue<_>>::new(0)
1291    }
1292}
1293pub mod mocodiv {
1294
1295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1296    pub struct Div_SPEC;
1297    pub type Div = crate::EnumBitfieldStruct<u8, Div_SPEC>;
1298    impl Div {
1299        #[doc = "× 1/1"]
1300        pub const _00: Self = Self::new(0);
1301
1302        #[doc = "× 1/2"]
1303        pub const _01: Self = Self::new(1);
1304
1305        #[doc = "× 1/4"]
1306        pub const _10: Self = Self::new(2);
1307    }
1308}
1309#[doc(hidden)]
1310#[derive(Copy, Clone, Eq, PartialEq)]
1311pub struct Moscdiv_SPEC;
1312impl crate::sealed::RegSpec for Moscdiv_SPEC {
1313    type DataType = u8;
1314}
1315
1316#[doc = "MOSC Clock Division Register"]
1317pub type Moscdiv = crate::RegValueT<Moscdiv_SPEC>;
1318
1319impl Moscdiv {
1320    #[doc = "Selection Division Ratio for the MOSC Clock"]
1321    #[inline(always)]
1322    pub fn div(
1323        self,
1324    ) -> crate::common::RegisterField<
1325        0,
1326        0x7,
1327        1,
1328        0,
1329        moscdiv::Div,
1330        moscdiv::Div,
1331        Moscdiv_SPEC,
1332        crate::common::RW,
1333    > {
1334        crate::common::RegisterField::<
1335            0,
1336            0x7,
1337            1,
1338            0,
1339            moscdiv::Div,
1340            moscdiv::Div,
1341            Moscdiv_SPEC,
1342            crate::common::RW,
1343        >::from_register(self, 0)
1344    }
1345}
1346impl ::core::default::Default for Moscdiv {
1347    #[inline(always)]
1348    fn default() -> Moscdiv {
1349        <crate::RegValueT<Moscdiv_SPEC> as RegisterValue<_>>::new(0)
1350    }
1351}
1352pub mod moscdiv {
1353
1354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1355    pub struct Div_SPEC;
1356    pub type Div = crate::EnumBitfieldStruct<u8, Div_SPEC>;
1357    impl Div {
1358        #[doc = "× 1/1"]
1359        pub const _000: Self = Self::new(0);
1360
1361        #[doc = "× 1/2"]
1362        pub const _001: Self = Self::new(1);
1363
1364        #[doc = "× 1/4"]
1365        pub const _010: Self = Self::new(2);
1366
1367        #[doc = "× 1/8"]
1368        pub const _011: Self = Self::new(3);
1369
1370        #[doc = "× 1/16"]
1371        pub const _100: Self = Self::new(4);
1372    }
1373}
1374#[doc(hidden)]
1375#[derive(Copy, Clone, Eq, PartialEq)]
1376pub struct Focoscr_SPEC;
1377impl crate::sealed::RegSpec for Focoscr_SPEC {
1378    type DataType = u8;
1379}
1380
1381#[doc = "FOCO Clock Source Control Register"]
1382pub type Focoscr = crate::RegValueT<Focoscr_SPEC>;
1383
1384impl Focoscr {
1385    #[doc = "FOCO Clock Source Select"]
1386    #[inline(always)]
1387    pub fn cksel(
1388        self,
1389    ) -> crate::common::RegisterField<
1390        0,
1391        0x1,
1392        1,
1393        0,
1394        focoscr::Cksel,
1395        focoscr::Cksel,
1396        Focoscr_SPEC,
1397        crate::common::RW,
1398    > {
1399        crate::common::RegisterField::<
1400            0,
1401            0x1,
1402            1,
1403            0,
1404            focoscr::Cksel,
1405            focoscr::Cksel,
1406            Focoscr_SPEC,
1407            crate::common::RW,
1408        >::from_register(self, 0)
1409    }
1410
1411    #[doc = "FOCO Clock Source Status"]
1412    #[inline(always)]
1413    pub fn ckst(
1414        self,
1415    ) -> crate::common::RegisterField<
1416        1,
1417        0x1,
1418        1,
1419        0,
1420        focoscr::Ckst,
1421        focoscr::Ckst,
1422        Focoscr_SPEC,
1423        crate::common::R,
1424    > {
1425        crate::common::RegisterField::<
1426            1,
1427            0x1,
1428            1,
1429            0,
1430            focoscr::Ckst,
1431            focoscr::Ckst,
1432            Focoscr_SPEC,
1433            crate::common::R,
1434        >::from_register(self, 0)
1435    }
1436}
1437impl ::core::default::Default for Focoscr {
1438    #[inline(always)]
1439    fn default() -> Focoscr {
1440        <crate::RegValueT<Focoscr_SPEC> as RegisterValue<_>>::new(0)
1441    }
1442}
1443pub mod focoscr {
1444
1445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1446    pub struct Cksel_SPEC;
1447    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1448    impl Cksel {
1449        #[doc = "HOCO"]
1450        pub const _0: Self = Self::new(0);
1451
1452        #[doc = "MOCO"]
1453        pub const _1: Self = Self::new(1);
1454    }
1455    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1456    pub struct Ckst_SPEC;
1457    pub type Ckst = crate::EnumBitfieldStruct<u8, Ckst_SPEC>;
1458    impl Ckst {
1459        #[doc = "HOCO"]
1460        pub const _0: Self = Self::new(0);
1461
1462        #[doc = "MOCO"]
1463        pub const _1: Self = Self::new(1);
1464    }
1465}
1466#[doc(hidden)]
1467#[derive(Copy, Clone, Eq, PartialEq)]
1468pub struct Fmainscr_SPEC;
1469impl crate::sealed::RegSpec for Fmainscr_SPEC {
1470    type DataType = u8;
1471}
1472
1473#[doc = "FMAIN Clock Source Control Register"]
1474pub type Fmainscr = crate::RegValueT<Fmainscr_SPEC>;
1475
1476impl Fmainscr {
1477    #[doc = "FMAIN Clock Source Select"]
1478    #[inline(always)]
1479    pub fn cksel(
1480        self,
1481    ) -> crate::common::RegisterField<
1482        0,
1483        0x1,
1484        1,
1485        0,
1486        fmainscr::Cksel,
1487        fmainscr::Cksel,
1488        Fmainscr_SPEC,
1489        crate::common::RW,
1490    > {
1491        crate::common::RegisterField::<
1492            0,
1493            0x1,
1494            1,
1495            0,
1496            fmainscr::Cksel,
1497            fmainscr::Cksel,
1498            Fmainscr_SPEC,
1499            crate::common::RW,
1500        >::from_register(self, 0)
1501    }
1502
1503    #[doc = "FMAIN Clock Source Status"]
1504    #[inline(always)]
1505    pub fn ckst(
1506        self,
1507    ) -> crate::common::RegisterField<
1508        1,
1509        0x1,
1510        1,
1511        0,
1512        fmainscr::Ckst,
1513        fmainscr::Ckst,
1514        Fmainscr_SPEC,
1515        crate::common::R,
1516    > {
1517        crate::common::RegisterField::<
1518            1,
1519            0x1,
1520            1,
1521            0,
1522            fmainscr::Ckst,
1523            fmainscr::Ckst,
1524            Fmainscr_SPEC,
1525            crate::common::R,
1526        >::from_register(self, 0)
1527    }
1528}
1529impl ::core::default::Default for Fmainscr {
1530    #[inline(always)]
1531    fn default() -> Fmainscr {
1532        <crate::RegValueT<Fmainscr_SPEC> as RegisterValue<_>>::new(0)
1533    }
1534}
1535pub mod fmainscr {
1536
1537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1538    pub struct Cksel_SPEC;
1539    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1540    impl Cksel {
1541        #[doc = "FOCO"]
1542        pub const _0: Self = Self::new(0);
1543
1544        #[doc = "MOSC"]
1545        pub const _1: Self = Self::new(1);
1546    }
1547    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1548    pub struct Ckst_SPEC;
1549    pub type Ckst = crate::EnumBitfieldStruct<u8, Ckst_SPEC>;
1550    impl Ckst {
1551        #[doc = "FOCO"]
1552        pub const _0: Self = Self::new(0);
1553
1554        #[doc = "MOSC"]
1555        pub const _1: Self = Self::new(1);
1556    }
1557}
1558#[doc(hidden)]
1559#[derive(Copy, Clone, Eq, PartialEq)]
1560pub struct Fsubscr_SPEC;
1561impl crate::sealed::RegSpec for Fsubscr_SPEC {
1562    type DataType = u8;
1563}
1564
1565#[doc = "FSUB Clock Source Control Register"]
1566pub type Fsubscr = crate::RegValueT<Fsubscr_SPEC>;
1567
1568impl Fsubscr {
1569    #[doc = "FSUB Clock Source Select"]
1570    #[inline(always)]
1571    pub fn cksel(
1572        self,
1573    ) -> crate::common::RegisterField<
1574        0,
1575        0x1,
1576        1,
1577        0,
1578        fsubscr::Cksel,
1579        fsubscr::Cksel,
1580        Fsubscr_SPEC,
1581        crate::common::RW,
1582    > {
1583        crate::common::RegisterField::<
1584            0,
1585            0x1,
1586            1,
1587            0,
1588            fsubscr::Cksel,
1589            fsubscr::Cksel,
1590            Fsubscr_SPEC,
1591            crate::common::RW,
1592        >::from_register(self, 0)
1593    }
1594}
1595impl ::core::default::Default for Fsubscr {
1596    #[inline(always)]
1597    fn default() -> Fsubscr {
1598        <crate::RegValueT<Fsubscr_SPEC> as RegisterValue<_>>::new(0)
1599    }
1600}
1601pub mod fsubscr {
1602
1603    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1604    pub struct Cksel_SPEC;
1605    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1606    impl Cksel {
1607        #[doc = "SOSC"]
1608        pub const _0: Self = Self::new(0);
1609
1610        #[doc = "LOCO"]
1611        pub const _1: Self = Self::new(1);
1612    }
1613}
1614#[doc(hidden)]
1615#[derive(Copy, Clone, Eq, PartialEq)]
1616pub struct Iclkscr_SPEC;
1617impl crate::sealed::RegSpec for Iclkscr_SPEC {
1618    type DataType = u8;
1619}
1620
1621#[doc = "ICLK Clock Source Control Register"]
1622pub type Iclkscr = crate::RegValueT<Iclkscr_SPEC>;
1623
1624impl Iclkscr {
1625    #[doc = "ICLK Clock Source Select"]
1626    #[inline(always)]
1627    pub fn cksel(
1628        self,
1629    ) -> crate::common::RegisterField<
1630        0,
1631        0x1,
1632        1,
1633        0,
1634        iclkscr::Cksel,
1635        iclkscr::Cksel,
1636        Iclkscr_SPEC,
1637        crate::common::RW,
1638    > {
1639        crate::common::RegisterField::<
1640            0,
1641            0x1,
1642            1,
1643            0,
1644            iclkscr::Cksel,
1645            iclkscr::Cksel,
1646            Iclkscr_SPEC,
1647            crate::common::RW,
1648        >::from_register(self, 0)
1649    }
1650
1651    #[doc = "ICLK Clock Source Status"]
1652    #[inline(always)]
1653    pub fn ckst(
1654        self,
1655    ) -> crate::common::RegisterField<
1656        1,
1657        0x1,
1658        1,
1659        0,
1660        iclkscr::Ckst,
1661        iclkscr::Ckst,
1662        Iclkscr_SPEC,
1663        crate::common::R,
1664    > {
1665        crate::common::RegisterField::<
1666            1,
1667            0x1,
1668            1,
1669            0,
1670            iclkscr::Ckst,
1671            iclkscr::Ckst,
1672            Iclkscr_SPEC,
1673            crate::common::R,
1674        >::from_register(self, 0)
1675    }
1676}
1677impl ::core::default::Default for Iclkscr {
1678    #[inline(always)]
1679    fn default() -> Iclkscr {
1680        <crate::RegValueT<Iclkscr_SPEC> as RegisterValue<_>>::new(0)
1681    }
1682}
1683pub mod iclkscr {
1684
1685    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1686    pub struct Cksel_SPEC;
1687    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1688    impl Cksel {
1689        #[doc = "FMAIN"]
1690        pub const _0: Self = Self::new(0);
1691
1692        #[doc = "FSUB"]
1693        pub const _1: Self = Self::new(1);
1694    }
1695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1696    pub struct Ckst_SPEC;
1697    pub type Ckst = crate::EnumBitfieldStruct<u8, Ckst_SPEC>;
1698    impl Ckst {
1699        #[doc = "FMAIN"]
1700        pub const _0: Self = Self::new(0);
1701
1702        #[doc = "FSUB"]
1703        pub const _1: Self = Self::new(1);
1704    }
1705}
1706#[doc(hidden)]
1707#[derive(Copy, Clone, Eq, PartialEq)]
1708pub struct Osmc_SPEC;
1709impl crate::sealed::RegSpec for Osmc_SPEC {
1710    type DataType = u8;
1711}
1712
1713#[doc = "Subsystem Clock Supply Mode Control Register"]
1714pub type Osmc = crate::RegValueT<Osmc_SPEC>;
1715
1716impl Osmc {
1717    #[doc = "Selection of the Operating clock source for the Realtime Clock, 32-bit Interval Timer, Serial Interface UARTA"]
1718    #[inline(always)]
1719    pub fn wutmmck0(
1720        self,
1721    ) -> crate::common::RegisterField<
1722        4,
1723        0x1,
1724        1,
1725        0,
1726        osmc::Wutmmck0,
1727        osmc::Wutmmck0,
1728        Osmc_SPEC,
1729        crate::common::RW,
1730    > {
1731        crate::common::RegisterField::<
1732            4,
1733            0x1,
1734            1,
1735            0,
1736            osmc::Wutmmck0,
1737            osmc::Wutmmck0,
1738            Osmc_SPEC,
1739            crate::common::RW,
1740        >::from_register(self, 0)
1741    }
1742}
1743impl ::core::default::Default for Osmc {
1744    #[inline(always)]
1745    fn default() -> Osmc {
1746        <crate::RegValueT<Osmc_SPEC> as RegisterValue<_>>::new(0)
1747    }
1748}
1749pub mod osmc {
1750
1751    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1752    pub struct Wutmmck0_SPEC;
1753    pub type Wutmmck0 = crate::EnumBitfieldStruct<u8, Wutmmck0_SPEC>;
1754    impl Wutmmck0 {
1755        #[doc = "SOSC"]
1756        pub const _0: Self = Self::new(0);
1757
1758        #[doc = "LOCO"]
1759        pub const _1: Self = Self::new(1);
1760    }
1761}
1762#[doc(hidden)]
1763#[derive(Copy, Clone, Eq, PartialEq)]
1764pub struct Resf_SPEC;
1765impl crate::sealed::RegSpec for Resf_SPEC {
1766    type DataType = u8;
1767}
1768
1769#[doc = "Reset Status Flag Register"]
1770pub type Resf = crate::RegValueT<Resf_SPEC>;
1771
1772impl Resf {
1773    #[doc = "Internal Reset Request by Voltage Detector (LVD0 or LVD1)"]
1774    #[inline(always)]
1775    pub fn lvirf(
1776        self,
1777    ) -> crate::common::RegisterField<
1778        0,
1779        0x1,
1780        1,
1781        0,
1782        resf::Lvirf,
1783        resf::Lvirf,
1784        Resf_SPEC,
1785        crate::common::R,
1786    > {
1787        crate::common::RegisterField::<
1788            0,
1789            0x1,
1790            1,
1791            0,
1792            resf::Lvirf,
1793            resf::Lvirf,
1794            Resf_SPEC,
1795            crate::common::R,
1796        >::from_register(self, 0)
1797    }
1798
1799    #[doc = "Internal Reset Request by RAM Parity Error"]
1800    #[inline(always)]
1801    pub fn rperf(
1802        self,
1803    ) -> crate::common::RegisterField<
1804        2,
1805        0x1,
1806        1,
1807        0,
1808        resf::Rperf,
1809        resf::Rperf,
1810        Resf_SPEC,
1811        crate::common::R,
1812    > {
1813        crate::common::RegisterField::<
1814            2,
1815            0x1,
1816            1,
1817            0,
1818            resf::Rperf,
1819            resf::Rperf,
1820            Resf_SPEC,
1821            crate::common::R,
1822        >::from_register(self, 0)
1823    }
1824
1825    #[doc = "Internal Reset Request by Independent Watchdog Timer (IWDT)"]
1826    #[inline(always)]
1827    pub fn iwdtrf(
1828        self,
1829    ) -> crate::common::RegisterField<
1830        4,
1831        0x1,
1832        1,
1833        0,
1834        resf::Iwdtrf,
1835        resf::Iwdtrf,
1836        Resf_SPEC,
1837        crate::common::R,
1838    > {
1839        crate::common::RegisterField::<
1840            4,
1841            0x1,
1842            1,
1843            0,
1844            resf::Iwdtrf,
1845            resf::Iwdtrf,
1846            Resf_SPEC,
1847            crate::common::R,
1848        >::from_register(self, 0)
1849    }
1850
1851    #[doc = "Internal Reset Request by Software Reset"]
1852    #[inline(always)]
1853    pub fn swrf(
1854        self,
1855    ) -> crate::common::RegisterField<
1856        5,
1857        0x1,
1858        1,
1859        0,
1860        resf::Swrf,
1861        resf::Swrf,
1862        Resf_SPEC,
1863        crate::common::R,
1864    > {
1865        crate::common::RegisterField::<
1866            5,
1867            0x1,
1868            1,
1869            0,
1870            resf::Swrf,
1871            resf::Swrf,
1872            Resf_SPEC,
1873            crate::common::R,
1874        >::from_register(self, 0)
1875    }
1876}
1877impl ::core::default::Default for Resf {
1878    #[inline(always)]
1879    fn default() -> Resf {
1880        <crate::RegValueT<Resf_SPEC> as RegisterValue<_>>::new(0)
1881    }
1882}
1883pub mod resf {
1884
1885    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1886    pub struct Lvirf_SPEC;
1887    pub type Lvirf = crate::EnumBitfieldStruct<u8, Lvirf_SPEC>;
1888    impl Lvirf {
1889        #[doc = "Internal reset request is not generated, or the RESF register is cleared."]
1890        pub const _0: Self = Self::new(0);
1891
1892        #[doc = "Internal reset request is generated."]
1893        pub const _1: Self = Self::new(1);
1894    }
1895    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1896    pub struct Rperf_SPEC;
1897    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
1898    impl Rperf {
1899        #[doc = "Internal reset request is not generated, or the RESF register is cleared."]
1900        pub const _0: Self = Self::new(0);
1901
1902        #[doc = "Internal reset request is generated."]
1903        pub const _1: Self = Self::new(1);
1904    }
1905    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1906    pub struct Iwdtrf_SPEC;
1907    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
1908    impl Iwdtrf {
1909        #[doc = "Internal reset request is not generated, or the RESF register is cleared."]
1910        pub const _0: Self = Self::new(0);
1911
1912        #[doc = "Internal reset request is generated."]
1913        pub const _1: Self = Self::new(1);
1914    }
1915    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1916    pub struct Swrf_SPEC;
1917    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
1918    impl Swrf {
1919        #[doc = "Internal reset request is not generated, or the RESF register is cleared."]
1920        pub const _0: Self = Self::new(0);
1921
1922        #[doc = "Internal reset request is generated."]
1923        pub const _1: Self = Self::new(1);
1924    }
1925}
1926#[doc(hidden)]
1927#[derive(Copy, Clone, Eq, PartialEq)]
1928pub struct Porsr_SPEC;
1929impl crate::sealed::RegSpec for Porsr_SPEC {
1930    type DataType = u8;
1931}
1932
1933#[doc = "Power-On Reset Status Register"]
1934pub type Porsr = crate::RegValueT<Porsr_SPEC>;
1935
1936impl Porsr {
1937    #[doc = "Checking Occurrence of Power-on Reset"]
1938    #[inline(always)]
1939    pub fn porf(
1940        self,
1941    ) -> crate::common::RegisterField<
1942        0,
1943        0x1,
1944        1,
1945        0,
1946        porsr::Porf,
1947        porsr::Porf,
1948        Porsr_SPEC,
1949        crate::common::RW,
1950    > {
1951        crate::common::RegisterField::<
1952            0,
1953            0x1,
1954            1,
1955            0,
1956            porsr::Porf,
1957            porsr::Porf,
1958            Porsr_SPEC,
1959            crate::common::RW,
1960        >::from_register(self, 0)
1961    }
1962}
1963impl ::core::default::Default for Porsr {
1964    #[inline(always)]
1965    fn default() -> Porsr {
1966        <crate::RegValueT<Porsr_SPEC> as RegisterValue<_>>::new(0)
1967    }
1968}
1969pub mod porsr {
1970
1971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1972    pub struct Porf_SPEC;
1973    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
1974    impl Porf {
1975        #[doc = "A value 1 has not been written, or a power-on reset has occurred."]
1976        pub const _0: Self = Self::new(0);
1977
1978        #[doc = "No power-on reset has occurred."]
1979        pub const _1: Self = Self::new(1);
1980    }
1981}
1982#[doc(hidden)]
1983#[derive(Copy, Clone, Eq, PartialEq)]
1984pub struct Lvd1Cr_SPEC;
1985impl crate::sealed::RegSpec for Lvd1Cr_SPEC {
1986    type DataType = u8;
1987}
1988
1989#[doc = "Voltage Monitor 1 Circuit Control Register"]
1990pub type Lvd1Cr = crate::RegValueT<Lvd1Cr_SPEC>;
1991
1992impl Lvd1Cr {
1993    #[doc = "Voltage Detection 1 Level Select"]
1994    #[inline(always)]
1995    pub fn lvd1v(
1996        self,
1997    ) -> crate::common::RegisterField<
1998        0,
1999        0x1f,
2000        1,
2001        0,
2002        lvd1cr::Lvd1V,
2003        lvd1cr::Lvd1V,
2004        Lvd1Cr_SPEC,
2005        crate::common::RW,
2006    > {
2007        crate::common::RegisterField::<
2008            0,
2009            0x1f,
2010            1,
2011            0,
2012            lvd1cr::Lvd1V,
2013            lvd1cr::Lvd1V,
2014            Lvd1Cr_SPEC,
2015            crate::common::RW,
2016        >::from_register(self, 0)
2017    }
2018
2019    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
2020    #[inline(always)]
2021    pub fn irqsel(
2022        self,
2023    ) -> crate::common::RegisterField<
2024        5,
2025        0x1,
2026        1,
2027        0,
2028        lvd1cr::Irqsel,
2029        lvd1cr::Irqsel,
2030        Lvd1Cr_SPEC,
2031        crate::common::RW,
2032    > {
2033        crate::common::RegisterField::<
2034            5,
2035            0x1,
2036            1,
2037            0,
2038            lvd1cr::Irqsel,
2039            lvd1cr::Irqsel,
2040            Lvd1Cr_SPEC,
2041            crate::common::RW,
2042        >::from_register(self, 0)
2043    }
2044
2045    #[doc = "Operation mode of LVD1"]
2046    #[inline(always)]
2047    pub fn lvd1sel(
2048        self,
2049    ) -> crate::common::RegisterField<
2050        6,
2051        0x1,
2052        1,
2053        0,
2054        lvd1cr::Lvd1Sel,
2055        lvd1cr::Lvd1Sel,
2056        Lvd1Cr_SPEC,
2057        crate::common::RW,
2058    > {
2059        crate::common::RegisterField::<
2060            6,
2061            0x1,
2062            1,
2063            0,
2064            lvd1cr::Lvd1Sel,
2065            lvd1cr::Lvd1Sel,
2066            Lvd1Cr_SPEC,
2067            crate::common::RW,
2068        >::from_register(self, 0)
2069    }
2070
2071    #[doc = "Enabling Operation of LVD1"]
2072    #[inline(always)]
2073    pub fn lvd1en(
2074        self,
2075    ) -> crate::common::RegisterField<
2076        7,
2077        0x1,
2078        1,
2079        0,
2080        lvd1cr::Lvd1En,
2081        lvd1cr::Lvd1En,
2082        Lvd1Cr_SPEC,
2083        crate::common::RW,
2084    > {
2085        crate::common::RegisterField::<
2086            7,
2087            0x1,
2088            1,
2089            0,
2090            lvd1cr::Lvd1En,
2091            lvd1cr::Lvd1En,
2092            Lvd1Cr_SPEC,
2093            crate::common::RW,
2094        >::from_register(self, 0)
2095    }
2096}
2097impl ::core::default::Default for Lvd1Cr {
2098    #[inline(always)]
2099    fn default() -> Lvd1Cr {
2100        <crate::RegValueT<Lvd1Cr_SPEC> as RegisterValue<_>>::new(25)
2101    }
2102}
2103pub mod lvd1cr {
2104
2105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2106    pub struct Lvd1V_SPEC;
2107    pub type Lvd1V = crate::EnumBitfieldStruct<u8, Lvd1V_SPEC>;
2108    impl Lvd1V {
2109        #[doc = "Vdet1_0"]
2110        pub const _0_X_0_E: Self = Self::new(14);
2111
2112        #[doc = "Vdet1_1"]
2113        pub const _0_X_0_F: Self = Self::new(15);
2114
2115        #[doc = "Vdet1_2"]
2116        pub const _0_X_10: Self = Self::new(16);
2117
2118        #[doc = "Vdet1_3"]
2119        pub const _0_X_11: Self = Self::new(17);
2120
2121        #[doc = "Vdet1_4"]
2122        pub const _0_X_12: Self = Self::new(18);
2123
2124        #[doc = "Vdet1_5"]
2125        pub const _0_X_13: Self = Self::new(19);
2126
2127        #[doc = "Vdet1_6"]
2128        pub const _0_X_14: Self = Self::new(20);
2129
2130        #[doc = "Vdet1_7"]
2131        pub const _0_X_15: Self = Self::new(21);
2132
2133        #[doc = "Vdet1_8"]
2134        pub const _0_X_16: Self = Self::new(22);
2135
2136        #[doc = "Vdet1_9"]
2137        pub const _0_X_17: Self = Self::new(23);
2138
2139        #[doc = "Vdet1_A"]
2140        pub const _0_X_18: Self = Self::new(24);
2141
2142        #[doc = "Vdet1_B"]
2143        pub const _0_X_19: Self = Self::new(25);
2144
2145        #[doc = "Vdet1_C"]
2146        pub const _0_X_1_A: Self = Self::new(26);
2147
2148        #[doc = "Vdet1_D"]
2149        pub const _0_X_1_B: Self = Self::new(27);
2150
2151        #[doc = "Vdet1_E"]
2152        pub const _0_X_1_C: Self = Self::new(28);
2153
2154        #[doc = "Vdet1_F"]
2155        pub const _0_X_1_D: Self = Self::new(29);
2156
2157        #[doc = "Vdet1_10"]
2158        pub const _0_X_1_E: Self = Self::new(30);
2159
2160        #[doc = "Vdet1_11"]
2161        pub const _0_X_1_F: Self = Self::new(31);
2162    }
2163    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2164    pub struct Irqsel_SPEC;
2165    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
2166    impl Irqsel {
2167        #[doc = "Non-maskable interrupt"]
2168        pub const _0: Self = Self::new(0);
2169
2170        #[doc = "Maskable interrupt"]
2171        pub const _1: Self = Self::new(1);
2172    }
2173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2174    pub struct Lvd1Sel_SPEC;
2175    pub type Lvd1Sel = crate::EnumBitfieldStruct<u8, Lvd1Sel_SPEC>;
2176    impl Lvd1Sel {
2177        #[doc = "Interrupt mode"]
2178        pub const _0: Self = Self::new(0);
2179
2180        #[doc = "Reset mode"]
2181        pub const _1: Self = Self::new(1);
2182    }
2183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2184    pub struct Lvd1En_SPEC;
2185    pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
2186    impl Lvd1En {
2187        #[doc = "Operation stopped"]
2188        pub const _0: Self = Self::new(0);
2189
2190        #[doc = "Operation enabled"]
2191        pub const _1: Self = Self::new(1);
2192    }
2193}
2194#[doc(hidden)]
2195#[derive(Copy, Clone, Eq, PartialEq)]
2196pub struct Lvd1Mkr_SPEC;
2197impl crate::sealed::RegSpec for Lvd1Mkr_SPEC {
2198    type DataType = u8;
2199}
2200
2201#[doc = "Voltage Monitor 1 Circuit Mask Register"]
2202pub type Lvd1Mkr = crate::RegValueT<Lvd1Mkr_SPEC>;
2203
2204impl Lvd1Mkr {
2205    #[doc = "Specification of Whether to Enable or Disable Rewriting th LVD1CR Register"]
2206    #[inline(always)]
2207    pub fn mk(
2208        self,
2209    ) -> crate::common::RegisterField<
2210        0,
2211        0x1,
2212        1,
2213        0,
2214        lvd1mkr::Mk,
2215        lvd1mkr::Mk,
2216        Lvd1Mkr_SPEC,
2217        crate::common::RW,
2218    > {
2219        crate::common::RegisterField::<
2220            0,
2221            0x1,
2222            1,
2223            0,
2224            lvd1mkr::Mk,
2225            lvd1mkr::Mk,
2226            Lvd1Mkr_SPEC,
2227            crate::common::RW,
2228        >::from_register(self, 0)
2229    }
2230}
2231impl ::core::default::Default for Lvd1Mkr {
2232    #[inline(always)]
2233    fn default() -> Lvd1Mkr {
2234        <crate::RegValueT<Lvd1Mkr_SPEC> as RegisterValue<_>>::new(0)
2235    }
2236}
2237pub mod lvd1mkr {
2238
2239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2240    pub struct Mk_SPEC;
2241    pub type Mk = crate::EnumBitfieldStruct<u8, Mk_SPEC>;
2242    impl Mk {
2243        #[doc = "Rewriting of the LVD1CR register is disabled."]
2244        pub const _0: Self = Self::new(0);
2245
2246        #[doc = "Rewriting of the LVD1CR register is enabled (reset and interrupt generation by LVD1 are masked)"]
2247        pub const _1: Self = Self::new(1);
2248    }
2249}
2250#[doc(hidden)]
2251#[derive(Copy, Clone, Eq, PartialEq)]
2252pub struct Lvd1Sr_SPEC;
2253impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
2254    type DataType = u8;
2255}
2256
2257#[doc = "Voltage Monitor 1 Circuit Status Register"]
2258pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
2259
2260impl Lvd1Sr {
2261    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
2262    #[inline(always)]
2263    pub fn det(
2264        self,
2265    ) -> crate::common::RegisterField<
2266        0,
2267        0x1,
2268        1,
2269        0,
2270        lvd1sr::Det,
2271        lvd1sr::Det,
2272        Lvd1Sr_SPEC,
2273        crate::common::RW,
2274    > {
2275        crate::common::RegisterField::<
2276            0,
2277            0x1,
2278            1,
2279            0,
2280            lvd1sr::Det,
2281            lvd1sr::Det,
2282            Lvd1Sr_SPEC,
2283            crate::common::RW,
2284        >::from_register(self, 0)
2285    }
2286
2287    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
2288    #[inline(always)]
2289    pub fn mon(
2290        self,
2291    ) -> crate::common::RegisterField<
2292        1,
2293        0x1,
2294        1,
2295        0,
2296        lvd1sr::Mon,
2297        lvd1sr::Mon,
2298        Lvd1Sr_SPEC,
2299        crate::common::R,
2300    > {
2301        crate::common::RegisterField::<
2302            1,
2303            0x1,
2304            1,
2305            0,
2306            lvd1sr::Mon,
2307            lvd1sr::Mon,
2308            Lvd1Sr_SPEC,
2309            crate::common::R,
2310        >::from_register(self, 0)
2311    }
2312}
2313impl ::core::default::Default for Lvd1Sr {
2314    #[inline(always)]
2315    fn default() -> Lvd1Sr {
2316        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
2317    }
2318}
2319pub mod lvd1sr {
2320
2321    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2322    pub struct Det_SPEC;
2323    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
2324    impl Det {
2325        #[doc = "Not detected"]
2326        pub const _0: Self = Self::new(0);
2327
2328        #[doc = "Vdet1 crossing is detected"]
2329        pub const _1: Self = Self::new(1);
2330    }
2331    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2332    pub struct Mon_SPEC;
2333    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
2334    impl Mon {
2335        #[doc = "VCC < Vdet1"]
2336        pub const _0: Self = Self::new(0);
2337
2338        #[doc = "VCC ≥ Vdet1 or MON is disabled"]
2339        pub const _1: Self = Self::new(1);
2340    }
2341}
2342#[doc(hidden)]
2343#[derive(Copy, Clone, Eq, PartialEq)]
2344pub struct Sbycr_SPEC;
2345impl crate::sealed::RegSpec for Sbycr_SPEC {
2346    type DataType = u16;
2347}
2348
2349#[doc = "Standby Control Register"]
2350pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
2351
2352impl Sbycr {
2353    #[doc = "Flash Mode in Sleep Mode or in Snooze Mode"]
2354    #[inline(always)]
2355    pub fn flstp(
2356        self,
2357    ) -> crate::common::RegisterField<
2358        7,
2359        0x1,
2360        1,
2361        0,
2362        sbycr::Flstp,
2363        sbycr::Flstp,
2364        Sbycr_SPEC,
2365        crate::common::RW,
2366    > {
2367        crate::common::RegisterField::<
2368            7,
2369            0x1,
2370            1,
2371            0,
2372            sbycr::Flstp,
2373            sbycr::Flstp,
2374            Sbycr_SPEC,
2375            crate::common::RW,
2376        >::from_register(self, 0)
2377    }
2378
2379    #[doc = "Setting for Starting the High-speed On-chip Oscillator at the times of release from Software Standby Mode and of Transitions to Snooze Mode"]
2380    #[inline(always)]
2381    pub fn fwkup(
2382        self,
2383    ) -> crate::common::RegisterField<
2384        8,
2385        0x1,
2386        1,
2387        0,
2388        sbycr::Fwkup,
2389        sbycr::Fwkup,
2390        Sbycr_SPEC,
2391        crate::common::RW,
2392    > {
2393        crate::common::RegisterField::<
2394            8,
2395            0x1,
2396            1,
2397            0,
2398            sbycr::Fwkup,
2399            sbycr::Fwkup,
2400            Sbycr_SPEC,
2401            crate::common::RW,
2402        >::from_register(self, 0)
2403    }
2404
2405    #[doc = "SOSC Setting in Software Standby Mode or in Snooze Mode"]
2406    #[inline(always)]
2407    pub fn rtclpc(
2408        self,
2409    ) -> crate::common::RegisterField<
2410        9,
2411        0x1,
2412        1,
2413        0,
2414        sbycr::Rtclpc,
2415        sbycr::Rtclpc,
2416        Sbycr_SPEC,
2417        crate::common::RW,
2418    > {
2419        crate::common::RegisterField::<
2420            9,
2421            0x1,
2422            1,
2423            0,
2424            sbycr::Rtclpc,
2425            sbycr::Rtclpc,
2426            Sbycr_SPEC,
2427            crate::common::RW,
2428        >::from_register(self, 0)
2429    }
2430
2431    #[doc = "Software Standby Mode Select"]
2432    #[inline(always)]
2433    pub fn ssby(
2434        self,
2435    ) -> crate::common::RegisterField<
2436        15,
2437        0x1,
2438        1,
2439        0,
2440        sbycr::Ssby,
2441        sbycr::Ssby,
2442        Sbycr_SPEC,
2443        crate::common::RW,
2444    > {
2445        crate::common::RegisterField::<
2446            15,
2447            0x1,
2448            1,
2449            0,
2450            sbycr::Ssby,
2451            sbycr::Ssby,
2452            Sbycr_SPEC,
2453            crate::common::RW,
2454        >::from_register(self, 0)
2455    }
2456}
2457impl ::core::default::Default for Sbycr {
2458    #[inline(always)]
2459    fn default() -> Sbycr {
2460        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(0)
2461    }
2462}
2463pub mod sbycr {
2464
2465    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2466    pub struct Flstp_SPEC;
2467    pub type Flstp = crate::EnumBitfieldStruct<u8, Flstp_SPEC>;
2468    impl Flstp {
2469        #[doc = "Flash active"]
2470        pub const _0: Self = Self::new(0);
2471
2472        #[doc = "Flash stop"]
2473        pub const _1: Self = Self::new(1);
2474    }
2475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2476    pub struct Fwkup_SPEC;
2477    pub type Fwkup = crate::EnumBitfieldStruct<u8, Fwkup_SPEC>;
2478    impl Fwkup {
2479        #[doc = "Starting of the high-speed on-chip oscillator is at normal speed"]
2480        pub const _0: Self = Self::new(0);
2481
2482        #[doc = "Starting of the high-speed on-chip oscillator is at high speed"]
2483        pub const _1: Self = Self::new(1);
2484    }
2485    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2486    pub struct Rtclpc_SPEC;
2487    pub type Rtclpc = crate::EnumBitfieldStruct<u8, Rtclpc_SPEC>;
2488    impl Rtclpc {
2489        #[doc = "Enables supply of SOSC clock to peripheral functions"]
2490        pub const _0: Self = Self::new(0);
2491
2492        #[doc = "Stops supply SOSC clock to peripheral functions other than the Realtime clock"]
2493        pub const _1: Self = Self::new(1);
2494    }
2495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2496    pub struct Ssby_SPEC;
2497    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
2498    impl Ssby {
2499        #[doc = "Sleep mode"]
2500        pub const _0: Self = Self::new(0);
2501
2502        #[doc = "Software Standby mode."]
2503        pub const _1: Self = Self::new(1);
2504    }
2505}
2506#[doc(hidden)]
2507#[derive(Copy, Clone, Eq, PartialEq)]
2508pub struct Psmcr_SPEC;
2509impl crate::sealed::RegSpec for Psmcr_SPEC {
2510    type DataType = u8;
2511}
2512
2513#[doc = "Power Save Memory Control Register"]
2514pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
2515
2516impl Psmcr {
2517    #[doc = "Operating Mode of the RAM"]
2518    #[inline(always)]
2519    pub fn ramsd(
2520        self,
2521    ) -> crate::common::RegisterField<
2522        0,
2523        0x3,
2524        1,
2525        0,
2526        psmcr::Ramsd,
2527        psmcr::Ramsd,
2528        Psmcr_SPEC,
2529        crate::common::RW,
2530    > {
2531        crate::common::RegisterField::<
2532            0,
2533            0x3,
2534            1,
2535            0,
2536            psmcr::Ramsd,
2537            psmcr::Ramsd,
2538            Psmcr_SPEC,
2539            crate::common::RW,
2540        >::from_register(self, 0)
2541    }
2542}
2543impl ::core::default::Default for Psmcr {
2544    #[inline(always)]
2545    fn default() -> Psmcr {
2546        <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
2547    }
2548}
2549pub mod psmcr {
2550
2551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2552    pub struct Ramsd_SPEC;
2553    pub type Ramsd = crate::EnumBitfieldStruct<u8, Ramsd_SPEC>;
2554    impl Ramsd {
2555        #[doc = "Normal mode (continues to operate)"]
2556        pub const _00: Self = Self::new(0);
2557
2558        #[doc = "Setting prohibited"]
2559        pub const _01: Self = Self::new(1);
2560
2561        #[doc = "Standby mode"]
2562        pub const _10: Self = Self::new(2);
2563
2564        #[doc = "Shutdown mode"]
2565        pub const _11: Self = Self::new(3);
2566    }
2567}
2568#[doc(hidden)]
2569#[derive(Copy, Clone, Eq, PartialEq)]
2570pub struct Syocdcr_SPEC;
2571impl crate::sealed::RegSpec for Syocdcr_SPEC {
2572    type DataType = u8;
2573}
2574
2575#[doc = "System Control OCD Control Register"]
2576pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
2577
2578impl Syocdcr {
2579    #[doc = "Debugger Enable bit"]
2580    #[inline(always)]
2581    pub fn dbgen(
2582        self,
2583    ) -> crate::common::RegisterField<
2584        7,
2585        0x1,
2586        1,
2587        0,
2588        syocdcr::Dbgen,
2589        syocdcr::Dbgen,
2590        Syocdcr_SPEC,
2591        crate::common::RW,
2592    > {
2593        crate::common::RegisterField::<
2594            7,
2595            0x1,
2596            1,
2597            0,
2598            syocdcr::Dbgen,
2599            syocdcr::Dbgen,
2600            Syocdcr_SPEC,
2601            crate::common::RW,
2602        >::from_register(self, 0)
2603    }
2604}
2605impl ::core::default::Default for Syocdcr {
2606    #[inline(always)]
2607    fn default() -> Syocdcr {
2608        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
2609    }
2610}
2611pub mod syocdcr {
2612
2613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2614    pub struct Dbgen_SPEC;
2615    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
2616    impl Dbgen {
2617        #[doc = "On-chip debugger is disabled"]
2618        pub const _0: Self = Self::new(0);
2619
2620        #[doc = "On-chip debugger is enabled"]
2621        pub const _1: Self = Self::new(1);
2622    }
2623}
2624#[doc(hidden)]
2625#[derive(Copy, Clone, Eq, PartialEq)]
2626pub struct Prcr_SPEC;
2627impl crate::sealed::RegSpec for Prcr_SPEC {
2628    type DataType = u16;
2629}
2630
2631#[doc = "Protect Register"]
2632pub type Prcr = crate::RegValueT<Prcr_SPEC>;
2633
2634impl Prcr {
2635    #[doc = "Enable writing to the registers related to the clock generation circuit"]
2636    #[inline(always)]
2637    pub fn prc0(
2638        self,
2639    ) -> crate::common::RegisterField<
2640        0,
2641        0x1,
2642        1,
2643        0,
2644        prcr::Prc0,
2645        prcr::Prc0,
2646        Prcr_SPEC,
2647        crate::common::RW,
2648    > {
2649        crate::common::RegisterField::<
2650            0,
2651            0x1,
2652            1,
2653            0,
2654            prcr::Prc0,
2655            prcr::Prc0,
2656            Prcr_SPEC,
2657            crate::common::RW,
2658        >::from_register(self, 0)
2659    }
2660
2661    #[doc = "Enable writing to the registers related to the low power modes"]
2662    #[inline(always)]
2663    pub fn prc1(
2664        self,
2665    ) -> crate::common::RegisterField<
2666        1,
2667        0x1,
2668        1,
2669        0,
2670        prcr::Prc1,
2671        prcr::Prc1,
2672        Prcr_SPEC,
2673        crate::common::RW,
2674    > {
2675        crate::common::RegisterField::<
2676            1,
2677            0x1,
2678            1,
2679            0,
2680            prcr::Prc1,
2681            prcr::Prc1,
2682            Prcr_SPEC,
2683            crate::common::RW,
2684        >::from_register(self, 0)
2685    }
2686
2687    #[doc = "Enable writing to the registers related to the LVD"]
2688    #[inline(always)]
2689    pub fn prc3(
2690        self,
2691    ) -> crate::common::RegisterField<
2692        3,
2693        0x1,
2694        1,
2695        0,
2696        prcr::Prc3,
2697        prcr::Prc3,
2698        Prcr_SPEC,
2699        crate::common::RW,
2700    > {
2701        crate::common::RegisterField::<
2702            3,
2703            0x1,
2704            1,
2705            0,
2706            prcr::Prc3,
2707            prcr::Prc3,
2708            Prcr_SPEC,
2709            crate::common::RW,
2710        >::from_register(self, 0)
2711    }
2712
2713    #[doc = "PRC Key Code"]
2714    #[inline(always)]
2715    pub fn prkey(
2716        self,
2717    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
2718        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
2719    }
2720}
2721impl ::core::default::Default for Prcr {
2722    #[inline(always)]
2723    fn default() -> Prcr {
2724        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
2725    }
2726}
2727pub mod prcr {
2728
2729    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2730    pub struct Prc0_SPEC;
2731    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
2732    impl Prc0 {
2733        #[doc = "Disable writes"]
2734        pub const _0: Self = Self::new(0);
2735
2736        #[doc = "Enable writes"]
2737        pub const _1: Self = Self::new(1);
2738    }
2739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2740    pub struct Prc1_SPEC;
2741    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
2742    impl Prc1 {
2743        #[doc = "Disable writes"]
2744        pub const _0: Self = Self::new(0);
2745
2746        #[doc = "Enable writes"]
2747        pub const _1: Self = Self::new(1);
2748    }
2749    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2750    pub struct Prc3_SPEC;
2751    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
2752    impl Prc3 {
2753        #[doc = "Disable writes"]
2754        pub const _0: Self = Self::new(0);
2755
2756        #[doc = "Enable writes"]
2757        pub const _1: Self = Self::new(1);
2758    }
2759}
2760#[doc(hidden)]
2761#[derive(Copy, Clone, Eq, PartialEq)]
2762pub struct Mstpcra_SPEC;
2763impl crate::sealed::RegSpec for Mstpcra_SPEC {
2764    type DataType = u16;
2765}
2766
2767#[doc = "Module Stop Control Register A"]
2768pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
2769
2770impl Mstpcra {
2771    #[doc = "DTC Module Stop"]
2772    #[inline(always)]
2773    pub fn mstpa22(
2774        self,
2775    ) -> crate::common::RegisterField<
2776        6,
2777        0x1,
2778        1,
2779        0,
2780        mstpcra::Mstpa22,
2781        mstpcra::Mstpa22,
2782        Mstpcra_SPEC,
2783        crate::common::RW,
2784    > {
2785        crate::common::RegisterField::<
2786            6,
2787            0x1,
2788            1,
2789            0,
2790            mstpcra::Mstpa22,
2791            mstpcra::Mstpa22,
2792            Mstpcra_SPEC,
2793            crate::common::RW,
2794        >::from_register(self, 0)
2795    }
2796}
2797impl ::core::default::Default for Mstpcra {
2798    #[inline(always)]
2799    fn default() -> Mstpcra {
2800        <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(65471)
2801    }
2802}
2803pub mod mstpcra {
2804
2805    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2806    pub struct Mstpa22_SPEC;
2807    pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
2808    impl Mstpa22 {
2809        #[doc = "Cancel the module-stop state"]
2810        pub const _0: Self = Self::new(0);
2811
2812        #[doc = "Enter the module-stop state"]
2813        pub const _1: Self = Self::new(1);
2814    }
2815}