ra0e1_pac/
pfs_a.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.10.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:00:13 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Pmn Pin Function Select"]
28unsafe impl ::core::marker::Send for super::PfsA {}
29unsafe impl ::core::marker::Sync for super::PfsA {}
30impl super::PfsA {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Port 00%s Pin Function Select Register"]
38    #[inline(always)]
39    pub const fn p00pfs_a(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::P00PfsA_SPEC, crate::common::RW>,
43        2,
44        0x2,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x10usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn p008pfs_a(
52        &self,
53    ) -> &'static crate::common::Reg<self::P00PfsA_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::P00PfsA_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0x10usize),
57            )
58        }
59    }
60    #[inline(always)]
61    pub const fn p009pfs_a(
62        &self,
63    ) -> &'static crate::common::Reg<self::P00PfsA_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::P00PfsA_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(0x12usize),
67            )
68        }
69    }
70
71    #[doc = "Port 0%s Pin Function Select Register"]
72    #[inline(always)]
73    pub const fn p0pfs_a(
74        &self,
75    ) -> &'static crate::common::ClusterRegisterArray<
76        crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW>,
77        5,
78        0x2,
79    > {
80        unsafe {
81            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x14usize))
82        }
83    }
84    #[inline(always)]
85    pub const fn p010pfs_a(
86        &self,
87    ) -> &'static crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::P0PfsA_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(0x14usize),
91            )
92        }
93    }
94    #[inline(always)]
95    pub const fn p011pfs_a(
96        &self,
97    ) -> &'static crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::P0PfsA_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(0x16usize),
101            )
102        }
103    }
104    #[inline(always)]
105    pub const fn p012pfs_a(
106        &self,
107    ) -> &'static crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::P0PfsA_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x18usize),
111            )
112        }
113    }
114    #[inline(always)]
115    pub const fn p013pfs_a(
116        &self,
117    ) -> &'static crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW> {
118        unsafe {
119            crate::common::Reg::<self::P0PfsA_SPEC, crate::common::RW>::from_ptr(
120                self._svd2pac_as_ptr().add(0x1ausize),
121            )
122        }
123    }
124    #[inline(always)]
125    pub const fn p014pfs_a(
126        &self,
127    ) -> &'static crate::common::Reg<self::P0PfsA_SPEC, crate::common::RW> {
128        unsafe {
129            crate::common::Reg::<self::P0PfsA_SPEC, crate::common::RW>::from_ptr(
130                self._svd2pac_as_ptr().add(0x1cusize),
131            )
132        }
133    }
134
135    #[doc = "Port 015 Pin Function Select Register"]
136    #[inline(always)]
137    pub const fn p015pfs_a(
138        &self,
139    ) -> &'static crate::common::Reg<self::P015PfsA_SPEC, crate::common::RW> {
140        unsafe {
141            crate::common::Reg::<self::P015PfsA_SPEC, crate::common::RW>::from_ptr(
142                self._svd2pac_as_ptr().add(30usize),
143            )
144        }
145    }
146
147    #[doc = "Port 10%s Pin Function Select Register"]
148    #[inline(always)]
149    pub const fn p10pfs_a(
150        &self,
151    ) -> &'static crate::common::ClusterRegisterArray<
152        crate::common::Reg<self::P10PfsA_SPEC, crate::common::RW>,
153        2,
154        0x2,
155    > {
156        unsafe {
157            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x24usize))
158        }
159    }
160    #[inline(always)]
161    pub const fn p102pfs_a(
162        &self,
163    ) -> &'static crate::common::Reg<self::P10PfsA_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::P10PfsA_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(0x24usize),
167            )
168        }
169    }
170    #[inline(always)]
171    pub const fn p103pfs_a(
172        &self,
173    ) -> &'static crate::common::Reg<self::P10PfsA_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::P10PfsA_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(0x26usize),
177            )
178        }
179    }
180
181    #[doc = "Port 108 Pin Function Select Register"]
182    #[inline(always)]
183    pub const fn p108pfs_a(
184        &self,
185    ) -> &'static crate::common::Reg<self::P108PfsA_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::P108PfsA_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(48usize),
189            )
190        }
191    }
192
193    #[doc = "Port 109 Pin Function Select Register"]
194    #[inline(always)]
195    pub const fn p109pfs_a(
196        &self,
197    ) -> &'static crate::common::Reg<self::P109PfsA_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::P109PfsA_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(50usize),
201            )
202        }
203    }
204
205    #[doc = "Port 110 Pin Function Select Register"]
206    #[inline(always)]
207    pub const fn p110pfs_a(
208        &self,
209    ) -> &'static crate::common::Reg<self::P110PfsA_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::P110PfsA_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(52usize),
213            )
214        }
215    }
216
217    #[doc = "Port 112 Pin Function Select Register"]
218    #[inline(always)]
219    pub const fn p112pfs_a(
220        &self,
221    ) -> &'static crate::common::Reg<self::P112PfsA_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::P112PfsA_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(56usize),
225            )
226        }
227    }
228
229    #[doc = "Port 200 Pin Function Select Register"]
230    #[inline(always)]
231    pub const fn p200pfs_a(
232        &self,
233    ) -> &'static crate::common::Reg<self::P200PfsA_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::P200PfsA_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(64usize),
237            )
238        }
239    }
240
241    #[doc = "Port 201 Pin Function Select Register"]
242    #[inline(always)]
243    pub const fn p201pfs_a(
244        &self,
245    ) -> &'static crate::common::Reg<self::P201PfsA_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::P201PfsA_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(66usize),
249            )
250        }
251    }
252
253    #[doc = "Port 206 Pin Function Select Register"]
254    #[inline(always)]
255    pub const fn p206pfs_a(
256        &self,
257    ) -> &'static crate::common::Reg<self::P206PfsA_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::P206PfsA_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(76usize),
261            )
262        }
263    }
264
265    #[doc = "Port 20%s Pin Function Select Register"]
266    #[inline(always)]
267    pub const fn p20pfs_a(
268        &self,
269    ) -> &'static crate::common::ClusterRegisterArray<
270        crate::common::Reg<self::P20PfsA_SPEC, crate::common::RW>,
271        2,
272        0x2,
273    > {
274        unsafe {
275            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x4eusize))
276        }
277    }
278    #[inline(always)]
279    pub const fn p207pfs_a(
280        &self,
281    ) -> &'static crate::common::Reg<self::P20PfsA_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::P20PfsA_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(0x4eusize),
285            )
286        }
287    }
288    #[inline(always)]
289    pub const fn p208pfs_a(
290        &self,
291    ) -> &'static crate::common::Reg<self::P20PfsA_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::P20PfsA_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(0x50usize),
295            )
296        }
297    }
298
299    #[doc = "Port 2%s Pin Function Select Register"]
300    #[inline(always)]
301    pub const fn p2pfs_a(
302        &self,
303    ) -> &'static crate::common::ClusterRegisterArray<
304        crate::common::Reg<self::P2PfsA_SPEC, crate::common::RW>,
305        2,
306        0x2,
307    > {
308        unsafe {
309            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x5cusize))
310        }
311    }
312    #[inline(always)]
313    pub const fn p214pfs_a(
314        &self,
315    ) -> &'static crate::common::Reg<self::P2PfsA_SPEC, crate::common::RW> {
316        unsafe {
317            crate::common::Reg::<self::P2PfsA_SPEC, crate::common::RW>::from_ptr(
318                self._svd2pac_as_ptr().add(0x5cusize),
319            )
320        }
321    }
322    #[inline(always)]
323    pub const fn p215pfs_a(
324        &self,
325    ) -> &'static crate::common::Reg<self::P2PfsA_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::P2PfsA_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(0x5eusize),
329            )
330        }
331    }
332
333    #[doc = "Port 300 Pin Function Select Register"]
334    #[inline(always)]
335    pub const fn p300pfs_a(
336        &self,
337    ) -> &'static crate::common::Reg<self::P300PfsA_SPEC, crate::common::RW> {
338        unsafe {
339            crate::common::Reg::<self::P300PfsA_SPEC, crate::common::RW>::from_ptr(
340                self._svd2pac_as_ptr().add(96usize),
341            )
342        }
343    }
344
345    #[doc = "Port 407 Pin Function Select Register"]
346    #[inline(always)]
347    pub const fn p407pfs_a(
348        &self,
349    ) -> &'static crate::common::Reg<self::P407PfsA_SPEC, crate::common::RW> {
350        unsafe {
351            crate::common::Reg::<self::P407PfsA_SPEC, crate::common::RW>::from_ptr(
352                self._svd2pac_as_ptr().add(142usize),
353            )
354        }
355    }
356
357    #[doc = "Port 9%s Pin Function Select Register"]
358    #[inline(always)]
359    pub const fn p9pfs_a(
360        &self,
361    ) -> &'static crate::common::ClusterRegisterArray<
362        crate::common::Reg<self::P9PfsA_SPEC, crate::common::RW>,
363        2,
364        0x2,
365    > {
366        unsafe {
367            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x13ausize))
368        }
369    }
370    #[inline(always)]
371    pub const fn p913pfs_a(
372        &self,
373    ) -> &'static crate::common::Reg<self::P9PfsA_SPEC, crate::common::RW> {
374        unsafe {
375            crate::common::Reg::<self::P9PfsA_SPEC, crate::common::RW>::from_ptr(
376                self._svd2pac_as_ptr().add(0x13ausize),
377            )
378        }
379    }
380    #[inline(always)]
381    pub const fn p914pfs_a(
382        &self,
383    ) -> &'static crate::common::Reg<self::P9PfsA_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::P9PfsA_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(0x13cusize),
387            )
388        }
389    }
390
391    #[doc = "Write-Protect Register"]
392    #[inline(always)]
393    pub const fn pwpr(&self) -> &'static crate::common::Reg<self::Pwpr_SPEC, crate::common::RW> {
394        unsafe {
395            crate::common::Reg::<self::Pwpr_SPEC, crate::common::RW>::from_ptr(
396                self._svd2pac_as_ptr().add(320usize),
397            )
398        }
399    }
400}
401#[doc(hidden)]
402#[derive(Copy, Clone, Eq, PartialEq)]
403pub struct P00PfsA_SPEC;
404impl crate::sealed::RegSpec for P00PfsA_SPEC {
405    type DataType = u16;
406}
407
408#[doc = "Port 00%s Pin Function Select Register"]
409pub type P00PfsA = crate::RegValueT<P00PfsA_SPEC>;
410
411impl P00PfsA {
412    #[doc = "Port Output Data"]
413    #[inline(always)]
414    pub fn podr(
415        self,
416    ) -> crate::common::RegisterField<
417        0,
418        0x1,
419        1,
420        0,
421        p00pfs_a::Podr,
422        p00pfs_a::Podr,
423        P00PfsA_SPEC,
424        crate::common::RW,
425    > {
426        crate::common::RegisterField::<
427            0,
428            0x1,
429            1,
430            0,
431            p00pfs_a::Podr,
432            p00pfs_a::Podr,
433            P00PfsA_SPEC,
434            crate::common::RW,
435        >::from_register(self, 0)
436    }
437
438    #[doc = "Pmn State"]
439    #[inline(always)]
440    pub fn pidr(
441        self,
442    ) -> crate::common::RegisterField<
443        1,
444        0x1,
445        1,
446        0,
447        p00pfs_a::Pidr,
448        p00pfs_a::Pidr,
449        P00PfsA_SPEC,
450        crate::common::R,
451    > {
452        crate::common::RegisterField::<
453            1,
454            0x1,
455            1,
456            0,
457            p00pfs_a::Pidr,
458            p00pfs_a::Pidr,
459            P00PfsA_SPEC,
460            crate::common::R,
461        >::from_register(self, 0)
462    }
463
464    #[inline(always)]
465    pub fn pdr(
466        self,
467    ) -> crate::common::RegisterField<
468        2,
469        0x1,
470        1,
471        0,
472        p00pfs_a::Pdr,
473        p00pfs_a::Pdr,
474        P00PfsA_SPEC,
475        crate::common::RW,
476    > {
477        crate::common::RegisterField::<
478            2,
479            0x1,
480            1,
481            0,
482            p00pfs_a::Pdr,
483            p00pfs_a::Pdr,
484            P00PfsA_SPEC,
485            crate::common::RW,
486        >::from_register(self, 0)
487    }
488
489    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
490    #[inline(always)]
491    pub fn psel(
492        self,
493    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P00PfsA_SPEC, crate::common::RW> {
494        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P00PfsA_SPEC,crate::common::RW>::from_register(self,0)
495    }
496
497    #[doc = "Pin mode control"]
498    #[inline(always)]
499    pub fn pmc(
500        self,
501    ) -> crate::common::RegisterField<
502        15,
503        0x1,
504        1,
505        0,
506        p00pfs_a::Pmc,
507        p00pfs_a::Pmc,
508        P00PfsA_SPEC,
509        crate::common::RW,
510    > {
511        crate::common::RegisterField::<
512            15,
513            0x1,
514            1,
515            0,
516            p00pfs_a::Pmc,
517            p00pfs_a::Pmc,
518            P00PfsA_SPEC,
519            crate::common::RW,
520        >::from_register(self, 0)
521    }
522}
523impl ::core::default::Default for P00PfsA {
524    #[inline(always)]
525    fn default() -> P00PfsA {
526        <crate::RegValueT<P00PfsA_SPEC> as RegisterValue<_>>::new(32768)
527    }
528}
529pub mod p00pfs_a {
530
531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
532    pub struct Podr_SPEC;
533    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
534    impl Podr {
535        #[doc = "Low output"]
536        pub const _0: Self = Self::new(0);
537
538        #[doc = "High output"]
539        pub const _1: Self = Self::new(1);
540    }
541    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
542    pub struct Pidr_SPEC;
543    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
544    impl Pidr {
545        #[doc = "Low output"]
546        pub const _0: Self = Self::new(0);
547
548        #[doc = "High output"]
549        pub const _1: Self = Self::new(1);
550    }
551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
552    pub struct Pdr_SPEC;
553    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
554    impl Pdr {
555        #[doc = "Input (functions as an input pin)"]
556        pub const _0: Self = Self::new(0);
557
558        #[doc = "Output (functions as an output pin)"]
559        pub const _1: Self = Self::new(1);
560    }
561    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
562    pub struct Pmc_SPEC;
563    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
564    impl Pmc {
565        #[doc = "Digital I/O"]
566        pub const _0: Self = Self::new(0);
567
568        #[doc = "Analog input function. Input to the input buffer is disable"]
569        pub const _1: Self = Self::new(1);
570    }
571}
572#[doc(hidden)]
573#[derive(Copy, Clone, Eq, PartialEq)]
574pub struct P0PfsA_SPEC;
575impl crate::sealed::RegSpec for P0PfsA_SPEC {
576    type DataType = u16;
577}
578
579#[doc = "Port 0%s Pin Function Select Register"]
580pub type P0PfsA = crate::RegValueT<P0PfsA_SPEC>;
581
582impl P0PfsA {
583    #[doc = "Port Output Data"]
584    #[inline(always)]
585    pub fn podr(
586        self,
587    ) -> crate::common::RegisterField<
588        0,
589        0x1,
590        1,
591        0,
592        p0pfs_a::Podr,
593        p0pfs_a::Podr,
594        P0PfsA_SPEC,
595        crate::common::RW,
596    > {
597        crate::common::RegisterField::<
598            0,
599            0x1,
600            1,
601            0,
602            p0pfs_a::Podr,
603            p0pfs_a::Podr,
604            P0PfsA_SPEC,
605            crate::common::RW,
606        >::from_register(self, 0)
607    }
608
609    #[doc = "Pmn State"]
610    #[inline(always)]
611    pub fn pidr(
612        self,
613    ) -> crate::common::RegisterField<
614        1,
615        0x1,
616        1,
617        0,
618        p0pfs_a::Pidr,
619        p0pfs_a::Pidr,
620        P0PfsA_SPEC,
621        crate::common::R,
622    > {
623        crate::common::RegisterField::<
624            1,
625            0x1,
626            1,
627            0,
628            p0pfs_a::Pidr,
629            p0pfs_a::Pidr,
630            P0PfsA_SPEC,
631            crate::common::R,
632        >::from_register(self, 0)
633    }
634
635    #[inline(always)]
636    pub fn pdr(
637        self,
638    ) -> crate::common::RegisterField<
639        2,
640        0x1,
641        1,
642        0,
643        p0pfs_a::Pdr,
644        p0pfs_a::Pdr,
645        P0PfsA_SPEC,
646        crate::common::RW,
647    > {
648        crate::common::RegisterField::<
649            2,
650            0x1,
651            1,
652            0,
653            p0pfs_a::Pdr,
654            p0pfs_a::Pdr,
655            P0PfsA_SPEC,
656            crate::common::RW,
657        >::from_register(self, 0)
658    }
659
660    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
661    #[inline(always)]
662    pub fn psel(
663        self,
664    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P0PfsA_SPEC, crate::common::RW> {
665        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P0PfsA_SPEC,crate::common::RW>::from_register(self,0)
666    }
667
668    #[doc = "Pin mode control"]
669    #[inline(always)]
670    pub fn pmc(
671        self,
672    ) -> crate::common::RegisterField<
673        15,
674        0x1,
675        1,
676        0,
677        p0pfs_a::Pmc,
678        p0pfs_a::Pmc,
679        P0PfsA_SPEC,
680        crate::common::RW,
681    > {
682        crate::common::RegisterField::<
683            15,
684            0x1,
685            1,
686            0,
687            p0pfs_a::Pmc,
688            p0pfs_a::Pmc,
689            P0PfsA_SPEC,
690            crate::common::RW,
691        >::from_register(self, 0)
692    }
693}
694impl ::core::default::Default for P0PfsA {
695    #[inline(always)]
696    fn default() -> P0PfsA {
697        <crate::RegValueT<P0PfsA_SPEC> as RegisterValue<_>>::new(32768)
698    }
699}
700pub mod p0pfs_a {
701
702    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
703    pub struct Podr_SPEC;
704    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
705    impl Podr {
706        #[doc = "Low output"]
707        pub const _0: Self = Self::new(0);
708
709        #[doc = "High output"]
710        pub const _1: Self = Self::new(1);
711    }
712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
713    pub struct Pidr_SPEC;
714    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
715    impl Pidr {
716        #[doc = "Low output"]
717        pub const _0: Self = Self::new(0);
718
719        #[doc = "High output"]
720        pub const _1: Self = Self::new(1);
721    }
722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
723    pub struct Pdr_SPEC;
724    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
725    impl Pdr {
726        #[doc = "Input (functions as an input pin)"]
727        pub const _0: Self = Self::new(0);
728
729        #[doc = "Output (functions as an output pin)"]
730        pub const _1: Self = Self::new(1);
731    }
732    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
733    pub struct Pmc_SPEC;
734    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
735    impl Pmc {
736        #[doc = "Digital I/O"]
737        pub const _0: Self = Self::new(0);
738
739        #[doc = "Analog input function. Input to the input buffer is disable"]
740        pub const _1: Self = Self::new(1);
741    }
742}
743#[doc(hidden)]
744#[derive(Copy, Clone, Eq, PartialEq)]
745pub struct P015PfsA_SPEC;
746impl crate::sealed::RegSpec for P015PfsA_SPEC {
747    type DataType = u16;
748}
749
750#[doc = "Port 015 Pin Function Select Register"]
751pub type P015PfsA = crate::RegValueT<P015PfsA_SPEC>;
752
753impl P015PfsA {
754    #[doc = "Port Output Data"]
755    #[inline(always)]
756    pub fn podr(
757        self,
758    ) -> crate::common::RegisterField<
759        0,
760        0x1,
761        1,
762        0,
763        p015pfs_a::Podr,
764        p015pfs_a::Podr,
765        P015PfsA_SPEC,
766        crate::common::RW,
767    > {
768        crate::common::RegisterField::<
769            0,
770            0x1,
771            1,
772            0,
773            p015pfs_a::Podr,
774            p015pfs_a::Podr,
775            P015PfsA_SPEC,
776            crate::common::RW,
777        >::from_register(self, 0)
778    }
779
780    #[doc = "Pmn State"]
781    #[inline(always)]
782    pub fn pidr(
783        self,
784    ) -> crate::common::RegisterField<
785        1,
786        0x1,
787        1,
788        0,
789        p015pfs_a::Pidr,
790        p015pfs_a::Pidr,
791        P015PfsA_SPEC,
792        crate::common::R,
793    > {
794        crate::common::RegisterField::<
795            1,
796            0x1,
797            1,
798            0,
799            p015pfs_a::Pidr,
800            p015pfs_a::Pidr,
801            P015PfsA_SPEC,
802            crate::common::R,
803        >::from_register(self, 0)
804    }
805
806    #[inline(always)]
807    pub fn pdr(
808        self,
809    ) -> crate::common::RegisterField<
810        2,
811        0x1,
812        1,
813        0,
814        p015pfs_a::Pdr,
815        p015pfs_a::Pdr,
816        P015PfsA_SPEC,
817        crate::common::RW,
818    > {
819        crate::common::RegisterField::<
820            2,
821            0x1,
822            1,
823            0,
824            p015pfs_a::Pdr,
825            p015pfs_a::Pdr,
826            P015PfsA_SPEC,
827            crate::common::RW,
828        >::from_register(self, 0)
829    }
830
831    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
832    #[inline(always)]
833    pub fn psel(
834        self,
835    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P015PfsA_SPEC, crate::common::RW> {
836        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P015PfsA_SPEC,crate::common::RW>::from_register(self,0)
837    }
838
839    #[doc = "IRQ Input Enable"]
840    #[inline(always)]
841    pub fn isel(
842        self,
843    ) -> crate::common::RegisterField<
844        14,
845        0x1,
846        1,
847        0,
848        p015pfs_a::Isel,
849        p015pfs_a::Isel,
850        P015PfsA_SPEC,
851        crate::common::RW,
852    > {
853        crate::common::RegisterField::<
854            14,
855            0x1,
856            1,
857            0,
858            p015pfs_a::Isel,
859            p015pfs_a::Isel,
860            P015PfsA_SPEC,
861            crate::common::RW,
862        >::from_register(self, 0)
863    }
864
865    #[doc = "Pin mode control"]
866    #[inline(always)]
867    pub fn pmc(
868        self,
869    ) -> crate::common::RegisterField<
870        15,
871        0x1,
872        1,
873        0,
874        p015pfs_a::Pmc,
875        p015pfs_a::Pmc,
876        P015PfsA_SPEC,
877        crate::common::RW,
878    > {
879        crate::common::RegisterField::<
880            15,
881            0x1,
882            1,
883            0,
884            p015pfs_a::Pmc,
885            p015pfs_a::Pmc,
886            P015PfsA_SPEC,
887            crate::common::RW,
888        >::from_register(self, 0)
889    }
890}
891impl ::core::default::Default for P015PfsA {
892    #[inline(always)]
893    fn default() -> P015PfsA {
894        <crate::RegValueT<P015PfsA_SPEC> as RegisterValue<_>>::new(32768)
895    }
896}
897pub mod p015pfs_a {
898
899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
900    pub struct Podr_SPEC;
901    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
902    impl Podr {
903        #[doc = "Low output"]
904        pub const _0: Self = Self::new(0);
905
906        #[doc = "High output"]
907        pub const _1: Self = Self::new(1);
908    }
909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
910    pub struct Pidr_SPEC;
911    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
912    impl Pidr {
913        #[doc = "Low output"]
914        pub const _0: Self = Self::new(0);
915
916        #[doc = "High output"]
917        pub const _1: Self = Self::new(1);
918    }
919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
920    pub struct Pdr_SPEC;
921    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
922    impl Pdr {
923        #[doc = "Input (functions as an input pin)"]
924        pub const _0: Self = Self::new(0);
925
926        #[doc = "Output (functions as an output pin)"]
927        pub const _1: Self = Self::new(1);
928    }
929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
930    pub struct Isel_SPEC;
931    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
932    impl Isel {
933        #[doc = "Notused as an IRQn input pin"]
934        pub const _0: Self = Self::new(0);
935
936        #[doc = "Used as an IRQn input pin"]
937        pub const _1: Self = Self::new(1);
938    }
939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
940    pub struct Pmc_SPEC;
941    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
942    impl Pmc {
943        #[doc = "Digital I/O"]
944        pub const _0: Self = Self::new(0);
945
946        #[doc = "Analog input function. Input to the input buffer is disable"]
947        pub const _1: Self = Self::new(1);
948    }
949}
950#[doc(hidden)]
951#[derive(Copy, Clone, Eq, PartialEq)]
952pub struct P10PfsA_SPEC;
953impl crate::sealed::RegSpec for P10PfsA_SPEC {
954    type DataType = u16;
955}
956
957#[doc = "Port 10%s Pin Function Select Register"]
958pub type P10PfsA = crate::RegValueT<P10PfsA_SPEC>;
959
960impl P10PfsA {
961    #[doc = "Port Output Data"]
962    #[inline(always)]
963    pub fn podr(
964        self,
965    ) -> crate::common::RegisterField<
966        0,
967        0x1,
968        1,
969        0,
970        p10pfs_a::Podr,
971        p10pfs_a::Podr,
972        P10PfsA_SPEC,
973        crate::common::RW,
974    > {
975        crate::common::RegisterField::<
976            0,
977            0x1,
978            1,
979            0,
980            p10pfs_a::Podr,
981            p10pfs_a::Podr,
982            P10PfsA_SPEC,
983            crate::common::RW,
984        >::from_register(self, 0)
985    }
986
987    #[doc = "Pmn State"]
988    #[inline(always)]
989    pub fn pidr(
990        self,
991    ) -> crate::common::RegisterField<
992        1,
993        0x1,
994        1,
995        0,
996        p10pfs_a::Pidr,
997        p10pfs_a::Pidr,
998        P10PfsA_SPEC,
999        crate::common::R,
1000    > {
1001        crate::common::RegisterField::<
1002            1,
1003            0x1,
1004            1,
1005            0,
1006            p10pfs_a::Pidr,
1007            p10pfs_a::Pidr,
1008            P10PfsA_SPEC,
1009            crate::common::R,
1010        >::from_register(self, 0)
1011    }
1012
1013    #[inline(always)]
1014    pub fn pdr(
1015        self,
1016    ) -> crate::common::RegisterField<
1017        2,
1018        0x1,
1019        1,
1020        0,
1021        p10pfs_a::Pdr,
1022        p10pfs_a::Pdr,
1023        P10PfsA_SPEC,
1024        crate::common::RW,
1025    > {
1026        crate::common::RegisterField::<
1027            2,
1028            0x1,
1029            1,
1030            0,
1031            p10pfs_a::Pdr,
1032            p10pfs_a::Pdr,
1033            P10PfsA_SPEC,
1034            crate::common::RW,
1035        >::from_register(self, 0)
1036    }
1037
1038    #[inline(always)]
1039    pub fn pcr(
1040        self,
1041    ) -> crate::common::RegisterField<
1042        4,
1043        0x1,
1044        1,
1045        0,
1046        p10pfs_a::Pcr,
1047        p10pfs_a::Pcr,
1048        P10PfsA_SPEC,
1049        crate::common::RW,
1050    > {
1051        crate::common::RegisterField::<
1052            4,
1053            0x1,
1054            1,
1055            0,
1056            p10pfs_a::Pcr,
1057            p10pfs_a::Pcr,
1058            P10PfsA_SPEC,
1059            crate::common::RW,
1060        >::from_register(self, 0)
1061    }
1062
1063    #[inline(always)]
1064    pub fn pim(
1065        self,
1066    ) -> crate::common::RegisterField<
1067        5,
1068        0x1,
1069        1,
1070        0,
1071        p10pfs_a::Pim,
1072        p10pfs_a::Pim,
1073        P10PfsA_SPEC,
1074        crate::common::RW,
1075    > {
1076        crate::common::RegisterField::<
1077            5,
1078            0x1,
1079            1,
1080            0,
1081            p10pfs_a::Pim,
1082            p10pfs_a::Pim,
1083            P10PfsA_SPEC,
1084            crate::common::RW,
1085        >::from_register(self, 0)
1086    }
1087
1088    #[inline(always)]
1089    pub fn ncodr(
1090        self,
1091    ) -> crate::common::RegisterField<
1092        6,
1093        0x1,
1094        1,
1095        0,
1096        p10pfs_a::Ncodr,
1097        p10pfs_a::Ncodr,
1098        P10PfsA_SPEC,
1099        crate::common::RW,
1100    > {
1101        crate::common::RegisterField::<
1102            6,
1103            0x1,
1104            1,
1105            0,
1106            p10pfs_a::Ncodr,
1107            p10pfs_a::Ncodr,
1108            P10PfsA_SPEC,
1109            crate::common::RW,
1110        >::from_register(self, 0)
1111    }
1112
1113    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
1114    #[inline(always)]
1115    pub fn psel(
1116        self,
1117    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P10PfsA_SPEC, crate::common::RW> {
1118        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P10PfsA_SPEC,crate::common::RW>::from_register(self,0)
1119    }
1120
1121    #[doc = "IRQ Input Enable"]
1122    #[inline(always)]
1123    pub fn isel(
1124        self,
1125    ) -> crate::common::RegisterField<
1126        14,
1127        0x1,
1128        1,
1129        0,
1130        p10pfs_a::Isel,
1131        p10pfs_a::Isel,
1132        P10PfsA_SPEC,
1133        crate::common::RW,
1134    > {
1135        crate::common::RegisterField::<
1136            14,
1137            0x1,
1138            1,
1139            0,
1140            p10pfs_a::Isel,
1141            p10pfs_a::Isel,
1142            P10PfsA_SPEC,
1143            crate::common::RW,
1144        >::from_register(self, 0)
1145    }
1146
1147    #[doc = "Pin mode control"]
1148    #[inline(always)]
1149    pub fn pmc(
1150        self,
1151    ) -> crate::common::RegisterField<
1152        15,
1153        0x1,
1154        1,
1155        0,
1156        p10pfs_a::Pmc,
1157        p10pfs_a::Pmc,
1158        P10PfsA_SPEC,
1159        crate::common::RW,
1160    > {
1161        crate::common::RegisterField::<
1162            15,
1163            0x1,
1164            1,
1165            0,
1166            p10pfs_a::Pmc,
1167            p10pfs_a::Pmc,
1168            P10PfsA_SPEC,
1169            crate::common::RW,
1170        >::from_register(self, 0)
1171    }
1172}
1173impl ::core::default::Default for P10PfsA {
1174    #[inline(always)]
1175    fn default() -> P10PfsA {
1176        <crate::RegValueT<P10PfsA_SPEC> as RegisterValue<_>>::new(0)
1177    }
1178}
1179pub mod p10pfs_a {
1180
1181    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1182    pub struct Podr_SPEC;
1183    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
1184    impl Podr {
1185        #[doc = "Low output"]
1186        pub const _0: Self = Self::new(0);
1187
1188        #[doc = "High output"]
1189        pub const _1: Self = Self::new(1);
1190    }
1191    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1192    pub struct Pidr_SPEC;
1193    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
1194    impl Pidr {
1195        #[doc = "Low output"]
1196        pub const _0: Self = Self::new(0);
1197
1198        #[doc = "High output"]
1199        pub const _1: Self = Self::new(1);
1200    }
1201    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1202    pub struct Pdr_SPEC;
1203    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
1204    impl Pdr {
1205        #[doc = "Input (functions as an input pin)"]
1206        pub const _0: Self = Self::new(0);
1207
1208        #[doc = "Output (functions as an output pin)"]
1209        pub const _1: Self = Self::new(1);
1210    }
1211    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1212    pub struct Pcr_SPEC;
1213    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
1214    impl Pcr {
1215        #[doc = "Disableinput pull-up"]
1216        pub const _0: Self = Self::new(0);
1217
1218        #[doc = "Enableinput pull-up"]
1219        pub const _1: Self = Self::new(1);
1220    }
1221    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1222    pub struct Pim_SPEC;
1223    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
1224    impl Pim {
1225        #[doc = "Input (functions as an input pin)"]
1226        pub const _0: Self = Self::new(0);
1227
1228        #[doc = "Output (functions as an output pin)"]
1229        pub const _1: Self = Self::new(1);
1230    }
1231    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1232    pub struct Ncodr_SPEC;
1233    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
1234    impl Ncodr {
1235        #[doc = "Input (functions as an input pin)"]
1236        pub const _0: Self = Self::new(0);
1237
1238        #[doc = "Output (functions as an output pin)"]
1239        pub const _1: Self = Self::new(1);
1240    }
1241    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1242    pub struct Isel_SPEC;
1243    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
1244    impl Isel {
1245        #[doc = "Notused as an IRQn input pin"]
1246        pub const _0: Self = Self::new(0);
1247
1248        #[doc = "Used as an IRQn input pin"]
1249        pub const _1: Self = Self::new(1);
1250    }
1251    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1252    pub struct Pmc_SPEC;
1253    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
1254    impl Pmc {
1255        #[doc = "Digital I/O"]
1256        pub const _0: Self = Self::new(0);
1257
1258        #[doc = "Analog input function. Input to the input buffer is disable"]
1259        pub const _1: Self = Self::new(1);
1260    }
1261}
1262#[doc(hidden)]
1263#[derive(Copy, Clone, Eq, PartialEq)]
1264pub struct P108PfsA_SPEC;
1265impl crate::sealed::RegSpec for P108PfsA_SPEC {
1266    type DataType = u16;
1267}
1268
1269#[doc = "Port 108 Pin Function Select Register"]
1270pub type P108PfsA = crate::RegValueT<P108PfsA_SPEC>;
1271
1272impl P108PfsA {
1273    #[doc = "Port Output Data"]
1274    #[inline(always)]
1275    pub fn podr(
1276        self,
1277    ) -> crate::common::RegisterField<
1278        0,
1279        0x1,
1280        1,
1281        0,
1282        p108pfs_a::Podr,
1283        p108pfs_a::Podr,
1284        P108PfsA_SPEC,
1285        crate::common::RW,
1286    > {
1287        crate::common::RegisterField::<
1288            0,
1289            0x1,
1290            1,
1291            0,
1292            p108pfs_a::Podr,
1293            p108pfs_a::Podr,
1294            P108PfsA_SPEC,
1295            crate::common::RW,
1296        >::from_register(self, 0)
1297    }
1298
1299    #[doc = "Pmn State"]
1300    #[inline(always)]
1301    pub fn pidr(
1302        self,
1303    ) -> crate::common::RegisterField<
1304        1,
1305        0x1,
1306        1,
1307        0,
1308        p108pfs_a::Pidr,
1309        p108pfs_a::Pidr,
1310        P108PfsA_SPEC,
1311        crate::common::R,
1312    > {
1313        crate::common::RegisterField::<
1314            1,
1315            0x1,
1316            1,
1317            0,
1318            p108pfs_a::Pidr,
1319            p108pfs_a::Pidr,
1320            P108PfsA_SPEC,
1321            crate::common::R,
1322        >::from_register(self, 0)
1323    }
1324
1325    #[inline(always)]
1326    pub fn pdr(
1327        self,
1328    ) -> crate::common::RegisterField<
1329        2,
1330        0x1,
1331        1,
1332        0,
1333        p108pfs_a::Pdr,
1334        p108pfs_a::Pdr,
1335        P108PfsA_SPEC,
1336        crate::common::RW,
1337    > {
1338        crate::common::RegisterField::<
1339            2,
1340            0x1,
1341            1,
1342            0,
1343            p108pfs_a::Pdr,
1344            p108pfs_a::Pdr,
1345            P108PfsA_SPEC,
1346            crate::common::RW,
1347        >::from_register(self, 0)
1348    }
1349
1350    #[inline(always)]
1351    pub fn pcr(
1352        self,
1353    ) -> crate::common::RegisterField<
1354        4,
1355        0x1,
1356        1,
1357        0,
1358        p108pfs_a::Pcr,
1359        p108pfs_a::Pcr,
1360        P108PfsA_SPEC,
1361        crate::common::RW,
1362    > {
1363        crate::common::RegisterField::<
1364            4,
1365            0x1,
1366            1,
1367            0,
1368            p108pfs_a::Pcr,
1369            p108pfs_a::Pcr,
1370            P108PfsA_SPEC,
1371            crate::common::RW,
1372        >::from_register(self, 0)
1373    }
1374
1375    #[inline(always)]
1376    pub fn pim(
1377        self,
1378    ) -> crate::common::RegisterField<
1379        5,
1380        0x1,
1381        1,
1382        0,
1383        p108pfs_a::Pim,
1384        p108pfs_a::Pim,
1385        P108PfsA_SPEC,
1386        crate::common::RW,
1387    > {
1388        crate::common::RegisterField::<
1389            5,
1390            0x1,
1391            1,
1392            0,
1393            p108pfs_a::Pim,
1394            p108pfs_a::Pim,
1395            P108PfsA_SPEC,
1396            crate::common::RW,
1397        >::from_register(self, 0)
1398    }
1399
1400    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
1401    #[inline(always)]
1402    pub fn psel(
1403        self,
1404    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P108PfsA_SPEC, crate::common::RW> {
1405        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P108PfsA_SPEC,crate::common::RW>::from_register(self,0)
1406    }
1407
1408    #[doc = "Pin mode control"]
1409    #[inline(always)]
1410    pub fn pmc(
1411        self,
1412    ) -> crate::common::RegisterField<
1413        15,
1414        0x1,
1415        1,
1416        0,
1417        p108pfs_a::Pmc,
1418        p108pfs_a::Pmc,
1419        P108PfsA_SPEC,
1420        crate::common::RW,
1421    > {
1422        crate::common::RegisterField::<
1423            15,
1424            0x1,
1425            1,
1426            0,
1427            p108pfs_a::Pmc,
1428            p108pfs_a::Pmc,
1429            P108PfsA_SPEC,
1430            crate::common::RW,
1431        >::from_register(self, 0)
1432    }
1433}
1434impl ::core::default::Default for P108PfsA {
1435    #[inline(always)]
1436    fn default() -> P108PfsA {
1437        <crate::RegValueT<P108PfsA_SPEC> as RegisterValue<_>>::new(272)
1438    }
1439}
1440pub mod p108pfs_a {
1441
1442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1443    pub struct Podr_SPEC;
1444    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
1445    impl Podr {
1446        #[doc = "Low output"]
1447        pub const _0: Self = Self::new(0);
1448
1449        #[doc = "High output"]
1450        pub const _1: Self = Self::new(1);
1451    }
1452    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1453    pub struct Pidr_SPEC;
1454    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
1455    impl Pidr {
1456        #[doc = "Low output"]
1457        pub const _0: Self = Self::new(0);
1458
1459        #[doc = "High output"]
1460        pub const _1: Self = Self::new(1);
1461    }
1462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1463    pub struct Pdr_SPEC;
1464    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
1465    impl Pdr {
1466        #[doc = "Input (functions as an input pin)"]
1467        pub const _0: Self = Self::new(0);
1468
1469        #[doc = "Output (functions as an output pin)"]
1470        pub const _1: Self = Self::new(1);
1471    }
1472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1473    pub struct Pcr_SPEC;
1474    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
1475    impl Pcr {
1476        #[doc = "Disableinput pull-up"]
1477        pub const _0: Self = Self::new(0);
1478
1479        #[doc = "Enableinput pull-up"]
1480        pub const _1: Self = Self::new(1);
1481    }
1482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1483    pub struct Pim_SPEC;
1484    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
1485    impl Pim {
1486        #[doc = "Input (functions as an input pin)"]
1487        pub const _0: Self = Self::new(0);
1488
1489        #[doc = "Output (functions as an output pin)"]
1490        pub const _1: Self = Self::new(1);
1491    }
1492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1493    pub struct Pmc_SPEC;
1494    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
1495    impl Pmc {
1496        #[doc = "Digital I/O"]
1497        pub const _0: Self = Self::new(0);
1498
1499        #[doc = "Analog input function. Input to the input buffer is disable"]
1500        pub const _1: Self = Self::new(1);
1501    }
1502}
1503#[doc(hidden)]
1504#[derive(Copy, Clone, Eq, PartialEq)]
1505pub struct P109PfsA_SPEC;
1506impl crate::sealed::RegSpec for P109PfsA_SPEC {
1507    type DataType = u16;
1508}
1509
1510#[doc = "Port 109 Pin Function Select Register"]
1511pub type P109PfsA = crate::RegValueT<P109PfsA_SPEC>;
1512
1513impl P109PfsA {
1514    #[doc = "Port Output Data"]
1515    #[inline(always)]
1516    pub fn podr(
1517        self,
1518    ) -> crate::common::RegisterField<
1519        0,
1520        0x1,
1521        1,
1522        0,
1523        p109pfs_a::Podr,
1524        p109pfs_a::Podr,
1525        P109PfsA_SPEC,
1526        crate::common::RW,
1527    > {
1528        crate::common::RegisterField::<
1529            0,
1530            0x1,
1531            1,
1532            0,
1533            p109pfs_a::Podr,
1534            p109pfs_a::Podr,
1535            P109PfsA_SPEC,
1536            crate::common::RW,
1537        >::from_register(self, 0)
1538    }
1539
1540    #[doc = "Pmn State"]
1541    #[inline(always)]
1542    pub fn pidr(
1543        self,
1544    ) -> crate::common::RegisterField<
1545        1,
1546        0x1,
1547        1,
1548        0,
1549        p109pfs_a::Pidr,
1550        p109pfs_a::Pidr,
1551        P109PfsA_SPEC,
1552        crate::common::R,
1553    > {
1554        crate::common::RegisterField::<
1555            1,
1556            0x1,
1557            1,
1558            0,
1559            p109pfs_a::Pidr,
1560            p109pfs_a::Pidr,
1561            P109PfsA_SPEC,
1562            crate::common::R,
1563        >::from_register(self, 0)
1564    }
1565
1566    #[inline(always)]
1567    pub fn pdr(
1568        self,
1569    ) -> crate::common::RegisterField<
1570        2,
1571        0x1,
1572        1,
1573        0,
1574        p109pfs_a::Pdr,
1575        p109pfs_a::Pdr,
1576        P109PfsA_SPEC,
1577        crate::common::RW,
1578    > {
1579        crate::common::RegisterField::<
1580            2,
1581            0x1,
1582            1,
1583            0,
1584            p109pfs_a::Pdr,
1585            p109pfs_a::Pdr,
1586            P109PfsA_SPEC,
1587            crate::common::RW,
1588        >::from_register(self, 0)
1589    }
1590
1591    #[inline(always)]
1592    pub fn pcr(
1593        self,
1594    ) -> crate::common::RegisterField<
1595        4,
1596        0x1,
1597        1,
1598        0,
1599        p109pfs_a::Pcr,
1600        p109pfs_a::Pcr,
1601        P109PfsA_SPEC,
1602        crate::common::RW,
1603    > {
1604        crate::common::RegisterField::<
1605            4,
1606            0x1,
1607            1,
1608            0,
1609            p109pfs_a::Pcr,
1610            p109pfs_a::Pcr,
1611            P109PfsA_SPEC,
1612            crate::common::RW,
1613        >::from_register(self, 0)
1614    }
1615
1616    #[inline(always)]
1617    pub fn pim(
1618        self,
1619    ) -> crate::common::RegisterField<
1620        5,
1621        0x1,
1622        1,
1623        0,
1624        p109pfs_a::Pim,
1625        p109pfs_a::Pim,
1626        P109PfsA_SPEC,
1627        crate::common::RW,
1628    > {
1629        crate::common::RegisterField::<
1630            5,
1631            0x1,
1632            1,
1633            0,
1634            p109pfs_a::Pim,
1635            p109pfs_a::Pim,
1636            P109PfsA_SPEC,
1637            crate::common::RW,
1638        >::from_register(self, 0)
1639    }
1640
1641    #[inline(always)]
1642    pub fn ncodr(
1643        self,
1644    ) -> crate::common::RegisterField<
1645        6,
1646        0x1,
1647        1,
1648        0,
1649        p109pfs_a::Ncodr,
1650        p109pfs_a::Ncodr,
1651        P109PfsA_SPEC,
1652        crate::common::RW,
1653    > {
1654        crate::common::RegisterField::<
1655            6,
1656            0x1,
1657            1,
1658            0,
1659            p109pfs_a::Ncodr,
1660            p109pfs_a::Ncodr,
1661            P109PfsA_SPEC,
1662            crate::common::RW,
1663        >::from_register(self, 0)
1664    }
1665
1666    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
1667    #[inline(always)]
1668    pub fn psel(
1669        self,
1670    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P109PfsA_SPEC, crate::common::RW> {
1671        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P109PfsA_SPEC,crate::common::RW>::from_register(self,0)
1672    }
1673
1674    #[doc = "IRQ Input Enable"]
1675    #[inline(always)]
1676    pub fn isel(
1677        self,
1678    ) -> crate::common::RegisterField<
1679        14,
1680        0x1,
1681        1,
1682        0,
1683        p109pfs_a::Isel,
1684        p109pfs_a::Isel,
1685        P109PfsA_SPEC,
1686        crate::common::RW,
1687    > {
1688        crate::common::RegisterField::<
1689            14,
1690            0x1,
1691            1,
1692            0,
1693            p109pfs_a::Isel,
1694            p109pfs_a::Isel,
1695            P109PfsA_SPEC,
1696            crate::common::RW,
1697        >::from_register(self, 0)
1698    }
1699
1700    #[doc = "Pin mode control"]
1701    #[inline(always)]
1702    pub fn pmc(
1703        self,
1704    ) -> crate::common::RegisterField<
1705        15,
1706        0x1,
1707        1,
1708        0,
1709        p109pfs_a::Pmc,
1710        p109pfs_a::Pmc,
1711        P109PfsA_SPEC,
1712        crate::common::RW,
1713    > {
1714        crate::common::RegisterField::<
1715            15,
1716            0x1,
1717            1,
1718            0,
1719            p109pfs_a::Pmc,
1720            p109pfs_a::Pmc,
1721            P109PfsA_SPEC,
1722            crate::common::RW,
1723        >::from_register(self, 0)
1724    }
1725}
1726impl ::core::default::Default for P109PfsA {
1727    #[inline(always)]
1728    fn default() -> P109PfsA {
1729        <crate::RegValueT<P109PfsA_SPEC> as RegisterValue<_>>::new(0)
1730    }
1731}
1732pub mod p109pfs_a {
1733
1734    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1735    pub struct Podr_SPEC;
1736    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
1737    impl Podr {
1738        #[doc = "Low output"]
1739        pub const _0: Self = Self::new(0);
1740
1741        #[doc = "High output"]
1742        pub const _1: Self = Self::new(1);
1743    }
1744    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1745    pub struct Pidr_SPEC;
1746    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
1747    impl Pidr {
1748        #[doc = "Low output"]
1749        pub const _0: Self = Self::new(0);
1750
1751        #[doc = "High output"]
1752        pub const _1: Self = Self::new(1);
1753    }
1754    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1755    pub struct Pdr_SPEC;
1756    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
1757    impl Pdr {
1758        #[doc = "Input (functions as an input pin)"]
1759        pub const _0: Self = Self::new(0);
1760
1761        #[doc = "Output (functions as an output pin)"]
1762        pub const _1: Self = Self::new(1);
1763    }
1764    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1765    pub struct Pcr_SPEC;
1766    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
1767    impl Pcr {
1768        #[doc = "Disableinput pull-up"]
1769        pub const _0: Self = Self::new(0);
1770
1771        #[doc = "Enableinput pull-up"]
1772        pub const _1: Self = Self::new(1);
1773    }
1774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1775    pub struct Pim_SPEC;
1776    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
1777    impl Pim {
1778        #[doc = "Input (functions as an input pin)"]
1779        pub const _0: Self = Self::new(0);
1780
1781        #[doc = "Output (functions as an output pin)"]
1782        pub const _1: Self = Self::new(1);
1783    }
1784    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1785    pub struct Ncodr_SPEC;
1786    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
1787    impl Ncodr {
1788        #[doc = "Input (functions as an input pin)"]
1789        pub const _0: Self = Self::new(0);
1790
1791        #[doc = "Output (functions as an output pin)"]
1792        pub const _1: Self = Self::new(1);
1793    }
1794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1795    pub struct Isel_SPEC;
1796    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
1797    impl Isel {
1798        #[doc = "Notused as an IRQn input pin"]
1799        pub const _0: Self = Self::new(0);
1800
1801        #[doc = "Used as an IRQn input pin"]
1802        pub const _1: Self = Self::new(1);
1803    }
1804    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1805    pub struct Pmc_SPEC;
1806    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
1807    impl Pmc {
1808        #[doc = "Digital I/O"]
1809        pub const _0: Self = Self::new(0);
1810
1811        #[doc = "Analog input function. Input to the input buffer is disable"]
1812        pub const _1: Self = Self::new(1);
1813    }
1814}
1815#[doc(hidden)]
1816#[derive(Copy, Clone, Eq, PartialEq)]
1817pub struct P110PfsA_SPEC;
1818impl crate::sealed::RegSpec for P110PfsA_SPEC {
1819    type DataType = u16;
1820}
1821
1822#[doc = "Port 110 Pin Function Select Register"]
1823pub type P110PfsA = crate::RegValueT<P110PfsA_SPEC>;
1824
1825impl P110PfsA {
1826    #[doc = "Port Output Data"]
1827    #[inline(always)]
1828    pub fn podr(
1829        self,
1830    ) -> crate::common::RegisterField<
1831        0,
1832        0x1,
1833        1,
1834        0,
1835        p110pfs_a::Podr,
1836        p110pfs_a::Podr,
1837        P110PfsA_SPEC,
1838        crate::common::RW,
1839    > {
1840        crate::common::RegisterField::<
1841            0,
1842            0x1,
1843            1,
1844            0,
1845            p110pfs_a::Podr,
1846            p110pfs_a::Podr,
1847            P110PfsA_SPEC,
1848            crate::common::RW,
1849        >::from_register(self, 0)
1850    }
1851
1852    #[doc = "Pmn State"]
1853    #[inline(always)]
1854    pub fn pidr(
1855        self,
1856    ) -> crate::common::RegisterField<
1857        1,
1858        0x1,
1859        1,
1860        0,
1861        p110pfs_a::Pidr,
1862        p110pfs_a::Pidr,
1863        P110PfsA_SPEC,
1864        crate::common::R,
1865    > {
1866        crate::common::RegisterField::<
1867            1,
1868            0x1,
1869            1,
1870            0,
1871            p110pfs_a::Pidr,
1872            p110pfs_a::Pidr,
1873            P110PfsA_SPEC,
1874            crate::common::R,
1875        >::from_register(self, 0)
1876    }
1877
1878    #[inline(always)]
1879    pub fn pdr(
1880        self,
1881    ) -> crate::common::RegisterField<
1882        2,
1883        0x1,
1884        1,
1885        0,
1886        p110pfs_a::Pdr,
1887        p110pfs_a::Pdr,
1888        P110PfsA_SPEC,
1889        crate::common::RW,
1890    > {
1891        crate::common::RegisterField::<
1892            2,
1893            0x1,
1894            1,
1895            0,
1896            p110pfs_a::Pdr,
1897            p110pfs_a::Pdr,
1898            P110PfsA_SPEC,
1899            crate::common::RW,
1900        >::from_register(self, 0)
1901    }
1902
1903    #[inline(always)]
1904    pub fn pcr(
1905        self,
1906    ) -> crate::common::RegisterField<
1907        4,
1908        0x1,
1909        1,
1910        0,
1911        p110pfs_a::Pcr,
1912        p110pfs_a::Pcr,
1913        P110PfsA_SPEC,
1914        crate::common::RW,
1915    > {
1916        crate::common::RegisterField::<
1917            4,
1918            0x1,
1919            1,
1920            0,
1921            p110pfs_a::Pcr,
1922            p110pfs_a::Pcr,
1923            P110PfsA_SPEC,
1924            crate::common::RW,
1925        >::from_register(self, 0)
1926    }
1927
1928    #[inline(always)]
1929    pub fn pim(
1930        self,
1931    ) -> crate::common::RegisterField<
1932        5,
1933        0x1,
1934        1,
1935        0,
1936        p110pfs_a::Pim,
1937        p110pfs_a::Pim,
1938        P110PfsA_SPEC,
1939        crate::common::RW,
1940    > {
1941        crate::common::RegisterField::<
1942            5,
1943            0x1,
1944            1,
1945            0,
1946            p110pfs_a::Pim,
1947            p110pfs_a::Pim,
1948            P110PfsA_SPEC,
1949            crate::common::RW,
1950        >::from_register(self, 0)
1951    }
1952
1953    #[inline(always)]
1954    pub fn ncodr(
1955        self,
1956    ) -> crate::common::RegisterField<
1957        6,
1958        0x1,
1959        1,
1960        0,
1961        p110pfs_a::Ncodr,
1962        p110pfs_a::Ncodr,
1963        P110PfsA_SPEC,
1964        crate::common::RW,
1965    > {
1966        crate::common::RegisterField::<
1967            6,
1968            0x1,
1969            1,
1970            0,
1971            p110pfs_a::Ncodr,
1972            p110pfs_a::Ncodr,
1973            P110PfsA_SPEC,
1974            crate::common::RW,
1975        >::from_register(self, 0)
1976    }
1977
1978    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
1979    #[inline(always)]
1980    pub fn psel(
1981        self,
1982    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P110PfsA_SPEC, crate::common::RW> {
1983        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P110PfsA_SPEC,crate::common::RW>::from_register(self,0)
1984    }
1985
1986    #[doc = "IRQ Input Enable"]
1987    #[inline(always)]
1988    pub fn isel(
1989        self,
1990    ) -> crate::common::RegisterField<
1991        14,
1992        0x1,
1993        1,
1994        0,
1995        p110pfs_a::Isel,
1996        p110pfs_a::Isel,
1997        P110PfsA_SPEC,
1998        crate::common::RW,
1999    > {
2000        crate::common::RegisterField::<
2001            14,
2002            0x1,
2003            1,
2004            0,
2005            p110pfs_a::Isel,
2006            p110pfs_a::Isel,
2007            P110PfsA_SPEC,
2008            crate::common::RW,
2009        >::from_register(self, 0)
2010    }
2011
2012    #[doc = "Pin mode control"]
2013    #[inline(always)]
2014    pub fn pmc(
2015        self,
2016    ) -> crate::common::RegisterField<
2017        15,
2018        0x1,
2019        1,
2020        0,
2021        p110pfs_a::Pmc,
2022        p110pfs_a::Pmc,
2023        P110PfsA_SPEC,
2024        crate::common::RW,
2025    > {
2026        crate::common::RegisterField::<
2027            15,
2028            0x1,
2029            1,
2030            0,
2031            p110pfs_a::Pmc,
2032            p110pfs_a::Pmc,
2033            P110PfsA_SPEC,
2034            crate::common::RW,
2035        >::from_register(self, 0)
2036    }
2037}
2038impl ::core::default::Default for P110PfsA {
2039    #[inline(always)]
2040    fn default() -> P110PfsA {
2041        <crate::RegValueT<P110PfsA_SPEC> as RegisterValue<_>>::new(0)
2042    }
2043}
2044pub mod p110pfs_a {
2045
2046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2047    pub struct Podr_SPEC;
2048    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
2049    impl Podr {
2050        #[doc = "Low output"]
2051        pub const _0: Self = Self::new(0);
2052
2053        #[doc = "High output"]
2054        pub const _1: Self = Self::new(1);
2055    }
2056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2057    pub struct Pidr_SPEC;
2058    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
2059    impl Pidr {
2060        #[doc = "Low output"]
2061        pub const _0: Self = Self::new(0);
2062
2063        #[doc = "High output"]
2064        pub const _1: Self = Self::new(1);
2065    }
2066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2067    pub struct Pdr_SPEC;
2068    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
2069    impl Pdr {
2070        #[doc = "Input (functions as an input pin)"]
2071        pub const _0: Self = Self::new(0);
2072
2073        #[doc = "Output (functions as an output pin)"]
2074        pub const _1: Self = Self::new(1);
2075    }
2076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2077    pub struct Pcr_SPEC;
2078    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
2079    impl Pcr {
2080        #[doc = "Disableinput pull-up"]
2081        pub const _0: Self = Self::new(0);
2082
2083        #[doc = "Enableinput pull-up"]
2084        pub const _1: Self = Self::new(1);
2085    }
2086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2087    pub struct Pim_SPEC;
2088    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
2089    impl Pim {
2090        #[doc = "Input (functions as an input pin)"]
2091        pub const _0: Self = Self::new(0);
2092
2093        #[doc = "Output (functions as an output pin)"]
2094        pub const _1: Self = Self::new(1);
2095    }
2096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2097    pub struct Ncodr_SPEC;
2098    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
2099    impl Ncodr {
2100        #[doc = "Input (functions as an input pin)"]
2101        pub const _0: Self = Self::new(0);
2102
2103        #[doc = "Output (functions as an output pin)"]
2104        pub const _1: Self = Self::new(1);
2105    }
2106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2107    pub struct Isel_SPEC;
2108    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
2109    impl Isel {
2110        #[doc = "Notused as an IRQn input pin"]
2111        pub const _0: Self = Self::new(0);
2112
2113        #[doc = "Used as an IRQn input pin"]
2114        pub const _1: Self = Self::new(1);
2115    }
2116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2117    pub struct Pmc_SPEC;
2118    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
2119    impl Pmc {
2120        #[doc = "Digital I/O"]
2121        pub const _0: Self = Self::new(0);
2122
2123        #[doc = "Analog input function. Input to the input buffer is disable"]
2124        pub const _1: Self = Self::new(1);
2125    }
2126}
2127#[doc(hidden)]
2128#[derive(Copy, Clone, Eq, PartialEq)]
2129pub struct P112PfsA_SPEC;
2130impl crate::sealed::RegSpec for P112PfsA_SPEC {
2131    type DataType = u16;
2132}
2133
2134#[doc = "Port 112 Pin Function Select Register"]
2135pub type P112PfsA = crate::RegValueT<P112PfsA_SPEC>;
2136
2137impl P112PfsA {
2138    #[doc = "Port Output Data"]
2139    #[inline(always)]
2140    pub fn podr(
2141        self,
2142    ) -> crate::common::RegisterField<
2143        0,
2144        0x1,
2145        1,
2146        0,
2147        p112pfs_a::Podr,
2148        p112pfs_a::Podr,
2149        P112PfsA_SPEC,
2150        crate::common::RW,
2151    > {
2152        crate::common::RegisterField::<
2153            0,
2154            0x1,
2155            1,
2156            0,
2157            p112pfs_a::Podr,
2158            p112pfs_a::Podr,
2159            P112PfsA_SPEC,
2160            crate::common::RW,
2161        >::from_register(self, 0)
2162    }
2163
2164    #[doc = "Pmn State"]
2165    #[inline(always)]
2166    pub fn pidr(
2167        self,
2168    ) -> crate::common::RegisterField<
2169        1,
2170        0x1,
2171        1,
2172        0,
2173        p112pfs_a::Pidr,
2174        p112pfs_a::Pidr,
2175        P112PfsA_SPEC,
2176        crate::common::R,
2177    > {
2178        crate::common::RegisterField::<
2179            1,
2180            0x1,
2181            1,
2182            0,
2183            p112pfs_a::Pidr,
2184            p112pfs_a::Pidr,
2185            P112PfsA_SPEC,
2186            crate::common::R,
2187        >::from_register(self, 0)
2188    }
2189
2190    #[inline(always)]
2191    pub fn pdr(
2192        self,
2193    ) -> crate::common::RegisterField<
2194        2,
2195        0x1,
2196        1,
2197        0,
2198        p112pfs_a::Pdr,
2199        p112pfs_a::Pdr,
2200        P112PfsA_SPEC,
2201        crate::common::RW,
2202    > {
2203        crate::common::RegisterField::<
2204            2,
2205            0x1,
2206            1,
2207            0,
2208            p112pfs_a::Pdr,
2209            p112pfs_a::Pdr,
2210            P112PfsA_SPEC,
2211            crate::common::RW,
2212        >::from_register(self, 0)
2213    }
2214
2215    #[inline(always)]
2216    pub fn pcr(
2217        self,
2218    ) -> crate::common::RegisterField<
2219        4,
2220        0x1,
2221        1,
2222        0,
2223        p112pfs_a::Pcr,
2224        p112pfs_a::Pcr,
2225        P112PfsA_SPEC,
2226        crate::common::RW,
2227    > {
2228        crate::common::RegisterField::<
2229            4,
2230            0x1,
2231            1,
2232            0,
2233            p112pfs_a::Pcr,
2234            p112pfs_a::Pcr,
2235            P112PfsA_SPEC,
2236            crate::common::RW,
2237        >::from_register(self, 0)
2238    }
2239
2240    #[inline(always)]
2241    pub fn pim(
2242        self,
2243    ) -> crate::common::RegisterField<
2244        5,
2245        0x1,
2246        1,
2247        0,
2248        p112pfs_a::Pim,
2249        p112pfs_a::Pim,
2250        P112PfsA_SPEC,
2251        crate::common::RW,
2252    > {
2253        crate::common::RegisterField::<
2254            5,
2255            0x1,
2256            1,
2257            0,
2258            p112pfs_a::Pim,
2259            p112pfs_a::Pim,
2260            P112PfsA_SPEC,
2261            crate::common::RW,
2262        >::from_register(self, 0)
2263    }
2264
2265    #[inline(always)]
2266    pub fn ncodr(
2267        self,
2268    ) -> crate::common::RegisterField<
2269        6,
2270        0x1,
2271        1,
2272        0,
2273        p112pfs_a::Ncodr,
2274        p112pfs_a::Ncodr,
2275        P112PfsA_SPEC,
2276        crate::common::RW,
2277    > {
2278        crate::common::RegisterField::<
2279            6,
2280            0x1,
2281            1,
2282            0,
2283            p112pfs_a::Ncodr,
2284            p112pfs_a::Ncodr,
2285            P112PfsA_SPEC,
2286            crate::common::RW,
2287        >::from_register(self, 0)
2288    }
2289
2290    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
2291    #[inline(always)]
2292    pub fn psel(
2293        self,
2294    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P112PfsA_SPEC, crate::common::RW> {
2295        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P112PfsA_SPEC,crate::common::RW>::from_register(self,0)
2296    }
2297
2298    #[doc = "IRQ Input Enable"]
2299    #[inline(always)]
2300    pub fn isel(
2301        self,
2302    ) -> crate::common::RegisterField<
2303        14,
2304        0x1,
2305        1,
2306        0,
2307        p112pfs_a::Isel,
2308        p112pfs_a::Isel,
2309        P112PfsA_SPEC,
2310        crate::common::RW,
2311    > {
2312        crate::common::RegisterField::<
2313            14,
2314            0x1,
2315            1,
2316            0,
2317            p112pfs_a::Isel,
2318            p112pfs_a::Isel,
2319            P112PfsA_SPEC,
2320            crate::common::RW,
2321        >::from_register(self, 0)
2322    }
2323
2324    #[doc = "Pin mode control"]
2325    #[inline(always)]
2326    pub fn pmc(
2327        self,
2328    ) -> crate::common::RegisterField<
2329        15,
2330        0x1,
2331        1,
2332        0,
2333        p112pfs_a::Pmc,
2334        p112pfs_a::Pmc,
2335        P112PfsA_SPEC,
2336        crate::common::RW,
2337    > {
2338        crate::common::RegisterField::<
2339            15,
2340            0x1,
2341            1,
2342            0,
2343            p112pfs_a::Pmc,
2344            p112pfs_a::Pmc,
2345            P112PfsA_SPEC,
2346            crate::common::RW,
2347        >::from_register(self, 0)
2348    }
2349}
2350impl ::core::default::Default for P112PfsA {
2351    #[inline(always)]
2352    fn default() -> P112PfsA {
2353        <crate::RegValueT<P112PfsA_SPEC> as RegisterValue<_>>::new(0)
2354    }
2355}
2356pub mod p112pfs_a {
2357
2358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2359    pub struct Podr_SPEC;
2360    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
2361    impl Podr {
2362        #[doc = "Low output"]
2363        pub const _0: Self = Self::new(0);
2364
2365        #[doc = "High output"]
2366        pub const _1: Self = Self::new(1);
2367    }
2368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2369    pub struct Pidr_SPEC;
2370    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
2371    impl Pidr {
2372        #[doc = "Low output"]
2373        pub const _0: Self = Self::new(0);
2374
2375        #[doc = "High output"]
2376        pub const _1: Self = Self::new(1);
2377    }
2378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2379    pub struct Pdr_SPEC;
2380    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
2381    impl Pdr {
2382        #[doc = "Input (functions as an input pin)"]
2383        pub const _0: Self = Self::new(0);
2384
2385        #[doc = "Output (functions as an output pin)"]
2386        pub const _1: Self = Self::new(1);
2387    }
2388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2389    pub struct Pcr_SPEC;
2390    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
2391    impl Pcr {
2392        #[doc = "Disableinput pull-up"]
2393        pub const _0: Self = Self::new(0);
2394
2395        #[doc = "Enableinput pull-up"]
2396        pub const _1: Self = Self::new(1);
2397    }
2398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2399    pub struct Pim_SPEC;
2400    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
2401    impl Pim {
2402        #[doc = "Input (functions as an input pin)"]
2403        pub const _0: Self = Self::new(0);
2404
2405        #[doc = "Output (functions as an output pin)"]
2406        pub const _1: Self = Self::new(1);
2407    }
2408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2409    pub struct Ncodr_SPEC;
2410    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
2411    impl Ncodr {
2412        #[doc = "Input (functions as an input pin)"]
2413        pub const _0: Self = Self::new(0);
2414
2415        #[doc = "Output (functions as an output pin)"]
2416        pub const _1: Self = Self::new(1);
2417    }
2418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2419    pub struct Isel_SPEC;
2420    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
2421    impl Isel {
2422        #[doc = "Notused as an IRQn input pin"]
2423        pub const _0: Self = Self::new(0);
2424
2425        #[doc = "Used as an IRQn input pin"]
2426        pub const _1: Self = Self::new(1);
2427    }
2428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2429    pub struct Pmc_SPEC;
2430    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
2431    impl Pmc {
2432        #[doc = "Digital I/O"]
2433        pub const _0: Self = Self::new(0);
2434
2435        #[doc = "Analog input function. Input to the input buffer is disable"]
2436        pub const _1: Self = Self::new(1);
2437    }
2438}
2439#[doc(hidden)]
2440#[derive(Copy, Clone, Eq, PartialEq)]
2441pub struct P200PfsA_SPEC;
2442impl crate::sealed::RegSpec for P200PfsA_SPEC {
2443    type DataType = u16;
2444}
2445
2446#[doc = "Port 200 Pin Function Select Register"]
2447pub type P200PfsA = crate::RegValueT<P200PfsA_SPEC>;
2448
2449impl P200PfsA {
2450    #[doc = "Pmn State"]
2451    #[inline(always)]
2452    pub fn pidr(
2453        self,
2454    ) -> crate::common::RegisterField<
2455        1,
2456        0x1,
2457        1,
2458        0,
2459        p200pfs_a::Pidr,
2460        p200pfs_a::Pidr,
2461        P200PfsA_SPEC,
2462        crate::common::R,
2463    > {
2464        crate::common::RegisterField::<
2465            1,
2466            0x1,
2467            1,
2468            0,
2469            p200pfs_a::Pidr,
2470            p200pfs_a::Pidr,
2471            P200PfsA_SPEC,
2472            crate::common::R,
2473        >::from_register(self, 0)
2474    }
2475
2476    #[doc = "IRQ Input Enable"]
2477    #[inline(always)]
2478    pub fn isel(
2479        self,
2480    ) -> crate::common::RegisterField<
2481        14,
2482        0x1,
2483        1,
2484        0,
2485        p200pfs_a::Isel,
2486        p200pfs_a::Isel,
2487        P200PfsA_SPEC,
2488        crate::common::RW,
2489    > {
2490        crate::common::RegisterField::<
2491            14,
2492            0x1,
2493            1,
2494            0,
2495            p200pfs_a::Isel,
2496            p200pfs_a::Isel,
2497            P200PfsA_SPEC,
2498            crate::common::RW,
2499        >::from_register(self, 0)
2500    }
2501
2502    #[doc = "Pin mode control"]
2503    #[inline(always)]
2504    pub fn pmc(
2505        self,
2506    ) -> crate::common::RegisterField<
2507        15,
2508        0x1,
2509        1,
2510        0,
2511        p200pfs_a::Pmc,
2512        p200pfs_a::Pmc,
2513        P200PfsA_SPEC,
2514        crate::common::RW,
2515    > {
2516        crate::common::RegisterField::<
2517            15,
2518            0x1,
2519            1,
2520            0,
2521            p200pfs_a::Pmc,
2522            p200pfs_a::Pmc,
2523            P200PfsA_SPEC,
2524            crate::common::RW,
2525        >::from_register(self, 0)
2526    }
2527}
2528impl ::core::default::Default for P200PfsA {
2529    #[inline(always)]
2530    fn default() -> P200PfsA {
2531        <crate::RegValueT<P200PfsA_SPEC> as RegisterValue<_>>::new(0)
2532    }
2533}
2534pub mod p200pfs_a {
2535
2536    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2537    pub struct Pidr_SPEC;
2538    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
2539    impl Pidr {
2540        #[doc = "Low output"]
2541        pub const _0: Self = Self::new(0);
2542
2543        #[doc = "High output"]
2544        pub const _1: Self = Self::new(1);
2545    }
2546    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2547    pub struct Isel_SPEC;
2548    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
2549    impl Isel {
2550        #[doc = "Notused as an IRQn input pin"]
2551        pub const _0: Self = Self::new(0);
2552
2553        #[doc = "Used as an IRQn input pin"]
2554        pub const _1: Self = Self::new(1);
2555    }
2556    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2557    pub struct Pmc_SPEC;
2558    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
2559    impl Pmc {
2560        #[doc = "Digital I/O"]
2561        pub const _0: Self = Self::new(0);
2562
2563        #[doc = "Analog input function. Input to the input buffer is disable"]
2564        pub const _1: Self = Self::new(1);
2565    }
2566}
2567#[doc(hidden)]
2568#[derive(Copy, Clone, Eq, PartialEq)]
2569pub struct P201PfsA_SPEC;
2570impl crate::sealed::RegSpec for P201PfsA_SPEC {
2571    type DataType = u16;
2572}
2573
2574#[doc = "Port 201 Pin Function Select Register"]
2575pub type P201PfsA = crate::RegValueT<P201PfsA_SPEC>;
2576
2577impl P201PfsA {
2578    #[doc = "Port Output Data"]
2579    #[inline(always)]
2580    pub fn podr(
2581        self,
2582    ) -> crate::common::RegisterField<
2583        0,
2584        0x1,
2585        1,
2586        0,
2587        p201pfs_a::Podr,
2588        p201pfs_a::Podr,
2589        P201PfsA_SPEC,
2590        crate::common::RW,
2591    > {
2592        crate::common::RegisterField::<
2593            0,
2594            0x1,
2595            1,
2596            0,
2597            p201pfs_a::Podr,
2598            p201pfs_a::Podr,
2599            P201PfsA_SPEC,
2600            crate::common::RW,
2601        >::from_register(self, 0)
2602    }
2603
2604    #[doc = "Pmn State"]
2605    #[inline(always)]
2606    pub fn pidr(
2607        self,
2608    ) -> crate::common::RegisterField<
2609        1,
2610        0x1,
2611        1,
2612        0,
2613        p201pfs_a::Pidr,
2614        p201pfs_a::Pidr,
2615        P201PfsA_SPEC,
2616        crate::common::R,
2617    > {
2618        crate::common::RegisterField::<
2619            1,
2620            0x1,
2621            1,
2622            0,
2623            p201pfs_a::Pidr,
2624            p201pfs_a::Pidr,
2625            P201PfsA_SPEC,
2626            crate::common::R,
2627        >::from_register(self, 0)
2628    }
2629
2630    #[inline(always)]
2631    pub fn pdr(
2632        self,
2633    ) -> crate::common::RegisterField<
2634        2,
2635        0x1,
2636        1,
2637        0,
2638        p201pfs_a::Pdr,
2639        p201pfs_a::Pdr,
2640        P201PfsA_SPEC,
2641        crate::common::RW,
2642    > {
2643        crate::common::RegisterField::<
2644            2,
2645            0x1,
2646            1,
2647            0,
2648            p201pfs_a::Pdr,
2649            p201pfs_a::Pdr,
2650            P201PfsA_SPEC,
2651            crate::common::RW,
2652        >::from_register(self, 0)
2653    }
2654
2655    #[inline(always)]
2656    pub fn pcr(
2657        self,
2658    ) -> crate::common::RegisterField<
2659        4,
2660        0x1,
2661        1,
2662        0,
2663        p201pfs_a::Pcr,
2664        p201pfs_a::Pcr,
2665        P201PfsA_SPEC,
2666        crate::common::RW,
2667    > {
2668        crate::common::RegisterField::<
2669            4,
2670            0x1,
2671            1,
2672            0,
2673            p201pfs_a::Pcr,
2674            p201pfs_a::Pcr,
2675            P201PfsA_SPEC,
2676            crate::common::RW,
2677        >::from_register(self, 0)
2678    }
2679
2680    #[inline(always)]
2681    pub fn pim(
2682        self,
2683    ) -> crate::common::RegisterField<
2684        5,
2685        0x1,
2686        1,
2687        0,
2688        p201pfs_a::Pim,
2689        p201pfs_a::Pim,
2690        P201PfsA_SPEC,
2691        crate::common::RW,
2692    > {
2693        crate::common::RegisterField::<
2694            5,
2695            0x1,
2696            1,
2697            0,
2698            p201pfs_a::Pim,
2699            p201pfs_a::Pim,
2700            P201PfsA_SPEC,
2701            crate::common::RW,
2702        >::from_register(self, 0)
2703    }
2704
2705    #[inline(always)]
2706    pub fn ncodr(
2707        self,
2708    ) -> crate::common::RegisterField<
2709        6,
2710        0x1,
2711        1,
2712        0,
2713        p201pfs_a::Ncodr,
2714        p201pfs_a::Ncodr,
2715        P201PfsA_SPEC,
2716        crate::common::RW,
2717    > {
2718        crate::common::RegisterField::<
2719            6,
2720            0x1,
2721            1,
2722            0,
2723            p201pfs_a::Ncodr,
2724            p201pfs_a::Ncodr,
2725            P201PfsA_SPEC,
2726            crate::common::RW,
2727        >::from_register(self, 0)
2728    }
2729
2730    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
2731    #[inline(always)]
2732    pub fn psel(
2733        self,
2734    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P201PfsA_SPEC, crate::common::RW> {
2735        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P201PfsA_SPEC,crate::common::RW>::from_register(self,0)
2736    }
2737
2738    #[doc = "IRQ Input Enable"]
2739    #[inline(always)]
2740    pub fn isel(
2741        self,
2742    ) -> crate::common::RegisterField<
2743        14,
2744        0x1,
2745        1,
2746        0,
2747        p201pfs_a::Isel,
2748        p201pfs_a::Isel,
2749        P201PfsA_SPEC,
2750        crate::common::RW,
2751    > {
2752        crate::common::RegisterField::<
2753            14,
2754            0x1,
2755            1,
2756            0,
2757            p201pfs_a::Isel,
2758            p201pfs_a::Isel,
2759            P201PfsA_SPEC,
2760            crate::common::RW,
2761        >::from_register(self, 0)
2762    }
2763
2764    #[doc = "Pin mode control"]
2765    #[inline(always)]
2766    pub fn pmc(
2767        self,
2768    ) -> crate::common::RegisterField<
2769        15,
2770        0x1,
2771        1,
2772        0,
2773        p201pfs_a::Pmc,
2774        p201pfs_a::Pmc,
2775        P201PfsA_SPEC,
2776        crate::common::RW,
2777    > {
2778        crate::common::RegisterField::<
2779            15,
2780            0x1,
2781            1,
2782            0,
2783            p201pfs_a::Pmc,
2784            p201pfs_a::Pmc,
2785            P201PfsA_SPEC,
2786            crate::common::RW,
2787        >::from_register(self, 0)
2788    }
2789}
2790impl ::core::default::Default for P201PfsA {
2791    #[inline(always)]
2792    fn default() -> P201PfsA {
2793        <crate::RegValueT<P201PfsA_SPEC> as RegisterValue<_>>::new(0)
2794    }
2795}
2796pub mod p201pfs_a {
2797
2798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2799    pub struct Podr_SPEC;
2800    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
2801    impl Podr {
2802        #[doc = "Low output"]
2803        pub const _0: Self = Self::new(0);
2804
2805        #[doc = "High output"]
2806        pub const _1: Self = Self::new(1);
2807    }
2808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2809    pub struct Pidr_SPEC;
2810    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
2811    impl Pidr {
2812        #[doc = "Low output"]
2813        pub const _0: Self = Self::new(0);
2814
2815        #[doc = "High output"]
2816        pub const _1: Self = Self::new(1);
2817    }
2818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2819    pub struct Pdr_SPEC;
2820    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
2821    impl Pdr {
2822        #[doc = "Input (functions as an input pin)"]
2823        pub const _0: Self = Self::new(0);
2824
2825        #[doc = "Output (functions as an output pin)"]
2826        pub const _1: Self = Self::new(1);
2827    }
2828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2829    pub struct Pcr_SPEC;
2830    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
2831    impl Pcr {
2832        #[doc = "Disableinput pull-up"]
2833        pub const _0: Self = Self::new(0);
2834
2835        #[doc = "Enableinput pull-up"]
2836        pub const _1: Self = Self::new(1);
2837    }
2838    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2839    pub struct Pim_SPEC;
2840    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
2841    impl Pim {
2842        #[doc = "Input (functions as an input pin)"]
2843        pub const _0: Self = Self::new(0);
2844
2845        #[doc = "Output (functions as an output pin)"]
2846        pub const _1: Self = Self::new(1);
2847    }
2848    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2849    pub struct Ncodr_SPEC;
2850    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
2851    impl Ncodr {
2852        #[doc = "Input (functions as an input pin)"]
2853        pub const _0: Self = Self::new(0);
2854
2855        #[doc = "Output (functions as an output pin)"]
2856        pub const _1: Self = Self::new(1);
2857    }
2858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2859    pub struct Isel_SPEC;
2860    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
2861    impl Isel {
2862        #[doc = "Notused as an IRQn input pin"]
2863        pub const _0: Self = Self::new(0);
2864
2865        #[doc = "Used as an IRQn input pin"]
2866        pub const _1: Self = Self::new(1);
2867    }
2868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2869    pub struct Pmc_SPEC;
2870    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
2871    impl Pmc {
2872        #[doc = "Digital I/O"]
2873        pub const _0: Self = Self::new(0);
2874
2875        #[doc = "Analog input function. Input to the input buffer is disable"]
2876        pub const _1: Self = Self::new(1);
2877    }
2878}
2879#[doc(hidden)]
2880#[derive(Copy, Clone, Eq, PartialEq)]
2881pub struct P206PfsA_SPEC;
2882impl crate::sealed::RegSpec for P206PfsA_SPEC {
2883    type DataType = u16;
2884}
2885
2886#[doc = "Port 206 Pin Function Select Register"]
2887pub type P206PfsA = crate::RegValueT<P206PfsA_SPEC>;
2888
2889impl P206PfsA {
2890    #[doc = "Port Output Data"]
2891    #[inline(always)]
2892    pub fn podr(
2893        self,
2894    ) -> crate::common::RegisterField<
2895        0,
2896        0x1,
2897        1,
2898        0,
2899        p206pfs_a::Podr,
2900        p206pfs_a::Podr,
2901        P206PfsA_SPEC,
2902        crate::common::RW,
2903    > {
2904        crate::common::RegisterField::<
2905            0,
2906            0x1,
2907            1,
2908            0,
2909            p206pfs_a::Podr,
2910            p206pfs_a::Podr,
2911            P206PfsA_SPEC,
2912            crate::common::RW,
2913        >::from_register(self, 0)
2914    }
2915
2916    #[doc = "Pmn State"]
2917    #[inline(always)]
2918    pub fn pidr(
2919        self,
2920    ) -> crate::common::RegisterField<
2921        1,
2922        0x1,
2923        1,
2924        0,
2925        p206pfs_a::Pidr,
2926        p206pfs_a::Pidr,
2927        P206PfsA_SPEC,
2928        crate::common::R,
2929    > {
2930        crate::common::RegisterField::<
2931            1,
2932            0x1,
2933            1,
2934            0,
2935            p206pfs_a::Pidr,
2936            p206pfs_a::Pidr,
2937            P206PfsA_SPEC,
2938            crate::common::R,
2939        >::from_register(self, 0)
2940    }
2941
2942    #[inline(always)]
2943    pub fn pdr(
2944        self,
2945    ) -> crate::common::RegisterField<
2946        2,
2947        0x1,
2948        1,
2949        0,
2950        p206pfs_a::Pdr,
2951        p206pfs_a::Pdr,
2952        P206PfsA_SPEC,
2953        crate::common::RW,
2954    > {
2955        crate::common::RegisterField::<
2956            2,
2957            0x1,
2958            1,
2959            0,
2960            p206pfs_a::Pdr,
2961            p206pfs_a::Pdr,
2962            P206PfsA_SPEC,
2963            crate::common::RW,
2964        >::from_register(self, 0)
2965    }
2966
2967    #[inline(always)]
2968    pub fn pcr(
2969        self,
2970    ) -> crate::common::RegisterField<
2971        4,
2972        0x1,
2973        1,
2974        0,
2975        p206pfs_a::Pcr,
2976        p206pfs_a::Pcr,
2977        P206PfsA_SPEC,
2978        crate::common::RW,
2979    > {
2980        crate::common::RegisterField::<
2981            4,
2982            0x1,
2983            1,
2984            0,
2985            p206pfs_a::Pcr,
2986            p206pfs_a::Pcr,
2987            P206PfsA_SPEC,
2988            crate::common::RW,
2989        >::from_register(self, 0)
2990    }
2991}
2992impl ::core::default::Default for P206PfsA {
2993    #[inline(always)]
2994    fn default() -> P206PfsA {
2995        <crate::RegValueT<P206PfsA_SPEC> as RegisterValue<_>>::new(16)
2996    }
2997}
2998pub mod p206pfs_a {
2999
3000    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3001    pub struct Podr_SPEC;
3002    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
3003    impl Podr {
3004        #[doc = "Low output"]
3005        pub const _0: Self = Self::new(0);
3006
3007        #[doc = "High output"]
3008        pub const _1: Self = Self::new(1);
3009    }
3010    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3011    pub struct Pidr_SPEC;
3012    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
3013    impl Pidr {
3014        #[doc = "Low output"]
3015        pub const _0: Self = Self::new(0);
3016
3017        #[doc = "High output"]
3018        pub const _1: Self = Self::new(1);
3019    }
3020    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3021    pub struct Pdr_SPEC;
3022    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
3023    impl Pdr {
3024        #[doc = "Input (functions as an input pin)"]
3025        pub const _0: Self = Self::new(0);
3026
3027        #[doc = "Output (functions as an output pin)"]
3028        pub const _1: Self = Self::new(1);
3029    }
3030    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3031    pub struct Pcr_SPEC;
3032    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
3033    impl Pcr {
3034        #[doc = "Disableinput pull-up"]
3035        pub const _0: Self = Self::new(0);
3036
3037        #[doc = "Enableinput pull-up"]
3038        pub const _1: Self = Self::new(1);
3039    }
3040}
3041#[doc(hidden)]
3042#[derive(Copy, Clone, Eq, PartialEq)]
3043pub struct P20PfsA_SPEC;
3044impl crate::sealed::RegSpec for P20PfsA_SPEC {
3045    type DataType = u16;
3046}
3047
3048#[doc = "Port 20%s Pin Function Select Register"]
3049pub type P20PfsA = crate::RegValueT<P20PfsA_SPEC>;
3050
3051impl P20PfsA {
3052    #[doc = "Port Output Data"]
3053    #[inline(always)]
3054    pub fn podr(
3055        self,
3056    ) -> crate::common::RegisterField<
3057        0,
3058        0x1,
3059        1,
3060        0,
3061        p20pfs_a::Podr,
3062        p20pfs_a::Podr,
3063        P20PfsA_SPEC,
3064        crate::common::RW,
3065    > {
3066        crate::common::RegisterField::<
3067            0,
3068            0x1,
3069            1,
3070            0,
3071            p20pfs_a::Podr,
3072            p20pfs_a::Podr,
3073            P20PfsA_SPEC,
3074            crate::common::RW,
3075        >::from_register(self, 0)
3076    }
3077
3078    #[doc = "Pmn State"]
3079    #[inline(always)]
3080    pub fn pidr(
3081        self,
3082    ) -> crate::common::RegisterField<
3083        1,
3084        0x1,
3085        1,
3086        0,
3087        p20pfs_a::Pidr,
3088        p20pfs_a::Pidr,
3089        P20PfsA_SPEC,
3090        crate::common::R,
3091    > {
3092        crate::common::RegisterField::<
3093            1,
3094            0x1,
3095            1,
3096            0,
3097            p20pfs_a::Pidr,
3098            p20pfs_a::Pidr,
3099            P20PfsA_SPEC,
3100            crate::common::R,
3101        >::from_register(self, 0)
3102    }
3103
3104    #[inline(always)]
3105    pub fn pdr(
3106        self,
3107    ) -> crate::common::RegisterField<
3108        2,
3109        0x1,
3110        1,
3111        0,
3112        p20pfs_a::Pdr,
3113        p20pfs_a::Pdr,
3114        P20PfsA_SPEC,
3115        crate::common::RW,
3116    > {
3117        crate::common::RegisterField::<
3118            2,
3119            0x1,
3120            1,
3121            0,
3122            p20pfs_a::Pdr,
3123            p20pfs_a::Pdr,
3124            P20PfsA_SPEC,
3125            crate::common::RW,
3126        >::from_register(self, 0)
3127    }
3128
3129    #[inline(always)]
3130    pub fn pcr(
3131        self,
3132    ) -> crate::common::RegisterField<
3133        4,
3134        0x1,
3135        1,
3136        0,
3137        p20pfs_a::Pcr,
3138        p20pfs_a::Pcr,
3139        P20PfsA_SPEC,
3140        crate::common::RW,
3141    > {
3142        crate::common::RegisterField::<
3143            4,
3144            0x1,
3145            1,
3146            0,
3147            p20pfs_a::Pcr,
3148            p20pfs_a::Pcr,
3149            P20PfsA_SPEC,
3150            crate::common::RW,
3151        >::from_register(self, 0)
3152    }
3153
3154    #[inline(always)]
3155    pub fn pim(
3156        self,
3157    ) -> crate::common::RegisterField<
3158        5,
3159        0x1,
3160        1,
3161        0,
3162        p20pfs_a::Pim,
3163        p20pfs_a::Pim,
3164        P20PfsA_SPEC,
3165        crate::common::RW,
3166    > {
3167        crate::common::RegisterField::<
3168            5,
3169            0x1,
3170            1,
3171            0,
3172            p20pfs_a::Pim,
3173            p20pfs_a::Pim,
3174            P20PfsA_SPEC,
3175            crate::common::RW,
3176        >::from_register(self, 0)
3177    }
3178
3179    #[inline(always)]
3180    pub fn ncodr(
3181        self,
3182    ) -> crate::common::RegisterField<
3183        6,
3184        0x1,
3185        1,
3186        0,
3187        p20pfs_a::Ncodr,
3188        p20pfs_a::Ncodr,
3189        P20PfsA_SPEC,
3190        crate::common::RW,
3191    > {
3192        crate::common::RegisterField::<
3193            6,
3194            0x1,
3195            1,
3196            0,
3197            p20pfs_a::Ncodr,
3198            p20pfs_a::Ncodr,
3199            P20PfsA_SPEC,
3200            crate::common::RW,
3201        >::from_register(self, 0)
3202    }
3203
3204    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
3205    #[inline(always)]
3206    pub fn psel(
3207        self,
3208    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P20PfsA_SPEC, crate::common::RW> {
3209        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P20PfsA_SPEC,crate::common::RW>::from_register(self,0)
3210    }
3211
3212    #[doc = "IRQ Input Enable"]
3213    #[inline(always)]
3214    pub fn isel(
3215        self,
3216    ) -> crate::common::RegisterField<
3217        14,
3218        0x1,
3219        1,
3220        0,
3221        p20pfs_a::Isel,
3222        p20pfs_a::Isel,
3223        P20PfsA_SPEC,
3224        crate::common::RW,
3225    > {
3226        crate::common::RegisterField::<
3227            14,
3228            0x1,
3229            1,
3230            0,
3231            p20pfs_a::Isel,
3232            p20pfs_a::Isel,
3233            P20PfsA_SPEC,
3234            crate::common::RW,
3235        >::from_register(self, 0)
3236    }
3237
3238    #[doc = "Pin mode control"]
3239    #[inline(always)]
3240    pub fn pmc(
3241        self,
3242    ) -> crate::common::RegisterField<
3243        15,
3244        0x1,
3245        1,
3246        0,
3247        p20pfs_a::Pmc,
3248        p20pfs_a::Pmc,
3249        P20PfsA_SPEC,
3250        crate::common::RW,
3251    > {
3252        crate::common::RegisterField::<
3253            15,
3254            0x1,
3255            1,
3256            0,
3257            p20pfs_a::Pmc,
3258            p20pfs_a::Pmc,
3259            P20PfsA_SPEC,
3260            crate::common::RW,
3261        >::from_register(self, 0)
3262    }
3263}
3264impl ::core::default::Default for P20PfsA {
3265    #[inline(always)]
3266    fn default() -> P20PfsA {
3267        <crate::RegValueT<P20PfsA_SPEC> as RegisterValue<_>>::new(0)
3268    }
3269}
3270pub mod p20pfs_a {
3271
3272    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3273    pub struct Podr_SPEC;
3274    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
3275    impl Podr {
3276        #[doc = "Low output"]
3277        pub const _0: Self = Self::new(0);
3278
3279        #[doc = "High output"]
3280        pub const _1: Self = Self::new(1);
3281    }
3282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3283    pub struct Pidr_SPEC;
3284    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
3285    impl Pidr {
3286        #[doc = "Low output"]
3287        pub const _0: Self = Self::new(0);
3288
3289        #[doc = "High output"]
3290        pub const _1: Self = Self::new(1);
3291    }
3292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3293    pub struct Pdr_SPEC;
3294    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
3295    impl Pdr {
3296        #[doc = "Input (functions as an input pin)"]
3297        pub const _0: Self = Self::new(0);
3298
3299        #[doc = "Output (functions as an output pin)"]
3300        pub const _1: Self = Self::new(1);
3301    }
3302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3303    pub struct Pcr_SPEC;
3304    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
3305    impl Pcr {
3306        #[doc = "Disableinput pull-up"]
3307        pub const _0: Self = Self::new(0);
3308
3309        #[doc = "Enableinput pull-up"]
3310        pub const _1: Self = Self::new(1);
3311    }
3312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3313    pub struct Pim_SPEC;
3314    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
3315    impl Pim {
3316        #[doc = "Input (functions as an input pin)"]
3317        pub const _0: Self = Self::new(0);
3318
3319        #[doc = "Output (functions as an output pin)"]
3320        pub const _1: Self = Self::new(1);
3321    }
3322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3323    pub struct Ncodr_SPEC;
3324    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
3325    impl Ncodr {
3326        #[doc = "Input (functions as an input pin)"]
3327        pub const _0: Self = Self::new(0);
3328
3329        #[doc = "Output (functions as an output pin)"]
3330        pub const _1: Self = Self::new(1);
3331    }
3332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3333    pub struct Isel_SPEC;
3334    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
3335    impl Isel {
3336        #[doc = "Notused as an IRQn input pin"]
3337        pub const _0: Self = Self::new(0);
3338
3339        #[doc = "Used as an IRQn input pin"]
3340        pub const _1: Self = Self::new(1);
3341    }
3342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3343    pub struct Pmc_SPEC;
3344    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
3345    impl Pmc {
3346        #[doc = "Digital I/O"]
3347        pub const _0: Self = Self::new(0);
3348
3349        #[doc = "Analog input function. Input to the input buffer is disable"]
3350        pub const _1: Self = Self::new(1);
3351    }
3352}
3353#[doc(hidden)]
3354#[derive(Copy, Clone, Eq, PartialEq)]
3355pub struct P2PfsA_SPEC;
3356impl crate::sealed::RegSpec for P2PfsA_SPEC {
3357    type DataType = u16;
3358}
3359
3360#[doc = "Port 2%s Pin Function Select Register"]
3361pub type P2PfsA = crate::RegValueT<P2PfsA_SPEC>;
3362
3363impl P2PfsA {
3364    #[doc = "Pmn State"]
3365    #[inline(always)]
3366    pub fn pidr(
3367        self,
3368    ) -> crate::common::RegisterField<
3369        1,
3370        0x1,
3371        1,
3372        0,
3373        p2pfs_a::Pidr,
3374        p2pfs_a::Pidr,
3375        P2PfsA_SPEC,
3376        crate::common::R,
3377    > {
3378        crate::common::RegisterField::<
3379            1,
3380            0x1,
3381            1,
3382            0,
3383            p2pfs_a::Pidr,
3384            p2pfs_a::Pidr,
3385            P2PfsA_SPEC,
3386            crate::common::R,
3387        >::from_register(self, 0)
3388    }
3389}
3390impl ::core::default::Default for P2PfsA {
3391    #[inline(always)]
3392    fn default() -> P2PfsA {
3393        <crate::RegValueT<P2PfsA_SPEC> as RegisterValue<_>>::new(0)
3394    }
3395}
3396pub mod p2pfs_a {
3397
3398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3399    pub struct Pidr_SPEC;
3400    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
3401    impl Pidr {
3402        #[doc = "Low output"]
3403        pub const _0: Self = Self::new(0);
3404
3405        #[doc = "High output"]
3406        pub const _1: Self = Self::new(1);
3407    }
3408}
3409#[doc(hidden)]
3410#[derive(Copy, Clone, Eq, PartialEq)]
3411pub struct P300PfsA_SPEC;
3412impl crate::sealed::RegSpec for P300PfsA_SPEC {
3413    type DataType = u16;
3414}
3415
3416#[doc = "Port 300 Pin Function Select Register"]
3417pub type P300PfsA = crate::RegValueT<P300PfsA_SPEC>;
3418
3419impl P300PfsA {
3420    #[doc = "Port Output Data"]
3421    #[inline(always)]
3422    pub fn podr(
3423        self,
3424    ) -> crate::common::RegisterField<
3425        0,
3426        0x1,
3427        1,
3428        0,
3429        p300pfs_a::Podr,
3430        p300pfs_a::Podr,
3431        P300PfsA_SPEC,
3432        crate::common::RW,
3433    > {
3434        crate::common::RegisterField::<
3435            0,
3436            0x1,
3437            1,
3438            0,
3439            p300pfs_a::Podr,
3440            p300pfs_a::Podr,
3441            P300PfsA_SPEC,
3442            crate::common::RW,
3443        >::from_register(self, 0)
3444    }
3445
3446    #[doc = "Pmn State"]
3447    #[inline(always)]
3448    pub fn pidr(
3449        self,
3450    ) -> crate::common::RegisterField<
3451        1,
3452        0x1,
3453        1,
3454        0,
3455        p300pfs_a::Pidr,
3456        p300pfs_a::Pidr,
3457        P300PfsA_SPEC,
3458        crate::common::R,
3459    > {
3460        crate::common::RegisterField::<
3461            1,
3462            0x1,
3463            1,
3464            0,
3465            p300pfs_a::Pidr,
3466            p300pfs_a::Pidr,
3467            P300PfsA_SPEC,
3468            crate::common::R,
3469        >::from_register(self, 0)
3470    }
3471
3472    #[inline(always)]
3473    pub fn pdr(
3474        self,
3475    ) -> crate::common::RegisterField<
3476        2,
3477        0x1,
3478        1,
3479        0,
3480        p300pfs_a::Pdr,
3481        p300pfs_a::Pdr,
3482        P300PfsA_SPEC,
3483        crate::common::RW,
3484    > {
3485        crate::common::RegisterField::<
3486            2,
3487            0x1,
3488            1,
3489            0,
3490            p300pfs_a::Pdr,
3491            p300pfs_a::Pdr,
3492            P300PfsA_SPEC,
3493            crate::common::RW,
3494        >::from_register(self, 0)
3495    }
3496
3497    #[inline(always)]
3498    pub fn pcr(
3499        self,
3500    ) -> crate::common::RegisterField<
3501        4,
3502        0x1,
3503        1,
3504        0,
3505        p300pfs_a::Pcr,
3506        p300pfs_a::Pcr,
3507        P300PfsA_SPEC,
3508        crate::common::RW,
3509    > {
3510        crate::common::RegisterField::<
3511            4,
3512            0x1,
3513            1,
3514            0,
3515            p300pfs_a::Pcr,
3516            p300pfs_a::Pcr,
3517            P300PfsA_SPEC,
3518            crate::common::RW,
3519        >::from_register(self, 0)
3520    }
3521
3522    #[inline(always)]
3523    pub fn pim(
3524        self,
3525    ) -> crate::common::RegisterField<
3526        5,
3527        0x1,
3528        1,
3529        0,
3530        p300pfs_a::Pim,
3531        p300pfs_a::Pim,
3532        P300PfsA_SPEC,
3533        crate::common::RW,
3534    > {
3535        crate::common::RegisterField::<
3536            5,
3537            0x1,
3538            1,
3539            0,
3540            p300pfs_a::Pim,
3541            p300pfs_a::Pim,
3542            P300PfsA_SPEC,
3543            crate::common::RW,
3544        >::from_register(self, 0)
3545    }
3546
3547    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
3548    #[inline(always)]
3549    pub fn psel(
3550        self,
3551    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P300PfsA_SPEC, crate::common::RW> {
3552        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P300PfsA_SPEC,crate::common::RW>::from_register(self,0)
3553    }
3554
3555    #[doc = "Pin mode control"]
3556    #[inline(always)]
3557    pub fn pmc(
3558        self,
3559    ) -> crate::common::RegisterField<
3560        15,
3561        0x1,
3562        1,
3563        0,
3564        p300pfs_a::Pmc,
3565        p300pfs_a::Pmc,
3566        P300PfsA_SPEC,
3567        crate::common::RW,
3568    > {
3569        crate::common::RegisterField::<
3570            15,
3571            0x1,
3572            1,
3573            0,
3574            p300pfs_a::Pmc,
3575            p300pfs_a::Pmc,
3576            P300PfsA_SPEC,
3577            crate::common::RW,
3578        >::from_register(self, 0)
3579    }
3580}
3581impl ::core::default::Default for P300PfsA {
3582    #[inline(always)]
3583    fn default() -> P300PfsA {
3584        <crate::RegValueT<P300PfsA_SPEC> as RegisterValue<_>>::new(272)
3585    }
3586}
3587pub mod p300pfs_a {
3588
3589    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3590    pub struct Podr_SPEC;
3591    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
3592    impl Podr {
3593        #[doc = "Low output"]
3594        pub const _0: Self = Self::new(0);
3595
3596        #[doc = "High output"]
3597        pub const _1: Self = Self::new(1);
3598    }
3599    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3600    pub struct Pidr_SPEC;
3601    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
3602    impl Pidr {
3603        #[doc = "Low output"]
3604        pub const _0: Self = Self::new(0);
3605
3606        #[doc = "High output"]
3607        pub const _1: Self = Self::new(1);
3608    }
3609    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3610    pub struct Pdr_SPEC;
3611    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
3612    impl Pdr {
3613        #[doc = "Input (functions as an input pin)"]
3614        pub const _0: Self = Self::new(0);
3615
3616        #[doc = "Output (functions as an output pin)"]
3617        pub const _1: Self = Self::new(1);
3618    }
3619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3620    pub struct Pcr_SPEC;
3621    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
3622    impl Pcr {
3623        #[doc = "Disableinput pull-up"]
3624        pub const _0: Self = Self::new(0);
3625
3626        #[doc = "Enableinput pull-up"]
3627        pub const _1: Self = Self::new(1);
3628    }
3629    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3630    pub struct Pim_SPEC;
3631    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
3632    impl Pim {
3633        #[doc = "Input (functions as an input pin)"]
3634        pub const _0: Self = Self::new(0);
3635
3636        #[doc = "Output (functions as an output pin)"]
3637        pub const _1: Self = Self::new(1);
3638    }
3639    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3640    pub struct Pmc_SPEC;
3641    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
3642    impl Pmc {
3643        #[doc = "Digital I/O"]
3644        pub const _0: Self = Self::new(0);
3645
3646        #[doc = "Analog input function. Input to the input buffer is disable"]
3647        pub const _1: Self = Self::new(1);
3648    }
3649}
3650#[doc(hidden)]
3651#[derive(Copy, Clone, Eq, PartialEq)]
3652pub struct P407PfsA_SPEC;
3653impl crate::sealed::RegSpec for P407PfsA_SPEC {
3654    type DataType = u16;
3655}
3656
3657#[doc = "Port 407 Pin Function Select Register"]
3658pub type P407PfsA = crate::RegValueT<P407PfsA_SPEC>;
3659
3660impl P407PfsA {
3661    #[doc = "Port Output Data"]
3662    #[inline(always)]
3663    pub fn podr(
3664        self,
3665    ) -> crate::common::RegisterField<
3666        0,
3667        0x1,
3668        1,
3669        0,
3670        p407pfs_a::Podr,
3671        p407pfs_a::Podr,
3672        P407PfsA_SPEC,
3673        crate::common::RW,
3674    > {
3675        crate::common::RegisterField::<
3676            0,
3677            0x1,
3678            1,
3679            0,
3680            p407pfs_a::Podr,
3681            p407pfs_a::Podr,
3682            P407PfsA_SPEC,
3683            crate::common::RW,
3684        >::from_register(self, 0)
3685    }
3686
3687    #[doc = "Pmn State"]
3688    #[inline(always)]
3689    pub fn pidr(
3690        self,
3691    ) -> crate::common::RegisterField<
3692        1,
3693        0x1,
3694        1,
3695        0,
3696        p407pfs_a::Pidr,
3697        p407pfs_a::Pidr,
3698        P407PfsA_SPEC,
3699        crate::common::R,
3700    > {
3701        crate::common::RegisterField::<
3702            1,
3703            0x1,
3704            1,
3705            0,
3706            p407pfs_a::Pidr,
3707            p407pfs_a::Pidr,
3708            P407PfsA_SPEC,
3709            crate::common::R,
3710        >::from_register(self, 0)
3711    }
3712
3713    #[inline(always)]
3714    pub fn pdr(
3715        self,
3716    ) -> crate::common::RegisterField<
3717        2,
3718        0x1,
3719        1,
3720        0,
3721        p407pfs_a::Pdr,
3722        p407pfs_a::Pdr,
3723        P407PfsA_SPEC,
3724        crate::common::RW,
3725    > {
3726        crate::common::RegisterField::<
3727            2,
3728            0x1,
3729            1,
3730            0,
3731            p407pfs_a::Pdr,
3732            p407pfs_a::Pdr,
3733            P407PfsA_SPEC,
3734            crate::common::RW,
3735        >::from_register(self, 0)
3736    }
3737
3738    #[inline(always)]
3739    pub fn pcr(
3740        self,
3741    ) -> crate::common::RegisterField<
3742        4,
3743        0x1,
3744        1,
3745        0,
3746        p407pfs_a::Pcr,
3747        p407pfs_a::Pcr,
3748        P407PfsA_SPEC,
3749        crate::common::RW,
3750    > {
3751        crate::common::RegisterField::<
3752            4,
3753            0x1,
3754            1,
3755            0,
3756            p407pfs_a::Pcr,
3757            p407pfs_a::Pcr,
3758            P407PfsA_SPEC,
3759            crate::common::RW,
3760        >::from_register(self, 0)
3761    }
3762
3763    #[inline(always)]
3764    pub fn pim(
3765        self,
3766    ) -> crate::common::RegisterField<
3767        5,
3768        0x1,
3769        1,
3770        0,
3771        p407pfs_a::Pim,
3772        p407pfs_a::Pim,
3773        P407PfsA_SPEC,
3774        crate::common::RW,
3775    > {
3776        crate::common::RegisterField::<
3777            5,
3778            0x1,
3779            1,
3780            0,
3781            p407pfs_a::Pim,
3782            p407pfs_a::Pim,
3783            P407PfsA_SPEC,
3784            crate::common::RW,
3785        >::from_register(self, 0)
3786    }
3787
3788    #[inline(always)]
3789    pub fn ncodr(
3790        self,
3791    ) -> crate::common::RegisterField<
3792        6,
3793        0x1,
3794        1,
3795        0,
3796        p407pfs_a::Ncodr,
3797        p407pfs_a::Ncodr,
3798        P407PfsA_SPEC,
3799        crate::common::RW,
3800    > {
3801        crate::common::RegisterField::<
3802            6,
3803            0x1,
3804            1,
3805            0,
3806            p407pfs_a::Ncodr,
3807            p407pfs_a::Ncodr,
3808            P407PfsA_SPEC,
3809            crate::common::RW,
3810        >::from_register(self, 0)
3811    }
3812
3813    #[doc = "These bits select the peripheral function. For individual pin functions, see the associated tables in this chapter."]
3814    #[inline(always)]
3815    pub fn psel(
3816        self,
3817    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P407PfsA_SPEC, crate::common::RW> {
3818        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P407PfsA_SPEC,crate::common::RW>::from_register(self,0)
3819    }
3820
3821    #[doc = "IRQ Input Enable"]
3822    #[inline(always)]
3823    pub fn isel(
3824        self,
3825    ) -> crate::common::RegisterField<
3826        14,
3827        0x1,
3828        1,
3829        0,
3830        p407pfs_a::Isel,
3831        p407pfs_a::Isel,
3832        P407PfsA_SPEC,
3833        crate::common::RW,
3834    > {
3835        crate::common::RegisterField::<
3836            14,
3837            0x1,
3838            1,
3839            0,
3840            p407pfs_a::Isel,
3841            p407pfs_a::Isel,
3842            P407PfsA_SPEC,
3843            crate::common::RW,
3844        >::from_register(self, 0)
3845    }
3846
3847    #[doc = "Pin mode control"]
3848    #[inline(always)]
3849    pub fn pmc(
3850        self,
3851    ) -> crate::common::RegisterField<
3852        15,
3853        0x1,
3854        1,
3855        0,
3856        p407pfs_a::Pmc,
3857        p407pfs_a::Pmc,
3858        P407PfsA_SPEC,
3859        crate::common::RW,
3860    > {
3861        crate::common::RegisterField::<
3862            15,
3863            0x1,
3864            1,
3865            0,
3866            p407pfs_a::Pmc,
3867            p407pfs_a::Pmc,
3868            P407PfsA_SPEC,
3869            crate::common::RW,
3870        >::from_register(self, 0)
3871    }
3872}
3873impl ::core::default::Default for P407PfsA {
3874    #[inline(always)]
3875    fn default() -> P407PfsA {
3876        <crate::RegValueT<P407PfsA_SPEC> as RegisterValue<_>>::new(0)
3877    }
3878}
3879pub mod p407pfs_a {
3880
3881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3882    pub struct Podr_SPEC;
3883    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
3884    impl Podr {
3885        #[doc = "Low output"]
3886        pub const _0: Self = Self::new(0);
3887
3888        #[doc = "High output"]
3889        pub const _1: Self = Self::new(1);
3890    }
3891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3892    pub struct Pidr_SPEC;
3893    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
3894    impl Pidr {
3895        #[doc = "Low output"]
3896        pub const _0: Self = Self::new(0);
3897
3898        #[doc = "High output"]
3899        pub const _1: Self = Self::new(1);
3900    }
3901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3902    pub struct Pdr_SPEC;
3903    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
3904    impl Pdr {
3905        #[doc = "Input (functions as an input pin)"]
3906        pub const _0: Self = Self::new(0);
3907
3908        #[doc = "Output (functions as an output pin)"]
3909        pub const _1: Self = Self::new(1);
3910    }
3911    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3912    pub struct Pcr_SPEC;
3913    pub type Pcr = crate::EnumBitfieldStruct<u8, Pcr_SPEC>;
3914    impl Pcr {
3915        #[doc = "Disableinput pull-up"]
3916        pub const _0: Self = Self::new(0);
3917
3918        #[doc = "Enableinput pull-up"]
3919        pub const _1: Self = Self::new(1);
3920    }
3921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3922    pub struct Pim_SPEC;
3923    pub type Pim = crate::EnumBitfieldStruct<u8, Pim_SPEC>;
3924    impl Pim {
3925        #[doc = "Input (functions as an input pin)"]
3926        pub const _0: Self = Self::new(0);
3927
3928        #[doc = "Output (functions as an output pin)"]
3929        pub const _1: Self = Self::new(1);
3930    }
3931    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3932    pub struct Ncodr_SPEC;
3933    pub type Ncodr = crate::EnumBitfieldStruct<u8, Ncodr_SPEC>;
3934    impl Ncodr {
3935        #[doc = "Input (functions as an input pin)"]
3936        pub const _0: Self = Self::new(0);
3937
3938        #[doc = "Output (functions as an output pin)"]
3939        pub const _1: Self = Self::new(1);
3940    }
3941    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3942    pub struct Isel_SPEC;
3943    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
3944    impl Isel {
3945        #[doc = "Notused as an IRQn input pin"]
3946        pub const _0: Self = Self::new(0);
3947
3948        #[doc = "Used as an IRQn input pin"]
3949        pub const _1: Self = Self::new(1);
3950    }
3951    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3952    pub struct Pmc_SPEC;
3953    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
3954    impl Pmc {
3955        #[doc = "Digital I/O"]
3956        pub const _0: Self = Self::new(0);
3957
3958        #[doc = "Analog input function. Input to the input buffer is disable"]
3959        pub const _1: Self = Self::new(1);
3960    }
3961}
3962#[doc(hidden)]
3963#[derive(Copy, Clone, Eq, PartialEq)]
3964pub struct P9PfsA_SPEC;
3965impl crate::sealed::RegSpec for P9PfsA_SPEC {
3966    type DataType = u16;
3967}
3968
3969#[doc = "Port 9%s Pin Function Select Register"]
3970pub type P9PfsA = crate::RegValueT<P9PfsA_SPEC>;
3971
3972impl P9PfsA {
3973    #[doc = "P9n Output Data"]
3974    #[inline(always)]
3975    pub fn podr(
3976        self,
3977    ) -> crate::common::RegisterField<
3978        0,
3979        0x1,
3980        1,
3981        0,
3982        p9pfs_a::Podr,
3983        p9pfs_a::Podr,
3984        P9PfsA_SPEC,
3985        crate::common::RW,
3986    > {
3987        crate::common::RegisterField::<
3988            0,
3989            0x1,
3990            1,
3991            0,
3992            p9pfs_a::Podr,
3993            p9pfs_a::Podr,
3994            P9PfsA_SPEC,
3995            crate::common::RW,
3996        >::from_register(self, 0)
3997    }
3998
3999    #[doc = "P9n State"]
4000    #[inline(always)]
4001    pub fn pidr(
4002        self,
4003    ) -> crate::common::RegisterField<
4004        1,
4005        0x1,
4006        1,
4007        0,
4008        p9pfs_a::Pidr,
4009        p9pfs_a::Pidr,
4010        P9PfsA_SPEC,
4011        crate::common::R,
4012    > {
4013        crate::common::RegisterField::<
4014            1,
4015            0x1,
4016            1,
4017            0,
4018            p9pfs_a::Pidr,
4019            p9pfs_a::Pidr,
4020            P9PfsA_SPEC,
4021            crate::common::R,
4022        >::from_register(self, 0)
4023    }
4024
4025    #[doc = "P9n Direction"]
4026    #[inline(always)]
4027    pub fn pdr(
4028        self,
4029    ) -> crate::common::RegisterField<
4030        2,
4031        0x1,
4032        1,
4033        0,
4034        p9pfs_a::Pdr,
4035        p9pfs_a::Pdr,
4036        P9PfsA_SPEC,
4037        crate::common::RW,
4038    > {
4039        crate::common::RegisterField::<
4040            2,
4041            0x1,
4042            1,
4043            0,
4044            p9pfs_a::Pdr,
4045            p9pfs_a::Pdr,
4046            P9PfsA_SPEC,
4047            crate::common::RW,
4048        >::from_register(self, 0)
4049    }
4050
4051    #[doc = "Peripheral Select"]
4052    #[inline(always)]
4053    pub fn psel(
4054        self,
4055    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, P9PfsA_SPEC, crate::common::RW> {
4056        crate::common::RegisterField::<8,0x7,1,0,u8,u8,P9PfsA_SPEC,crate::common::RW>::from_register(self,0)
4057    }
4058
4059    #[doc = "Pin Mode Control"]
4060    #[inline(always)]
4061    pub fn pmc(
4062        self,
4063    ) -> crate::common::RegisterField<
4064        15,
4065        0x1,
4066        1,
4067        0,
4068        p9pfs_a::Pmc,
4069        p9pfs_a::Pmc,
4070        P9PfsA_SPEC,
4071        crate::common::RW,
4072    > {
4073        crate::common::RegisterField::<
4074            15,
4075            0x1,
4076            1,
4077            0,
4078            p9pfs_a::Pmc,
4079            p9pfs_a::Pmc,
4080            P9PfsA_SPEC,
4081            crate::common::RW,
4082        >::from_register(self, 0)
4083    }
4084}
4085impl ::core::default::Default for P9PfsA {
4086    #[inline(always)]
4087    fn default() -> P9PfsA {
4088        <crate::RegValueT<P9PfsA_SPEC> as RegisterValue<_>>::new(0)
4089    }
4090}
4091pub mod p9pfs_a {
4092
4093    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4094    pub struct Podr_SPEC;
4095    pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
4096    impl Podr {
4097        #[doc = "Low output"]
4098        pub const _0: Self = Self::new(0);
4099
4100        #[doc = "High output"]
4101        pub const _1: Self = Self::new(1);
4102    }
4103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4104    pub struct Pidr_SPEC;
4105    pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
4106    impl Pidr {
4107        #[doc = "Low level"]
4108        pub const _0: Self = Self::new(0);
4109
4110        #[doc = "High level"]
4111        pub const _1: Self = Self::new(1);
4112    }
4113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4114    pub struct Pdr_SPEC;
4115    pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
4116    impl Pdr {
4117        #[doc = "Input (functions as an input pin)"]
4118        pub const _0: Self = Self::new(0);
4119
4120        #[doc = "Output (functions as an output pin)"]
4121        pub const _1: Self = Self::new(1);
4122    }
4123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4124    pub struct Pmc_SPEC;
4125    pub type Pmc = crate::EnumBitfieldStruct<u8, Pmc_SPEC>;
4126    impl Pmc {
4127        #[doc = "Digital I/O"]
4128        pub const _0: Self = Self::new(0);
4129
4130        #[doc = "Analog input function. Input to the input buffer is disable"]
4131        pub const _1: Self = Self::new(1);
4132    }
4133}
4134#[doc(hidden)]
4135#[derive(Copy, Clone, Eq, PartialEq)]
4136pub struct Pwpr_SPEC;
4137impl crate::sealed::RegSpec for Pwpr_SPEC {
4138    type DataType = u8;
4139}
4140
4141#[doc = "Write-Protect Register"]
4142pub type Pwpr = crate::RegValueT<Pwpr_SPEC>;
4143
4144impl Pwpr {
4145    #[doc = "PmnPFS_A Register Write Enable"]
4146    #[inline(always)]
4147    pub fn pfswe(
4148        self,
4149    ) -> crate::common::RegisterField<
4150        6,
4151        0x1,
4152        1,
4153        0,
4154        pwpr::Pfswe,
4155        pwpr::Pfswe,
4156        Pwpr_SPEC,
4157        crate::common::RW,
4158    > {
4159        crate::common::RegisterField::<
4160            6,
4161            0x1,
4162            1,
4163            0,
4164            pwpr::Pfswe,
4165            pwpr::Pfswe,
4166            Pwpr_SPEC,
4167            crate::common::RW,
4168        >::from_register(self, 0)
4169    }
4170
4171    #[doc = "PFSWE Bit Write Disable"]
4172    #[inline(always)]
4173    pub fn b0wi(
4174        self,
4175    ) -> crate::common::RegisterField<
4176        7,
4177        0x1,
4178        1,
4179        0,
4180        pwpr::B0Wi,
4181        pwpr::B0Wi,
4182        Pwpr_SPEC,
4183        crate::common::RW,
4184    > {
4185        crate::common::RegisterField::<
4186            7,
4187            0x1,
4188            1,
4189            0,
4190            pwpr::B0Wi,
4191            pwpr::B0Wi,
4192            Pwpr_SPEC,
4193            crate::common::RW,
4194        >::from_register(self, 0)
4195    }
4196}
4197impl ::core::default::Default for Pwpr {
4198    #[inline(always)]
4199    fn default() -> Pwpr {
4200        <crate::RegValueT<Pwpr_SPEC> as RegisterValue<_>>::new(128)
4201    }
4202}
4203pub mod pwpr {
4204
4205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4206    pub struct Pfswe_SPEC;
4207    pub type Pfswe = crate::EnumBitfieldStruct<u8, Pfswe_SPEC>;
4208    impl Pfswe {
4209        #[doc = "Writing to the PmnPFS_A register is disable"]
4210        pub const _0: Self = Self::new(0);
4211
4212        #[doc = "Writing to the PmnPFS_A register is enable"]
4213        pub const _1: Self = Self::new(1);
4214    }
4215    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4216    pub struct B0Wi_SPEC;
4217    pub type B0Wi = crate::EnumBitfieldStruct<u8, B0Wi_SPEC>;
4218    impl B0Wi {
4219        #[doc = "Writing to the PFSWE bit is enabled"]
4220        pub const _0: Self = Self::new(0);
4221
4222        #[doc = "Writing to the PFSWE bit is disabled"]
4223        pub const _1: Self = Self::new(1);
4224    }
4225}
ra0e1_pac/pfs_a.rs

ra0e1_pac/
pfs_a.rs
