#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Debug Function"]
unsafe impl ::core::marker::Send for super::Dbg {}
unsafe impl ::core::marker::Sync for super::Dbg {}
impl super::Dbg {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "Debug Status Register"]
#[inline(always)]
pub const fn dbgstr(&self) -> &'static crate::common::Reg<self::Dbgstr_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::Dbgstr_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
#[doc = "Debug Stop Control Register"]
#[inline(always)]
pub const fn dbgstopcr(
&self,
) -> &'static crate::common::Reg<self::Dbgstopcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Dbgstopcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(16usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dbgstr_SPEC;
impl crate::sealed::RegSpec for Dbgstr_SPEC {
type DataType = u32;
}
#[doc = "Debug Status Register"]
pub type Dbgstr = crate::RegValueT<Dbgstr_SPEC>;
impl Dbgstr {
#[doc = "Debug Power-up Request"]
#[inline(always)]
pub fn cdbgpwrupreq(
self,
) -> crate::common::RegisterField<
28,
0x1,
1,
0,
dbgstr::Cdbgpwrupreq,
dbgstr::Cdbgpwrupreq,
Dbgstr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
28,
0x1,
1,
0,
dbgstr::Cdbgpwrupreq,
dbgstr::Cdbgpwrupreq,
Dbgstr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
#[doc = "Debug Power-up Acknowledge"]
#[inline(always)]
pub fn cdbgpwrupack(
self,
) -> crate::common::RegisterField<
29,
0x1,
1,
0,
dbgstr::Cdbgpwrupack,
dbgstr::Cdbgpwrupack,
Dbgstr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
29,
0x1,
1,
0,
dbgstr::Cdbgpwrupack,
dbgstr::Cdbgpwrupack,
Dbgstr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Dbgstr {
#[inline(always)]
fn default() -> Dbgstr {
<crate::RegValueT<Dbgstr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod dbgstr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Cdbgpwrupreq_SPEC;
pub type Cdbgpwrupreq = crate::EnumBitfieldStruct<u8, Cdbgpwrupreq_SPEC>;
impl Cdbgpwrupreq {
#[doc = "OCD emulator is not requesting debug power up"]
pub const _0: Self = Self::new(0);
#[doc = "OCD emulator is requesting debug power up"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Cdbgpwrupack_SPEC;
pub type Cdbgpwrupack = crate::EnumBitfieldStruct<u8, Cdbgpwrupack_SPEC>;
impl Cdbgpwrupack {
#[doc = "Debug power-up request is not acknowledged"]
pub const _0: Self = Self::new(0);
#[doc = "Debug power-up request is acknowledged"]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dbgstopcr_SPEC;
impl crate::sealed::RegSpec for Dbgstopcr_SPEC {
type DataType = u32;
}
#[doc = "Debug Stop Control Register"]
pub type Dbgstopcr = crate::RegValueT<Dbgstopcr_SPEC>;
impl Dbgstopcr {
#[doc = "Mask Bit for IWDT Reset/Interrupt in the OCD Run Mode"]
#[inline(always)]
pub fn dbgstop_iwdt(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
dbgstopcr::DbgstopIwdt,
dbgstopcr::DbgstopIwdt,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
dbgstopcr::DbgstopIwdt,
dbgstopcr::DbgstopIwdt,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[inline(always)]
pub fn dbgstop_tim(
self,
) -> crate::common::RegisterField<
14,
0x1,
1,
0,
dbgstopcr::DbgstopTim,
dbgstopcr::DbgstopTim,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
14,
0x1,
1,
0,
dbgstopcr::DbgstopTim,
dbgstopcr::DbgstopTim,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Mask Bit for SAU, IICA, UARTA, PORT_IRQ0-5 Reset/Interrupt in the OCD brake mode. In the OCD break mode, the reset/interrupt is masked and each operation is stopped."]
#[inline(always)]
pub fn dbgstop_sir(
self,
) -> crate::common::RegisterField<
15,
0x1,
1,
0,
dbgstopcr::DbgstopSir,
dbgstopcr::DbgstopSir,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
15,
0x1,
1,
0,
dbgstopcr::DbgstopSir,
dbgstopcr::DbgstopSir,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Mask Bit for LVD0 Reset"]
#[inline(always)]
pub fn dbgstop_lvd0(
self,
) -> crate::common::RegisterField<
16,
0x1,
1,
0,
dbgstopcr::DbgstopLvd0,
dbgstopcr::DbgstopLvd0,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
16,
0x1,
1,
0,
dbgstopcr::DbgstopLvd0,
dbgstopcr::DbgstopLvd0,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Mask Bit for LVD1 Reset/Interrupt"]
#[inline(always)]
pub fn dbgstop_lvd1(
self,
) -> crate::common::RegisterField<
17,
0x1,
1,
0,
dbgstopcr::DbgstopLvd1,
dbgstopcr::DbgstopLvd1,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
17,
0x1,
1,
0,
dbgstopcr::DbgstopLvd1,
dbgstopcr::DbgstopLvd1,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Mask Bit for SRAM Parity Error Reset/Interrupt"]
#[inline(always)]
pub fn dbgstop_rper(
self,
) -> crate::common::RegisterField<
24,
0x1,
1,
0,
dbgstopcr::DbgstopRper,
dbgstopcr::DbgstopRper,
Dbgstopcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
24,
0x1,
1,
0,
dbgstopcr::DbgstopRper,
dbgstopcr::DbgstopRper,
Dbgstopcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Dbgstopcr {
#[inline(always)]
fn default() -> Dbgstopcr {
<crate::RegValueT<Dbgstopcr_SPEC> as RegisterValue<_>>::new(3)
}
}
pub mod dbgstopcr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopIwdt_SPEC;
pub type DbgstopIwdt = crate::EnumBitfieldStruct<u8, DbgstopIwdt_SPEC>;
impl DbgstopIwdt {
#[doc = "Enable IWDT reset/interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Mask IWDT reset/interrupt and stop IWDT counter"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopTim_SPEC;
pub type DbgstopTim = crate::EnumBitfieldStruct<u8, DbgstopTim_SPEC>;
impl DbgstopTim {
#[doc = "Enable RTC, TAU, TML32 reset/interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Mask RTC, TAU, TML32 reset/interrupt"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopSir_SPEC;
pub type DbgstopSir = crate::EnumBitfieldStruct<u8, DbgstopSir_SPEC>;
impl DbgstopSir {
#[doc = "Enable SAU, IICA, UARTA, PORT_IRQ0 to 5 reset/interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Mask SAU, IICA, UARTA, PORT_IRQ0 to 5 reset/interrupt"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopLvd0_SPEC;
pub type DbgstopLvd0 = crate::EnumBitfieldStruct<u8, DbgstopLvd0_SPEC>;
impl DbgstopLvd0 {
#[doc = "Enable LVD0 reset"]
pub const _0: Self = Self::new(0);
#[doc = "Mask LVD0 reset"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopLvd1_SPEC;
pub type DbgstopLvd1 = crate::EnumBitfieldStruct<u8, DbgstopLvd1_SPEC>;
impl DbgstopLvd1 {
#[doc = "Enable LVD1 reset/interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Mask LVD1 reset/interrupt"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct DbgstopRper_SPEC;
pub type DbgstopRper = crate::EnumBitfieldStruct<u8, DbgstopRper_SPEC>;
impl DbgstopRper {
#[doc = "Enable SRAM parity error reset/interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Mask SRAM parity error reset/interrupt"]
pub const _1: Self = Self::new(1);
}
}