1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved0: [u8; 0x04],
5 #[doc = "0x04 - SPI Global Control Register"]
6 pub spi_gcr: crate::Reg<spi_gcr::SPI_GCR_SPEC>,
7 #[doc = "0x08 - SPI Transfer Control Register"]
8 pub spi_tcr: crate::Reg<spi_tcr::SPI_TCR_SPEC>,
9 _reserved2: [u8; 0x04],
10 #[doc = "0x10 - SPI Interrupt Control Register"]
11 pub spi_ier: crate::Reg<spi_ier::SPI_IER_SPEC>,
12 #[doc = "0x14 - SPI Interrupt Status Register"]
13 pub spi_isr: crate::Reg<spi_isr::SPI_ISR_SPEC>,
14 #[doc = "0x18 - SPI FIFO Control Register"]
15 pub spi_fcr: crate::Reg<spi_fcr::SPI_FCR_SPEC>,
16 #[doc = "0x1c - SPI FIFO Status Register"]
17 pub spi_fsr: crate::Reg<spi_fsr::SPI_FSR_SPEC>,
18 #[doc = "0x20 - SPI Wait Clock Register"]
19 pub spi_wcr: crate::Reg<spi_wcr::SPI_WCR_SPEC>,
20 _reserved7: [u8; 0x04],
21 #[doc = "0x28 - SPI Sample Delay Control Register"]
22 pub spi_samp_dl: crate::Reg<spi_samp_dl::SPI_SAMP_DL_SPEC>,
23 _reserved8: [u8; 0x04],
24 #[doc = "0x30 - SPI Master Burst Counter Register"]
25 pub spi_mbc: crate::Reg<spi_mbc::SPI_MBC_SPEC>,
26 #[doc = "0x34 - SPI Master Transmit Counter Register"]
27 pub spi_mtc: crate::Reg<spi_mtc::SPI_MTC_SPEC>,
28 #[doc = "0x38 - SPI Master Burst Control Register"]
29 pub spi_bcc: crate::Reg<spi_bcc::SPI_BCC_SPEC>,
30 _reserved11: [u8; 0x04],
31 #[doc = "0x40 - SPI Bit-Aligned Transfer Configure Register"]
32 pub spi_batc: crate::Reg<spi_batc::SPI_BATC_SPEC>,
33 #[doc = "0x44 - SPI Bit-Aligned Clock Configuration Register"]
34 pub spi_ba_ccr: crate::Reg<spi_ba_ccr::SPI_BA_CCR_SPEC>,
35 #[doc = "0x48 - SPI TX Bit Register\n\nVTB \\[31:0\\]: The Value of the Transmit Bits"]
36 pub spi_tbr: crate::Reg<spi_tbr::SPI_TBR_SPEC>,
37 #[doc = "0x4c - SPI RX Bit Register\n\nVRB \\[31:0\\]: The Value of the Receive Bits"]
38 pub spi_rbr: crate::Reg<spi_rbr::SPI_RBR_SPEC>,
39 _reserved15: [u8; 0x38],
40 #[doc = "0x88 - SPI Normal DMA Mode Control Register"]
41 pub spi_ndma_mode_ctl: crate::Reg<spi_ndma_mode_ctl::SPI_NDMA_MODE_CTL_SPEC>,
42 _reserved16: [u8; 0x0174],
43 _reserved_16_spi_: [u8; 0x04],
44 _reserved17: [u8; 0xfc],
45 _reserved_17_spi_: [u8; 0x04],
46}
47impl RegisterBlock {
48 #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[7:0\\]: Transmit Data in byte method"]
49 #[inline(always)]
50 pub fn spi_txd_8(&self) -> &crate::Reg<spi_txd_8::SPI_TXD_8_SPEC> {
51 unsafe {
52 &*(((self as *const Self) as *const u8).add(512usize)
53 as *const crate::Reg<spi_txd_8::SPI_TXD_8_SPEC>)
54 }
55 }
56 #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[15:0\\]: Transmit Data in half-word method"]
57 #[inline(always)]
58 pub fn spi_txd_16(&self) -> &crate::Reg<spi_txd_16::SPI_TXD_16_SPEC> {
59 unsafe {
60 &*(((self as *const Self) as *const u8).add(512usize)
61 as *const crate::Reg<spi_txd_16::SPI_TXD_16_SPEC>)
62 }
63 }
64 #[doc = "0x200 - SPI TX Data Register\n\nTDATA \\[31:0\\]: Transmit Data in word method"]
65 #[inline(always)]
66 pub fn spi_txd(&self) -> &crate::Reg<spi_txd::SPI_TXD_SPEC> {
67 unsafe {
68 &*(((self as *const Self) as *const u8).add(512usize)
69 as *const crate::Reg<spi_txd::SPI_TXD_SPEC>)
70 }
71 }
72 #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[7:0\\]: Receive Data and access in byte method"]
73 #[inline(always)]
74 pub fn spi_rxd_8(&self) -> &crate::Reg<spi_rxd_8::SPI_RXD_8_SPEC> {
75 unsafe {
76 &*(((self as *const Self) as *const u8).add(768usize)
77 as *const crate::Reg<spi_rxd_8::SPI_RXD_8_SPEC>)
78 }
79 }
80 #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[15:0\\]: Receive Data and access in half-word method"]
81 #[inline(always)]
82 pub fn spi_rxd_16(&self) -> &crate::Reg<spi_rxd_16::SPI_RXD_16_SPEC> {
83 unsafe {
84 &*(((self as *const Self) as *const u8).add(768usize)
85 as *const crate::Reg<spi_rxd_16::SPI_RXD_16_SPEC>)
86 }
87 }
88 #[doc = "0x300 - SPI RX Data Register\n\nRDATA \\[31:0\\]: Receive Data and access in word method"]
89 #[inline(always)]
90 pub fn spi_rxd(&self) -> &crate::Reg<spi_rxd::SPI_RXD_SPEC> {
91 unsafe {
92 &*(((self as *const Self) as *const u8).add(768usize)
93 as *const crate::Reg<spi_rxd::SPI_RXD_SPEC>)
94 }
95 }
96}
97#[doc = "SPI_GCR register accessor: an alias for `Reg<SPI_GCR_SPEC>`"]
98pub type SPI_GCR = crate::Reg<spi_gcr::SPI_GCR_SPEC>;
99#[doc = "SPI Global Control Register"]
100pub mod spi_gcr;
101#[doc = "SPI_TCR register accessor: an alias for `Reg<SPI_TCR_SPEC>`"]
102pub type SPI_TCR = crate::Reg<spi_tcr::SPI_TCR_SPEC>;
103#[doc = "SPI Transfer Control Register"]
104pub mod spi_tcr;
105#[doc = "SPI_IER register accessor: an alias for `Reg<SPI_IER_SPEC>`"]
106pub type SPI_IER = crate::Reg<spi_ier::SPI_IER_SPEC>;
107#[doc = "SPI Interrupt Control Register"]
108pub mod spi_ier;
109#[doc = "SPI_ISR register accessor: an alias for `Reg<SPI_ISR_SPEC>`"]
110pub type SPI_ISR = crate::Reg<spi_isr::SPI_ISR_SPEC>;
111#[doc = "SPI Interrupt Status Register"]
112pub mod spi_isr;
113#[doc = "SPI_FCR register accessor: an alias for `Reg<SPI_FCR_SPEC>`"]
114pub type SPI_FCR = crate::Reg<spi_fcr::SPI_FCR_SPEC>;
115#[doc = "SPI FIFO Control Register"]
116pub mod spi_fcr;
117#[doc = "SPI_FSR register accessor: an alias for `Reg<SPI_FSR_SPEC>`"]
118pub type SPI_FSR = crate::Reg<spi_fsr::SPI_FSR_SPEC>;
119#[doc = "SPI FIFO Status Register"]
120pub mod spi_fsr;
121#[doc = "SPI_WCR register accessor: an alias for `Reg<SPI_WCR_SPEC>`"]
122pub type SPI_WCR = crate::Reg<spi_wcr::SPI_WCR_SPEC>;
123#[doc = "SPI Wait Clock Register"]
124pub mod spi_wcr;
125#[doc = "SPI_SAMP_DL register accessor: an alias for `Reg<SPI_SAMP_DL_SPEC>`"]
126pub type SPI_SAMP_DL = crate::Reg<spi_samp_dl::SPI_SAMP_DL_SPEC>;
127#[doc = "SPI Sample Delay Control Register"]
128pub mod spi_samp_dl;
129#[doc = "SPI_MBC register accessor: an alias for `Reg<SPI_MBC_SPEC>`"]
130pub type SPI_MBC = crate::Reg<spi_mbc::SPI_MBC_SPEC>;
131#[doc = "SPI Master Burst Counter Register"]
132pub mod spi_mbc;
133#[doc = "SPI_MTC register accessor: an alias for `Reg<SPI_MTC_SPEC>`"]
134pub type SPI_MTC = crate::Reg<spi_mtc::SPI_MTC_SPEC>;
135#[doc = "SPI Master Transmit Counter Register"]
136pub mod spi_mtc;
137#[doc = "SPI_BCC register accessor: an alias for `Reg<SPI_BCC_SPEC>`"]
138pub type SPI_BCC = crate::Reg<spi_bcc::SPI_BCC_SPEC>;
139#[doc = "SPI Master Burst Control Register"]
140pub mod spi_bcc;
141#[doc = "SPI_BATC register accessor: an alias for `Reg<SPI_BATC_SPEC>`"]
142pub type SPI_BATC = crate::Reg<spi_batc::SPI_BATC_SPEC>;
143#[doc = "SPI Bit-Aligned Transfer Configure Register"]
144pub mod spi_batc;
145#[doc = "SPI_BA_CCR register accessor: an alias for `Reg<SPI_BA_CCR_SPEC>`"]
146pub type SPI_BA_CCR = crate::Reg<spi_ba_ccr::SPI_BA_CCR_SPEC>;
147#[doc = "SPI Bit-Aligned Clock Configuration Register"]
148pub mod spi_ba_ccr;
149#[doc = "SPI_TBR register accessor: an alias for `Reg<SPI_TBR_SPEC>`"]
150pub type SPI_TBR = crate::Reg<spi_tbr::SPI_TBR_SPEC>;
151#[doc = "SPI TX Bit Register\n\nVTB \\[31:0\\]: The Value of the Transmit Bits"]
152pub mod spi_tbr;
153#[doc = "SPI_RBR register accessor: an alias for `Reg<SPI_RBR_SPEC>`"]
154pub type SPI_RBR = crate::Reg<spi_rbr::SPI_RBR_SPEC>;
155#[doc = "SPI RX Bit Register\n\nVRB \\[31:0\\]: The Value of the Receive Bits"]
156pub mod spi_rbr;
157#[doc = "SPI_NDMA_MODE_CTL register accessor: an alias for `Reg<SPI_NDMA_MODE_CTL_SPEC>`"]
158pub type SPI_NDMA_MODE_CTL = crate::Reg<spi_ndma_mode_ctl::SPI_NDMA_MODE_CTL_SPEC>;
159#[doc = "SPI Normal DMA Mode Control Register"]
160pub mod spi_ndma_mode_ctl;
161#[doc = "SPI_TXD register accessor: an alias for `Reg<SPI_TXD_SPEC>`"]
162pub type SPI_TXD = crate::Reg<spi_txd::SPI_TXD_SPEC>;
163#[doc = "SPI TX Data Register\n\nTDATA \\[31:0\\]: Transmit Data in word method"]
164pub mod spi_txd;
165#[doc = "SPI_TXD_16 register accessor: an alias for `Reg<SPI_TXD_16_SPEC>`"]
166pub type SPI_TXD_16 = crate::Reg<spi_txd_16::SPI_TXD_16_SPEC>;
167#[doc = "SPI TX Data Register\n\nTDATA \\[15:0\\]: Transmit Data in half-word method"]
168pub mod spi_txd_16;
169#[doc = "SPI_TXD_8 register accessor: an alias for `Reg<SPI_TXD_8_SPEC>`"]
170pub type SPI_TXD_8 = crate::Reg<spi_txd_8::SPI_TXD_8_SPEC>;
171#[doc = "SPI TX Data Register\n\nTDATA \\[7:0\\]: Transmit Data in byte method"]
172pub mod spi_txd_8;
173#[doc = "SPI_RXD register accessor: an alias for `Reg<SPI_RXD_SPEC>`"]
174pub type SPI_RXD = crate::Reg<spi_rxd::SPI_RXD_SPEC>;
175#[doc = "SPI RX Data Register\n\nRDATA \\[31:0\\]: Receive Data and access in word method"]
176pub mod spi_rxd;
177#[doc = "SPI_RXD_16 register accessor: an alias for `Reg<SPI_RXD_16_SPEC>`"]
178pub type SPI_RXD_16 = crate::Reg<spi_rxd_16::SPI_RXD_16_SPEC>;
179#[doc = "SPI RX Data Register\n\nRDATA \\[15:0\\]: Receive Data and access in half-word method"]
180pub mod spi_rxd_16;
181#[doc = "SPI_RXD_8 register accessor: an alias for `Reg<SPI_RXD_8_SPEC>`"]
182pub type SPI_RXD_8 = crate::Reg<spi_rxd_8::SPI_RXD_8_SPEC>;
183#[doc = "SPI RX Data Register\n\nRDATA \\[7:0\\]: Receive Data and access in byte method"]
184pub mod spi_rxd_8;