psdisasm 0.2.0

A disassembler for the PS1 variant of MIPS assembly language
Documentation 
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pub struct Instruction(u32);

impl Instruction {
    pub fn new(raw: u32) -> Self {
        Instruction(raw)
    }

    pub fn raw(&self) -> u32 {
        self.0
    }

    /// The instruction's primary opcode.
    pub fn opcode(&self) -> u8 {
        (self.0 >> 26) as u8
    }

    /// For SPECIAL (00), opcode instructions (R-Type), this returns the
    /// function code, or secondary opcode.
    pub fn funct(&self) -> u8 {
        (self.0 & 0x3f) as u8
    }

    /// The index of the `rs` (source) register.`
    /// Like for `rt` and `rd`, it is not always a _source_ register.
    pub fn rs(&self) -> usize {
        ((self.0 >> 21) & 0x1f) as usize
    }

    /// The index of the `rt` (target) register.
    pub fn rt(&self) -> usize {
        ((self.0 >> 16) & 0x1f) as usize
    }

    /// The index of the `rd` (destination) register.
    pub fn rd(&self) -> usize {
        ((self.0 >> 11) & 0x1f) as usize
    }

    /// The numerical value of the shift amount. 0 to 31.
    pub fn shamt(&self) -> usize {
        ((self.0 >> 6) & 0x1f) as usize
    }

    /// The value of the 16-bit immediate value, sign-extended to 32 bits.
    pub fn simm16(&self) -> i32 {
        (self.0 & 0xffff) as i16 as i32
    }

    /// The value of the 16-bit immediate value, zero-extended to 32 bits.
    pub fn imm16(&self) -> u32 {
        self.0 & 0xffff
    }

    /// The value of the 26-bit jump target field, zero-extended to 32 bits. You
    /// must shift this value left by 2 bits to get the actual address.
    pub fn jump_target(&self) -> u32 {
        self.0 & 0x03ffffff
    }

    /// This bit is set if the instruction must be executed by a coprocessor.
    pub fn cop_execute(&self) -> bool {
        (self.0 >> 25) & 1 != 0
    }

    /// For non cop-execute instructions, this is the secondary opcode, to
    /// distinguish between mfc, mtc, etc...
    pub fn cop_funct(&self) -> u8 {
        ((self.0 >> 21) & 0x0f) as u8
    }

    /// The raw coprocessor instruction code, which is the lower 25 bits. The
    /// meaning is coprocessor-specific.
    pub fn cop_instruction(&self) -> u32 {
        self.0 & 0x01ffffff
    }
}