Per-AIR expression -> straight-line CUDA kernel codegen.
Two kernel families are emitted into each AIR's self-contained
<base>.exps.so (placed next to that AIR's .bin):
- the Q (cExp) kernel -- register-bounded, chunk size autotuned to zero register spill;
- one small trace-domain kernel per other covered expression (hint fields,
im columns, ...), dispatched by expId via
exps_expr_covered/exps_launch_expr(seeemit_exprs_tu).
The prover dlopens the library by convention and falls back to the
bytecode interpreter for anything absent: missing .so, missing symbol,
or an uncovered expression.
Two entry points:
- [
generate_air] — one AIR dir -> its.exps.so. - [
generate_all] — a provingKey dir -> every AIR's.exps.so.