pic32mx470/pic32mx47xfxxxl/int/
ipc11clr.rs

1#[doc = "Register `IPC11CLR` reader"]
2pub struct R(crate::R<IPC11CLR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IPC11CLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IPC11CLR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IPC11CLR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IPC11CLR` writer"]
17pub struct W(crate::W<IPC11CLR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IPC11CLR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IPC11CLR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IPC11CLR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DMA2IS` reader - "]
38pub type DMA2IS_R = crate::FieldReader;
39#[doc = "Field `DMA2IS` writer - "]
40pub type DMA2IS_W<'a, const O: u8> = crate::FieldWriter<'a, IPC11CLR_SPEC, 2, O>;
41#[doc = "Field `DMA2IP` reader - "]
42pub type DMA2IP_R = crate::FieldReader;
43#[doc = "Field `DMA2IP` writer - "]
44pub type DMA2IP_W<'a, const O: u8> = crate::FieldWriter<'a, IPC11CLR_SPEC, 3, O>;
45#[doc = "Field `DMA3IS` reader - "]
46pub type DMA3IS_R = crate::FieldReader;
47#[doc = "Field `DMA3IS` writer - "]
48pub type DMA3IS_W<'a, const O: u8> = crate::FieldWriter<'a, IPC11CLR_SPEC, 2, O>;
49#[doc = "Field `DMA3IP` reader - "]
50pub type DMA3IP_R = crate::FieldReader;
51#[doc = "Field `DMA3IP` writer - "]
52pub type DMA3IP_W<'a, const O: u8> = crate::FieldWriter<'a, IPC11CLR_SPEC, 3, O>;
53impl R {
54    #[doc = "Bits 0:1"]
55    #[inline(always)]
56    pub fn dma2is(&self) -> DMA2IS_R {
57        DMA2IS_R::new((self.bits & 3) as u8)
58    }
59    #[doc = "Bits 2:4"]
60    #[inline(always)]
61    pub fn dma2ip(&self) -> DMA2IP_R {
62        DMA2IP_R::new(((self.bits >> 2) & 7) as u8)
63    }
64    #[doc = "Bits 8:9"]
65    #[inline(always)]
66    pub fn dma3is(&self) -> DMA3IS_R {
67        DMA3IS_R::new(((self.bits >> 8) & 3) as u8)
68    }
69    #[doc = "Bits 10:12"]
70    #[inline(always)]
71    pub fn dma3ip(&self) -> DMA3IP_R {
72        DMA3IP_R::new(((self.bits >> 10) & 7) as u8)
73    }
74}
75impl W {
76    #[doc = "Bits 0:1"]
77    #[inline(always)]
78    #[must_use]
79    pub fn dma2is(&mut self) -> DMA2IS_W<0> {
80        DMA2IS_W::new(self)
81    }
82    #[doc = "Bits 2:4"]
83    #[inline(always)]
84    #[must_use]
85    pub fn dma2ip(&mut self) -> DMA2IP_W<2> {
86        DMA2IP_W::new(self)
87    }
88    #[doc = "Bits 8:9"]
89    #[inline(always)]
90    #[must_use]
91    pub fn dma3is(&mut self) -> DMA3IS_W<8> {
92        DMA3IS_W::new(self)
93    }
94    #[doc = "Bits 10:12"]
95    #[inline(always)]
96    #[must_use]
97    pub fn dma3ip(&mut self) -> DMA3IP_W<10> {
98        DMA3IP_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "IPC11CLR register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ipc11clr](index.html) module"]
108pub struct IPC11CLR_SPEC;
109impl crate::RegisterSpec for IPC11CLR_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [ipc11clr::R](R) reader structure"]
113impl crate::Readable for IPC11CLR_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [ipc11clr::W](W) writer structure"]
117impl crate::Writable for IPC11CLR_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets IPC11CLR to value 0"]
123impl crate::Resettable for IPC11CLR_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
pic32mx470/pic32mx47xfxxxl/int/ipc11clr.rs

pic32mx470/pic32mx47xfxxxl/int/
ipc11clr.rs
