use super::Clocking;
use crate::pac::{TMR2, TMR3, TMR4, TMR5};
#[derive(Clone, Copy, Debug)]
#[repr(u8)]
pub enum ClockPrescale {
Prescale1 = 0,
Prescale2 = 1,
Prescale4 = 2,
Prescale8 = 3,
Prescale16 = 4,
Prescale32 = 5,
Prescale64 = 6,
Prescale256 = 7,
}
pub struct Timer<TIMER> {
timer: TIMER,
}
macro_rules! timerb_impl {
($constructor: ident, $timer: ty) => {
impl Timer<$timer> {
pub fn $constructor(
timer: $timer,
clocking: Clocking,
prescale: ClockPrescale,
period: u16,
stop_in_idle_mode: bool,
) -> Self {
timer.cont.write(|w| unsafe { w
.sidl().bit(stop_in_idle_mode)
.tgate().bit(clocking == Clocking::PbclockGated)
.tckps().bits(prescale as u8)
.tcs().bit(clocking == Clocking::External)
});
timer.tmr.write(|w| unsafe { w.tmr().bits(0) });
timer.pr.write(|w| unsafe { w.pr().bits(period as u32) });
timer.contset.write(|w| w.on().set_bit());
Self { timer }
}
pub fn free(self) -> $timer {
self.timer.contclr.write(|w| w.on().set_bit());
self.timer
}
pub fn tmr(&self) -> u16 {
self.timer.tmr.read().tmr().bits() as u16
}
pub fn set_tmr(&mut self, tmr: u16) {
self.timer.tmr.write(|w| unsafe { w.tmr().bits(tmr as u32) });
}
pub fn pr(&self) -> u16 {
self.timer.pr.read().pr().bits() as u16
}
pub fn set_pr(&mut self, period: u16) {
self.timer.pr.write(|w| unsafe { w.pr().bits(period as u32) });
}
}
};
}
timerb_impl!(timer2, TMR2);
timerb_impl!(timer3, TMR3);
timerb_impl!(timer4, TMR4);
timerb_impl!(timer5, TMR5);
pub struct Timer32<TIMERL, TIMERH> {
timer_low: TIMERL,
timer_high: TIMERH,
}
macro_rules! timer32_impl {
($constructor: ident, $timer_low: ty, $timer_high: ty) => {
impl Timer32<$timer_low, $timer_high> {
pub fn $constructor(
timer_low: $timer_low,
timer_high: $timer_high,
clocking: Clocking,
prescale: ClockPrescale,
period: u32,
stop_in_idle_mode: bool,
) -> Self {
timer_low.cont.write(|w| unsafe { w
.sidl().bit(stop_in_idle_mode)
.tgate().bit(clocking == Clocking::PbclockGated)
.tckps().bits(prescale as u8)
.t32().set_bit()
.tcs().bit(clocking == Clocking::External)
});
timer_high.cont.write(|w| w.sidl().bit(stop_in_idle_mode));
timer_low.tmr.write(|w| unsafe { w.tmr().bits(0) });
timer_low.pr.write(|w| unsafe { w.pr().bits(period) });
timer_low.contset.write(|w| w.on().set_bit());
Self { timer_low, timer_high }
}
pub fn free(self) -> ($timer_low, $timer_high) {
self.timer_low.contclr.write(|w| w.on().set_bit());
self.timer_high.contclr.write(|w| w.on().set_bit());
(self.timer_low, self.timer_high)
}
pub fn tmr(&self) -> u32 {
self.timer_low.tmr.read().tmr().bits()
}
pub fn set_tmr(&mut self, tmr: u32) {
self.timer_low.tmr.write(|w| unsafe { w.tmr().bits(tmr) });
}
pub fn pr(&self) -> u32 {
self.timer_low.pr.read().pr().bits()
}
pub fn set_pr(&mut self, period: u32) {
self.timer_low.pr.write(|w| unsafe { w.pr().bits(period) });
}
}
};
}
timer32_impl!(timer2_3, TMR2, TMR3);
timer32_impl!(timer4_5, TMR4, TMR5);