#![allow(non_camel_case_types)]
pub const PERF_TYPE_HARDWARE: u32 = 0;
pub const PERF_TYPE_SOFTWARE: u32 = 1;
pub const PERF_TYPE_TRACEPOINT: u32 = 2;
pub const PERF_TYPE_HW_CACHE: u32 = 3;
pub const PERF_TYPE_RAW: u32 = 4;
pub const PERF_TYPE_BREAKPOINT: u32 = 5;
pub const PERF_RECORD_MMAP: u32 = 1;
pub const PERF_RECORD_LOST: u32 = 2;
pub const PERF_RECORD_COMM: u32 = 3;
pub const PERF_RECORD_EXIT: u32 = 4;
pub const PERF_RECORD_THROTTLE: u32 = 5;
pub const PERF_RECORD_UNTHROTTLE: u32 = 6;
pub const PERF_RECORD_FORK: u32 = 7;
pub const PERF_RECORD_READ: u32 = 8;
pub const PERF_RECORD_SAMPLE: u32 = 9;
pub const PERF_RECORD_MMAP2: u32 = 10;
pub const PERF_RECORD_AUX: u32 = 11;
pub const PERF_RECORD_ITRACE_START: u32 = 12;
pub const PERF_RECORD_LOST_SAMPLES: u32 = 13;
pub const PERF_RECORD_SWITCH: u32 = 14;
pub const PERF_RECORD_SWITCH_CPU_WIDE: u32 = 15;
pub const PERF_RECORD_NAMESPACES: u32 = 16;
pub const PERF_RECORD_KSYMBOL: u32 = 17;
pub const PERF_RECORD_BPF_EVENT: u32 = 18;
pub const PERF_SAMPLE_IP: u64 = 1 << 0;
pub const PERF_SAMPLE_TID: u64 = 1 << 1;
pub const PERF_SAMPLE_TIME: u64 = 1 << 2;
pub const PERF_SAMPLE_ADDR: u64 = 1 << 3;
pub const PERF_SAMPLE_READ: u64 = 1 << 4;
pub const PERF_SAMPLE_CALLCHAIN: u64 = 1 << 5;
pub const PERF_SAMPLE_ID: u64 = 1 << 6;
pub const PERF_SAMPLE_CPU: u64 = 1 << 7;
pub const PERF_SAMPLE_PERIOD: u64 = 1 << 8;
pub const PERF_SAMPLE_STREAM_ID: u64 = 1 << 9;
pub const PERF_SAMPLE_RAW: u64 = 1 << 10;
pub const PERF_SAMPLE_BRANCH_STACK: u64 = 1 << 11;
pub const PERF_SAMPLE_REGS_USER: u64 = 1 << 12;
pub const PERF_SAMPLE_STACK_USER: u64 = 1 << 13;
pub const PERF_SAMPLE_WEIGHT: u64 = 1 << 14;
pub const PERF_SAMPLE_DATA_SRC: u64 = 1 << 15;
pub const PERF_SAMPLE_IDENTIFIER: u64 = 1 << 16;
pub const PERF_SAMPLE_TRANSACTION: u64 = 1 << 17;
pub const PERF_SAMPLE_REGS_INTR: u64 = 1 << 18;
pub const PERF_SAMPLE_PHYS_ADDR: u64 = 1 << 18;
pub const PERF_COUNT_HW_CPU_CYCLES: u64 = 0;
pub const PERF_COUNT_HW_INSTRUCTIONS: u64 = 1;
pub const PERF_COUNT_HW_CACHE_REFERENCES: u64 = 2;
pub const PERF_COUNT_HW_CACHE_MISSES: u64 = 3;
pub const PERF_COUNT_HW_BRANCH_INSTRUCTIONS: u64 = 4;
pub const PERF_COUNT_HW_BRANCH_MISSES: u64 = 5;
pub const PERF_COUNT_HW_BUS_CYCLES: u64 = 6;
pub const PERF_COUNT_HW_STALLED_CYCLES_FRONTEND: u64 = 7;
pub const PERF_COUNT_HW_STALLED_CYCLES_BACKEND: u64 = 8;
pub const PERF_COUNT_HW_REF_CPU_CYCLES: u64 = 9;
pub const PERF_COUNT_SW_CPU_CLOCK: u64 = 0;
pub const PERF_COUNT_SW_TASK_CLOCK: u64 = 1;
pub const PERF_COUNT_SW_PAGE_FAULTS: u64 = 2;
pub const PERF_COUNT_SW_CONTEXT_SWITCHES: u64 = 3;
pub const PERF_COUNT_SW_CPU_MIGRATIONS: u64 = 4;
pub const PERF_COUNT_SW_PAGE_FAULTS_MIN: u64 = 5;
pub const PERF_COUNT_SW_PAGE_FAULTS_MAJ: u64 = 6;
pub const PERF_COUNT_SW_ALIGNMENT_FAULTS: u64 = 7;
pub const PERF_COUNT_SW_EMULATION_FAULTS: u64 = 8;
pub const PERF_COUNT_SW_DUMMY: u64 = 9;
pub const PERF_COUNT_SW_BPF_OUTPUT: u64 = 10;
#[repr(C)]
#[derive(Copy, Clone, Default)]
pub struct perf_event_attr {
pub type_: u32,
pub size: u32,
pub config: u64,
pub sample: perf_event_sample_arg,
pub sample_type: u64,
pub read_format: u64,
pub _bitfield_1: u64,
pub wakeup: perf_event_wakeup_arg,
pub bp_type: u32,
pub config1: perf_event_config1_arg,
pub config2: perf_event_config2_arg,
pub branch_sample_type: u64,
pub sample_regs_user: u64,
pub sample_stack_user: u32,
pub clockid: i32,
pub sample_regs_intr: u64,
pub aux_watermark: u32,
pub sample_max_stack: u16,
pub __reserved_2: u16,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union perf_event_sample_arg {
pub sample_period: u64,
pub sample_freq: u64,
__align: u64,
}
impl Default for perf_event_sample_arg {
fn default() -> Self {
Self { sample_period: 0 }
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union perf_event_wakeup_arg {
pub wakeup_events: u32,
pub wakeup_watermark: u32,
__align: u32,
}
impl Default for perf_event_wakeup_arg {
fn default() -> Self {
Self { wakeup_events: 0 }
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union perf_event_config1_arg {
pub bp_addr: u64,
pub config1: u64,
__align: u64,
}
impl Default for perf_event_config1_arg {
fn default() -> Self {
Self { bp_addr: 0 }
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union perf_event_config2_arg {
pub bp_len: u64,
pub config2: u64,
_align: u64,
}
impl Default for perf_event_config2_arg {
fn default() -> Self {
Self { bp_len: 0 }
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct perf_event_header {
pub type_: u32,
pub misc: u16,
pub size: u16,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct perf_record_lost {
pub header: perf_event_header,
pub id: u64,
pub lost: u64,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct perf_record_comm {
pub header: perf_event_header,
pub pid: u32,
pub tid: u32,
pub comm: [u8; 16],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct perf_record_sample {
pub header: perf_event_header,
pub size: u32,
pub data: [u8; 0],
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct perf_event_mmap_page {
pub version: u32,
pub compat_version: u32,
pub lock: u32,
pub index: u32,
pub offset: i64,
pub time_enabled: u64,
pub time_running: u64,
pub capabilities: perf_event_mmap_capabilities,
pub pmc_width: u16,
pub time_shift: u16,
pub time_mult: u32,
pub time_offset: u64,
pub time_zero: u64,
pub size: u32,
pub __reserved: [u8; 948usize],
pub data_head: u64,
pub data_tail: u64,
pub data_offset: u64,
pub data_size: u64,
pub aux_head: u64,
pub aux_tail: u64,
pub aux_offset: u64,
pub aux_size: u64,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union perf_event_mmap_capabilities {
pub capabilities: u64,
pub cap_bits: perf_event_mmap_capbits,
_align: u64,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct perf_event_mmap_capbits {
pub _bitfield_1: u64,
pub _align: [u64; 0usize],
}