1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
// SPDX-License-Identifier: MPL-2.0 //! Platform-specific code. //! //! Each architecture that Asterinas supports may contain a submodule here. #[cfg(target_arch = "riscv64")] pub mod riscv; #[cfg(target_arch = "x86_64")] pub mod x86; #[cfg(target_arch = "riscv64")] pub use self::riscv::*; #[cfg(target_arch = "x86_64")] pub use self::x86::*;