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// Copyright (C) 2026 Piers Finlayson <piers@piers.rocks>
//
// MIT License
//! PIO GPIO-window constraint, shared by address-range
//! (`addr_layout::derive_addr_layout`) and CS/data-range
//! (`cs_data_layout::derive_cs_data_layout`) layout derivation.
//!
//! Each RP2350 PIO block can only access a 32-GPIO window: GPIOs
//! `[0, 32)` or `[16, 48)` (the two `GPIO_BASE` options; RP2350B has 48
//! GPIOs). A resolved layout's GPIO range - `[gpio_base, gpio_base +
//! span)` - must fit entirely within one of these windows, or the PIO
//! simply cannot reach some of the GPIOs in that range. This isn't
//! captured by either layout's own contiguity/span logic (a range can be
//! contiguous, or meet `MIN_ADDR_PINS`, while still being unreachable by
//! any single PIO), so both derivations check it independently via this
//! shared helper - on the same combo-rejection path as their other
//! per-combo checks (contiguity, select-line shape, etc).
/// Number of GPIOs accessible in a single PIO window.
const PIO_WINDOW_SIZE: u8 = 32;
/// The two possible PIO `GPIO_BASE` values on RP2350B.
const PIO_GPIO_BASES: = ;
/// Returns `true` if `[gpio_base, gpio_base + span)` fits entirely within
/// one of the PIO's 32-GPIO windows (`[0,32)` or `[16,48)`).
pub
// ===========================================================================
// Tests
// ===========================================================================