#ifndef GPU_INTEL_JIT_IR_V2_PLAN_HPP
#define GPU_INTEL_JIT_IR_V2_PLAN_HPP
#include "gpu/intel/jit/ir/hw.hpp"
#include "gpu/intel/jit/ir/v2/plan_utils.hpp"
#include "gpu/intel/jit/ir/v2/tensor.hpp"
#include <sstream>
namespace dnnl {
namespace impl {
namespace gpu {
namespace intel {
namespace jit {
namespace v2 {
struct reduce_plan_t : public base_plan_t {
layout_t src;
layout_t dst;
using base_plan_t::base_plan_t;
reduce_plan_t() = default;
reduce_plan_t(const dsl::hw_t &hw, const layout_t &src, const layout_t &dst)
: base_plan_t(hw), src(src), dst(dst) {}
int grf_usage_bytes() const {
int ret = 0;
ret += utils::rnd_up(dst.size(), grf_size());
return ret;
}
std::string str() const {
if (!*this) return "(empty)";
ostringstream_t oss;
oss << "src_layout: " << src.str() << std::endl;
oss << "dst_layout: " << dst.str();
return oss.str();
}
XE_DEFINE_DUMP()
};
struct reorder_plan_t : public base_plan_t {
layout_t src;
layout_t dst;
using base_plan_t::base_plan_t;
reorder_plan_t() = default;
reorder_plan_t(
const dsl::hw_t &hw, const layout_t &src, const layout_t &dst)
: base_plan_t(hw), src(src), dst(dst) {}
int grf_usage_bytes() const {
int ret = 0;
ret += utils::rnd_up(dst.size(), grf_size());
return ret;
}
std::string str() const {
if (!*this) return "(empty)";
ostringstream_t oss;
oss << "src_layout: " << src.str() << std::endl;
oss << "dst_layout: " << dst.str();
return oss.str();
}
XE_DEFINE_DUMP()
};
} } } } } }
#endif