#![allow(unsafe_op_in_unsafe_fn)]
#[repr(C)]
#[derive(Default)]
pub struct __IncompleteArrayField<T>(::std::marker::PhantomData<T>, [T; 0]);
impl<T> __IncompleteArrayField<T> {
#[inline]
pub const fn new() -> Self {
__IncompleteArrayField(::std::marker::PhantomData, [])
}
#[inline]
pub fn as_ptr(&self) -> *const T {
self as *const _ as *const T
}
#[inline]
pub fn as_mut_ptr(&mut self) -> *mut T {
self as *mut _ as *mut T
}
#[inline]
pub unsafe fn as_slice(&self, len: usize) -> &[T] {
::std::slice::from_raw_parts(self.as_ptr(), len)
}
#[inline]
pub unsafe fn as_mut_slice(&mut self, len: usize) -> &mut [T] {
::std::slice::from_raw_parts_mut(self.as_mut_ptr(), len)
}
}
impl<T> ::std::fmt::Debug for __IncompleteArrayField<T> {
fn fmt(&self, fmt: &mut ::std::fmt::Formatter<'_>) -> ::std::fmt::Result {
fmt.write_str("__IncompleteArrayField")
}
}
pub const NVME_DISC_SUBSYS_NAME: &[u8; 37] = b"nqn.2014-08.org.nvmexpress.discovery\0";
pub const NVME_RDMA_IP_PORT: u32 = 4420;
pub const NVME_DISC_IP_PORT: u32 = 8009;
pub const NVME_NSID_ALL: u32 = 4294967295;
pub const NVME_NUM_IOCS_COMBINATIONS: u32 = 512;
pub const NVME_AQ_DEPTH: u32 = 32;
pub const NVME_NR_AEN_COMMANDS: u32 = 1;
pub const NVME_AQ_BLK_MQ_DEPTH: u32 = 31;
pub const NVME_AQ_MQ_TAG_DEPTH: u32 = 30;
pub const NVME_NVM_IOSQES: u32 = 6;
pub const NVME_NVM_IOCQES: u32 = 4;
pub const NVME_NIDT_EUI64_LEN: u32 = 8;
pub const NVME_NIDT_NGUID_LEN: u32 = 16;
pub const NVME_NIDT_UUID_LEN: u32 = 16;
pub const NVME_NIDT_CSI_LEN: u32 = 1;
pub const NVME_MAX_NVMSET: u32 = 31;
pub const NVME_MAX_UUID_ENTRIES: u32 = 128;
pub const NVME_MAX_CHANGED_NAMESPACES: u32 = 1024;
pub const NVME_ANA_LOG_RGO: u32 = 1;
pub const NVME_DSM_MAX_RANGES: u32 = 256;
pub const NVME_IDENTIFY_DATA_SIZE: u32 = 4096;
pub const NVME_CNTLID_MIN: u32 = 1;
pub const NVME_CNTLID_MAX: u32 = 65519;
pub const NVME_CNTLID_DYNAMIC: u32 = 65535;
pub const NVME_ZNS_CHANGED_ZONES_MAX: u32 = 511;
pub const NVM_TTYPE_NAME_MAX: u32 = 48;
pub const NVM_TTYPE_MAX: u32 = 63;
pub const NVM_MMTYPE_LEN: u32 = 8;
pub const NVM_CTRL_FILE: &[u8; 22] = b"/dev/lightnvm/control\0";
pub const NVM_IOCTL: u8 = 76u8;
pub const NVM_VERSION_MAJOR: u32 = 1;
pub const NVM_VERSION_MINOR: u32 = 0;
pub const NVM_VERSION_PATCHLEVEL: u32 = 0;
pub type __u8 = ::std::os::raw::c_uchar;
pub type __u16 = ::std::os::raw::c_ushort;
pub type __u32 = ::std::os::raw::c_uint;
pub type __u64 = ::std::os::raw::c_ulonglong;
pub type __le16 = __u16;
pub type __le32 = __u32;
pub type __le64 = __u64;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_subsys_type {
NVME_NQN_DISC = 1,
NVME_NQN_NVME = 2,
}
pub const NVME_IOCS_NVM: _bindgen_ty_8 = _bindgen_ty_8::NVME_IOCS_NVM;
pub const NVME_IOCS_ZONED: _bindgen_ty_8 = _bindgen_ty_8::NVME_IOCS_ZONED;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_8 {
NVME_IOCS_NVM = 0,
NVME_IOCS_ZONED = 2,
}
pub const NVME_REG_CAP: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CAP;
pub const NVME_REG_VS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_VS;
pub const NVME_REG_INTMS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_INTMS;
pub const NVME_REG_INTMC: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_INTMC;
pub const NVME_REG_CC: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CC;
pub const NVME_REG_CSTS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CSTS;
pub const NVME_REG_NSSR: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_NSSR;
pub const NVME_REG_AQA: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_AQA;
pub const NVME_REG_ASQ: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_ASQ;
pub const NVME_REG_ACQ: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_ACQ;
pub const NVME_REG_CMBLOC: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CMBLOC;
pub const NVME_REG_CMBSZ: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CMBSZ;
pub const NVME_REG_BPINFO: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_BPINFO;
pub const NVME_REG_BPRSEL: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_BPRSEL;
pub const NVME_REG_BPMBL: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_BPMBL;
pub const NVME_REG_CMBMSC: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CMBMSC;
pub const NVME_REG_CMBSTS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_CMBSTS;
pub const NVME_REG_PMRCAP: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRCAP;
pub const NVME_REG_PMRCTL: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRCTL;
pub const NVME_REG_PMRSTS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRSTS;
pub const NVME_REG_PMREBS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMREBS;
pub const NVME_REG_PMRSWTP: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRSWTP;
pub const NVME_REG_PMRMSCL: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRMSCL;
pub const NVME_REG_PMRMSCU: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_PMRMSCU;
pub const NVME_REG_DBS: _bindgen_ty_9 = _bindgen_ty_9::NVME_REG_DBS;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_9 {
NVME_REG_CAP = 0,
NVME_REG_VS = 8,
NVME_REG_INTMS = 12,
NVME_REG_INTMC = 16,
NVME_REG_CC = 20,
NVME_REG_CSTS = 28,
NVME_REG_NSSR = 32,
NVME_REG_AQA = 36,
NVME_REG_ASQ = 40,
NVME_REG_ACQ = 48,
NVME_REG_CMBLOC = 56,
NVME_REG_CMBSZ = 60,
NVME_REG_BPINFO = 64,
NVME_REG_BPRSEL = 68,
NVME_REG_BPMBL = 72,
NVME_REG_CMBMSC = 80,
NVME_REG_CMBSTS = 88,
NVME_REG_PMRCAP = 3584,
NVME_REG_PMRCTL = 3588,
NVME_REG_PMRSTS = 3592,
NVME_REG_PMREBS = 3596,
NVME_REG_PMRSWTP = 3600,
NVME_REG_PMRMSCL = 3604,
NVME_REG_PMRMSCU = 3608,
NVME_REG_DBS = 4096,
}
pub const NVME_CC_ENABLE: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_ENABLE;
pub const NVME_CC_CSS_NVM: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_NVM;
pub const NVME_CC_EN_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_NVM;
pub const NVME_CC_CSS_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_SHIFT;
pub const NVME_CC_MPS_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_MPS_SHIFT;
pub const NVME_CC_AMS_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_AMS_SHIFT;
pub const NVME_CC_SHN_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_SHN_SHIFT;
pub const NVME_CC_IOSQES_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_IOSQES_SHIFT;
pub const NVME_CC_IOCQES_SHIFT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_IOCQES_SHIFT;
pub const NVME_CC_AMS_RR: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_NVM;
pub const NVME_CC_AMS_WRRU: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_AMS_WRRU;
pub const NVME_CC_AMS_VS: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_AMS_VS;
pub const NVME_CC_SHN_NONE: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_NVM;
pub const NVME_CC_SHN_NORMAL: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_SHN_NORMAL;
pub const NVME_CC_SHN_ABRUPT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_SHN_ABRUPT;
pub const NVME_CC_SHN_MASK: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_SHN_MASK;
pub const NVME_CC_IOSQES: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_IOSQES;
pub const NVME_CC_IOCQES: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_IOCQES;
pub const NVME_CSTS_RDY: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_ENABLE;
pub const NVME_CSTS_CFS: _bindgen_ty_10 = _bindgen_ty_10::NVME_CSTS_CFS;
pub const NVME_CSTS_NSSRO: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_IOSQES_SHIFT;
pub const NVME_CSTS_PP: _bindgen_ty_10 = _bindgen_ty_10::NVME_CSTS_PP;
pub const NVME_CSTS_SHST_NORMAL: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_NVM;
pub const NVME_CSTS_SHST_OCCUR: _bindgen_ty_10 = _bindgen_ty_10::NVME_CC_CSS_SHIFT;
pub const NVME_CSTS_SHST_CMPLT: _bindgen_ty_10 = _bindgen_ty_10::NVME_CSTS_SHST_CMPLT;
pub const NVME_CSTS_SHST_MASK: _bindgen_ty_10 = _bindgen_ty_10::NVME_CSTS_SHST_MASK;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_10 {
NVME_CC_ENABLE = 1,
NVME_CC_CSS_NVM = 0,
NVME_CC_CSS_SHIFT = 4,
NVME_CC_MPS_SHIFT = 7,
NVME_CC_AMS_SHIFT = 11,
NVME_CC_SHN_SHIFT = 14,
NVME_CC_IOSQES_SHIFT = 16,
NVME_CC_IOCQES_SHIFT = 20,
NVME_CC_AMS_WRRU = 2048,
NVME_CC_AMS_VS = 14336,
NVME_CC_SHN_NORMAL = 16384,
NVME_CC_SHN_ABRUPT = 32768,
NVME_CC_SHN_MASK = 49152,
NVME_CC_IOSQES = 393216,
NVME_CC_IOCQES = 4194304,
NVME_CSTS_CFS = 2,
NVME_CSTS_PP = 32,
NVME_CSTS_SHST_CMPLT = 8,
NVME_CSTS_SHST_MASK = 12,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_power_state {
pub max_power: __le16,
pub rsvd2: __u8,
pub flags: __u8,
pub entry_lat: __le32,
pub exit_lat: __le32,
pub read_tput: __u8,
pub read_lat: __u8,
pub write_tput: __u8,
pub write_lat: __u8,
pub idle_power: __le16,
pub idle_scale: __u8,
pub rsvd19: __u8,
pub active_power: __le16,
pub active_work_scale: __u8,
pub rsvd23: [__u8; 9usize],
}
pub const NVME_PS_FLAGS_MAX_POWER_SCALE: _bindgen_ty_11 =
_bindgen_ty_11::NVME_PS_FLAGS_MAX_POWER_SCALE;
pub const NVME_PS_FLAGS_NON_OP_STATE: _bindgen_ty_11 = _bindgen_ty_11::NVME_PS_FLAGS_NON_OP_STATE;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_11 {
NVME_PS_FLAGS_MAX_POWER_SCALE = 1,
NVME_PS_FLAGS_NON_OP_STATE = 2,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_ctrl {
pub vid: __le16,
pub ssvid: __le16,
pub sn: [::std::os::raw::c_char; 20usize],
pub mn: [::std::os::raw::c_char; 40usize],
pub fr: [::std::os::raw::c_char; 8usize],
pub rab: __u8,
pub ieee: [__u8; 3usize],
pub cmic: __u8,
pub mdts: __u8,
pub cntlid: __le16,
pub ver: __le32,
pub rtd3r: __le32,
pub rtd3e: __le32,
pub oaes: __le32,
pub ctratt: __le32,
pub rrls: __le16,
pub rsvd102: [__u8; 9usize],
pub cntrltype: __u8,
pub fguid: [::std::os::raw::c_char; 16usize],
pub crdt1: __le16,
pub crdt2: __le16,
pub crdt3: __le16,
pub rsvd134: [__u8; 119usize],
pub nvmsr: __u8,
pub vwci: __u8,
pub mec: __u8,
pub oacs: __le16,
pub acl: __u8,
pub aerl: __u8,
pub frmw: __u8,
pub lpa: __u8,
pub elpe: __u8,
pub npss: __u8,
pub avscc: __u8,
pub apsta: __u8,
pub wctemp: __le16,
pub cctemp: __le16,
pub mtfa: __le16,
pub hmpre: __le32,
pub hmmin: __le32,
pub tnvmcap: [__u8; 16usize],
pub unvmcap: [__u8; 16usize],
pub rpmbs: __le32,
pub edstt: __le16,
pub dsto: __u8,
pub fwug: __u8,
pub kas: __le16,
pub hctma: __le16,
pub mntmt: __le16,
pub mxtmt: __le16,
pub sanicap: __le32,
pub hmminds: __le32,
pub hmmaxd: __le16,
pub nsetidmax: __le16,
pub endgidmax: __le16,
pub anatt: __u8,
pub anacap: __u8,
pub anagrpmax: __le32,
pub nanagrpid: __le32,
pub pels: __le32,
pub domainid: __le16,
pub rsvd358: [__u8; 10usize],
pub megcap: [__u8; 16usize],
pub rsvd384: [__u8; 128usize],
pub sqes: __u8,
pub cqes: __u8,
pub maxcmd: __le16,
pub nn: __le32,
pub oncs: __le16,
pub fuses: __le16,
pub fna: __u8,
pub vwc: __u8,
pub awun: __le16,
pub awupf: __le16,
pub icsvscc: __u8,
pub nwpc: __u8,
pub acwu: __le16,
pub ocfs: __le16,
pub sgls: __le32,
pub mnan: __le32,
pub maxdna: [__u8; 16usize],
pub maxcna: __le32,
pub rsvd564: [__u8; 204usize],
pub subnqn: [::std::os::raw::c_char; 256usize],
pub rsvd1024: [__u8; 768usize],
pub ioccsz: __le32,
pub iorcsz: __le32,
pub icdoff: __le16,
pub fcatt: __u8,
pub msdbd: __u8,
pub ofcs: __le16,
pub rsvd1806: [__u8; 242usize],
pub psd: [nvme_id_power_state; 32usize],
pub vs: [__u8; 1024usize],
}
impl Default for nvme_id_ctrl {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_CTRL_ONCS_COMPARE: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_COMPARE;
pub const NVME_CTRL_ONCS_WRITE_UNCORRECTABLE: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_ONCS_WRITE_UNCORRECTABLE;
pub const NVME_CTRL_ONCS_DSM: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_DSM;
pub const NVME_CTRL_ONCS_WRITE_ZEROES: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_WRITE_ZEROES;
pub const NVME_CTRL_ONCS_TIMESTAMP: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_TIMESTAMP;
pub const NVME_CTRL_VWC_PRESENT: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_COMPARE;
pub const NVME_CTRL_OACS_SEC_SUPP: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_COMPARE;
pub const NVME_CTRL_OACS_DIRECTIVES: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_OACS_DIRECTIVES;
pub const NVME_CTRL_OACS_DBBUF_SUPP: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_OACS_DBBUF_SUPP;
pub const NVME_CTRL_LPA_CMD_EFFECTS_LOG: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_ONCS_WRITE_UNCORRECTABLE;
pub const NVME_CTRL_CTRATT_128_ID: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_COMPARE;
pub const NVME_CTRL_CTRATT_NON_OP_PSP: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_ONCS_WRITE_UNCORRECTABLE;
pub const NVME_CTRL_CTRATT_NVM_SETS: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_ONCS_DSM;
pub const NVME_CTRL_CTRATT_READ_RECV_LVLS: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_ONCS_WRITE_ZEROES;
pub const NVME_CTRL_CTRATT_ENDURANCE_GROUPS: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_CTRATT_ENDURANCE_GROUPS;
pub const NVME_CTRL_CTRATT_PREDICTABLE_LAT: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_OACS_DIRECTIVES;
pub const NVME_CTRL_CTRATT_NAMESPACE_GRANULARITY: _bindgen_ty_12 =
_bindgen_ty_12::NVME_CTRL_CTRATT_NAMESPACE_GRANULARITY;
pub const NVME_CTRL_CTRATT_UUID_LIST: _bindgen_ty_12 = _bindgen_ty_12::NVME_CTRL_CTRATT_UUID_LIST;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_12 {
NVME_CTRL_ONCS_COMPARE = 1,
NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 2,
NVME_CTRL_ONCS_DSM = 4,
NVME_CTRL_ONCS_WRITE_ZEROES = 8,
NVME_CTRL_ONCS_TIMESTAMP = 64,
NVME_CTRL_OACS_DIRECTIVES = 32,
NVME_CTRL_OACS_DBBUF_SUPP = 256,
NVME_CTRL_CTRATT_ENDURANCE_GROUPS = 16,
NVME_CTRL_CTRATT_NAMESPACE_GRANULARITY = 128,
NVME_CTRL_CTRATT_UUID_LIST = 512,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lbaf {
pub ms: __le16,
pub ds: __u8,
pub rp: __u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_ns {
pub nsze: __le64,
pub ncap: __le64,
pub nuse: __le64,
pub nsfeat: __u8,
pub nlbaf: __u8,
pub flbas: __u8,
pub mc: __u8,
pub dpc: __u8,
pub dps: __u8,
pub nmic: __u8,
pub rescap: __u8,
pub fpi: __u8,
pub dlfeat: __u8,
pub nawun: __le16,
pub nawupf: __le16,
pub nacwu: __le16,
pub nabsn: __le16,
pub nabo: __le16,
pub nabspf: __le16,
pub noiob: __le16,
pub nvmcap: [__u8; 16usize],
pub npwg: __le16,
pub npwa: __le16,
pub npdg: __le16,
pub npda: __le16,
pub nows: __le16,
pub mssrl: __le16,
pub mcl: __le32,
pub msrc: __u8,
pub rsvd81: [__u8; 11usize],
pub anagrpid: __le32,
pub rsvd96: [__u8; 3usize],
pub nsattr: __u8,
pub nvmsetid: __le16,
pub endgid: __le16,
pub nguid: [__u8; 16usize],
pub eui64: [__u8; 8usize],
pub lbaf: [nvme_lbaf; 64usize],
pub vs: [__u8; 3712usize],
}
impl Default for nvme_id_ns {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_cmd_set_independent_id_ns {
pub nsfeat: __u8,
pub nmic: __u8,
pub rescap: __u8,
pub fpi: __u8,
pub anagrpid: __le32,
pub nsattr: __u8,
pub rsvd9: __u8,
pub nvmsetid: __le16,
pub endgid: __le16,
pub nstat: __u8,
pub rsvd15: [__u8; 4081usize],
}
impl Default for nvme_cmd_set_independent_id_ns {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_iocs {
pub iocs: [__le64; 512usize],
}
impl Default for nvme_id_iocs {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_ID_CNS_NS: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS;
pub const NVME_ID_CNS_CTRL: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CTRL;
pub const NVME_ID_CNS_NS_ACTIVE_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS_ACTIVE_LIST;
pub const NVME_ID_CNS_NS_DESC_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS_DESC_LIST;
pub const NVME_ID_CNS_NVMSET_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NVMSET_LIST;
pub const NVME_ID_CNS_CSI_ID_NS: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CSI_ID_NS;
pub const NVME_ID_CNS_CSI_ID_CTRL: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CSI_ID_CTRL;
pub const NVME_ID_CNS_CSI_NS_ACTIVE_LIST: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_CSI_NS_ACTIVE_LIST;
pub const NVME_ID_CNS_CS_INDEPENDENT_ID_NS: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_CS_INDEPENDENT_ID_NS;
pub const NVME_ID_CNS_NS_PRESENT_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS_PRESENT_LIST;
pub const NVME_ID_CNS_NS_PRESENT: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS_PRESENT;
pub const NVME_ID_CNS_CTRL_NS_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CTRL_NS_LIST;
pub const NVME_ID_CNS_CTRL_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CTRL_LIST;
pub const NVME_ID_CNS_PRIMARY_CTRL_CAPS: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_PRIMARY_CTRL_CAPS;
pub const NVME_ID_CNS_SCNDRY_CTRL_LIST: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_SCNDRY_CTRL_LIST;
pub const NVME_ID_CNS_NS_GRANULARITY: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_NS_GRANULARITY;
pub const NVME_ID_CNS_UUID_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_UUID_LIST;
pub const NVME_ID_CNS_DOMAIN_LIST: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_DOMAIN_LIST;
pub const NVME_ID_CNS_ENDURANCE_GROUP_ID: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_ENDURANCE_GROUP_ID;
pub const NVME_ID_CNS_CSI_NS_PRESENT_LIST: _bindgen_ty_13 =
_bindgen_ty_13::NVME_ID_CNS_CSI_NS_PRESENT_LIST;
pub const NVME_ID_CNS_CSI_NS_PRESENT: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CSI_NS_PRESENT;
pub const NVME_ID_CNS_CSI: _bindgen_ty_13 = _bindgen_ty_13::NVME_ID_CNS_CSI;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_13 {
NVME_ID_CNS_NS = 0,
NVME_ID_CNS_CTRL = 1,
NVME_ID_CNS_NS_ACTIVE_LIST = 2,
NVME_ID_CNS_NS_DESC_LIST = 3,
NVME_ID_CNS_NVMSET_LIST = 4,
NVME_ID_CNS_CSI_ID_NS = 5,
NVME_ID_CNS_CSI_ID_CTRL = 6,
NVME_ID_CNS_CSI_NS_ACTIVE_LIST = 7,
NVME_ID_CNS_CS_INDEPENDENT_ID_NS = 8,
NVME_ID_CNS_NS_PRESENT_LIST = 16,
NVME_ID_CNS_NS_PRESENT = 17,
NVME_ID_CNS_CTRL_NS_LIST = 18,
NVME_ID_CNS_CTRL_LIST = 19,
NVME_ID_CNS_PRIMARY_CTRL_CAPS = 20,
NVME_ID_CNS_SCNDRY_CTRL_LIST = 21,
NVME_ID_CNS_NS_GRANULARITY = 22,
NVME_ID_CNS_UUID_LIST = 23,
NVME_ID_CNS_DOMAIN_LIST = 24,
NVME_ID_CNS_ENDURANCE_GROUP_ID = 25,
NVME_ID_CNS_CSI_NS_PRESENT_LIST = 26,
NVME_ID_CNS_CSI_NS_PRESENT = 27,
NVME_ID_CNS_CSI = 28,
}
pub const NVME_DIR_IDENTIFY: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_IDENTIFY;
pub const NVME_DIR_STREAMS: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
pub const NVME_DIR_SND_ID_OP_ENABLE: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
pub const NVME_DIR_SND_ST_OP_REL_ID: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
pub const NVME_DIR_SND_ST_OP_REL_RSC: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_SND_ST_OP_REL_RSC;
pub const NVME_DIR_RCV_ID_OP_PARAM: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
pub const NVME_DIR_RCV_ST_OP_PARAM: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
pub const NVME_DIR_RCV_ST_OP_STATUS: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_SND_ST_OP_REL_RSC;
pub const NVME_DIR_RCV_ST_OP_RESOURCE: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_RCV_ST_OP_RESOURCE;
pub const NVME_DIR_ENDIR: _bindgen_ty_14 = _bindgen_ty_14::NVME_DIR_STREAMS;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_14 {
NVME_DIR_IDENTIFY = 0,
NVME_DIR_STREAMS = 1,
NVME_DIR_SND_ST_OP_REL_RSC = 2,
NVME_DIR_RCV_ST_OP_RESOURCE = 3,
}
pub const NVME_NS_FEAT_THIN: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FEAT_THIN;
pub const NVME_NS_FLBAS_LBA_MASK: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FLBAS_LBA_MASK;
pub const NVME_NS_FLBAS_META_EXT: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FLBAS_META_EXT;
pub const NVME_LBAF_RP_BEST: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_BEST;
pub const NVME_LBAF_RP_BETTER: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FEAT_THIN;
pub const NVME_LBAF_RP_GOOD: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_GOOD;
pub const NVME_LBAF_RP_DEGRADED: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_DEGRADED;
pub const NVME_NS_DPC_PI_LAST: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FLBAS_META_EXT;
pub const NVME_NS_DPC_PI_FIRST: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_DPC_PI_FIRST;
pub const NVME_NS_DPC_PI_TYPE3: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_DPC_PI_TYPE3;
pub const NVME_NS_DPC_PI_TYPE2: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_GOOD;
pub const NVME_NS_DPC_PI_TYPE1: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FEAT_THIN;
pub const NVME_NS_DPS_PI_FIRST: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_DPC_PI_FIRST;
pub const NVME_NS_DPS_PI_MASK: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_DPS_PI_MASK;
pub const NVME_NS_DPS_PI_TYPE1: _bindgen_ty_15 = _bindgen_ty_15::NVME_NS_FEAT_THIN;
pub const NVME_NS_DPS_PI_TYPE2: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_GOOD;
pub const NVME_NS_DPS_PI_TYPE3: _bindgen_ty_15 = _bindgen_ty_15::NVME_LBAF_RP_DEGRADED;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_15 {
NVME_NS_FEAT_THIN = 1,
NVME_NS_FLBAS_LBA_MASK = 15,
NVME_NS_FLBAS_META_EXT = 16,
NVME_LBAF_RP_BEST = 0,
NVME_LBAF_RP_GOOD = 2,
NVME_LBAF_RP_DEGRADED = 3,
NVME_NS_DPC_PI_FIRST = 8,
NVME_NS_DPC_PI_TYPE3 = 4,
NVME_NS_DPS_PI_MASK = 7,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_ns_id_desc {
pub nidt: __u8,
pub nidl: __u8,
pub reserved: __le16,
}
pub const NVME_NIDT_EUI64: _bindgen_ty_16 = _bindgen_ty_16::NVME_NIDT_EUI64;
pub const NVME_NIDT_NGUID: _bindgen_ty_16 = _bindgen_ty_16::NVME_NIDT_NGUID;
pub const NVME_NIDT_UUID: _bindgen_ty_16 = _bindgen_ty_16::NVME_NIDT_UUID;
pub const NVME_NIDT_CSI: _bindgen_ty_16 = _bindgen_ty_16::NVME_NIDT_CSI;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_16 {
NVME_NIDT_EUI64 = 1,
NVME_NIDT_NGUID = 2,
NVME_NIDT_UUID = 3,
NVME_NIDT_CSI = 4,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_nvmset_attr_entry {
pub id: __le16,
pub endurance_group_id: __le16,
pub rsvd4: [__u8; 4usize],
pub random_4k_read_typical: __le32,
pub opt_write_size: __le32,
pub total_nvmset_cap: [__u8; 16usize],
pub unalloc_nvmset_cap: [__u8; 16usize],
pub rsvd48: [__u8; 80usize],
}
impl Default for nvme_nvmset_attr_entry {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_nvmset {
pub nid: __u8,
pub rsvd1: [__u8; 127usize],
pub ent: [nvme_nvmset_attr_entry; 31usize],
}
impl Default for nvme_id_nvmset {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_ns_granularity_list_entry {
pub namespace_size_granularity: __le64,
pub namespace_capacity_granularity: __le64,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_ns_granularity_list {
pub attributes: __le32,
pub num_descriptors: __u8,
pub rsvd: [__u8; 27usize],
pub entry: [nvme_id_ns_granularity_list_entry; 16usize],
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_uuid_list_entry {
pub header: __u8,
pub rsvd1: [__u8; 15usize],
pub uuid: [__u8; 16usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_uuid_list {
pub entry: [nvme_id_uuid_list_entry; 128usize],
}
impl Default for nvme_id_uuid_list {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug)]
pub struct nvme_telemetry_log_page_hdr {
pub lpi: __u8,
pub rsvd: [__u8; 4usize],
pub iee_oui: [__u8; 3usize],
pub dalb1: __le16,
pub dalb2: __le16,
pub dalb3: __le16,
pub rsvd1: [__u8; 2usize],
pub dalb4: __le32,
pub rsvd2: [__u8; 362usize],
pub ctrlavail: __u8,
pub ctrldgn: __u8,
pub rsnident: [__u8; 128usize],
pub telemetry_dataarea: __IncompleteArrayField<__u8>,
}
impl Default for nvme_telemetry_log_page_hdr {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_endurance_group_log {
pub critical_warning: __u8,
pub rsvd1: [__u8; 2usize],
pub avl_spare: __u8,
pub avl_spare_threshold: __u8,
pub percent_used: __u8,
pub rsvd6: [__u8; 26usize],
pub endurance_estimate: [__u8; 16usize],
pub data_units_read: [__u8; 16usize],
pub data_units_written: [__u8; 16usize],
pub media_units_written: [__u8; 16usize],
pub host_read_cmds: [__u8; 16usize],
pub host_write_cmds: [__u8; 16usize],
pub media_data_integrity_err: [__u8; 16usize],
pub num_err_info_log_entries: [__u8; 16usize],
pub rsvd160: [__u8; 352usize],
}
impl Default for nvme_endurance_group_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_smart_log {
pub critical_warning: __u8,
pub temperature: [__u8; 2usize],
pub avail_spare: __u8,
pub spare_thresh: __u8,
pub percent_used: __u8,
pub endu_grp_crit_warn_sumry: __u8,
pub rsvd7: [__u8; 25usize],
pub data_units_read: [__u8; 16usize],
pub data_units_written: [__u8; 16usize],
pub host_reads: [__u8; 16usize],
pub host_writes: [__u8; 16usize],
pub ctrl_busy_time: [__u8; 16usize],
pub power_cycles: [__u8; 16usize],
pub power_on_hours: [__u8; 16usize],
pub unsafe_shutdowns: [__u8; 16usize],
pub media_errors: [__u8; 16usize],
pub num_err_log_entries: [__u8; 16usize],
pub warning_temp_time: __le32,
pub critical_comp_time: __le32,
pub temp_sensor: [__le16; 8usize],
pub thm_temp1_trans_count: __le32,
pub thm_temp2_trans_count: __le32,
pub thm_temp1_total_time: __le32,
pub thm_temp2_total_time: __le32,
pub rsvd232: [__u8; 280usize],
}
impl Default for nvme_smart_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C, packed)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_self_test_res {
pub dsts: __u8,
pub seg: __u8,
pub vdi: __u8,
pub rsvd3: __u8,
pub poh: __le64,
pub nsid: __le32,
pub flba: __le64,
pub sct: __u8,
pub sc: __u8,
pub vs: [__u8; 2usize],
}
pub const NVME_ST_CODE_SHIFT: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHIFT;
pub const NVME_ST_CODE_SHORT_OP: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHORT_OP;
pub const NVME_ST_CODE_EXT_OP: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_EXT_OP;
pub const NVME_ST_CODE_VS: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_VS;
pub const NVME_ST_RES_MASK: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_MASK;
pub const NVME_ST_RES_NO_ERR: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_NO_ERR;
pub const NVME_ST_RES_ABORTED: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHORT_OP;
pub const NVME_ST_RES_CLR: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_EXT_OP;
pub const NVME_ST_RES_NS_REMOVED: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_NS_REMOVED;
pub const NVME_ST_RES_ABORTED_FORMAT: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHIFT;
pub const NVME_ST_RES_FATAL_ERR: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_FATAL_ERR;
pub const NVME_ST_RES_UNKNOWN_SEG_FAIL: _bindgen_ty_17 =
_bindgen_ty_17::NVME_ST_RES_UNKNOWN_SEG_FAIL;
pub const NVME_ST_RES_KNOWN_SEG_FAIL: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_KNOWN_SEG_FAIL;
pub const NVME_ST_RES_ABORTED_UNKNOWN: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_ABORTED_UNKNOWN;
pub const NVME_ST_RES_ABORTED_SANITIZE: _bindgen_ty_17 =
_bindgen_ty_17::NVME_ST_RES_ABORTED_SANITIZE;
pub const NVME_ST_RES_NOT_USED: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_MASK;
pub const NVME_ST_VALID_NSID: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHORT_OP;
pub const NVME_ST_VALID_FLBA: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_EXT_OP;
pub const NVME_ST_VALID_SCT: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHIFT;
pub const NVME_ST_VALID_SC: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_RES_ABORTED_UNKNOWN;
pub const NVME_ST_REPORTS: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_REPORTS;
pub const NVME_ST_LOG_ENTRY_SIZE: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_LOG_ENTRY_SIZE;
pub const NVME_ST_LOG_HEAD_SIZE: _bindgen_ty_17 = _bindgen_ty_17::NVME_ST_CODE_SHIFT;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_17 {
NVME_ST_CODE_SHIFT = 4,
NVME_ST_CODE_SHORT_OP = 1,
NVME_ST_CODE_EXT_OP = 2,
NVME_ST_CODE_VS = 14,
NVME_ST_RES_MASK = 15,
NVME_ST_RES_NO_ERR = 0,
NVME_ST_RES_NS_REMOVED = 3,
NVME_ST_RES_FATAL_ERR = 5,
NVME_ST_RES_UNKNOWN_SEG_FAIL = 6,
NVME_ST_RES_KNOWN_SEG_FAIL = 7,
NVME_ST_RES_ABORTED_UNKNOWN = 8,
NVME_ST_RES_ABORTED_SANITIZE = 9,
NVME_ST_REPORTS = 20,
NVME_ST_LOG_ENTRY_SIZE = 28,
}
#[repr(C, packed)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_self_test_log {
pub crnt_dev_selftest_oprn: __u8,
pub crnt_dev_selftest_compln: __u8,
pub rsvd2: [__u8; 2usize],
pub result: [nvme_self_test_res; 20usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_fw_slot_info_log {
pub afi: __u8,
pub rsvd1: [__u8; 7usize],
pub frs: [__le64; 7usize],
pub rsvd64: [__u8; 448usize],
}
impl Default for nvme_fw_slot_info_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lba_status_desc {
pub dslba: __le64,
pub nlb: __le32,
pub rsvd_12: __u8,
pub status: __u8,
pub rsvd_15_14: [__u8; 2usize],
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_lba_status {
pub nlsd: __le32,
pub cmpc: __u8,
pub rsvd_7_5: [__u8; 3usize],
pub descs: __IncompleteArrayField<nvme_lba_status_desc>,
}
pub const NVME_NS_NO_WRITE_PROTECT: _bindgen_ty_18 = _bindgen_ty_18::NVME_NS_NO_WRITE_PROTECT;
pub const NVME_NS_WRITE_PROTECT: _bindgen_ty_18 = _bindgen_ty_18::NVME_NS_WRITE_PROTECT;
pub const NVME_NS_WRITE_PROTECT_POWER_CYCLE: _bindgen_ty_18 =
_bindgen_ty_18::NVME_NS_WRITE_PROTECT_POWER_CYCLE;
pub const NVME_NS_WRITE_PROTECT_PERMANENT: _bindgen_ty_18 =
_bindgen_ty_18::NVME_NS_WRITE_PROTECT_PERMANENT;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_18 {
NVME_NS_NO_WRITE_PROTECT = 0,
NVME_NS_WRITE_PROTECT = 1,
NVME_NS_WRITE_PROTECT_POWER_CYCLE = 2,
NVME_NS_WRITE_PROTECT_PERMANENT = 3,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_changed_ns_list_log {
pub log: [__le32; 1024usize],
}
impl Default for nvme_changed_ns_list_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_CMD_EFFECTS_CSUPP: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_CSUPP;
pub const NVME_CMD_EFFECTS_LBCC: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_LBCC;
pub const NVME_CMD_EFFECTS_NCC: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_NCC;
pub const NVME_CMD_EFFECTS_NIC: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_NIC;
pub const NVME_CMD_EFFECTS_CCC: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_CCC;
pub const NVME_CMD_EFFECTS_CSE_MASK: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_CSE_MASK;
pub const NVME_CMD_EFFECTS_UUID_SEL: _bindgen_ty_19 = _bindgen_ty_19::NVME_CMD_EFFECTS_UUID_SEL;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_19 {
NVME_CMD_EFFECTS_CSUPP = 1,
NVME_CMD_EFFECTS_LBCC = 2,
NVME_CMD_EFFECTS_NCC = 4,
NVME_CMD_EFFECTS_NIC = 8,
NVME_CMD_EFFECTS_CCC = 16,
NVME_CMD_EFFECTS_CSE_MASK = 196608,
NVME_CMD_EFFECTS_UUID_SEL = 524288,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_effects_log {
pub acs: [__le32; 256usize],
pub iocs: [__le32; 256usize],
pub resv: [__u8; 2048usize],
}
impl Default for nvme_effects_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_ana_state {
NVME_ANA_OPTIMIZED = 1,
NVME_ANA_NONOPTIMIZED = 2,
NVME_ANA_INACCESSIBLE = 3,
NVME_ANA_PERSISTENT_LOSS = 4,
NVME_ANA_CHANGE = 15,
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_ana_group_desc {
pub grpid: __le32,
pub nnsids: __le32,
pub chgcnt: __le64,
pub state: __u8,
pub rsvd17: [__u8; 15usize],
pub nsids: __IncompleteArrayField<__le32>,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_ana_rsp_hdr {
pub chgcnt: __le64,
pub ngrps: __le16,
pub rsvd10: [__le16; 3usize],
}
#[repr(C, packed)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_fw_commit_event {
pub old_fw_rev: __le64,
pub new_fw_rev: __le64,
pub fw_commit_action: __u8,
pub fw_slot: __u8,
pub sct_fw: __u8,
pub sc_fw: __u8,
pub vndr_assign_fw_commit_rc: __le16,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_time_stamp_change_event {
pub previous_timestamp: __le64,
pub ml_secs_since_reset: __le64,
}
#[repr(C, packed)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_power_on_reset_info_list {
pub cid: __le16,
pub fw_act: __u8,
pub op_in_prog: __u8,
pub rsvd4: [__u8; 12usize],
pub ctrl_power_cycle: __le32,
pub power_on_ml_seconds: __le64,
pub ctrl_time_stamp: __le64,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_nss_hw_err_event {
pub nss_hw_err_event_code: __le16,
pub rsvd2: [__u8; 2usize],
pub add_hw_err_info: *mut __u8,
}
impl Default for nvme_nss_hw_err_event {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_change_ns_event {
pub nsmgt_cdw10: __le32,
pub rsvd4: [__u8; 4usize],
pub nsze: __le64,
pub rsvd16: [__u8; 8usize],
pub nscap: __le64,
pub flbas: __u8,
pub dps: __u8,
pub nmic: __u8,
pub rsvd35: __u8,
pub ana_grp_id: __le32,
pub nvmset_id: __le16,
pub rsvd42: __le16,
pub nsid: __le32,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_format_nvm_start_event {
pub nsid: __le32,
pub fna: __u8,
pub rsvd5: [__u8; 3usize],
pub format_nvm_cdw10: __le32,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_format_nvm_compln_event {
pub nsid: __le32,
pub smallest_fpi: __u8,
pub format_nvm_status: __u8,
pub compln_info: __le16,
pub status_field: __le32,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_sanitize_start_event {
pub sani_cap: __le32,
pub sani_cdw10: __le32,
pub sani_cdw11: __le32,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_sanitize_compln_event {
pub sani_prog: __le16,
pub sani_status: __le16,
pub cmpln_info: __le16,
pub rsvd6: [__u8; 2usize],
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_thermal_exc_event {
pub over_temp: __u8,
pub threshold: __u8,
}
#[repr(C, packed)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_persistent_event_entry_head {
pub etype: __u8,
pub etype_rev: __u8,
pub ehl: __u8,
pub rsvd3: __u8,
pub ctrl_id: __le16,
pub etimestamp: __le64,
pub rsvd14: [__u8; 6usize],
pub vsil: __le16,
pub el: __le16,
}
#[repr(C, packed)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_persistent_event_log_head {
pub log_id: __u8,
pub rsvd1: [__u8; 3usize],
pub tnev: __le32,
pub tll: __le64,
pub log_rev: __u8,
pub rsvd17: __u8,
pub head_len: __le16,
pub timestamp: __le64,
pub poh: [__u8; 16usize],
pub pcc: __le64,
pub vid: __le16,
pub ssvid: __le16,
pub sn: [__u8; 20usize],
pub mn: [__u8; 40usize],
pub subnqn: [__u8; 256usize],
pub gen_number: __le16,
pub rci: __le32,
pub rsvd378: [__u8; 102usize],
pub supp_event_bm: [__u8; 32usize],
}
impl Default for nvme_persistent_event_log_head {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_persistent_event_types {
NVME_SMART_HEALTH_EVENT = 1,
NVME_FW_COMMIT_EVENT = 2,
NVME_TIMESTAMP_EVENT = 3,
NVME_POWER_ON_RESET_EVENT = 4,
NVME_NSS_HW_ERROR_EVENT = 5,
NVME_CHANGE_NS_EVENT = 6,
NVME_FORMAT_START_EVENT = 7,
NVME_FORMAT_COMPLETION_EVENT = 8,
NVME_SANITIZE_START_EVENT = 9,
NVME_SANITIZE_COMPLETION_EVENT = 10,
NVME_THERMAL_EXCURSION_EVENT = 13,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_persistent_event_log_actions {
NVME_PEVENT_LOG_READ = 0,
NVME_PEVENT_LOG_EST_CTX_AND_READ = 1,
NVME_PEVENT_LOG_RELEASE_CTX = 2,
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_event_agg_log_page {
pub num_entries: __le64,
pub entries: __IncompleteArrayField<__le16>,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_predlat_per_nvmset_log_page {
pub status: __u8,
pub rsvd1: __u8,
pub event_type: __le16,
pub rsvd4: [__u8; 28usize],
pub dtwin_rtyp: __le64,
pub dtwin_wtyp: __le64,
pub dtwin_timemax: __le64,
pub ndwin_timemin_high: __le64,
pub ndwin_timemin_low: __le64,
pub rsvd72: [__u8; 56usize],
pub dtwin_restimate: __le64,
pub dtwin_westimate: __le64,
pub dtwin_testimate: __le64,
pub rsvd152: [__u8; 360usize],
}
impl Default for nvme_predlat_per_nvmset_log_page {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lba_status_range_desc {
pub rslba: __le64,
pub rnlb: __le32,
pub rsvd12: [__u8; 4usize],
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lba_status_ns_element {
pub neid: __le32,
pub nlrd: __le32,
pub ratype: __u8,
pub rsvd9: [__u8; 7usize],
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lba_status_hdr {
pub lslplen: __le32,
pub nlslne: __le32,
pub estulb: __le32,
pub rsvd12: [__u8; 2usize],
pub lsgc: __le16,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_resv_notif_log {
pub log_page_count: __le64,
pub resv_notif_log_type: __u8,
pub num_logs: __u8,
pub rsvd10: [__u8; 2usize],
pub nsid: __le32,
pub rsvd16: [__u8; 48usize],
}
impl Default for nvme_resv_notif_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_boot_part_hdr {
pub lid: __u8,
pub rsvd1: [__u8; 3usize],
pub bpinfo: __le32,
pub rsvd8: [__u8; 8usize],
}
pub const NVME_SMART_CRIT_SPARE: _bindgen_ty_20 = _bindgen_ty_20::NVME_SMART_CRIT_SPARE;
pub const NVME_SMART_CRIT_TEMPERATURE: _bindgen_ty_20 = _bindgen_ty_20::NVME_SMART_CRIT_TEMPERATURE;
pub const NVME_SMART_CRIT_RELIABILITY: _bindgen_ty_20 = _bindgen_ty_20::NVME_SMART_CRIT_RELIABILITY;
pub const NVME_SMART_CRIT_MEDIA: _bindgen_ty_20 = _bindgen_ty_20::NVME_SMART_CRIT_MEDIA;
pub const NVME_SMART_CRIT_VOLATILE_MEMORY: _bindgen_ty_20 =
_bindgen_ty_20::NVME_SMART_CRIT_VOLATILE_MEMORY;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_20 {
NVME_SMART_CRIT_SPARE = 1,
NVME_SMART_CRIT_TEMPERATURE = 2,
NVME_SMART_CRIT_RELIABILITY = 4,
NVME_SMART_CRIT_MEDIA = 8,
NVME_SMART_CRIT_VOLATILE_MEMORY = 16,
}
pub const NVME_AER_ERROR: _bindgen_ty_21 = _bindgen_ty_21::NVME_AER_ERROR;
pub const NVME_AER_SMART: _bindgen_ty_21 = _bindgen_ty_21::NVME_AER_SMART;
pub const NVME_AER_CSS: _bindgen_ty_21 = _bindgen_ty_21::NVME_AER_CSS;
pub const NVME_AER_VS: _bindgen_ty_21 = _bindgen_ty_21::NVME_AER_VS;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_21 {
NVME_AER_ERROR = 0,
NVME_AER_SMART = 1,
NVME_AER_CSS = 6,
NVME_AER_VS = 7,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_lba_range_type {
pub type_: __u8,
pub attributes: __u8,
pub rsvd2: [__u8; 14usize],
pub slba: __le64,
pub nlb: __le64,
pub guid: [__u8; 16usize],
pub rsvd48: [__u8; 16usize],
}
pub const NVME_LBART_TYPE_FS: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_FS;
pub const NVME_LBART_TYPE_RAID: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_RAID;
pub const NVME_LBART_TYPE_CACHE: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_CACHE;
pub const NVME_LBART_TYPE_SWAP: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_SWAP;
pub const NVME_LBART_ATTRIB_TEMP: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_FS;
pub const NVME_LBART_ATTRIB_HIDE: _bindgen_ty_22 = _bindgen_ty_22::NVME_LBART_TYPE_RAID;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_22 {
NVME_LBART_TYPE_FS = 1,
NVME_LBART_TYPE_RAID = 2,
NVME_LBART_TYPE_CACHE = 3,
NVME_LBART_TYPE_SWAP = 4,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_plm_config {
pub enable_event: __le16,
pub rsvd2: [__u8; 30usize],
pub dtwin_reads_thresh: __le64,
pub dtwin_writes_thresh: __le64,
pub dtwin_time_thresh: __le64,
pub rsvd56: [__u8; 456usize],
}
impl Default for nvme_plm_config {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_reservation_status {
pub gen_: __le32,
pub rtype: __u8,
pub regctl: [__u8; 2usize],
pub resv5: [__u8; 2usize],
pub ptpls: __u8,
pub resv10: [__u8; 13usize],
pub regctl_ds: __IncompleteArrayField<nvme_reservation_status__bindgen_ty_1>,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_reservation_status__bindgen_ty_1 {
pub cntlid: __le16,
pub rcsts: __u8,
pub resv3: [__u8; 5usize],
pub hostid: __le64,
pub rkey: __le64,
}
#[repr(C)]
#[derive(Debug)]
pub struct nvme_reservation_status_ext {
pub gen_: __le32,
pub rtype: __u8,
pub regctl: [__u8; 2usize],
pub resv5: [__u8; 2usize],
pub ptpls: __u8,
pub resv10: [__u8; 14usize],
pub resv24: [__u8; 40usize],
pub regctl_eds: __IncompleteArrayField<nvme_reservation_status_ext__bindgen_ty_1>,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_reservation_status_ext__bindgen_ty_1 {
pub cntlid: __le16,
pub rcsts: __u8,
pub resv3: [__u8; 5usize],
pub rkey: __le64,
pub hostid: [__u8; 16usize],
pub resv32: [__u8; 32usize],
}
impl Default for nvme_reservation_status_ext {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_async_event_type {
NVME_AER_TYPE_ERROR = 0,
NVME_AER_TYPE_SMART = 1,
NVME_AER_TYPE_NOTICE = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_opcode {
nvme_cmd_flush = 0,
nvme_cmd_write = 1,
nvme_cmd_read = 2,
nvme_cmd_write_uncor = 4,
nvme_cmd_compare = 5,
nvme_cmd_write_zeroes = 8,
nvme_cmd_dsm = 9,
nvme_cmd_verify = 12,
nvme_cmd_resv_register = 13,
nvme_cmd_resv_report = 14,
nvme_cmd_resv_acquire = 17,
nvme_cmd_resv_release = 21,
nvme_cmd_copy = 25,
nvme_zns_cmd_mgmt_send = 121,
nvme_zns_cmd_mgmt_recv = 122,
nvme_zns_cmd_append = 125,
}
pub const NVME_SGL_FMT_ADDRESS: _bindgen_ty_23 = _bindgen_ty_23::NVME_SGL_FMT_ADDRESS;
pub const NVME_SGL_FMT_OFFSET: _bindgen_ty_23 = _bindgen_ty_23::NVME_SGL_FMT_OFFSET;
pub const NVME_SGL_FMT_TRANSPORT_A: _bindgen_ty_23 = _bindgen_ty_23::NVME_SGL_FMT_TRANSPORT_A;
pub const NVME_SGL_FMT_INVALIDATE: _bindgen_ty_23 = _bindgen_ty_23::NVME_SGL_FMT_INVALIDATE;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_23 {
NVME_SGL_FMT_ADDRESS = 0,
NVME_SGL_FMT_OFFSET = 1,
NVME_SGL_FMT_TRANSPORT_A = 10,
NVME_SGL_FMT_INVALIDATE = 15,
}
pub const NVME_SGL_FMT_DATA_DESC: _bindgen_ty_24 = _bindgen_ty_24::NVME_SGL_FMT_DATA_DESC;
pub const NVME_SGL_FMT_SEG_DESC: _bindgen_ty_24 = _bindgen_ty_24::NVME_SGL_FMT_SEG_DESC;
pub const NVME_SGL_FMT_LAST_SEG_DESC: _bindgen_ty_24 = _bindgen_ty_24::NVME_SGL_FMT_LAST_SEG_DESC;
pub const NVME_KEY_SGL_FMT_DATA_DESC: _bindgen_ty_24 = _bindgen_ty_24::NVME_KEY_SGL_FMT_DATA_DESC;
pub const NVME_TRANSPORT_SGL_DATA_DESC: _bindgen_ty_24 =
_bindgen_ty_24::NVME_TRANSPORT_SGL_DATA_DESC;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_24 {
NVME_SGL_FMT_DATA_DESC = 0,
NVME_SGL_FMT_SEG_DESC = 2,
NVME_SGL_FMT_LAST_SEG_DESC = 3,
NVME_KEY_SGL_FMT_DATA_DESC = 4,
NVME_TRANSPORT_SGL_DATA_DESC = 5,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_sgl_desc {
pub addr: __le64,
pub length: __le32,
pub rsvd: [__u8; 3usize],
pub type_: __u8,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_keyed_sgl_desc {
pub addr: __le64,
pub length: [__u8; 3usize],
pub key: [__u8; 4usize],
pub type_: __u8,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union nvme_data_ptr {
pub __bindgen_anon_1: nvme_data_ptr__bindgen_ty_1,
pub sgl: nvme_sgl_desc,
pub ksgl: nvme_keyed_sgl_desc,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_data_ptr__bindgen_ty_1 {
pub prp1: __le64,
pub prp2: __le64,
}
impl Default for nvme_data_ptr {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_CMD_FUSE_FIRST: _bindgen_ty_25 = _bindgen_ty_25::NVME_CMD_FUSE_FIRST;
pub const NVME_CMD_FUSE_SECOND: _bindgen_ty_25 = _bindgen_ty_25::NVME_CMD_FUSE_SECOND;
pub const NVME_CMD_SGL_METABUF: _bindgen_ty_25 = _bindgen_ty_25::NVME_CMD_SGL_METABUF;
pub const NVME_CMD_SGL_METASEG: _bindgen_ty_25 = _bindgen_ty_25::NVME_CMD_SGL_METASEG;
pub const NVME_CMD_SGL_ALL: _bindgen_ty_25 = _bindgen_ty_25::NVME_CMD_SGL_ALL;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_25 {
NVME_CMD_FUSE_FIRST = 1,
NVME_CMD_FUSE_SECOND = 2,
NVME_CMD_SGL_METABUF = 64,
NVME_CMD_SGL_METASEG = 128,
NVME_CMD_SGL_ALL = 192,
}
pub const NVME_RW_LR: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_LR;
pub const NVME_RW_FUA: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_FUA;
pub const NVME_RW_DEAC: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DEAC;
pub const NVME_RW_DSM_FREQ_UNSPEC: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_UNSPEC;
pub const NVME_RW_DSM_FREQ_TYPICAL: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_TYPICAL;
pub const NVME_RW_DSM_FREQ_RARE: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_RARE;
pub const NVME_RW_DSM_FREQ_READS: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_READS;
pub const NVME_RW_DSM_FREQ_WRITES: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_WRITES;
pub const NVME_RW_DSM_FREQ_RW: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_RW;
pub const NVME_RW_DSM_FREQ_ONCE: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_ONCE;
pub const NVME_RW_DSM_FREQ_PREFETCH: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_PREFETCH;
pub const NVME_RW_DSM_FREQ_TEMP: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_TEMP;
pub const NVME_RW_DSM_LATENCY_NONE: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_FREQ_UNSPEC;
pub const NVME_RW_DSM_LATENCY_IDLE: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_LATENCY_IDLE;
pub const NVME_RW_DSM_LATENCY_NORM: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_LATENCY_NORM;
pub const NVME_RW_DSM_LATENCY_LOW: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_LATENCY_LOW;
pub const NVME_RW_DSM_SEQ_REQ: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_SEQ_REQ;
pub const NVME_RW_DSM_COMPRESSED: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_COMPRESSED;
pub const NVME_RW_PIREMAP: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DEAC;
pub const NVME_RW_PRINFO_PRCHK_REF: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_PRINFO_PRCHK_REF;
pub const NVME_RW_PRINFO_PRCHK_APP: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_PRINFO_PRCHK_APP;
pub const NVME_RW_PRINFO_PRCHK_GUARD: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_PRINFO_PRCHK_GUARD;
pub const NVME_RW_PRINFO_PRACT: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_PRINFO_PRACT;
pub const NVME_RW_DTYPE_STREAMS: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_DSM_LATENCY_IDLE;
pub const NVME_RW_STORAGE_TAG_CHECK: _bindgen_ty_26 = _bindgen_ty_26::NVME_RW_STORAGE_TAG_CHECK;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_26 {
NVME_RW_LR = 32768,
NVME_RW_FUA = 16384,
NVME_RW_DEAC = 512,
NVME_RW_DSM_FREQ_UNSPEC = 0,
NVME_RW_DSM_FREQ_TYPICAL = 1,
NVME_RW_DSM_FREQ_RARE = 2,
NVME_RW_DSM_FREQ_READS = 3,
NVME_RW_DSM_FREQ_WRITES = 4,
NVME_RW_DSM_FREQ_RW = 5,
NVME_RW_DSM_FREQ_ONCE = 6,
NVME_RW_DSM_FREQ_PREFETCH = 7,
NVME_RW_DSM_FREQ_TEMP = 8,
NVME_RW_DSM_LATENCY_IDLE = 16,
NVME_RW_DSM_LATENCY_NORM = 32,
NVME_RW_DSM_LATENCY_LOW = 48,
NVME_RW_DSM_SEQ_REQ = 64,
NVME_RW_DSM_COMPRESSED = 128,
NVME_RW_PRINFO_PRCHK_REF = 1024,
NVME_RW_PRINFO_PRCHK_APP = 2048,
NVME_RW_PRINFO_PRCHK_GUARD = 4096,
NVME_RW_PRINFO_PRACT = 8192,
NVME_RW_STORAGE_TAG_CHECK = 256,
}
pub const NVME_DSMGMT_IDR: _bindgen_ty_27 = _bindgen_ty_27::NVME_DSMGMT_IDR;
pub const NVME_DSMGMT_IDW: _bindgen_ty_27 = _bindgen_ty_27::NVME_DSMGMT_IDW;
pub const NVME_DSMGMT_AD: _bindgen_ty_27 = _bindgen_ty_27::NVME_DSMGMT_AD;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_27 {
NVME_DSMGMT_IDR = 1,
NVME_DSMGMT_IDW = 2,
NVME_DSMGMT_AD = 4,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_dsm_range {
pub cattr: __le32,
pub nlb: __le32,
pub slba: __le64,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_copy_range {
pub rsvd0: [__u8; 8usize],
pub slba: __le64,
pub nlb: __le16,
pub rsvd18: [__u8; 6usize],
pub eilbrt: __le32,
pub elbatm: __le16,
pub elbat: __le16,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_feat_auto_pst {
pub entries: [__le64; 32usize],
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_mi_host_metadata_element_desc {
pub type_: __u8,
pub rev: __u8,
pub len: __u16,
pub val: __IncompleteArrayField<__u8>,
}
#[repr(C)]
#[derive(Debug, Default)]
pub struct nvme_mi_host_metadata {
pub ndesc: __u8,
pub rsvd1: __u8,
pub descs: __IncompleteArrayField<nvme_mi_host_metadata_element_desc>,
}
pub const NVME_MI_CTRL_METADATA_OS_CTRL_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_OS_CTRL_NAME;
pub const NVME_MI_CTRL_METADATA_OS_DRIVER_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_OS_DRIVER_NAME;
pub const NVME_MI_CTRL_METADATA_OS_DRIVER_VER: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_OS_DRIVER_VER;
pub const NVME_MI_CTRL_METADATA_PRE_BOOT_CTRL_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_PRE_BOOT_CTRL_NAME;
pub const NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_NAME;
pub const NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_VER: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_VER;
pub const NVME_MI_NS_METADATA_OS_NS_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_OS_CTRL_NAME;
pub const NVME_MI_NS_METADATA_PRE_BOOT_NS_NAME: _bindgen_ty_28 =
_bindgen_ty_28::NVME_MI_CTRL_METADATA_OS_DRIVER_NAME;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_28 {
NVME_MI_CTRL_METADATA_OS_CTRL_NAME = 1,
NVME_MI_CTRL_METADATA_OS_DRIVER_NAME = 2,
NVME_MI_CTRL_METADATA_OS_DRIVER_VER = 3,
NVME_MI_CTRL_METADATA_PRE_BOOT_CTRL_NAME = 4,
NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_NAME = 5,
NVME_MI_CTRL_METADATA_PRE_BOOT_DRIVER_VER = 6,
}
pub const NVME_HOST_MEM_ENABLE: _bindgen_ty_29 = _bindgen_ty_29::NVME_HOST_MEM_ENABLE;
pub const NVME_HOST_MEM_RETURN: _bindgen_ty_29 = _bindgen_ty_29::NVME_HOST_MEM_RETURN;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_29 {
NVME_HOST_MEM_ENABLE = 1,
NVME_HOST_MEM_RETURN = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_admin_opcode {
nvme_admin_delete_sq = 0,
nvme_admin_create_sq = 1,
nvme_admin_get_log_page = 2,
nvme_admin_delete_cq = 4,
nvme_admin_create_cq = 5,
nvme_admin_identify = 6,
nvme_admin_abort_cmd = 8,
nvme_admin_set_features = 9,
nvme_admin_get_features = 10,
nvme_admin_async_event = 12,
nvme_admin_ns_mgmt = 13,
nvme_admin_activate_fw = 16,
nvme_admin_download_fw = 17,
nvme_admin_dev_self_test = 20,
nvme_admin_ns_attach = 21,
nvme_admin_keep_alive = 24,
nvme_admin_directive_send = 25,
nvme_admin_directive_recv = 26,
nvme_admin_virtual_mgmt = 28,
nvme_admin_nvme_mi_send = 29,
nvme_admin_nvme_mi_recv = 30,
nvme_admin_capacity_mgmt = 32,
nvme_admin_lockdown_cmd = 36,
nvme_admin_dbbuf = 124,
nvme_admin_format_nvm = 128,
nvme_admin_security_send = 129,
nvme_admin_security_recv = 130,
nvme_admin_sanitize_nvm = 132,
nvme_admin_get_lba_status = 134,
}
pub const NVME_QUEUE_PHYS_CONTIG: _bindgen_ty_30 = _bindgen_ty_30::NVME_QUEUE_PHYS_CONTIG;
pub const NVME_CQ_IRQ_ENABLED: _bindgen_ty_30 = _bindgen_ty_30::NVME_CQ_IRQ_ENABLED;
pub const NVME_SQ_PRIO_URGENT: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_URGENT;
pub const NVME_SQ_PRIO_HIGH: _bindgen_ty_30 = _bindgen_ty_30::NVME_CQ_IRQ_ENABLED;
pub const NVME_SQ_PRIO_MEDIUM: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_MEDIUM;
pub const NVME_SQ_PRIO_LOW: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_LOW;
pub const NVME_LOG_SUPPORTED_PAGES: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_URGENT;
pub const NVME_LOG_ERROR: _bindgen_ty_30 = _bindgen_ty_30::NVME_QUEUE_PHYS_CONTIG;
pub const NVME_LOG_SMART: _bindgen_ty_30 = _bindgen_ty_30::NVME_CQ_IRQ_ENABLED;
pub const NVME_LOG_FW_SLOT: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_FW_SLOT;
pub const NVME_LOG_CHANGED_NS: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_MEDIUM;
pub const NVME_LOG_CMD_EFFECTS: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_CMD_EFFECTS;
pub const NVME_LOG_DEVICE_SELF_TEST: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_LOW;
pub const NVME_LOG_TELEMETRY_HOST: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_TELEMETRY_HOST;
pub const NVME_LOG_TELEMETRY_CTRL: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_TELEMETRY_CTRL;
pub const NVME_LOG_ENDURANCE_GROUP: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_ENDURANCE_GROUP;
pub const NVME_LOG_PRELAT_PER_NVMSET: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_PRELAT_PER_NVMSET;
pub const NVME_LOG_ANA: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_ANA;
pub const NVME_LOG_PRELAT_EVENT_AGG: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_PRELAT_EVENT_AGG;
pub const NVME_LOG_PERSISTENT_EVENT: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_PERSISTENT_EVENT;
pub const NVME_LOG_LBA_STATUS: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_LBA_STATUS;
pub const NVME_LOG_ENDURANCE_GROUP_EVENT_AGG: _bindgen_ty_30 =
_bindgen_ty_30::NVME_LOG_ENDURANCE_GROUP_EVENT_AGG;
pub const NVME_LOG_BOOT_PARTITION: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_BOOT_PARTITION;
pub const NVME_LOG_FID_SUPPORT_EFFECTS: _bindgen_ty_30 =
_bindgen_ty_30::NVME_LOG_FID_SUPPORT_EFFECTS;
pub const NVME_LOG_DISC: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_DISC;
pub const NVME_LOG_RESERVATION: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_RESERVATION;
pub const NVME_LOG_SANITIZE: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_SANITIZE;
pub const NVME_LOG_ZONE_CHANGED_LIST: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_ZONE_CHANGED_LIST;
pub const NVME_FWACT_REPL: _bindgen_ty_30 = _bindgen_ty_30::NVME_SQ_PRIO_URGENT;
pub const NVME_FWACT_REPL_ACTV: _bindgen_ty_30 = _bindgen_ty_30::NVME_LOG_TELEMETRY_CTRL;
pub const NVME_FWACT_ACTV: _bindgen_ty_30 = _bindgen_ty_30::NVME_FWACT_ACTV;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_30 {
NVME_QUEUE_PHYS_CONTIG = 1,
NVME_CQ_IRQ_ENABLED = 2,
NVME_SQ_PRIO_URGENT = 0,
NVME_SQ_PRIO_MEDIUM = 4,
NVME_SQ_PRIO_LOW = 6,
NVME_LOG_FW_SLOT = 3,
NVME_LOG_CMD_EFFECTS = 5,
NVME_LOG_TELEMETRY_HOST = 7,
NVME_LOG_TELEMETRY_CTRL = 8,
NVME_LOG_ENDURANCE_GROUP = 9,
NVME_LOG_PRELAT_PER_NVMSET = 10,
NVME_LOG_ANA = 12,
NVME_LOG_PRELAT_EVENT_AGG = 11,
NVME_LOG_PERSISTENT_EVENT = 13,
NVME_LOG_LBA_STATUS = 14,
NVME_LOG_ENDURANCE_GROUP_EVENT_AGG = 15,
NVME_LOG_BOOT_PARTITION = 21,
NVME_LOG_FID_SUPPORT_EFFECTS = 18,
NVME_LOG_DISC = 112,
NVME_LOG_RESERVATION = 128,
NVME_LOG_SANITIZE = 129,
NVME_LOG_ZONE_CHANGED_LIST = 191,
NVME_FWACT_ACTV = 16,
}
#[repr(u8)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_feat {
NVME_FEAT_NONE = 0,
NVME_FEAT_ARBITRATION = 1,
NVME_FEAT_POWER_MGMT = 2,
NVME_FEAT_LBA_RANGE = 3,
NVME_FEAT_TEMP_THRESH = 4,
NVME_FEAT_ERR_RECOVERY = 5,
NVME_FEAT_VOLATILE_WC = 6,
NVME_FEAT_NUM_QUEUES = 7,
NVME_FEAT_IRQ_COALESCE = 8,
NVME_FEAT_IRQ_CONFIG = 9,
NVME_FEAT_WRITE_ATOMIC = 10,
NVME_FEAT_ASYNC_EVENT = 11,
NVME_FEAT_AUTO_PST = 12,
NVME_FEAT_HOST_MEM_BUF = 13,
NVME_FEAT_TIMESTAMP = 14,
NVME_FEAT_KATO = 15,
NVME_FEAT_HCTM = 16,
NVME_FEAT_NOPSC = 17,
NVME_FEAT_RRL = 18,
NVME_FEAT_PLM_CONFIG = 19,
NVME_FEAT_PLM_WINDOW = 20,
NVME_LBA_STATUS_INFO = 21,
NVME_FEAT_HOST_BEHAVIOR = 22,
NVME_FEAT_SANITIZE = 23,
NVME_FEAT_ENDURANCE = 24,
NVME_FEAT_IOCS_PROFILE = 25,
NVME_FEAT_SPINUP_CONTROL = 26,
NVME_FEAT_SW_PROGRESS = 128,
NVME_FEAT_HOST_ID = 129,
NVME_FEAT_RESV_MASK = 130,
NVME_FEAT_RESV_PERSIST = 131,
NVME_FEAT_WRITE_PROTECT = 132,
NVME_MI_FEAT_CTRL_METADATA = 126,
NVME_MI_FEAT_NS_METADATA = 127,
}
pub const NVME_NO_LOG_LSP: _bindgen_ty_31 = _bindgen_ty_31::NVME_NO_LOG_LSP;
pub const NVME_NO_LOG_LPO: _bindgen_ty_31 = _bindgen_ty_31::NVME_NO_LOG_LSP;
pub const NVME_LOG_ANA_LSP_RGO: _bindgen_ty_31 = _bindgen_ty_31::NVME_LOG_ANA_LSP_RGO;
pub const NVME_TELEM_LSP_CREATE: _bindgen_ty_31 = _bindgen_ty_31::NVME_LOG_ANA_LSP_RGO;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_31 {
NVME_NO_LOG_LSP = 0,
NVME_LOG_ANA_LSP_RGO = 1,
}
pub const NVME_SANITIZE_NO_DEALLOC: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_NO_DEALLOC;
pub const NVME_SANITIZE_OIPBP: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_OIPBP;
pub const NVME_SANITIZE_OWPASS_SHIFT: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_OWPASS_SHIFT;
pub const NVME_SANITIZE_AUSE: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_AUSE;
pub const NVME_SANITIZE_ACT_CRYPTO_ERASE: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_OWPASS_SHIFT;
pub const NVME_SANITIZE_ACT_OVERWRITE: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_ACT_OVERWRITE;
pub const NVME_SANITIZE_ACT_BLOCK_ERASE: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_ACT_BLOCK_ERASE;
pub const NVME_SANITIZE_ACT_EXIT: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_ACT_EXIT;
pub const NVME_SANITIZE_LOG_DATA_LEN: _bindgen_ty_32 = _bindgen_ty_32::NVME_SANITIZE_LOG_DATA_LEN;
pub const NVME_SANITIZE_LOG_GLOBAL_DATA_ERASED: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_OIPBP;
pub const NVME_SANITIZE_LOG_NUM_CMPLTED_PASS_MASK: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_LOG_NUM_CMPLTED_PASS_MASK;
pub const NVME_SANITIZE_LOG_STATUS_MASK: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_LOG_STATUS_MASK;
pub const NVME_SANITIZE_LOG_NEVER_SANITIZED: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_LOG_NEVER_SANITIZED;
pub const NVME_SANITIZE_LOG_COMPLETED_SUCCESS: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_ACT_EXIT;
pub const NVME_SANITIZE_LOG_IN_PROGESS: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_ACT_BLOCK_ERASE;
pub const NVME_SANITIZE_LOG_COMPLETED_FAILED: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_ACT_OVERWRITE;
pub const NVME_SANITIZE_LOG_ND_COMPLETED_SUCCESS: _bindgen_ty_32 =
_bindgen_ty_32::NVME_SANITIZE_OWPASS_SHIFT;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_32 {
NVME_SANITIZE_NO_DEALLOC = 512,
NVME_SANITIZE_OIPBP = 256,
NVME_SANITIZE_OWPASS_SHIFT = 4,
NVME_SANITIZE_AUSE = 8,
NVME_SANITIZE_ACT_OVERWRITE = 3,
NVME_SANITIZE_ACT_BLOCK_ERASE = 2,
NVME_SANITIZE_ACT_EXIT = 1,
NVME_SANITIZE_LOG_DATA_LEN = 20,
NVME_SANITIZE_LOG_NUM_CMPLTED_PASS_MASK = 248,
NVME_SANITIZE_LOG_STATUS_MASK = 7,
NVME_SANITIZE_LOG_NEVER_SANITIZED = 0,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_host_mem_buf_desc {
pub addr: __le64,
pub size: __le32,
pub rsvd: [__u8; 4usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_sanitize_log_page {
pub progress: __le16,
pub status: __le16,
pub cdw10_info: __le32,
pub est_ovrwrt_time: __le32,
pub est_blk_erase_time: __le32,
pub est_crypto_erase_time: __le32,
pub est_ovrwrt_time_with_no_deallocate: __le32,
pub est_blk_erase_time_with_no_deallocate: __le32,
pub est_crypto_erase_time_with_no_deallocate: __le32,
pub rsvd32: [__u8; 480usize],
}
impl Default for nvme_sanitize_log_page {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_effects_log_page {
pub acs: [__le32; 256usize],
pub iocs: [__le32; 256usize],
pub resv: [__u8; 2048usize],
}
impl Default for nvme_effects_log_page {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_error_log_page {
pub error_count: __le64,
pub sqid: __le16,
pub cmdid: __le16,
pub status_field: __le16,
pub parm_error_location: __le16,
pub lba: __le64,
pub nsid: __le32,
pub vs: __u8,
pub trtype: __u8,
pub resv: [__u8; 2usize],
pub cs: __le64,
pub trtype_spec_info: __le16,
pub resv2: [__u8; 22usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_firmware_log_page {
pub afi: __u8,
pub resv: [__u8; 7usize],
pub frs: [[__u8; 8usize]; 7usize],
pub resv2: [__u8; 448usize],
}
impl Default for nvme_firmware_log_page {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_host_mem_buffer {
pub hsize: __le32,
pub hmdlal: __le32,
pub hmdlau: __le32,
pub hmdlec: __le32,
pub rsvd16: [__u8; 4080usize],
}
impl Default for nvme_host_mem_buffer {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_auto_pst {
pub data: __le32,
pub rsvd: [__u8; 4usize],
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_timestamp {
pub timestamp: [__u8; 6usize],
pub attr: __u8,
pub rsvd: __u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_controller_list {
pub num: __le16,
pub identifier: [__le16; 2047usize],
}
impl Default for nvme_controller_list {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_primary_ctrl_caps {
pub cntlid: __le16,
pub portid: __le16,
pub crt: __u8,
pub rsvd5: [__u8; 27usize],
pub vqfrt: __le32,
pub vqrfa: __le32,
pub vqrfap: __le16,
pub vqprt: __le16,
pub vqfrsm: __le16,
pub vqgran: __le16,
pub rsvd48: [__u8; 16usize],
pub vifrt: __le32,
pub virfa: __le32,
pub virfap: __le16,
pub viprt: __le16,
pub vifrsm: __le16,
pub vigran: __le16,
pub rsvd80: [__u8; 4016usize],
}
impl Default for nvme_primary_ctrl_caps {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_secondary_controller_entry {
pub scid: __le16,
pub pcid: __le16,
pub scs: __u8,
pub rsvd5: [__u8; 3usize],
pub vfn: __le16,
pub nvq: __le16,
pub nvi: __le16,
pub rsvd14: [__u8; 18usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_secondary_controllers_list {
pub num: __u8,
pub rsvd: [__u8; 31usize],
pub sc_entry: [nvme_secondary_controller_entry; 127usize],
}
impl Default for nvme_secondary_controllers_list {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_bar_cap {
pub mqes: __le16,
pub ams_cqr: __u8,
pub to: __u8,
pub bps_css_nssrs_dstrd: __le16,
pub mpsmax_mpsmin: __u8,
pub rsvd_cmbs_pmrs: __u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_endurance_group_list {
pub num: __le16,
pub identifier: [__le16; 2047usize],
}
impl Default for nvme_endurance_group_list {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_SCT_GENERIC: _bindgen_ty_33 = _bindgen_ty_33::NVME_SCT_GENERIC;
pub const NVME_SCT_CMD_SPECIFIC: _bindgen_ty_33 = _bindgen_ty_33::NVME_SCT_CMD_SPECIFIC;
pub const NVME_SCT_MEDIA: _bindgen_ty_33 = _bindgen_ty_33::NVME_SCT_MEDIA;
pub const NVME_SCT_PATH: _bindgen_ty_33 = _bindgen_ty_33::NVME_SCT_PATH;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_33 {
NVME_SCT_GENERIC = 0,
NVME_SCT_CMD_SPECIFIC = 1,
NVME_SCT_MEDIA = 2,
NVME_SCT_PATH = 3,
}
pub const NVME_SC_SUCCESS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SUCCESS;
pub const NVME_SC_INVALID_OPCODE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_OPCODE;
pub const NVME_SC_INVALID_FIELD: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_FIELD;
pub const NVME_SC_CMDID_CONFLICT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CMDID_CONFLICT;
pub const NVME_SC_DATA_XFER_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_DATA_XFER_ERROR;
pub const NVME_SC_POWER_LOSS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_POWER_LOSS;
pub const NVME_SC_INTERNAL: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INTERNAL;
pub const NVME_SC_ABORT_REQ: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ABORT_REQ;
pub const NVME_SC_ABORT_QUEUE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ABORT_QUEUE;
pub const NVME_SC_FUSED_FAIL: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FUSED_FAIL;
pub const NVME_SC_FUSED_MISSING: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FUSED_MISSING;
pub const NVME_SC_INVALID_NS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_NS;
pub const NVME_SC_CMD_SEQ_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CMD_SEQ_ERROR;
pub const NVME_SC_SGL_INVALID_LAST: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SGL_INVALID_LAST;
pub const NVME_SC_SGL_INVALID_COUNT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SGL_INVALID_COUNT;
pub const NVME_SC_SGL_INVALID_DATA: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SGL_INVALID_DATA;
pub const NVME_SC_SGL_INVALID_METADATA: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_SGL_INVALID_METADATA;
pub const NVME_SC_SGL_INVALID_TYPE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SGL_INVALID_TYPE;
pub const NVME_SC_CMB_INVALID_USE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CMB_INVALID_USE;
pub const NVME_SC_PRP_INVALID_OFFSET: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_PRP_INVALID_OFFSET;
pub const NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED;
pub const NVME_SC_OPERATION_DENIED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_OPERATION_DENIED;
pub const NVME_SC_SGL_INVALID_OFFSET: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SGL_INVALID_OFFSET;
pub const NVME_SC_INCONSISTENT_HOST_ID: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_INCONSISTENT_HOST_ID;
pub const NVME_SC_KEEP_ALIVE_EXPIRED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_KEEP_ALIVE_EXPIRED;
pub const NVME_SC_KEEP_ALIVE_INVALID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_KEEP_ALIVE_INVALID;
pub const NVME_SC_PREEMPT_ABORT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_PREEMPT_ABORT;
pub const NVME_SC_SANITIZE_FAILED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_SANITIZE_FAILED;
pub const NVME_SC_SANITIZE_IN_PROGRESS: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_SANITIZE_IN_PROGRESS;
pub const NVME_SC_SGL_DATA_BLK_GRAN_INVALID: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_SGL_DATA_BLK_GRAN_INVALID;
pub const NVME_SC_CMD_NOT_SUP_QUEUE_IN_CMB: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_CMD_NOT_SUP_QUEUE_IN_CMB;
pub const NVME_SC_NS_WRITE_PROTECTED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_WRITE_PROTECTED;
pub const NVME_SC_CMD_INTERRUPTED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CMD_INTERRUPTED;
pub const NVME_SC_TRANSIENT_TRANSPORT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_TRANSIENT_TRANSPORT;
pub const NVME_SC_PROHIBITED_BY_CMD_AND_FEAT: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_PROHIBITED_BY_CMD_AND_FEAT;
pub const NVME_SC_ADMIN_CMD_MEDIA_NOT_READY: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_ADMIN_CMD_MEDIA_NOT_READY;
pub const NVME_SC_LBA_RANGE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_LBA_RANGE;
pub const NVME_SC_CAP_EXCEEDED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CAP_EXCEEDED;
pub const NVME_SC_NS_NOT_READY: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_NOT_READY;
pub const NVME_SC_RESERVATION_CONFLICT: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_RESERVATION_CONFLICT;
pub const NVME_SC_FORMAT_IN_PROGRESS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FORMAT_IN_PROGRESS;
pub const NVME_SC_CQ_INVALID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CQ_INVALID;
pub const NVME_SC_QID_INVALID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_QID_INVALID;
pub const NVME_SC_QUEUE_SIZE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_QUEUE_SIZE;
pub const NVME_SC_ABORT_LIMIT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ABORT_LIMIT;
pub const NVME_SC_ABORT_MISSING: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ABORT_MISSING;
pub const NVME_SC_ASYNC_LIMIT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ASYNC_LIMIT;
pub const NVME_SC_FIRMWARE_SLOT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FIRMWARE_SLOT;
pub const NVME_SC_FIRMWARE_IMAGE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FIRMWARE_IMAGE;
pub const NVME_SC_INVALID_VECTOR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_VECTOR;
pub const NVME_SC_INVALID_LOG_PAGE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_LOG_PAGE;
pub const NVME_SC_INVALID_FORMAT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_FORMAT;
pub const NVME_SC_FW_NEEDS_CONV_RESET: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FW_NEEDS_CONV_RESET;
pub const NVME_SC_INVALID_QUEUE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_QUEUE;
pub const NVME_SC_FEATURE_NOT_SAVEABLE: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_FEATURE_NOT_SAVEABLE;
pub const NVME_SC_FEATURE_NOT_CHANGEABLE: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_FEATURE_NOT_CHANGEABLE;
pub const NVME_SC_FEATURE_NOT_PER_NS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FEATURE_NOT_PER_NS;
pub const NVME_SC_FW_NEEDS_SUBSYS_RESET: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_FW_NEEDS_SUBSYS_RESET;
pub const NVME_SC_FW_NEEDS_RESET: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FW_NEEDS_RESET;
pub const NVME_SC_FW_NEEDS_MAX_TIME: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_FW_NEEDS_MAX_TIME;
pub const NVME_SC_FW_ACTIVATE_PROHIBITED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_FW_ACTIVATE_PROHIBITED;
pub const NVME_SC_OVERLAPPING_RANGE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_OVERLAPPING_RANGE;
pub const NVME_SC_NS_INSUFFICIENT_CAP: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_INSUFFICIENT_CAP;
pub const NVME_SC_NS_ID_UNAVAILABLE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_ID_UNAVAILABLE;
pub const NVME_SC_NS_ALREADY_ATTACHED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_ALREADY_ATTACHED;
pub const NVME_SC_NS_IS_PRIVATE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_IS_PRIVATE;
pub const NVME_SC_NS_NOT_ATTACHED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_NS_NOT_ATTACHED;
pub const NVME_SC_THIN_PROV_NOT_SUPP: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_THIN_PROV_NOT_SUPP;
pub const NVME_SC_CTRL_LIST_INVALID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CTRL_LIST_INVALID;
pub const NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS;
pub const NVME_SC_BP_WRITE_PROHIBITED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_BP_WRITE_PROHIBITED;
pub const NVME_SC_INVALID_CTRL_ID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_CTRL_ID;
pub const NVME_SC_INVALID_SECONDARY_CTRL_STATE: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_INVALID_SECONDARY_CTRL_STATE;
pub const NVME_SC_INVALID_NUM_CTRL_RESOURCE: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_INVALID_NUM_CTRL_RESOURCE;
pub const NVME_SC_INVALID_RESOURCE_ID: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_RESOURCE_ID;
pub const NVME_SC_PMR_SAN_PROHIBITED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_PMR_SAN_PROHIBITED;
pub const NVME_SC_ANA_INVALID_GROUP_ID: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_ANA_INVALID_GROUP_ID;
pub const NVME_SC_ANA_ATTACH_FAIL: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ANA_ATTACH_FAIL;
pub const NVME_SC_INSUFFICIENT_CAP: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INSUFFICIENT_CAP;
pub const NVME_SC_NS_ATTACHMENT_LIMIT_EXCEEDED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_NS_ATTACHMENT_LIMIT_EXCEEDED;
pub const NVME_SC_PROHIBIT_CMD_EXEC_NOT_SUPPORTED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_PROHIBIT_CMD_EXEC_NOT_SUPPORTED;
pub const NVME_SC_IOCS_NOT_SUPPORTED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_IOCS_NOT_SUPPORTED;
pub const NVME_SC_IOCS_NOT_ENABLED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_IOCS_NOT_ENABLED;
pub const NVME_SC_IOCS_COMBINATION_REJECTED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_IOCS_COMBINATION_REJECTED;
pub const NVME_SC_INVALID_IOCS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_IOCS;
pub const NVME_SC_ID_UNAVAILABLE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ID_UNAVAILABLE;
pub const NVME_SC_BAD_ATTRIBUTES: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_BAD_ATTRIBUTES;
pub const NVME_SC_INVALID_PI: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_PI;
pub const NVME_SC_READ_ONLY: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_READ_ONLY;
pub const NVME_SC_CMD_SIZE_LIMIT_EXCEEDED: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_CMD_SIZE_LIMIT_EXCEEDED;
pub const NVME_SC_CONNECT_FORMAT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_BAD_ATTRIBUTES;
pub const NVME_SC_CONNECT_CTRL_BUSY: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INVALID_PI;
pub const NVME_SC_CONNECT_INVALID_PARAM: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_READ_ONLY;
pub const NVME_SC_CONNECT_RESTART_DISC: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_CMD_SIZE_LIMIT_EXCEEDED;
pub const NVME_SC_CONNECT_INVALID_HOST: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_CONNECT_INVALID_HOST;
pub const NVME_SC_DISCOVERY_RESTART: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_DISCOVERY_RESTART;
pub const NVME_SC_AUTH_REQUIRED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_AUTH_REQUIRED;
pub const NVME_SC_ZONE_BOUNDARY_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ZONE_BOUNDARY_ERROR;
pub const NVME_SC_ZONE_IS_FULL: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ZONE_IS_FULL;
pub const NVME_SC_ZONE_IS_READ_ONLY: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ZONE_IS_READ_ONLY;
pub const NVME_SC_ZONE_IS_OFFLINE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ZONE_IS_OFFLINE;
pub const NVME_SC_ZONE_INVALID_WRITE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ZONE_INVALID_WRITE;
pub const NVME_SC_TOO_MANY_ACTIVE_ZONES: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_TOO_MANY_ACTIVE_ZONES;
pub const NVME_SC_TOO_MANY_OPEN_ZONES: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_TOO_MANY_OPEN_ZONES;
pub const NVME_SC_ZONE_INVALID_STATE_TRANSITION: _bindgen_ty_34 =
_bindgen_ty_34::NVME_SC_ZONE_INVALID_STATE_TRANSITION;
pub const NVME_SC_WRITE_FAULT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_WRITE_FAULT;
pub const NVME_SC_READ_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_READ_ERROR;
pub const NVME_SC_GUARD_CHECK: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_GUARD_CHECK;
pub const NVME_SC_APPTAG_CHECK: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_APPTAG_CHECK;
pub const NVME_SC_REFTAG_CHECK: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_REFTAG_CHECK;
pub const NVME_SC_COMPARE_FAILED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_COMPARE_FAILED;
pub const NVME_SC_ACCESS_DENIED: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ACCESS_DENIED;
pub const NVME_SC_UNWRITTEN_BLOCK: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_UNWRITTEN_BLOCK;
pub const NVME_SC_STORAGE_TAG_CHECK: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_STORAGE_TAG_CHECK;
pub const NVME_SC_INTERNAL_PATH_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_INTERNAL_PATH_ERROR;
pub const NVME_SC_ANA_PERSISTENT_LOSS: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ANA_PERSISTENT_LOSS;
pub const NVME_SC_ANA_INACCESSIBLE: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ANA_INACCESSIBLE;
pub const NVME_SC_ANA_TRANSITION: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_ANA_TRANSITION;
pub const NVME_SC_CTRL_PATHING_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CTRL_PATHING_ERROR;
pub const NVME_SC_HOST_PATHING_ERROR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_HOST_PATHING_ERROR;
pub const NVME_SC_HOST_CMD_ABORT: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_HOST_CMD_ABORT;
pub const NVME_SC_CRD: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_CRD;
pub const NVME_SC_DNR: _bindgen_ty_34 = _bindgen_ty_34::NVME_SC_DNR;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_34 {
NVME_SC_SUCCESS = 0,
NVME_SC_INVALID_OPCODE = 1,
NVME_SC_INVALID_FIELD = 2,
NVME_SC_CMDID_CONFLICT = 3,
NVME_SC_DATA_XFER_ERROR = 4,
NVME_SC_POWER_LOSS = 5,
NVME_SC_INTERNAL = 6,
NVME_SC_ABORT_REQ = 7,
NVME_SC_ABORT_QUEUE = 8,
NVME_SC_FUSED_FAIL = 9,
NVME_SC_FUSED_MISSING = 10,
NVME_SC_INVALID_NS = 11,
NVME_SC_CMD_SEQ_ERROR = 12,
NVME_SC_SGL_INVALID_LAST = 13,
NVME_SC_SGL_INVALID_COUNT = 14,
NVME_SC_SGL_INVALID_DATA = 15,
NVME_SC_SGL_INVALID_METADATA = 16,
NVME_SC_SGL_INVALID_TYPE = 17,
NVME_SC_CMB_INVALID_USE = 18,
NVME_SC_PRP_INVALID_OFFSET = 19,
NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED = 20,
NVME_SC_OPERATION_DENIED = 21,
NVME_SC_SGL_INVALID_OFFSET = 22,
NVME_SC_INCONSISTENT_HOST_ID = 24,
NVME_SC_KEEP_ALIVE_EXPIRED = 25,
NVME_SC_KEEP_ALIVE_INVALID = 26,
NVME_SC_PREEMPT_ABORT = 27,
NVME_SC_SANITIZE_FAILED = 28,
NVME_SC_SANITIZE_IN_PROGRESS = 29,
NVME_SC_SGL_DATA_BLK_GRAN_INVALID = 30,
NVME_SC_CMD_NOT_SUP_QUEUE_IN_CMB = 31,
NVME_SC_NS_WRITE_PROTECTED = 32,
NVME_SC_CMD_INTERRUPTED = 33,
NVME_SC_TRANSIENT_TRANSPORT = 34,
NVME_SC_PROHIBITED_BY_CMD_AND_FEAT = 35,
NVME_SC_ADMIN_CMD_MEDIA_NOT_READY = 36,
NVME_SC_LBA_RANGE = 128,
NVME_SC_CAP_EXCEEDED = 129,
NVME_SC_NS_NOT_READY = 130,
NVME_SC_RESERVATION_CONFLICT = 131,
NVME_SC_FORMAT_IN_PROGRESS = 132,
NVME_SC_CQ_INVALID = 256,
NVME_SC_QID_INVALID = 257,
NVME_SC_QUEUE_SIZE = 258,
NVME_SC_ABORT_LIMIT = 259,
NVME_SC_ABORT_MISSING = 260,
NVME_SC_ASYNC_LIMIT = 261,
NVME_SC_FIRMWARE_SLOT = 262,
NVME_SC_FIRMWARE_IMAGE = 263,
NVME_SC_INVALID_VECTOR = 264,
NVME_SC_INVALID_LOG_PAGE = 265,
NVME_SC_INVALID_FORMAT = 266,
NVME_SC_FW_NEEDS_CONV_RESET = 267,
NVME_SC_INVALID_QUEUE = 268,
NVME_SC_FEATURE_NOT_SAVEABLE = 269,
NVME_SC_FEATURE_NOT_CHANGEABLE = 270,
NVME_SC_FEATURE_NOT_PER_NS = 271,
NVME_SC_FW_NEEDS_SUBSYS_RESET = 272,
NVME_SC_FW_NEEDS_RESET = 273,
NVME_SC_FW_NEEDS_MAX_TIME = 274,
NVME_SC_FW_ACTIVATE_PROHIBITED = 275,
NVME_SC_OVERLAPPING_RANGE = 276,
NVME_SC_NS_INSUFFICIENT_CAP = 277,
NVME_SC_NS_ID_UNAVAILABLE = 278,
NVME_SC_NS_ALREADY_ATTACHED = 280,
NVME_SC_NS_IS_PRIVATE = 281,
NVME_SC_NS_NOT_ATTACHED = 282,
NVME_SC_THIN_PROV_NOT_SUPP = 283,
NVME_SC_CTRL_LIST_INVALID = 284,
NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS = 285,
NVME_SC_BP_WRITE_PROHIBITED = 286,
NVME_SC_INVALID_CTRL_ID = 287,
NVME_SC_INVALID_SECONDARY_CTRL_STATE = 288,
NVME_SC_INVALID_NUM_CTRL_RESOURCE = 289,
NVME_SC_INVALID_RESOURCE_ID = 290,
NVME_SC_PMR_SAN_PROHIBITED = 291,
NVME_SC_ANA_INVALID_GROUP_ID = 292,
NVME_SC_ANA_ATTACH_FAIL = 293,
NVME_SC_INSUFFICIENT_CAP = 294,
NVME_SC_NS_ATTACHMENT_LIMIT_EXCEEDED = 295,
NVME_SC_PROHIBIT_CMD_EXEC_NOT_SUPPORTED = 296,
NVME_SC_IOCS_NOT_SUPPORTED = 297,
NVME_SC_IOCS_NOT_ENABLED = 298,
NVME_SC_IOCS_COMBINATION_REJECTED = 299,
NVME_SC_INVALID_IOCS = 300,
NVME_SC_ID_UNAVAILABLE = 301,
NVME_SC_BAD_ATTRIBUTES = 384,
NVME_SC_INVALID_PI = 385,
NVME_SC_READ_ONLY = 386,
NVME_SC_CMD_SIZE_LIMIT_EXCEEDED = 387,
NVME_SC_CONNECT_INVALID_HOST = 388,
NVME_SC_DISCOVERY_RESTART = 400,
NVME_SC_AUTH_REQUIRED = 401,
NVME_SC_ZONE_BOUNDARY_ERROR = 440,
NVME_SC_ZONE_IS_FULL = 441,
NVME_SC_ZONE_IS_READ_ONLY = 442,
NVME_SC_ZONE_IS_OFFLINE = 443,
NVME_SC_ZONE_INVALID_WRITE = 444,
NVME_SC_TOO_MANY_ACTIVE_ZONES = 445,
NVME_SC_TOO_MANY_OPEN_ZONES = 446,
NVME_SC_ZONE_INVALID_STATE_TRANSITION = 447,
NVME_SC_WRITE_FAULT = 640,
NVME_SC_READ_ERROR = 641,
NVME_SC_GUARD_CHECK = 642,
NVME_SC_APPTAG_CHECK = 643,
NVME_SC_REFTAG_CHECK = 644,
NVME_SC_COMPARE_FAILED = 645,
NVME_SC_ACCESS_DENIED = 646,
NVME_SC_UNWRITTEN_BLOCK = 647,
NVME_SC_STORAGE_TAG_CHECK = 648,
NVME_SC_INTERNAL_PATH_ERROR = 768,
NVME_SC_ANA_PERSISTENT_LOSS = 769,
NVME_SC_ANA_INACCESSIBLE = 770,
NVME_SC_ANA_TRANSITION = 771,
NVME_SC_CTRL_PATHING_ERROR = 864,
NVME_SC_HOST_PATHING_ERROR = 880,
NVME_SC_HOST_CMD_ABORT = 881,
NVME_SC_CRD = 6144,
NVME_SC_DNR = 16384,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_zns_lbafe {
pub zsze: __le64,
pub zdes: __u8,
pub rsvd9: [__u8; 7usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_zns_id_ns {
pub zoc: __le16,
pub ozcs: __le16,
pub mar: __le32,
pub mor: __le32,
pub rrl: __le32,
pub frl: __le32,
pub rrl1: __le32,
pub rrl2: __le32,
pub rrl3: __le32,
pub frl1: __le32,
pub frl2: __le32,
pub frl3: __le32,
pub rsvd44: [__u8; 2772usize],
pub lbafe: [nvme_zns_lbafe; 64usize],
pub vs: [__u8; 256usize],
}
impl Default for nvme_zns_id_ns {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_ctrl_nvm {
pub vsl: __u8,
pub wzsl: __u8,
pub wusl: __u8,
pub dmrl: __u8,
pub dmrsl: __le32,
pub dmsl: __le64,
pub rsvd16: [__u8; 4080usize],
}
impl Default for nvme_id_ctrl_nvm {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_zns_id_ctrl {
pub zasl: __u8,
pub rsvd1: [__u8; 4095usize],
}
impl Default for nvme_zns_id_ctrl {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_zns_changed_zone_log {
pub nrzid: __le16,
pub rsvd2: [__u8; 6usize],
pub zid: [__le64; 511usize],
}
impl Default for nvme_zns_changed_zone_log {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_zt {
NVME_ZONE_TYPE_SEQWRITE_REQ = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_za {
NVME_ZNS_ZA_ZFC = 1,
NVME_ZNS_ZA_FZR = 2,
NVME_ZNS_ZA_RZR = 4,
NVME_ZNS_ZA_ZDEV = 128,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_zs {
NVME_ZNS_ZS_EMPTY = 1,
NVME_ZNS_ZS_IMPL_OPEN = 2,
NVME_ZNS_ZS_EXPL_OPEN = 3,
NVME_ZNS_ZS_CLOSED = 4,
NVME_ZNS_ZS_READ_ONLY = 13,
NVME_ZNS_ZS_FULL = 14,
NVME_ZNS_ZS_OFFLINE = 15,
}
#[repr(C)]
#[derive(Debug, Default, Copy, Clone, Hash, PartialEq)]
pub struct nvme_zns_desc {
pub zt: __u8,
pub zs: __u8,
pub za: __u8,
pub zai: __u8,
pub rsvd4: [__u8; 4usize],
pub zcap: __le64,
pub zslba: __le64,
pub wp: __le64,
pub rsvd32: [__u8; 32usize],
}
#[repr(C)]
#[derive(Debug)]
pub struct nvme_zone_report {
pub nr_zones: __le64,
pub resv8: [__u8; 56usize],
pub entries: __IncompleteArrayField<nvme_zns_desc>,
}
impl Default for nvme_zone_report {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_send_action {
NVME_ZNS_ZSA_CLOSE = 1,
NVME_ZNS_ZSA_FINISH = 2,
NVME_ZNS_ZSA_OPEN = 3,
NVME_ZNS_ZSA_RESET = 4,
NVME_ZNS_ZSA_OFFLINE = 5,
NVME_ZNS_ZSA_SET_DESC_EXT = 16,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_recv_action {
NVME_ZNS_ZRA_REPORT_ZONES = 0,
NVME_ZNS_ZRA_EXTENDED_REPORT_ZONES = 1,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum nvme_zns_report_options {
NVME_ZNS_ZRAS_REPORT_ALL = 0,
NVME_ZNS_ZRAS_REPORT_EMPTY = 1,
NVME_ZNS_ZRAS_REPORT_IMPL_OPENED = 2,
NVME_ZNS_ZRAS_REPORT_EXPL_OPENED = 3,
NVME_ZNS_ZRAS_REPORT_CLOSED = 4,
NVME_ZNS_ZRAS_REPORT_FULL = 5,
NVME_ZNS_ZRAS_REPORT_READ_ONLY = 6,
NVME_ZNS_ZRAS_REPORT_OFFLINE = 7,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_id_domain_attr_entry {
pub dom_id: __le16,
pub rsvd2: [__u8; 14usize],
pub dom_cap: [__u8; 16usize],
pub unalloc_dom_cap: [__u8; 16usize],
pub max_egrp_dom_cap: [__u8; 16usize],
pub rsvd64: [__u8; 64usize],
}
impl Default for nvme_id_domain_attr_entry {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug)]
pub struct nvme_id_domain_list {
pub num_entries: __u8,
pub rsvd1: [__u8; 127usize],
pub domain_attr: __IncompleteArrayField<nvme_id_domain_attr_entry>,
}
impl Default for nvme_id_domain_list {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVME_FID_EFFECTS_FSUPP: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_FSUPP;
pub const NVME_FID_EFFECTS_UDCC: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_UDCC;
pub const NVME_FID_EFFECTS_NCC: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_NCC;
pub const NVME_FID_EFFECTS_NIC: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_NIC;
pub const NVME_FID_EFFECTS_CCC: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_CCC;
pub const NVME_FID_EFFECTS_UUID_SEL: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_UUID_SEL;
pub const NVME_FID_SCOPE_SHIFT: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_SCOPE_SHIFT;
pub const NVME_FID_SCOPE_MASK: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_SCOPE_MASK;
pub const NVME_FID_SCOPE_NS: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_FSUPP;
pub const NVME_FID_SCOPE_CTRL: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_UDCC;
pub const NVME_FID_SCOPE_NVM_SET: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_NCC;
pub const NVME_FID_SCOPE_ENDGRP: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_NIC;
pub const NVME_FID_SCOPE_DOMAIN: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_EFFECTS_CCC;
pub const NVME_FID_SCOPE_NSS: _bindgen_ty_35 = _bindgen_ty_35::NVME_FID_SCOPE_NSS;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_35 {
NVME_FID_EFFECTS_FSUPP = 1,
NVME_FID_EFFECTS_UDCC = 2,
NVME_FID_EFFECTS_NCC = 4,
NVME_FID_EFFECTS_NIC = 8,
NVME_FID_EFFECTS_CCC = 16,
NVME_FID_EFFECTS_UUID_SEL = 524288,
NVME_FID_SCOPE_SHIFT = 20,
NVME_FID_SCOPE_MASK = 4095,
NVME_FID_SCOPE_NSS = 32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_fid_support_effects {
pub fid_support: [__le32; 256usize],
}
impl Default for nvme_fid_support_effects {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
#[repr(C)]
#[derive(Debug, Copy, Clone, Hash, PartialEq)]
pub struct nvme_support_log_pages {
pub lid_support: [__le32; 256usize],
}
impl Default for nvme_support_log_pages {
fn default() -> Self {
let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
unsafe {
::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
s.assume_init()
}
}
}
pub const NVM_DEVICE_ACTIVE: _bindgen_ty_36 = _bindgen_ty_36::NVM_DEVICE_ACTIVE;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_36 {
NVM_DEVICE_ACTIVE = 1,
}
pub const NVM_CONFIG_TYPE_SIMPLE: _bindgen_ty_37 = _bindgen_ty_37::NVM_CONFIG_TYPE_SIMPLE;
pub const NVM_CONFIG_TYPE_EXTENDED: _bindgen_ty_37 = _bindgen_ty_37::NVM_CONFIG_TYPE_EXTENDED;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_37 {
NVM_CONFIG_TYPE_SIMPLE = 0,
NVM_CONFIG_TYPE_EXTENDED = 1,
}
pub const NVM_TARGET_FACTORY: _bindgen_ty_38 = _bindgen_ty_38::NVM_TARGET_FACTORY;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_38 {
NVM_TARGET_FACTORY = 1,
}
pub const NVM_FACTORY_ERASE_ONLY_USER: _bindgen_ty_39 = _bindgen_ty_39::NVM_FACTORY_ERASE_ONLY_USER;
pub const NVM_FACTORY_RESET_HOST_BLKS: _bindgen_ty_39 = _bindgen_ty_39::NVM_FACTORY_RESET_HOST_BLKS;
pub const NVM_FACTORY_RESET_GRWN_BBLKS: _bindgen_ty_39 =
_bindgen_ty_39::NVM_FACTORY_RESET_GRWN_BBLKS;
pub const NVM_FACTORY_NR_BITS: _bindgen_ty_39 = _bindgen_ty_39::NVM_FACTORY_NR_BITS;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_39 {
NVM_FACTORY_ERASE_ONLY_USER = 1,
NVM_FACTORY_RESET_HOST_BLKS = 2,
NVM_FACTORY_RESET_GRWN_BBLKS = 4,
NVM_FACTORY_NR_BITS = 8,
}
pub const NVM_INFO_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_INFO_CMD;
pub const NVM_GET_DEVICES_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_GET_DEVICES_CMD;
pub const NVM_DEV_CREATE_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_DEV_CREATE_CMD;
pub const NVM_DEV_REMOVE_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_DEV_REMOVE_CMD;
pub const NVM_DEV_INIT_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_DEV_INIT_CMD;
pub const NVM_DEV_FACTORY_CMD: _bindgen_ty_40 = _bindgen_ty_40::NVM_DEV_FACTORY_CMD;
#[repr(u32)]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum _bindgen_ty_40 {
NVM_INFO_CMD = 32,
NVM_GET_DEVICES_CMD = 33,
NVM_DEV_CREATE_CMD = 34,
NVM_DEV_REMOVE_CMD = 35,
NVM_DEV_INIT_CMD = 36,
NVM_DEV_FACTORY_CMD = 37,
}