numr 0.5.2

High-performance numerical computing with multi-backend GPU acceleration (CPU/CUDA/WebGPU)
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295

//! SIMD-accelerated special functions
//!
//! Provides vectorized implementations of error functions and Bessel functions.
//! Uses polynomial evaluation with FMA for accuracy and performance.
//!
//! # Supported Functions
//!
//! | Function  | Algorithm                        | Accuracy        |
//! |-----------|----------------------------------|-----------------|
//! | erf       | A&S 7.1.26 polynomial            | ~1e-7 rel err   |
//! | erfc      | 1 - erf(x)                       | ~1e-7 rel err   |
//! | bessel_j0 | Rational poly + asymptotic       | ~1e-8 rel err   |
//! | bessel_j1 | Rational poly + asymptotic       | ~1e-8 rel err   |
//! | bessel_i0 | Power series + asymptotic        | ~1e-8 rel err   |
//! | bessel_i1 | Power series + asymptotic        | ~1e-8 rel err   |

#[cfg(target_arch = "x86_64")]
mod avx2;
#[cfg(target_arch = "x86_64")]
mod avx512;

#[cfg(target_arch = "aarch64")]
mod aarch64;

pub mod coefficients;

use super::{SimdLevel, detect_simd};

/// Minimum elements to justify SIMD overhead
const SIMD_THRESHOLD: usize = 32;

// ============================================================================
// Dispatch Macros - Eliminate duplication across special functions
// ============================================================================

/// Generate SIMD dispatch function for f32 with architecture-specific backends
macro_rules! impl_simd_dispatch_f32 {
    ($fn_name:ident, $scalar_fn:ident) => {
        #[inline]
        pub unsafe fn $fn_name(input: *const f32, output: *mut f32, len: usize) {
            let level = detect_simd();

            if len < SIMD_THRESHOLD || level == SimdLevel::Scalar {
                $scalar_fn(input, output, len);
                return;
            }

            #[cfg(target_arch = "x86_64")]
            match level {
                SimdLevel::Avx512 => avx512::$fn_name(input, output, len),
                SimdLevel::Avx2Fma => avx2::$fn_name(input, output, len),
                _ => $scalar_fn(input, output, len),
            }

            #[cfg(target_arch = "aarch64")]
            match level {
                SimdLevel::Neon | SimdLevel::NeonFp16 => {
                    aarch64::neon::$fn_name(input, output, len)
                }
                _ => $scalar_fn(input, output, len),
            }

            #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
            $scalar_fn(input, output, len);
        }
    };
}

/// Generate SIMD dispatch function for f64 with architecture-specific backends
macro_rules! impl_simd_dispatch_f64 {
    ($fn_name:ident, $scalar_fn:ident) => {
        #[inline]
        pub unsafe fn $fn_name(input: *const f64, output: *mut f64, len: usize) {
            let level = detect_simd();

            if len < SIMD_THRESHOLD || level == SimdLevel::Scalar {
                $scalar_fn(input, output, len);
                return;
            }

            #[cfg(target_arch = "x86_64")]
            match level {
                SimdLevel::Avx512 => avx512::$fn_name(input, output, len),
                SimdLevel::Avx2Fma => avx2::$fn_name(input, output, len),
                _ => $scalar_fn(input, output, len),
            }

            #[cfg(target_arch = "aarch64")]
            match level {
                SimdLevel::Neon | SimdLevel::NeonFp16 => {
                    aarch64::neon::$fn_name(input, output, len)
                }
                _ => $scalar_fn(input, output, len),
            }

            #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
            $scalar_fn(input, output, len);
        }
    };
}

/// Generate both f32 and f64 dispatch functions
macro_rules! impl_simd_dispatch {
    ($base_name:ident) => {
        paste::paste! {
            impl_simd_dispatch_f32!([<$base_name _f32>], [<$base_name _scalar_f32>]);
            impl_simd_dispatch_f64!([<$base_name _f64>], [<$base_name _scalar_f64>]);
        }
    };
}

/// Generate scalar fallback pair (f32 + f64) from a scalar function
macro_rules! impl_scalar_fallback {
    ($base_name:ident, $scalar_fn:path) => {
        paste::paste! {
            #[inline]
            unsafe fn [<$base_name _scalar_f32>](input: *const f32, output: *mut f32, len: usize) {
                for i in 0..len {
                    let x = *input.add(i);
                    *output.add(i) = $scalar_fn(x as f64) as f32;
                }
            }

            #[inline]
            unsafe fn [<$base_name _scalar_f64>](input: *const f64, output: *mut f64, len: usize) {
                for i in 0..len {
                    *output.add(i) = $scalar_fn(*input.add(i));
                }
            }
        }
    };
}

/// Generate scalar-only dispatch (no SIMD implementation available)
macro_rules! impl_scalar_only {
    ($base_name:ident) => {
        paste::paste! {
            #[inline]
            pub unsafe fn [<$base_name _f32>](input: *const f32, output: *mut f32, len: usize) {
                [<$base_name _scalar_f32>](input, output, len);
            }

            #[inline]
            pub unsafe fn [<$base_name _f64>](input: *const f64, output: *mut f64, len: usize) {
                [<$base_name _scalar_f64>](input, output, len);
            }
        }
    };
}

// ============================================================================
// Scalar Fallbacks - Import and generate typed wrappers
// ============================================================================

use crate::algorithm::special::scalar::{
    bessel_i0_scalar, bessel_i1_scalar, bessel_j0_scalar, bessel_j1_scalar, digamma_scalar,
    erf_scalar, erfc_scalar, gamma_scalar, lgamma_scalar,
};

impl_scalar_fallback!(erf, erf_scalar);
impl_scalar_fallback!(erfc, erfc_scalar);
impl_scalar_fallback!(bessel_j0, bessel_j0_scalar);
impl_scalar_fallback!(bessel_j1, bessel_j1_scalar);
impl_scalar_fallback!(bessel_i0, bessel_i0_scalar);
impl_scalar_fallback!(bessel_i1, bessel_i1_scalar);
impl_scalar_fallback!(gamma, gamma_scalar);
impl_scalar_fallback!(lgamma, lgamma_scalar);
impl_scalar_fallback!(digamma, digamma_scalar);

// ============================================================================
// SIMD Dispatch Functions - Error Functions
// ============================================================================

impl_simd_dispatch!(erf);
impl_simd_dispatch!(erfc);

// ============================================================================
// SIMD Dispatch Functions - Bessel Functions
// ============================================================================

impl_simd_dispatch!(bessel_j0);
impl_simd_dispatch!(bessel_j1);
impl_simd_dispatch!(bessel_i0);
impl_simd_dispatch!(bessel_i1);

// ============================================================================
// Gamma Functions - Scalar only (no SIMD implementation yet)
// ============================================================================

impl_scalar_only!(gamma);
impl_scalar_only!(lgamma);
impl_scalar_only!(digamma);

// F16/BF16 Wrappers via macros
half_unary!(erf, erf_f32);
half_unary!(erfc, erfc_f32);
half_unary!(bessel_j0, bessel_j0_f32);
half_unary!(bessel_j1, bessel_j1_f32);
half_unary!(bessel_i0, bessel_i0_f32);
half_unary!(bessel_i1, bessel_i1_f32);
half_unary!(gamma, gamma_f32);
half_unary!(lgamma, lgamma_f32);
half_unary!(digamma, digamma_f32);

// ============================================================================
// Tests
// ============================================================================

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_erf_f32() {
        let input: Vec<f32> = (0..128).map(|x| (x as f32) * 0.05 - 3.0).collect();
        let mut out_simd = vec![0.0f32; 128];
        let mut out_scalar = vec![0.0f32; 128];

        unsafe {
            erf_f32(input.as_ptr(), out_simd.as_mut_ptr(), 128);
            erf_scalar_f32(input.as_ptr(), out_scalar.as_mut_ptr(), 128);
        }

        for i in 0..128 {
            let diff = (out_simd[i] - out_scalar[i]).abs();
            assert!(
                diff < 1e-5,
                "erf mismatch at {}: SIMD={} scalar={} diff={}",
                i,
                out_simd[i],
                out_scalar[i],
                diff
            );
        }
    }

    #[test]
    fn test_bessel_j0_f32() {
        let input: Vec<f32> = (0..128).map(|x| (x as f32) * 0.2).collect();
        let mut out_simd = vec![0.0f32; 128];
        let mut out_scalar = vec![0.0f32; 128];

        unsafe {
            bessel_j0_f32(input.as_ptr(), out_simd.as_mut_ptr(), 128);
            bessel_j0_scalar_f32(input.as_ptr(), out_scalar.as_mut_ptr(), 128);
        }

        for i in 0..128 {
            let diff = (out_simd[i] - out_scalar[i]).abs();
            let rel_err = if out_scalar[i].abs() > 1e-6 {
                diff / out_scalar[i].abs()
            } else {
                diff
            };
            assert!(
                rel_err < 1e-4,
                "bessel_j0 mismatch at {}: SIMD={} scalar={} rel_err={}",
                i,
                out_simd[i],
                out_scalar[i],
                rel_err
            );
        }
    }

    #[test]
    fn test_bessel_i0_f32() {
        // Test for modest arguments to avoid overflow
        let input: Vec<f32> = (0..128).map(|x| (x as f32) * 0.1).collect();
        let mut out_simd = vec![0.0f32; 128];
        let mut out_scalar = vec![0.0f32; 128];

        unsafe {
            bessel_i0_f32(input.as_ptr(), out_simd.as_mut_ptr(), 128);
            bessel_i0_scalar_f32(input.as_ptr(), out_scalar.as_mut_ptr(), 128);
        }

        for i in 0..128 {
            let diff = (out_simd[i] - out_scalar[i]).abs();
            let rel_err = if out_scalar[i].abs() > 1e-6 {
                diff / out_scalar[i].abs()
            } else {
                diff
            };
            assert!(
                rel_err < 1e-4,
                "bessel_i0 mismatch at {}: SIMD={} scalar={} rel_err={}",
                i,
                out_simd[i],
                out_scalar[i],
                rel_err
            );
        }
    }
}