numr 0.5.2

High-performance numerical computing with multi-backend GPU acceleration (CPU/CUDA/WebGPU)
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399

//! AVX2 reduction kernels
//!
//! Manual horizontal reductions since AVX2 lacks _mm256_reduce_* intrinsics.

#[cfg(target_arch = "x86_64")]
use std::arch::x86_64::*;

use super::reduce_scalar_f32;
use super::reduce_scalar_f64;
use crate::ops::ReduceOp;

const F32_LANES: usize = 8;
const F64_LANES: usize = 4;

/// AVX2 reduction for f32
#[target_feature(enable = "avx2")]
pub unsafe fn reduce_f32(
    op: ReduceOp,
    a: *const f32,
    out: *mut f32,
    reduce_size: usize,
    outer_size: usize,
) {
    match op {
        ReduceOp::Sum => reduce_sum_f32(a, out, reduce_size, outer_size),
        ReduceOp::Max => reduce_max_f32(a, out, reduce_size, outer_size),
        ReduceOp::Min => reduce_min_f32(a, out, reduce_size, outer_size),
        ReduceOp::Prod => reduce_prod_f32(a, out, reduce_size, outer_size),
        _ => reduce_scalar_f32(op, a, out, reduce_size, outer_size),
    }
}

/// AVX2 reduction for f64
#[target_feature(enable = "avx2")]
pub unsafe fn reduce_f64(
    op: ReduceOp,
    a: *const f64,
    out: *mut f64,
    reduce_size: usize,
    outer_size: usize,
) {
    match op {
        ReduceOp::Sum => reduce_sum_f64(a, out, reduce_size, outer_size),
        ReduceOp::Max => reduce_max_f64(a, out, reduce_size, outer_size),
        ReduceOp::Min => reduce_min_f64(a, out, reduce_size, outer_size),
        ReduceOp::Prod => reduce_prod_f64(a, out, reduce_size, outer_size),
        _ => reduce_scalar_f64(op, a, out, reduce_size, outer_size),
    }
}

// ============================================================================
// Horizontal reduction helpers for AVX2
// ============================================================================

/// Horizontal sum of 8 f32s in __m256
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hsum_f32(v: __m256) -> f32 {
    // Add high 128 bits to low 128 bits
    let high = _mm256_extractf128_ps(v, 1);
    let low = _mm256_castps256_ps128(v);
    let sum128 = _mm_add_ps(low, high);

    // Horizontal add within 128 bits
    let shuf = _mm_movehdup_ps(sum128); // [1,1,3,3]
    let sum64 = _mm_add_ps(sum128, shuf);
    let shuf2 = _mm_movehl_ps(sum64, sum64);
    let sum32 = _mm_add_ss(sum64, shuf2);

    _mm_cvtss_f32(sum32)
}

/// Horizontal max of 8 f32s in __m256
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hmax_f32(v: __m256) -> f32 {
    let high = _mm256_extractf128_ps(v, 1);
    let low = _mm256_castps256_ps128(v);
    let max128 = _mm_max_ps(low, high);

    let shuf = _mm_movehdup_ps(max128);
    let max64 = _mm_max_ps(max128, shuf);
    let shuf2 = _mm_movehl_ps(max64, max64);
    let max32 = _mm_max_ss(max64, shuf2);

    _mm_cvtss_f32(max32)
}

/// Horizontal min of 8 f32s in __m256
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hmin_f32(v: __m256) -> f32 {
    let high = _mm256_extractf128_ps(v, 1);
    let low = _mm256_castps256_ps128(v);
    let min128 = _mm_min_ps(low, high);

    let shuf = _mm_movehdup_ps(min128);
    let min64 = _mm_min_ps(min128, shuf);
    let shuf2 = _mm_movehl_ps(min64, min64);
    let min32 = _mm_min_ss(min64, shuf2);

    _mm_cvtss_f32(min32)
}

/// Horizontal product of 8 f32s in __m256
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hprod_f32(v: __m256) -> f32 {
    let high = _mm256_extractf128_ps(v, 1);
    let low = _mm256_castps256_ps128(v);
    let prod128 = _mm_mul_ps(low, high);

    let shuf = _mm_movehdup_ps(prod128);
    let prod64 = _mm_mul_ps(prod128, shuf);
    let shuf2 = _mm_movehl_ps(prod64, prod64);
    let prod32 = _mm_mul_ss(prod64, shuf2);

    _mm_cvtss_f32(prod32)
}

/// Horizontal sum of 4 f64s in __m256d
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hsum_f64(v: __m256d) -> f64 {
    let high = _mm256_extractf128_pd(v, 1);
    let low = _mm256_castpd256_pd128(v);
    let sum128 = _mm_add_pd(low, high);

    let shuf = _mm_unpackhi_pd(sum128, sum128);
    let sum64 = _mm_add_sd(sum128, shuf);

    _mm_cvtsd_f64(sum64)
}

/// Horizontal max of 4 f64s in __m256d
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hmax_f64(v: __m256d) -> f64 {
    let high = _mm256_extractf128_pd(v, 1);
    let low = _mm256_castpd256_pd128(v);
    let max128 = _mm_max_pd(low, high);

    let shuf = _mm_unpackhi_pd(max128, max128);
    let max64 = _mm_max_sd(max128, shuf);

    _mm_cvtsd_f64(max64)
}

/// Horizontal min of 4 f64s in __m256d
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hmin_f64(v: __m256d) -> f64 {
    let high = _mm256_extractf128_pd(v, 1);
    let low = _mm256_castpd256_pd128(v);
    let min128 = _mm_min_pd(low, high);

    let shuf = _mm_unpackhi_pd(min128, min128);
    let min64 = _mm_min_sd(min128, shuf);

    _mm_cvtsd_f64(min64)
}

/// Horizontal product of 4 f64s in __m256d
#[target_feature(enable = "avx2")]
#[inline]
unsafe fn hprod_f64(v: __m256d) -> f64 {
    let high = _mm256_extractf128_pd(v, 1);
    let low = _mm256_castpd256_pd128(v);
    let prod128 = _mm_mul_pd(low, high);

    let shuf = _mm_unpackhi_pd(prod128, prod128);
    let prod64 = _mm_mul_sd(prod128, shuf);

    _mm_cvtsd_f64(prod64)
}

// ============================================================================
// f32 reductions
// ============================================================================

#[target_feature(enable = "avx2")]
unsafe fn reduce_sum_f32(a: *const f32, out: *mut f32, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F32_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;
        let mut acc = _mm256_setzero_ps();

        for c in 0..chunks {
            let v = _mm256_loadu_ps(a.add(base + c * F32_LANES));
            acc = _mm256_add_ps(acc, v);
        }

        let mut sum = hsum_f32(acc);

        for r in (chunks * F32_LANES)..reduce_size {
            sum += *a.add(base + r);
        }

        *out.add(o) = sum;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_max_f32(a: *const f32, out: *mut f32, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F32_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;

        let mut acc = if chunks > 0 {
            _mm256_loadu_ps(a.add(base))
        } else {
            _mm256_set1_ps(*a.add(base))
        };

        for c in 1..chunks {
            let v = _mm256_loadu_ps(a.add(base + c * F32_LANES));
            acc = _mm256_max_ps(acc, v);
        }

        let mut max_val = hmax_f32(acc);

        for r in (chunks * F32_LANES)..reduce_size {
            let val = *a.add(base + r);
            if val > max_val {
                max_val = val;
            }
        }

        *out.add(o) = max_val;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_min_f32(a: *const f32, out: *mut f32, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F32_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;

        let mut acc = if chunks > 0 {
            _mm256_loadu_ps(a.add(base))
        } else {
            _mm256_set1_ps(*a.add(base))
        };

        for c in 1..chunks {
            let v = _mm256_loadu_ps(a.add(base + c * F32_LANES));
            acc = _mm256_min_ps(acc, v);
        }

        let mut min_val = hmin_f32(acc);

        for r in (chunks * F32_LANES)..reduce_size {
            let val = *a.add(base + r);
            if val < min_val {
                min_val = val;
            }
        }

        *out.add(o) = min_val;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_prod_f32(a: *const f32, out: *mut f32, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F32_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;
        let mut acc = _mm256_set1_ps(1.0);

        for c in 0..chunks {
            let v = _mm256_loadu_ps(a.add(base + c * F32_LANES));
            acc = _mm256_mul_ps(acc, v);
        }

        let mut prod = hprod_f32(acc);

        for r in (chunks * F32_LANES)..reduce_size {
            prod *= *a.add(base + r);
        }

        *out.add(o) = prod;
    }
}

// ============================================================================
// f64 reductions
// ============================================================================

#[target_feature(enable = "avx2")]
unsafe fn reduce_sum_f64(a: *const f64, out: *mut f64, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F64_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;
        let mut acc = _mm256_setzero_pd();

        for c in 0..chunks {
            let v = _mm256_loadu_pd(a.add(base + c * F64_LANES));
            acc = _mm256_add_pd(acc, v);
        }

        let mut sum = hsum_f64(acc);

        for r in (chunks * F64_LANES)..reduce_size {
            sum += *a.add(base + r);
        }

        *out.add(o) = sum;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_max_f64(a: *const f64, out: *mut f64, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F64_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;

        let mut acc = if chunks > 0 {
            _mm256_loadu_pd(a.add(base))
        } else {
            _mm256_set1_pd(*a.add(base))
        };

        for c in 1..chunks {
            let v = _mm256_loadu_pd(a.add(base + c * F64_LANES));
            acc = _mm256_max_pd(acc, v);
        }

        let mut max_val = hmax_f64(acc);

        for r in (chunks * F64_LANES)..reduce_size {
            let val = *a.add(base + r);
            if val > max_val {
                max_val = val;
            }
        }

        *out.add(o) = max_val;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_min_f64(a: *const f64, out: *mut f64, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F64_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;

        let mut acc = if chunks > 0 {
            _mm256_loadu_pd(a.add(base))
        } else {
            _mm256_set1_pd(*a.add(base))
        };

        for c in 1..chunks {
            let v = _mm256_loadu_pd(a.add(base + c * F64_LANES));
            acc = _mm256_min_pd(acc, v);
        }

        let mut min_val = hmin_f64(acc);

        for r in (chunks * F64_LANES)..reduce_size {
            let val = *a.add(base + r);
            if val < min_val {
                min_val = val;
            }
        }

        *out.add(o) = min_val;
    }
}

#[target_feature(enable = "avx2")]
unsafe fn reduce_prod_f64(a: *const f64, out: *mut f64, reduce_size: usize, outer_size: usize) {
    let chunks = reduce_size / F64_LANES;

    for o in 0..outer_size {
        let base = o * reduce_size;
        let mut acc = _mm256_set1_pd(1.0);

        for c in 0..chunks {
            let v = _mm256_loadu_pd(a.add(base + c * F64_LANES));
            acc = _mm256_mul_pd(acc, v);
        }

        let mut prod = hprod_f64(acc);

        for r in (chunks * F64_LANES)..reduce_size {
            prod *= *a.add(base + r);
        }

        *out.add(o) = prod;
    }
}