[−][src]Struct nrf5340_net_pac::spim0_ns::RegisterBlock
Register block
Fields
tasks_start: TASKS_START
0x10 - Start SPI transaction
tasks_stop: TASKS_STOP
0x14 - Stop SPI transaction
tasks_suspend: TASKS_SUSPEND
0x1c - Suspend SPI transaction
tasks_resume: TASKS_RESUME
0x20 - Resume SPI transaction
subscribe_start: SUBSCRIBE_START
0x90 - Subscribe configuration for task START
subscribe_stop: SUBSCRIBE_STOP
0x94 - Subscribe configuration for task STOP
subscribe_suspend: SUBSCRIBE_SUSPEND
0x9c - Subscribe configuration for task SUSPEND
subscribe_resume: SUBSCRIBE_RESUME
0xa0 - Subscribe configuration for task RESUME
events_stopped: EVENTS_STOPPED
0x104 - SPI transaction has stopped
events_endrx: EVENTS_ENDRX
0x110 - End of RXD buffer reached
events_end: EVENTS_END
0x118 - End of RXD buffer and TXD buffer reached
events_endtx: EVENTS_ENDTX
0x120 - End of TXD buffer reached
events_started: EVENTS_STARTED
0x14c - Transaction started
publish_stopped: PUBLISH_STOPPED
0x184 - Publish configuration for event STOPPED
publish_endrx: PUBLISH_ENDRX
0x190 - Publish configuration for event ENDRX
publish_end: PUBLISH_END
0x198 - Publish configuration for event END
publish_endtx: PUBLISH_ENDTX
0x1a0 - Publish configuration for event ENDTX
publish_started: PUBLISH_STARTED
0x1cc - Publish configuration for event STARTED
shorts: SHORTS
0x200 - Shortcuts between local events and tasks
intenset: INTENSET
0x304 - Enable interrupt
intenclr: INTENCLR
0x308 - Disable interrupt
stallstat: STALLSTAT
0x400 - Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.
enable: ENABLE
0x500 - Enable SPIM
psel: PSEL
0x508 - Unspecified
frequency: FREQUENCY
0x524 - SPI frequency. Accuracy depends on the HFCLK source selected.
rxd: RXD
0x534 - RXD EasyDMA channel
txd: TXD
0x544 - TXD EasyDMA channel
config: CONFIG
0x554 - Configuration register
iftiming: IFTIMING
0x560 - Unspecified
csnpol: CSNPOL
0x568 - Polarity of CSN output
pseldcx: PSELDCX
0x56c - Pin select for DCX signal
dcxcnt: DCXCNT
0x570 - DCX configuration
orc: ORC
0x5c0 - Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT
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