1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CONFIG {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `RESP`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum RESPR {
48 #[doc = "Bypass resistor ladder"]
49 BYPASS,
50 #[doc = "Pull-down to GND"]
51 PULLDOWN,
52 #[doc = "Pull-up to VDD"]
53 PULLUP,
54 #[doc = "Set input at VDD/2"]
55 VDD1_2,
56}
57impl RESPR {
58 #[doc = r" Value of the field as raw bits"]
59 #[inline]
60 pub fn bits(&self) -> u8 {
61 match *self {
62 RESPR::BYPASS => 0,
63 RESPR::PULLDOWN => 1,
64 RESPR::PULLUP => 2,
65 RESPR::VDD1_2 => 3,
66 }
67 }
68 #[allow(missing_docs)]
69 #[doc(hidden)]
70 #[inline]
71 pub fn _from(value: u8) -> RESPR {
72 match value {
73 0 => RESPR::BYPASS,
74 1 => RESPR::PULLDOWN,
75 2 => RESPR::PULLUP,
76 3 => RESPR::VDD1_2,
77 _ => unreachable!(),
78 }
79 }
80 #[doc = "Checks if the value of the field is `BYPASS`"]
81 #[inline]
82 pub fn is_bypass(&self) -> bool {
83 *self == RESPR::BYPASS
84 }
85 #[doc = "Checks if the value of the field is `PULLDOWN`"]
86 #[inline]
87 pub fn is_pulldown(&self) -> bool {
88 *self == RESPR::PULLDOWN
89 }
90 #[doc = "Checks if the value of the field is `PULLUP`"]
91 #[inline]
92 pub fn is_pullup(&self) -> bool {
93 *self == RESPR::PULLUP
94 }
95 #[doc = "Checks if the value of the field is `VDD1_2`"]
96 #[inline]
97 pub fn is_vdd1_2(&self) -> bool {
98 *self == RESPR::VDD1_2
99 }
100}
101#[doc = "Possible values of the field `RESN`"]
102#[derive(Clone, Copy, Debug, PartialEq)]
103pub enum RESNR {
104 #[doc = "Bypass resistor ladder"]
105 BYPASS,
106 #[doc = "Pull-down to GND"]
107 PULLDOWN,
108 #[doc = "Pull-up to VDD"]
109 PULLUP,
110 #[doc = "Set input at VDD/2"]
111 VDD1_2,
112}
113impl RESNR {
114 #[doc = r" Value of the field as raw bits"]
115 #[inline]
116 pub fn bits(&self) -> u8 {
117 match *self {
118 RESNR::BYPASS => 0,
119 RESNR::PULLDOWN => 1,
120 RESNR::PULLUP => 2,
121 RESNR::VDD1_2 => 3,
122 }
123 }
124 #[allow(missing_docs)]
125 #[doc(hidden)]
126 #[inline]
127 pub fn _from(value: u8) -> RESNR {
128 match value {
129 0 => RESNR::BYPASS,
130 1 => RESNR::PULLDOWN,
131 2 => RESNR::PULLUP,
132 3 => RESNR::VDD1_2,
133 _ => unreachable!(),
134 }
135 }
136 #[doc = "Checks if the value of the field is `BYPASS`"]
137 #[inline]
138 pub fn is_bypass(&self) -> bool {
139 *self == RESNR::BYPASS
140 }
141 #[doc = "Checks if the value of the field is `PULLDOWN`"]
142 #[inline]
143 pub fn is_pulldown(&self) -> bool {
144 *self == RESNR::PULLDOWN
145 }
146 #[doc = "Checks if the value of the field is `PULLUP`"]
147 #[inline]
148 pub fn is_pullup(&self) -> bool {
149 *self == RESNR::PULLUP
150 }
151 #[doc = "Checks if the value of the field is `VDD1_2`"]
152 #[inline]
153 pub fn is_vdd1_2(&self) -> bool {
154 *self == RESNR::VDD1_2
155 }
156}
157#[doc = "Possible values of the field `GAIN`"]
158#[derive(Clone, Copy, Debug, PartialEq)]
159pub enum GAINR {
160 #[doc = "1/6"]
161 GAIN1_6,
162 #[doc = "1/5"]
163 GAIN1_5,
164 #[doc = "1/4"]
165 GAIN1_4,
166 #[doc = "1/3"]
167 GAIN1_3,
168 #[doc = "1/2"]
169 GAIN1_2,
170 #[doc = "1"]
171 GAIN1,
172 #[doc = "2"]
173 GAIN2,
174 #[doc = "4"]
175 GAIN4,
176}
177impl GAINR {
178 #[doc = r" Value of the field as raw bits"]
179 #[inline]
180 pub fn bits(&self) -> u8 {
181 match *self {
182 GAINR::GAIN1_6 => 0,
183 GAINR::GAIN1_5 => 1,
184 GAINR::GAIN1_4 => 2,
185 GAINR::GAIN1_3 => 3,
186 GAINR::GAIN1_2 => 4,
187 GAINR::GAIN1 => 5,
188 GAINR::GAIN2 => 6,
189 GAINR::GAIN4 => 7,
190 }
191 }
192 #[allow(missing_docs)]
193 #[doc(hidden)]
194 #[inline]
195 pub fn _from(value: u8) -> GAINR {
196 match value {
197 0 => GAINR::GAIN1_6,
198 1 => GAINR::GAIN1_5,
199 2 => GAINR::GAIN1_4,
200 3 => GAINR::GAIN1_3,
201 4 => GAINR::GAIN1_2,
202 5 => GAINR::GAIN1,
203 6 => GAINR::GAIN2,
204 7 => GAINR::GAIN4,
205 _ => unreachable!(),
206 }
207 }
208 #[doc = "Checks if the value of the field is `GAIN1_6`"]
209 #[inline]
210 pub fn is_gain1_6(&self) -> bool {
211 *self == GAINR::GAIN1_6
212 }
213 #[doc = "Checks if the value of the field is `GAIN1_5`"]
214 #[inline]
215 pub fn is_gain1_5(&self) -> bool {
216 *self == GAINR::GAIN1_5
217 }
218 #[doc = "Checks if the value of the field is `GAIN1_4`"]
219 #[inline]
220 pub fn is_gain1_4(&self) -> bool {
221 *self == GAINR::GAIN1_4
222 }
223 #[doc = "Checks if the value of the field is `GAIN1_3`"]
224 #[inline]
225 pub fn is_gain1_3(&self) -> bool {
226 *self == GAINR::GAIN1_3
227 }
228 #[doc = "Checks if the value of the field is `GAIN1_2`"]
229 #[inline]
230 pub fn is_gain1_2(&self) -> bool {
231 *self == GAINR::GAIN1_2
232 }
233 #[doc = "Checks if the value of the field is `GAIN1`"]
234 #[inline]
235 pub fn is_gain1(&self) -> bool {
236 *self == GAINR::GAIN1
237 }
238 #[doc = "Checks if the value of the field is `GAIN2`"]
239 #[inline]
240 pub fn is_gain2(&self) -> bool {
241 *self == GAINR::GAIN2
242 }
243 #[doc = "Checks if the value of the field is `GAIN4`"]
244 #[inline]
245 pub fn is_gain4(&self) -> bool {
246 *self == GAINR::GAIN4
247 }
248}
249#[doc = "Possible values of the field `REFSEL`"]
250#[derive(Clone, Copy, Debug, PartialEq)]
251pub enum REFSELR {
252 #[doc = "Internal reference (0.6 V)"]
253 INTERNAL,
254 #[doc = "VDD/4 as reference"]
255 VDD1_4,
256}
257impl REFSELR {
258 #[doc = r" Returns `true` if the bit is clear (0)"]
259 #[inline]
260 pub fn bit_is_clear(&self) -> bool {
261 !self.bit()
262 }
263 #[doc = r" Returns `true` if the bit is set (1)"]
264 #[inline]
265 pub fn bit_is_set(&self) -> bool {
266 self.bit()
267 }
268 #[doc = r" Value of the field as raw bits"]
269 #[inline]
270 pub fn bit(&self) -> bool {
271 match *self {
272 REFSELR::INTERNAL => false,
273 REFSELR::VDD1_4 => true,
274 }
275 }
276 #[allow(missing_docs)]
277 #[doc(hidden)]
278 #[inline]
279 pub fn _from(value: bool) -> REFSELR {
280 match value {
281 false => REFSELR::INTERNAL,
282 true => REFSELR::VDD1_4,
283 }
284 }
285 #[doc = "Checks if the value of the field is `INTERNAL`"]
286 #[inline]
287 pub fn is_internal(&self) -> bool {
288 *self == REFSELR::INTERNAL
289 }
290 #[doc = "Checks if the value of the field is `VDD1_4`"]
291 #[inline]
292 pub fn is_vdd1_4(&self) -> bool {
293 *self == REFSELR::VDD1_4
294 }
295}
296#[doc = "Possible values of the field `TACQ`"]
297#[derive(Clone, Copy, Debug, PartialEq)]
298pub enum TACQR {
299 #[doc = "3 us"]
300 _3US,
301 #[doc = "5 us"]
302 _5US,
303 #[doc = "10 us"]
304 _10US,
305 #[doc = "15 us"]
306 _15US,
307 #[doc = "20 us"]
308 _20US,
309 #[doc = "40 us"]
310 _40US,
311 #[doc = r" Reserved"]
312 _Reserved(u8),
313}
314impl TACQR {
315 #[doc = r" Value of the field as raw bits"]
316 #[inline]
317 pub fn bits(&self) -> u8 {
318 match *self {
319 TACQR::_3US => 0,
320 TACQR::_5US => 1,
321 TACQR::_10US => 2,
322 TACQR::_15US => 3,
323 TACQR::_20US => 4,
324 TACQR::_40US => 5,
325 TACQR::_Reserved(bits) => bits,
326 }
327 }
328 #[allow(missing_docs)]
329 #[doc(hidden)]
330 #[inline]
331 pub fn _from(value: u8) -> TACQR {
332 match value {
333 0 => TACQR::_3US,
334 1 => TACQR::_5US,
335 2 => TACQR::_10US,
336 3 => TACQR::_15US,
337 4 => TACQR::_20US,
338 5 => TACQR::_40US,
339 i => TACQR::_Reserved(i),
340 }
341 }
342 #[doc = "Checks if the value of the field is `_3US`"]
343 #[inline]
344 pub fn is_3us(&self) -> bool {
345 *self == TACQR::_3US
346 }
347 #[doc = "Checks if the value of the field is `_5US`"]
348 #[inline]
349 pub fn is_5us(&self) -> bool {
350 *self == TACQR::_5US
351 }
352 #[doc = "Checks if the value of the field is `_10US`"]
353 #[inline]
354 pub fn is_10us(&self) -> bool {
355 *self == TACQR::_10US
356 }
357 #[doc = "Checks if the value of the field is `_15US`"]
358 #[inline]
359 pub fn is_15us(&self) -> bool {
360 *self == TACQR::_15US
361 }
362 #[doc = "Checks if the value of the field is `_20US`"]
363 #[inline]
364 pub fn is_20us(&self) -> bool {
365 *self == TACQR::_20US
366 }
367 #[doc = "Checks if the value of the field is `_40US`"]
368 #[inline]
369 pub fn is_40us(&self) -> bool {
370 *self == TACQR::_40US
371 }
372}
373#[doc = "Possible values of the field `MODE`"]
374#[derive(Clone, Copy, Debug, PartialEq)]
375pub enum MODER {
376 #[doc = "Single ended, PSELN will be ignored, negative input to ADC shorted to GND"]
377 SE,
378 #[doc = "Differential"]
379 DIFF,
380}
381impl MODER {
382 #[doc = r" Returns `true` if the bit is clear (0)"]
383 #[inline]
384 pub fn bit_is_clear(&self) -> bool {
385 !self.bit()
386 }
387 #[doc = r" Returns `true` if the bit is set (1)"]
388 #[inline]
389 pub fn bit_is_set(&self) -> bool {
390 self.bit()
391 }
392 #[doc = r" Value of the field as raw bits"]
393 #[inline]
394 pub fn bit(&self) -> bool {
395 match *self {
396 MODER::SE => false,
397 MODER::DIFF => true,
398 }
399 }
400 #[allow(missing_docs)]
401 #[doc(hidden)]
402 #[inline]
403 pub fn _from(value: bool) -> MODER {
404 match value {
405 false => MODER::SE,
406 true => MODER::DIFF,
407 }
408 }
409 #[doc = "Checks if the value of the field is `SE`"]
410 #[inline]
411 pub fn is_se(&self) -> bool {
412 *self == MODER::SE
413 }
414 #[doc = "Checks if the value of the field is `DIFF`"]
415 #[inline]
416 pub fn is_diff(&self) -> bool {
417 *self == MODER::DIFF
418 }
419}
420#[doc = "Possible values of the field `BURST`"]
421#[derive(Clone, Copy, Debug, PartialEq)]
422pub enum BURSTR {
423 #[doc = "Burst mode is disabled (normal operation)"]
424 DISABLED,
425 #[doc = "Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM."]
426 ENABLED,
427}
428impl BURSTR {
429 #[doc = r" Returns `true` if the bit is clear (0)"]
430 #[inline]
431 pub fn bit_is_clear(&self) -> bool {
432 !self.bit()
433 }
434 #[doc = r" Returns `true` if the bit is set (1)"]
435 #[inline]
436 pub fn bit_is_set(&self) -> bool {
437 self.bit()
438 }
439 #[doc = r" Value of the field as raw bits"]
440 #[inline]
441 pub fn bit(&self) -> bool {
442 match *self {
443 BURSTR::DISABLED => false,
444 BURSTR::ENABLED => true,
445 }
446 }
447 #[allow(missing_docs)]
448 #[doc(hidden)]
449 #[inline]
450 pub fn _from(value: bool) -> BURSTR {
451 match value {
452 false => BURSTR::DISABLED,
453 true => BURSTR::ENABLED,
454 }
455 }
456 #[doc = "Checks if the value of the field is `DISABLED`"]
457 #[inline]
458 pub fn is_disabled(&self) -> bool {
459 *self == BURSTR::DISABLED
460 }
461 #[doc = "Checks if the value of the field is `ENABLED`"]
462 #[inline]
463 pub fn is_enabled(&self) -> bool {
464 *self == BURSTR::ENABLED
465 }
466}
467#[doc = "Values that can be written to the field `RESP`"]
468pub enum RESPW {
469 #[doc = "Bypass resistor ladder"]
470 BYPASS,
471 #[doc = "Pull-down to GND"]
472 PULLDOWN,
473 #[doc = "Pull-up to VDD"]
474 PULLUP,
475 #[doc = "Set input at VDD/2"]
476 VDD1_2,
477}
478impl RESPW {
479 #[allow(missing_docs)]
480 #[doc(hidden)]
481 #[inline]
482 pub fn _bits(&self) -> u8 {
483 match *self {
484 RESPW::BYPASS => 0,
485 RESPW::PULLDOWN => 1,
486 RESPW::PULLUP => 2,
487 RESPW::VDD1_2 => 3,
488 }
489 }
490}
491#[doc = r" Proxy"]
492pub struct _RESPW<'a> {
493 w: &'a mut W,
494}
495impl<'a> _RESPW<'a> {
496 #[doc = r" Writes `variant` to the field"]
497 #[inline]
498 pub fn variant(self, variant: RESPW) -> &'a mut W {
499 {
500 self.bits(variant._bits())
501 }
502 }
503 #[doc = "Bypass resistor ladder"]
504 #[inline]
505 pub fn bypass(self) -> &'a mut W {
506 self.variant(RESPW::BYPASS)
507 }
508 #[doc = "Pull-down to GND"]
509 #[inline]
510 pub fn pulldown(self) -> &'a mut W {
511 self.variant(RESPW::PULLDOWN)
512 }
513 #[doc = "Pull-up to VDD"]
514 #[inline]
515 pub fn pullup(self) -> &'a mut W {
516 self.variant(RESPW::PULLUP)
517 }
518 #[doc = "Set input at VDD/2"]
519 #[inline]
520 pub fn vdd1_2(self) -> &'a mut W {
521 self.variant(RESPW::VDD1_2)
522 }
523 #[doc = r" Writes raw bits to the field"]
524 #[inline]
525 pub fn bits(self, value: u8) -> &'a mut W {
526 const MASK: u8 = 3;
527 const OFFSET: u8 = 0;
528 self.w.bits &= !((MASK as u32) << OFFSET);
529 self.w.bits |= ((value & MASK) as u32) << OFFSET;
530 self.w
531 }
532}
533#[doc = "Values that can be written to the field `RESN`"]
534pub enum RESNW {
535 #[doc = "Bypass resistor ladder"]
536 BYPASS,
537 #[doc = "Pull-down to GND"]
538 PULLDOWN,
539 #[doc = "Pull-up to VDD"]
540 PULLUP,
541 #[doc = "Set input at VDD/2"]
542 VDD1_2,
543}
544impl RESNW {
545 #[allow(missing_docs)]
546 #[doc(hidden)]
547 #[inline]
548 pub fn _bits(&self) -> u8 {
549 match *self {
550 RESNW::BYPASS => 0,
551 RESNW::PULLDOWN => 1,
552 RESNW::PULLUP => 2,
553 RESNW::VDD1_2 => 3,
554 }
555 }
556}
557#[doc = r" Proxy"]
558pub struct _RESNW<'a> {
559 w: &'a mut W,
560}
561impl<'a> _RESNW<'a> {
562 #[doc = r" Writes `variant` to the field"]
563 #[inline]
564 pub fn variant(self, variant: RESNW) -> &'a mut W {
565 {
566 self.bits(variant._bits())
567 }
568 }
569 #[doc = "Bypass resistor ladder"]
570 #[inline]
571 pub fn bypass(self) -> &'a mut W {
572 self.variant(RESNW::BYPASS)
573 }
574 #[doc = "Pull-down to GND"]
575 #[inline]
576 pub fn pulldown(self) -> &'a mut W {
577 self.variant(RESNW::PULLDOWN)
578 }
579 #[doc = "Pull-up to VDD"]
580 #[inline]
581 pub fn pullup(self) -> &'a mut W {
582 self.variant(RESNW::PULLUP)
583 }
584 #[doc = "Set input at VDD/2"]
585 #[inline]
586 pub fn vdd1_2(self) -> &'a mut W {
587 self.variant(RESNW::VDD1_2)
588 }
589 #[doc = r" Writes raw bits to the field"]
590 #[inline]
591 pub fn bits(self, value: u8) -> &'a mut W {
592 const MASK: u8 = 3;
593 const OFFSET: u8 = 4;
594 self.w.bits &= !((MASK as u32) << OFFSET);
595 self.w.bits |= ((value & MASK) as u32) << OFFSET;
596 self.w
597 }
598}
599#[doc = "Values that can be written to the field `GAIN`"]
600pub enum GAINW {
601 #[doc = "1/6"]
602 GAIN1_6,
603 #[doc = "1/5"]
604 GAIN1_5,
605 #[doc = "1/4"]
606 GAIN1_4,
607 #[doc = "1/3"]
608 GAIN1_3,
609 #[doc = "1/2"]
610 GAIN1_2,
611 #[doc = "1"]
612 GAIN1,
613 #[doc = "2"]
614 GAIN2,
615 #[doc = "4"]
616 GAIN4,
617}
618impl GAINW {
619 #[allow(missing_docs)]
620 #[doc(hidden)]
621 #[inline]
622 pub fn _bits(&self) -> u8 {
623 match *self {
624 GAINW::GAIN1_6 => 0,
625 GAINW::GAIN1_5 => 1,
626 GAINW::GAIN1_4 => 2,
627 GAINW::GAIN1_3 => 3,
628 GAINW::GAIN1_2 => 4,
629 GAINW::GAIN1 => 5,
630 GAINW::GAIN2 => 6,
631 GAINW::GAIN4 => 7,
632 }
633 }
634}
635#[doc = r" Proxy"]
636pub struct _GAINW<'a> {
637 w: &'a mut W,
638}
639impl<'a> _GAINW<'a> {
640 #[doc = r" Writes `variant` to the field"]
641 #[inline]
642 pub fn variant(self, variant: GAINW) -> &'a mut W {
643 {
644 self.bits(variant._bits())
645 }
646 }
647 #[doc = "1/6"]
648 #[inline]
649 pub fn gain1_6(self) -> &'a mut W {
650 self.variant(GAINW::GAIN1_6)
651 }
652 #[doc = "1/5"]
653 #[inline]
654 pub fn gain1_5(self) -> &'a mut W {
655 self.variant(GAINW::GAIN1_5)
656 }
657 #[doc = "1/4"]
658 #[inline]
659 pub fn gain1_4(self) -> &'a mut W {
660 self.variant(GAINW::GAIN1_4)
661 }
662 #[doc = "1/3"]
663 #[inline]
664 pub fn gain1_3(self) -> &'a mut W {
665 self.variant(GAINW::GAIN1_3)
666 }
667 #[doc = "1/2"]
668 #[inline]
669 pub fn gain1_2(self) -> &'a mut W {
670 self.variant(GAINW::GAIN1_2)
671 }
672 #[doc = "1"]
673 #[inline]
674 pub fn gain1(self) -> &'a mut W {
675 self.variant(GAINW::GAIN1)
676 }
677 #[doc = "2"]
678 #[inline]
679 pub fn gain2(self) -> &'a mut W {
680 self.variant(GAINW::GAIN2)
681 }
682 #[doc = "4"]
683 #[inline]
684 pub fn gain4(self) -> &'a mut W {
685 self.variant(GAINW::GAIN4)
686 }
687 #[doc = r" Writes raw bits to the field"]
688 #[inline]
689 pub fn bits(self, value: u8) -> &'a mut W {
690 const MASK: u8 = 7;
691 const OFFSET: u8 = 8;
692 self.w.bits &= !((MASK as u32) << OFFSET);
693 self.w.bits |= ((value & MASK) as u32) << OFFSET;
694 self.w
695 }
696}
697#[doc = "Values that can be written to the field `REFSEL`"]
698pub enum REFSELW {
699 #[doc = "Internal reference (0.6 V)"]
700 INTERNAL,
701 #[doc = "VDD/4 as reference"]
702 VDD1_4,
703}
704impl REFSELW {
705 #[allow(missing_docs)]
706 #[doc(hidden)]
707 #[inline]
708 pub fn _bits(&self) -> bool {
709 match *self {
710 REFSELW::INTERNAL => false,
711 REFSELW::VDD1_4 => true,
712 }
713 }
714}
715#[doc = r" Proxy"]
716pub struct _REFSELW<'a> {
717 w: &'a mut W,
718}
719impl<'a> _REFSELW<'a> {
720 #[doc = r" Writes `variant` to the field"]
721 #[inline]
722 pub fn variant(self, variant: REFSELW) -> &'a mut W {
723 {
724 self.bit(variant._bits())
725 }
726 }
727 #[doc = "Internal reference (0.6 V)"]
728 #[inline]
729 pub fn internal(self) -> &'a mut W {
730 self.variant(REFSELW::INTERNAL)
731 }
732 #[doc = "VDD/4 as reference"]
733 #[inline]
734 pub fn vdd1_4(self) -> &'a mut W {
735 self.variant(REFSELW::VDD1_4)
736 }
737 #[doc = r" Sets the field bit"]
738 pub fn set_bit(self) -> &'a mut W {
739 self.bit(true)
740 }
741 #[doc = r" Clears the field bit"]
742 pub fn clear_bit(self) -> &'a mut W {
743 self.bit(false)
744 }
745 #[doc = r" Writes raw bits to the field"]
746 #[inline]
747 pub fn bit(self, value: bool) -> &'a mut W {
748 const MASK: bool = true;
749 const OFFSET: u8 = 12;
750 self.w.bits &= !((MASK as u32) << OFFSET);
751 self.w.bits |= ((value & MASK) as u32) << OFFSET;
752 self.w
753 }
754}
755#[doc = "Values that can be written to the field `TACQ`"]
756pub enum TACQW {
757 #[doc = "3 us"]
758 _3US,
759 #[doc = "5 us"]
760 _5US,
761 #[doc = "10 us"]
762 _10US,
763 #[doc = "15 us"]
764 _15US,
765 #[doc = "20 us"]
766 _20US,
767 #[doc = "40 us"]
768 _40US,
769}
770impl TACQW {
771 #[allow(missing_docs)]
772 #[doc(hidden)]
773 #[inline]
774 pub fn _bits(&self) -> u8 {
775 match *self {
776 TACQW::_3US => 0,
777 TACQW::_5US => 1,
778 TACQW::_10US => 2,
779 TACQW::_15US => 3,
780 TACQW::_20US => 4,
781 TACQW::_40US => 5,
782 }
783 }
784}
785#[doc = r" Proxy"]
786pub struct _TACQW<'a> {
787 w: &'a mut W,
788}
789impl<'a> _TACQW<'a> {
790 #[doc = r" Writes `variant` to the field"]
791 #[inline]
792 pub fn variant(self, variant: TACQW) -> &'a mut W {
793 unsafe { self.bits(variant._bits()) }
794 }
795 #[doc = "3 us"]
796 #[inline]
797 pub fn _3us(self) -> &'a mut W {
798 self.variant(TACQW::_3US)
799 }
800 #[doc = "5 us"]
801 #[inline]
802 pub fn _5us(self) -> &'a mut W {
803 self.variant(TACQW::_5US)
804 }
805 #[doc = "10 us"]
806 #[inline]
807 pub fn _10us(self) -> &'a mut W {
808 self.variant(TACQW::_10US)
809 }
810 #[doc = "15 us"]
811 #[inline]
812 pub fn _15us(self) -> &'a mut W {
813 self.variant(TACQW::_15US)
814 }
815 #[doc = "20 us"]
816 #[inline]
817 pub fn _20us(self) -> &'a mut W {
818 self.variant(TACQW::_20US)
819 }
820 #[doc = "40 us"]
821 #[inline]
822 pub fn _40us(self) -> &'a mut W {
823 self.variant(TACQW::_40US)
824 }
825 #[doc = r" Writes raw bits to the field"]
826 #[inline]
827 pub unsafe fn bits(self, value: u8) -> &'a mut W {
828 const MASK: u8 = 7;
829 const OFFSET: u8 = 16;
830 self.w.bits &= !((MASK as u32) << OFFSET);
831 self.w.bits |= ((value & MASK) as u32) << OFFSET;
832 self.w
833 }
834}
835#[doc = "Values that can be written to the field `MODE`"]
836pub enum MODEW {
837 #[doc = "Single ended, PSELN will be ignored, negative input to ADC shorted to GND"]
838 SE,
839 #[doc = "Differential"]
840 DIFF,
841}
842impl MODEW {
843 #[allow(missing_docs)]
844 #[doc(hidden)]
845 #[inline]
846 pub fn _bits(&self) -> bool {
847 match *self {
848 MODEW::SE => false,
849 MODEW::DIFF => true,
850 }
851 }
852}
853#[doc = r" Proxy"]
854pub struct _MODEW<'a> {
855 w: &'a mut W,
856}
857impl<'a> _MODEW<'a> {
858 #[doc = r" Writes `variant` to the field"]
859 #[inline]
860 pub fn variant(self, variant: MODEW) -> &'a mut W {
861 {
862 self.bit(variant._bits())
863 }
864 }
865 #[doc = "Single ended, PSELN will be ignored, negative input to ADC shorted to GND"]
866 #[inline]
867 pub fn se(self) -> &'a mut W {
868 self.variant(MODEW::SE)
869 }
870 #[doc = "Differential"]
871 #[inline]
872 pub fn diff(self) -> &'a mut W {
873 self.variant(MODEW::DIFF)
874 }
875 #[doc = r" Sets the field bit"]
876 pub fn set_bit(self) -> &'a mut W {
877 self.bit(true)
878 }
879 #[doc = r" Clears the field bit"]
880 pub fn clear_bit(self) -> &'a mut W {
881 self.bit(false)
882 }
883 #[doc = r" Writes raw bits to the field"]
884 #[inline]
885 pub fn bit(self, value: bool) -> &'a mut W {
886 const MASK: bool = true;
887 const OFFSET: u8 = 20;
888 self.w.bits &= !((MASK as u32) << OFFSET);
889 self.w.bits |= ((value & MASK) as u32) << OFFSET;
890 self.w
891 }
892}
893#[doc = "Values that can be written to the field `BURST`"]
894pub enum BURSTW {
895 #[doc = "Burst mode is disabled (normal operation)"]
896 DISABLED,
897 #[doc = "Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM."]
898 ENABLED,
899}
900impl BURSTW {
901 #[allow(missing_docs)]
902 #[doc(hidden)]
903 #[inline]
904 pub fn _bits(&self) -> bool {
905 match *self {
906 BURSTW::DISABLED => false,
907 BURSTW::ENABLED => true,
908 }
909 }
910}
911#[doc = r" Proxy"]
912pub struct _BURSTW<'a> {
913 w: &'a mut W,
914}
915impl<'a> _BURSTW<'a> {
916 #[doc = r" Writes `variant` to the field"]
917 #[inline]
918 pub fn variant(self, variant: BURSTW) -> &'a mut W {
919 {
920 self.bit(variant._bits())
921 }
922 }
923 #[doc = "Burst mode is disabled (normal operation)"]
924 #[inline]
925 pub fn disabled(self) -> &'a mut W {
926 self.variant(BURSTW::DISABLED)
927 }
928 #[doc = "Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM."]
929 #[inline]
930 pub fn enabled(self) -> &'a mut W {
931 self.variant(BURSTW::ENABLED)
932 }
933 #[doc = r" Sets the field bit"]
934 pub fn set_bit(self) -> &'a mut W {
935 self.bit(true)
936 }
937 #[doc = r" Clears the field bit"]
938 pub fn clear_bit(self) -> &'a mut W {
939 self.bit(false)
940 }
941 #[doc = r" Writes raw bits to the field"]
942 #[inline]
943 pub fn bit(self, value: bool) -> &'a mut W {
944 const MASK: bool = true;
945 const OFFSET: u8 = 24;
946 self.w.bits &= !((MASK as u32) << OFFSET);
947 self.w.bits |= ((value & MASK) as u32) << OFFSET;
948 self.w
949 }
950}
951impl R {
952 #[doc = r" Value of the register as raw bits"]
953 #[inline]
954 pub fn bits(&self) -> u32 {
955 self.bits
956 }
957 #[doc = "Bits 0:1 - Positive channel resistor control"]
958 #[inline]
959 pub fn resp(&self) -> RESPR {
960 RESPR::_from({
961 const MASK: u8 = 3;
962 const OFFSET: u8 = 0;
963 ((self.bits >> OFFSET) & MASK as u32) as u8
964 })
965 }
966 #[doc = "Bits 4:5 - Negative channel resistor control"]
967 #[inline]
968 pub fn resn(&self) -> RESNR {
969 RESNR::_from({
970 const MASK: u8 = 3;
971 const OFFSET: u8 = 4;
972 ((self.bits >> OFFSET) & MASK as u32) as u8
973 })
974 }
975 #[doc = "Bits 8:10 - Gain control"]
976 #[inline]
977 pub fn gain(&self) -> GAINR {
978 GAINR::_from({
979 const MASK: u8 = 7;
980 const OFFSET: u8 = 8;
981 ((self.bits >> OFFSET) & MASK as u32) as u8
982 })
983 }
984 #[doc = "Bit 12 - Reference control"]
985 #[inline]
986 pub fn refsel(&self) -> REFSELR {
987 REFSELR::_from({
988 const MASK: bool = true;
989 const OFFSET: u8 = 12;
990 ((self.bits >> OFFSET) & MASK as u32) != 0
991 })
992 }
993 #[doc = "Bits 16:18 - Acquisition time, the time the ADC uses to sample the input voltage"]
994 #[inline]
995 pub fn tacq(&self) -> TACQR {
996 TACQR::_from({
997 const MASK: u8 = 7;
998 const OFFSET: u8 = 16;
999 ((self.bits >> OFFSET) & MASK as u32) as u8
1000 })
1001 }
1002 #[doc = "Bit 20 - Enable differential mode"]
1003 #[inline]
1004 pub fn mode(&self) -> MODER {
1005 MODER::_from({
1006 const MASK: bool = true;
1007 const OFFSET: u8 = 20;
1008 ((self.bits >> OFFSET) & MASK as u32) != 0
1009 })
1010 }
1011 #[doc = "Bit 24 - Enable burst mode"]
1012 #[inline]
1013 pub fn burst(&self) -> BURSTR {
1014 BURSTR::_from({
1015 const MASK: bool = true;
1016 const OFFSET: u8 = 24;
1017 ((self.bits >> OFFSET) & MASK as u32) != 0
1018 })
1019 }
1020}
1021impl W {
1022 #[doc = r" Reset value of the register"]
1023 #[inline]
1024 pub fn reset_value() -> W {
1025 W { bits: 131072 }
1026 }
1027 #[doc = r" Writes raw bits to the register"]
1028 #[inline]
1029 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1030 self.bits = bits;
1031 self
1032 }
1033 #[doc = "Bits 0:1 - Positive channel resistor control"]
1034 #[inline]
1035 pub fn resp(&mut self) -> _RESPW {
1036 _RESPW { w: self }
1037 }
1038 #[doc = "Bits 4:5 - Negative channel resistor control"]
1039 #[inline]
1040 pub fn resn(&mut self) -> _RESNW {
1041 _RESNW { w: self }
1042 }
1043 #[doc = "Bits 8:10 - Gain control"]
1044 #[inline]
1045 pub fn gain(&mut self) -> _GAINW {
1046 _GAINW { w: self }
1047 }
1048 #[doc = "Bit 12 - Reference control"]
1049 #[inline]
1050 pub fn refsel(&mut self) -> _REFSELW {
1051 _REFSELW { w: self }
1052 }
1053 #[doc = "Bits 16:18 - Acquisition time, the time the ADC uses to sample the input voltage"]
1054 #[inline]
1055 pub fn tacq(&mut self) -> _TACQW {
1056 _TACQW { w: self }
1057 }
1058 #[doc = "Bit 20 - Enable differential mode"]
1059 #[inline]
1060 pub fn mode(&mut self) -> _MODEW {
1061 _MODEW { w: self }
1062 }
1063 #[doc = "Bit 24 - Enable burst mode"]
1064 #[inline]
1065 pub fn burst(&mut self) -> _BURSTW {
1066 _BURSTW { w: self }
1067 }
1068}