Skip to main content

Module hlc

Module hlc 

Source
Expand description

Hybrid Logical Clock (HLC) for array CRDT sync.

Each array op carries an Hlc that encodes a wall-clock millisecond timestamp (physical_ms), a per-millisecond monotonic counter (logical), and the originating ReplicaId. The total order (physical_ms, logical, replica_id) provides deterministic tiebreaks under any clock skew without requiring synchronised clocks.

physical_ms is stored as u64 but only values up to MAX_PHYSICAL_MS (2^48 − 1 ≈ year 10 889) are valid. This matches the spec’s u48 intent while keeping byte alignment simple.

Structs§

Hlc
A Hybrid Logical Clock timestamp.
HlcGenerator
Monotonic HLC generator for a single replica.

Constants§

MAX_PHYSICAL_MS
Maximum value for physical_ms (2^48 − 1).