neoh 0.3.3

A declarative HDL transpiler for rapid testbench development.
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module Adder(
  input logic a,
  input logic b,
  output logic c
);

  logic res;
  assign res = 1;
  assign c = a + b;
endmodule

module TestAdder_tb;
  Adder uut();
  initial begin
    #10 $display("Simulation Started");
  end
endmodule